JP5982125B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
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- JP5982125B2 JP5982125B2 JP2012001726A JP2012001726A JP5982125B2 JP 5982125 B2 JP5982125 B2 JP 5982125B2 JP 2012001726 A JP2012001726 A JP 2012001726A JP 2012001726 A JP2012001726 A JP 2012001726A JP 5982125 B2 JP5982125 B2 JP 5982125B2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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Description
本実施の形態では、本発明の一態様である半導体装置の作製方法について説明する。具体的には、トランジスタの作製方法について説明する。
本実施の形態では、実施の形態1で説明したトランジスタの応用例について説明する。
本実施の形態では、実施の形態1で説明したトランジスタの応用例であって実施の形態2とは異なるものについて説明する。
本実施の形態では、実施の形態1で説明したトランジスタの応用例であって実施の形態2及び実施の形態3とは異なるものについて説明する。
本実施の形態では、実施の形態1で説明したトランジスタの応用例であって実施の形態2乃至実施の形態4とは異なるものについて説明する。本実施の形態では、実施の形態1で説明したトランジスタを少なくとも一部に適用したCPU(Central Processing Unit)について説明する。
本実施の形態では、実施の形態1のトランジスタを適用した表示装置について説明する。
次に、本発明の一態様である電子機器について説明する。本発明の一態様である電子機器は、実施の形態1のトランジスタを少なくとも一部に有する。本発明の一態様である電子機器として、例えば、コンピュータ、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯情報端末(携帯型ゲーム機、音響再生装置なども含む)、デジタルカメラ、デジタルビデオカメラ、電子ペーパー、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)などが挙げられる。例えば、このような電子機器の表示部を構成する画素トランジスタに実施の形態6で説明した表示装置を適用すればよい。
101 下地絶縁層
102 第1の導電膜
104 第1のエッチングマスク
106 第1の導電層
108 第1の酸化物半導体膜
109 第2の酸化物半導体膜
110 第2のエッチングマスク
112 第1の酸化物半導体層
114 第1の絶縁層
116 第2の導電膜
118 第3のエッチングマスク
120 第2の導電層
122 第2の絶縁層
124 第2の酸化物半導体層
124A 領域
124B 領域
124C 領域
126 第3の酸化物半導体層
126A 領域
126B 領域
126C 領域
200 トランジスタ
202 トランジスタ
210 メモリセル
212 トランジスタ
214 トランジスタ
216 トランジスタ
218 ノード
220 メモリセルアレイ
222 駆動回路
224 読み出し回路
226 駆動回路
300 メモリセル
302 トランジスタ
304 トランジスタ
306 容量素子
308 ノード
310 メモリセル
312 トランジスタ
314 トランジスタ
316 容量素子
400 メモリセルアレイ
402 メモリセル
404 トランジスタ
406 容量素子
410 メモリセルアレイ
412 メモリセル
414 トランジスタ
416 トランジスタ
418 トランジスタ
420 トランジスタ
422 トランジスタ
424 トランジスタ
500 基板
502 ALU
504 ALUコントローラ
506 インストラクションデコーダ
508 インタラプトコントローラ
510 タイミングコントローラ
512 レジスタ
514 レジスタコントローラ
516 バスインターフェース
518 ROM
520 ROMインターフェース
550 スイッチング素子
552 記憶素子
554 記憶素子群
601 第1の基板
602 画素部
603 信号線駆動回路
604 走査線駆動回路
605 シール材
606 第2の基板
608 液晶層
610 トランジスタ
611 トランジスタ
613 液晶素子
615 接続端子電極
616 端子電極
617 酸化物半導体膜
618 FPC
619 異方性導電膜
630 第1の電極
631 第2の電極
632 絶縁膜
633 絶縁膜
635 スペーサ
700 表示素子を有する層
701 第1の基板
702 第2の基板
703 第1の偏光板
704 第2の偏光板
705 液晶分子
708 第1の電極
709 第2の電極
709a 第2の電極
709b 第2の電極
709c 第2の電極
750 電極
750a 電極
750b 電極
750c 電極
751 電極
751a 電極
751b 電極
751c 電極
758 突起物
759 突起物
762 絶縁層
763 絶縁層
811a ゲート電極
811b ゲート電極
813 半導体層
814 半導体層
815a 第1の電極
825a コンタクトホール
825b コンタクトホール
845 第1の配線
860 第2の配線
870a トランジスタ
870b トランジスタ
897 保護回路
901 筐体
902 筐体
903 表示部
904 キーボード
911 本体
912 スタイラス
913 表示部
914 操作ボタン
915 外部インターフェース
920 電子書籍
921 筐体
923 筐体
925 表示部
927 表示部
931 電源
933 操作キー
935 スピーカー
937 軸部
940 筐体
941 筐体
942 表示パネル
943 スピーカー
944 マイクロフォン
946 ポインティングデバイス
947 カメラ用レンズ
948 外部接続端子
949 太陽電池セル
950 外部メモリスロット
961 本体
963 接眼部
964 操作スイッチ
965 表示部
966 バッテリー
967 表示部
970 テレビジョン装置
971 筐体
973 表示部
975 スタンド
980 リモコン操作機
Claims (8)
- 基板上に下地絶縁層を形成し、
前記下地絶縁層上に第1の導電層を形成し、
前記下地絶縁層上及び前記第1の導電層上に第1の酸化物半導体膜を形成し、
前記基板に対して第1の加熱処理を行って前記第1の酸化物半導体膜を第2の酸化物半導体膜とし、
前記第2の酸化物半導体膜を加工して酸化物半導体層を形成し、
少なくとも前記酸化物半導体層を覆ってゲート絶縁層を形成し、
前記ゲート絶縁層上に第2の導電層を形成し、
前記基板に対して第2の加熱処理を行い、
前記下地絶縁層は、化学量論比よりも多くの酸素を含む絶縁性酸化物を含むことを特徴とする半導体装置の作製方法。 - 基板上に下地絶縁層を形成し、
前記下地絶縁層上に第1の導電層を形成し、
前記下地絶縁層上及び前記第1の導電層上に第1の酸化物半導体膜を形成し、
前記基板に対して第1の加熱処理を行って前記第1の酸化物半導体膜を第2の酸化物半導体膜とし、
前記第2の酸化物半導体膜を加工して酸化物半導体層を形成し、
少なくとも前記酸化物半導体層を覆ってゲート絶縁層を形成し、
前記ゲート絶縁層上に第2の導電層を形成し、
前記第2の導電層をマスクとして前記酸化物半導体層にイオンインプランテーションを行い、
前記基板に対して第2の加熱処理を行い、
前記下地絶縁層は、化学量論比よりも多くの酸素を含む絶縁性酸化物を含むことを特徴とする半導体装置の作製方法。 - 請求項1又は2において、
前記第1の導電層は、第1の層と第2の層とを有し、前記第1の層及び前記第2の層の少なくとも一は、銅を含むことを特徴とする半導体装置の作製方法。 - 請求項1乃至3のいずれか一において、
前記第2の加熱処理の前に、前記ゲート絶縁層及び前記第2の導電層を覆って保護絶縁層を形成することを特徴とする半導体装置の作製方法。 - 請求項1乃至4のいずれか一において、
前記絶縁性酸化物は酸化シリコンであることを特徴とする半導体装置の作製方法。 - 請求項1乃至5のいずれか一において、
前記第1の加熱処理において前記下地絶縁層の酸素の一部が脱離して、前記第1の酸化物半導体膜に供給されることを特徴とする半導体装置の作製方法。 - 請求項1乃至6のいずれか一において、
前記第1の酸化物半導体膜の水素濃度は、前記第2の酸化物半導体膜の水素濃度よりも高いことを特徴とする半導体装置の作製方法。 - 請求項1乃至7のいずれか一において、
前記第2の加熱処理において前記ゲート絶縁層の酸素の一部が脱離して、前記酸化物半導体層に供給されることを特徴とする半導体装置の作製方法。
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US10593786B2 (en) | 2020-03-17 |
KR101938890B1 (ko) | 2019-01-15 |
JP2018067724A (ja) | 2018-04-26 |
JP2012160714A (ja) | 2012-08-23 |
JP6251780B2 (ja) | 2017-12-20 |
US20170236922A1 (en) | 2017-08-17 |
KR20120090782A (ko) | 2012-08-17 |
US20150087112A1 (en) | 2015-03-26 |
US8912080B2 (en) | 2014-12-16 |
US20120178249A1 (en) | 2012-07-12 |
US9299814B2 (en) | 2016-03-29 |
JP2019096909A (ja) | 2019-06-20 |
JP6495998B2 (ja) | 2019-04-03 |
US9818850B2 (en) | 2017-11-14 |
JP2016195279A (ja) | 2016-11-17 |
US20160204232A1 (en) | 2016-07-14 |
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