CN113254381B - 用于支持多种互连协议的方法和装置 - Google Patents

用于支持多种互连协议的方法和装置 Download PDF

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Publication number
CN113254381B
CN113254381B CN202110280664.8A CN202110280664A CN113254381B CN 113254381 B CN113254381 B CN 113254381B CN 202110280664 A CN202110280664 A CN 202110280664A CN 113254381 B CN113254381 B CN 113254381B
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Prior art keywords
protocol
interconnect
connectors
subset
block
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CN113254381A (zh
Inventor
M·韦格
M·S·迈尔斯
S·R·范多伦
D·济亚卡斯
B·考里
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Intel Corp
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Intel Corp
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Abstract

实施例通常可以直接涉及用于确定多个连接器的配置的装置、系统、方法和技术，配置用于将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联，第一互连协议和第二互连协议是不同的互连协议，并且各自包括串行链路协议、一致性链路协议和加速器链路协议中的一个，使得根据第一互连协议来处理数据以用于经由多个连接器的第一子集的通信，并且使得根据第二互连协议来处理数据以用于经由多个连接器的第二子集的通信。

Description

用于支持多种互连协议的方法和装置
本申请是2017年6月14日提交的申请号为201780038679.5的同名专利申请的分案申请。
相关申请的交叉引用
本申请要求享有2016年12月31日提交的题为“TECHNIQUES TO SUPPORT MULTIPLEINTERCONNECT PROTOCOLS FOR A COMMON SET OF INTERCONNECT CONNECTORS”的美国专利申请第15/396,501号的权益，该申请要求享有2016年7月22日提交的美国临时专利第62/365,969号、2016年8月18日提交的美国临时专利申请第62/376,859号和2016年11月29日提交的美国临时专利申请第62/427,268号的优先权，其中的每个申请的全部内容由此通过引用并入。
技术领域
本文描述的实施例总体上包括支持用于一组公共互连连接器的多种互连协议的技术。
背景技术
随着计算系统发展，其中的组件变得越来越复杂。因此，在组件之间耦合和通信的互连架构的复杂度也在增加，以确保满足针对最佳组件操作的带宽和延迟要求。此外，不同的细分市场需要不同的互连架构，以适应市场需求和不同的互连连接。例如，这些计算系统可以提供要求具有物理资源的不同附加卡的各种处理能力。这些附加卡可以与基板耦合，并且可能要求任何数量的不同互连协议。然而，基板上的连接器空间可能是有限的，并且单个连接器典型地支持单个或有限数量的互连协议。因此，实施例可以涉及解决这些问题和其他问题。
附图说明
在附图的图中，通过示例的方式而非通过限制的方式示出了本发明的实施例，在附图中，相同的附图标记指代相似的元件。
图1示出了处理器设备的示例。
图2A-2D示出了计算机系统的示例。
图3A示出了互连协议层系统的示例。
图3B示出了另一互连协议层系统的示例。
图4A示出了第一逻辑流程图的示例。
图4B示出了第二逻辑流程图和第三逻辑流程图的示例。
图5示出了第四流程图的示例。
图6示出了计算机架构的示例。
具体实施方式
各种实施例通常可以涉及为一组公共互连连接器提供多种互连协议。例如，实施例可以包括确定多个连接器的配置，该配置用于将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联。在一些实例中，配置可以将互连协议(例如，串行链路协议、一致性链路协议和/或加速器链路协议)与连接器的第一子集和第二子集进行关联。该配置可以基于一个或多个熔丝的设置、自动发现操作和平台带，如下面将更详细地讨论的。
此外，实施例使得根据第一互连协议来处理数据以用于经由多个连接器的第一子集的通信，并且使得根据第二互连协议来处理数据以用于经由多个连接器的第二子集的通信。换言之，实施例包括基于配置来指引数据以用于由特定互连协议栈进行处理。互连协议栈可以特定于互连协议。互连协议栈的示例可以包括串行链路协议栈、一致性链路协议栈和加速器链路协议。因此，实施例包括基于连接器的配置使用这些或其他互连协议中的一个来处理数据。此外，实施例可以包括基于配置经由多个连接器发送和接收数据。实施例不限于此方式。在以下描述中，这些和其他细节将变得更加清楚。
现在参考附图，其中相同的附图标记始终用于指代相同的元素。在以下描述中，出于解释的目的，阐述了许多具体细节以提供对其的透彻理解。然而，显而易见的是，可以在没有这些具体细节的情况下实践新颖的实施例。在其他实例中，以框图的形式示出了公知的结构和设备以促进对其的描述。意图是覆盖与所要求保护的主题一致的所有修改、等同物和替代物。
现在参考附图，其中相同的附图标记始终用于指代相同的元素。在以下描述中，出于解释的目的，阐述了许多具体细节以便提供对其的透彻理解。然而，显而易见的是，可以在没有这些具体细节的情况下实践新颖的实施例。在其他实例中，以框图的形式示出了公知的结构和设备以促进对其的描述。意图是覆盖与所要求保护的主题一致的所有修改、等同物和替代物。
图1示出了处理器设备100的总体概述，处理器设备100可以是诸如计算机系统、计算系统、联网系统、分布式系统等之类的系统的一部分。在一些实例中，处理器设备100可以是任何类型的计算元件，例如但不限于微处理器、处理器、中央处理单元、数字信号处理单元、双核心处理器、四核心处理器、多核心处理器、移动设备处理器、台式机处理器、单核心处理器、片上系统(SoC)设备、复杂指令集计算(CISC)微处理器、精简指令集(RISC)微处理器、超长指令字(VLIW)微处理器、现场可编程门阵列(FPGA)电路、专用集成电路(ASIC)或单个芯片或集成电路上的任何其他类型的处理器或处理电路。处理器设备100可以具有多个元件，包括一个或多个核心115、接口逻辑110、存储器逻辑112、熔丝逻辑114以及具有多个连接器107的一个或多个接口105。
在所示出的示例中，处理器设备100包括四个核心115-1至115-4。然而，实施例不限于此方式，并且处理器设备100可以包括任何数量的核心，包括单个核心。此外，多核心设计可以在同一集成电路(IC)管芯上集成不同类型的处理器核心，例如，在异构设计中。因此，一个或多个核心115-1至115-4可以彼此不同。在一些实例中，多核心设计的每个核心可以以同质形式相同。
处理器设备100的核心115可以读取并执行程序指令。指令典型地是中央处理单元CPU指令(例如，添加、移动数据和分支)。多核心设计使得处理器设备100能够同时执行或运行多个指令，从而提高程序和应用的整体速度。在一些实例中，核心115可以集成到单个集成电路管芯上(称为芯片多处理器或CMP)，或集成到单个芯片封装中的多个管芯上。而且，具有多核心设计的处理器设备100可以实现为对称或非对称多处理器。
在一些实施例中，处理器设备100包括接口105和连接器107。连接器107和接口105可以提供物理连接以与诸如接口组件、存储器、处理卡、联网接口组件、加速器卡等之类的其他设备耦合。接口105和连接器107可以包括能够经由电信令传送信息和数据的一个或多个导线或信号迹线。在一些实例中，接口105和连接器107可以与能够接受处理卡的物理插槽耦合。这些处理卡典型地提供附加的处理和存储器，其可以针对特定任务，例如，图形处理、网络处理、存储处理、接口处理等。如下面将更详细讨论的，接口105和连接器107提供支持经由多种互连协议进行通信的一组公共引脚。
在实施例中，接口105和连接器107可以是一个或多个互连或逻辑链路的一部分并且能够使得一个或多个互连或逻辑链路发送和接收数据。经由互连和逻辑链路传送的信息和数据可以包括数据、控制消息、中断等。这些互连包括多个通道(例如，信令对)，并且每个通道可以由连接器107的四条导线或信号迹线构成，以例如与另一设备发送和接收数据。实施例不限于此方式。换言之，每个连接器107可以耦合到单个导线或迹线，并且四个连接器107可以构成通道。在一个示例中，接口105可以包括总共二十六(26)个通道以与另一设备传送数据。然而，实施例不限于此方式，并且例如基于计算要求，接口可以包括更多或更少的通道。
处理器设备100还包括接口逻辑110，用于实现和使得根据互连协议中的一个或多个(例如，串行链路协议、一致性链路协议、加速器链路协议或任何其他互连协议)经由接口105进行数据通信。串行链路协议的示例可以包括快速外围组件互连(PCIe或PCI-E)协议、PCI协议、通用串行总线(USB)协议、串行外围接口(SPI)协议、串行AT附件(SATA)协议以及用于经由链路串行通信的任何其他协议。一致性链路协议的示例可以包括高性能互连协议，例如，的QuickPath互连(QPI)协议和Intel的UltraPath互连(UPI)协议等。此外，加速器链路协议的示例可以包括/>的优化加速器协议(OAP)、联网加速器协议、存储加速器协议、显示加速器协议等。实施例不限于这些示例。在一些实施例中，接口逻辑110可以包括复用器，使得接口105的一组公共连接器107支持互连协议。因此，要求不同互连协议的不同设备或卡可以使用相同的接口105和连接器107。
在一些实施例中，接口逻辑110可以被配置为使得接口105的通道能够经由互连协议中的一个或多个(例如，串行链路协议、一致性链路协议和加速器链路协议中的一个或多个)进行通信。此外，并且在一些实例中，接口逻辑110可以实现并且使得一次根据多于一种互连协议经由接口105和连接器107进行通信。例如，连接器107的第一子集可以由接口逻辑110配置为根据第一互连协议进行通信，而连接器107的第二子集可以由接口逻辑110配置为根据第二互连协议进行通信。第二互连协议可以与第一互连协议不同。在另一示例中，连接器107的第三子集可以由接口逻辑110配置为根据第三互连协议进行通信。第三互连协议可以与第一互连协议和第二互连协议不同。
在实施例中，用于经由特定连接器107进行通信的互连协议可以由用户或计算机系统静态地或动态地编程。此外，例如，编程可以通过经由熔丝逻辑114设置一个或多个熔丝以配置接口逻辑110发生。在一些实例中，由接口逻辑110使用的互连协议可以在制造时、在计算系统启动期间或在运行时期间初始地编程。实施例不限于此方式。
在实施例中，接口逻辑110可以被重新编程为将接口105的连接器107中的一个或多个连接器107从一种互连协议重配为另一互连协议。例如，可以将接口逻辑110重新编程或设置为使得当前根据串行链路协议操作的一个或多个连接器107可以被重新编程为根据一致性链路协议或加速器链路协议进行操作。在另一示例中，可以将接口逻辑110重新编程为使得被编程为根据一致性链路协议操作的一个或多个连接器107根据串行链路协议或加速器链路协议进行操作。在第三示例中，可以将接口逻辑110重新编程为使得当前根据加速器链路协议操作的一个或多个连接器107可以根据一致性链路协议或串行链路协议进行操作。注意，编程和重新编程可以在接口逻辑110、接口105、连接器107或其某种组合处发生。换言之，设置和配置改变可以在上面提及的元件(例如，接口逻辑110、接口105以及连接器107)中的任一个元件处发生。因此，同一组连接器107或引脚可以支持不同的连接类型，并且基于接口逻辑110经由不同的互连协议提供通信。实施例不限于这些示例。
在一些实施例中，可以静态地和动态地将接口逻辑110编程和重新编程为支持针对连接器107或其一部分的互连协议。在一个示例中，可以在制造时将接口逻辑110编程为根据互连协议中的一种或多种互连协议进行操作，并且可以是一旦编程就不能改变。例如，可以基于制造商和包含在计算机系统中的设备的需要对接口逻辑110进行编程。在另一示例中，接口逻辑110可以在计算系统启动或运行时被编程，例如，由基本输入/输出系统(BIOS)执行的初始化、操作系统的启动或操作、在应用运行时期间等。例如，该编程可以在计算机系统首次引导/加载期间或在当与连接器107中的一个或多个连接器107耦合时首次检测到设备期间发生。在另一示例中，可以在计算系统基于不同设备耦合到连接器中的一个或多个连接器107运行或操作时对接口逻辑110重新编程。实施例不限于此方式。
如先前提及的，一个或多个连接器107可以由用户和计算机系统静态地和动态地编程。例如，图形用户接口(GUI)可以由BIOS、操作系统或应用呈现，以使得用户能够针对连接器107中的一个或多个连接器107设置一种或多种互连协议。在一些实施例中，BIOS、操作系统或应用中的一个或多个可以在没有用户交互的情况下针对连接器中的一个或多个连接器107设置一种或多种互连协议。例如，可以检测耦合到连接器107的设备，例如，经由来自设备的信号或接口105的轮询。BIOS、操作系统和应用中的一个或多个可以基于检测来针对连接器107确定适当的互连协议，并且相应地配置接口逻辑110、接口105和连接器107中的一个或多个。实施例不限于此方式。
在实施例中，处理器设备100还包括存储器逻辑112，例如，一致性和高速缓存逻辑。例如，存储器逻辑112可以执行用于处理器设备100的存储器(例如，高速缓存，或者不在与处理器设备100相同的管芯上的不同存储器)的操作。存储器逻辑112可以使得经由连接器107耦合到接口105的设备能够从存储器读取数据和向存储器写入数据。在一些实施例中，存储器逻辑112可以实现针对处理器设备100的核心115的存储器使用的一致性协议。由于可能有两个或更多个处理元件或核心115同时工作，因此它们可能同时访问高速缓存的相同存储器位置。例如，如果核心115中的一个改变存储器位置中的数据，则存储器逻辑112可以向所有其他核心115通知存储器中的共享值的改变。实施例不限于此方式，并且存储器逻辑112可以利用多个一致性协议中的任一个。
在实施例中，处理器设备100还包括熔丝逻辑114，熔丝逻辑114可以用于针对接口逻辑110设置一种或多种互连协议。熔丝逻辑114可以在处理器设备100的管芯上并且是用户可编程的。例如，熔丝逻辑114可以耦合到个体熔丝总线的熔丝映射以对一个或多个熔丝进行交互和编程。可以设置熔丝，并且控制哪些互连协议由接口逻辑110针对一个或多个连接器107中的每个连接器107实现和提供。例如，熔丝逻辑114可以将一个或多个熔丝编程为针对连接器107实现串行链路协议、一致性链路协议和加速器链路协议中的一个或多个。熔丝逻辑114可以基于用户输入对一个或多个熔丝进行编程。例如，用于针对接口逻辑110配置互连协议的熔丝可以由用户在制造时或在运行时期间编程。在另一示例中，用户可以将熔丝编程为经由BIOS、操作系统和应用中的至少一个来针对接口逻辑110设置互连协议。熔丝逻辑114还可以将一个或多个熔丝编程为基于直接从BIOS、应用或操作系统接收的信号来设置互连协议。在一些实例中，可以发生发现操作以检测用于配置接口逻辑110的设备或卡。发现操作可以包括例如自动检测卡或设备被插入插槽。在另一示例中，平台带可以用于确定接口逻辑110的配置。平台带可以包括例如在启动期间检测一个或多个引脚上的信令。
在一些实施例中，可以使用一种或多种方法的组合来配置接口逻辑110。例如，熔丝逻辑114和发现操作可以用于设置接口逻辑110。熔丝可以用于使得链路能够作为PCIe/OAP(即，没有UPI的)链路，并且自动发现操作可以用于确定附接的设备是PCIe还是OAP。注意，在一些实例中，熔丝逻辑114还可以用于禁用或禁止某些互连协议。例如，熔丝可以防止链路转换到OAP模式或UPI模式。因此，仅高效地显现链路PCIe。
图2A-2D示出了计算机系统200的各种配置，计算机系统200具有针对处理器设备100实现的一种或多种互连协议。图2A示出了计算机系统200，其具有与BIOS216和多个互连205耦合的处理器设备100，互连205可以包括通过连接器107或引脚的多个通道。互连205可以是将一个或多个其他设备、组件、元件等与处理器设备100耦合的逻辑连接。
在实施例中，互连205可以根据一种或多种互连协议来操作，例如，串行链路协议、一致性链路协议和加速器链路协议。此外，互连205可以包括串行链路互连，并且根据串行链路协议、一致性链路互连来操作，并且根据一致性链路协议、加速器链路互连来操作，并且根据加速器链路协议来操作，等等。
图2B示出了计算机系统200的一个示例配置，计算机系统200具有被设置为作为串行互连205-1和一致性互连205-2来操作的多个连接器107。串行互连205-1可以包括多个通道，例如，用于PCIe的十六(16)个通道，提供三十二(32)千兆字节(GB)/秒的带宽或吞吐量。类似地，一致性互连205-2可以包括多个通道，例如，二十四(24)个，以提供40.8GB/s的吞吐量。在该配置中，接口逻辑110可以根据串行链路协议经由串行互连205-1并且根据一致性链路协议经由一致性互连205-2来实现数据通信。该配置可以基于熔丝逻辑114对一个或多个熔丝的设置。此外，该设置可以在制造商通过使用已知的编程技术(例如，通过施加高电压脉冲来“吹制”一个或多个熔丝)对一个或多个熔丝(或反熔丝)编程时进行设置。在一些实施例中，该设置可以通过配置BIOS216中的信息、操作系统配置或应用配置来在计算机系统200的运行时或引导时间进行设置。该设置可以静态或动态地设置。在另一示例中，可以将配置硬编码到BIOS216中，或者可以将配置存储在配置只读存储器(ROM)中，并且通过功率管理代码传递到BIOS216。实施例不限于此方式。注意，图2B仅示出了可以应用于互连205的许多不同配置中的一个。
例如，图2C示出了计算机系统200的另一示例配置，计算机系统200具有被设置为作为串行互连205-1、一致性互连205-2和加速器互连205-3来操作的多个连接器107。串行互连205-1和一致性互连205-2可以包括如先前讨论的多个通道。加速器互连205-3也可以包括多个通道，例如，二十六(26)个，提供四十八(48)GB/秒的吞吐量。在该配置中，接口逻辑110可以根据串行链路协议经由串行互连205-1，根据一致性链路协议经由一致性互连205-2，以及根据加速器链路协议经由加速器互连205-3来实现数据通信。该配置可以基于熔丝逻辑114对一个或多个熔丝的设置。
图2D示出了计算机系统200的另一示例配置，计算机系统200具有被编程为作为串行互连205-1来操作的多个连接器107。在该示出的示例中，与图2B和图2C中所示的相比，串行互连205-1可以提供附加的通道。配置为串行互连205-1的附加通道可以为附加设备提供附加的带宽，以经由串行链路与处理器设备100耦合。例如，图2D中所示的串行互连205-1可以使得两个或更多个设备能够经由串行互连205-1与处理器设备100耦合。此外，图2D中的串行互连205-1可以提供两组16个通道，每个通道以32GB/s操作。如先前讨论的，例如，互连205-1和205-2可以静态地和动态地并且基于熔丝逻辑114对一个或多个熔丝的设置来编程和重新编程。实施例不限于图2A-2D中所示的这些示例。可以基于用户或制造计算机系统的需要来静态地或动态地设置其他配置。
图3A示出了互连协议栈300的实施例。互连协议栈300通常可以包括或表示先前讨论的互连协议，例如，串行链路协议、一致性链路协议和加速器链路协议。实施例不限于此方式。
互连协议栈300可以包括多个层，例如，事务层302、链路层304和物理层(PHY)306。在实施例中，互连协议栈300的部分可以实现为接口逻辑110、接口105、连接器107或其组合的部分。然而，实施例不限于此方式，并且互连协议栈300的部分可以在处理器设备100的不同元件中实现。
在一些实施例中，互连协议栈300和互连协议可以在一致性结构310与设备之间传送数据。一致性结构310可以与接口逻辑110连接并包括核心115、存储器逻辑112、存储器、处理器高速缓存等。一致性结构310可以包括协议代理，如下面在图3B中将更详细地讨论的。事务层306可以处理数据和动作请求和消息。事务层306可以解析动作请求和消息，并根据协议特定的规则(例如，排序规则)在处理器的存储器系统中发起适当的动作。事务层306还可以处理可以包括读取指令和写入指令的数据和动作请求。动作请求还可以包括例如针对UPI和OAP的高速缓存一致性动作，以及例如针对PCIe的地址事务动作。由事务层306处理的消息可以包括错误消息、中断等。
事务层306可以提供一个或多个核心115与包括PHY层302的至少部分(其可以包括接口105以及耦合到另一设备的连接器107)的互连架构之间的接口。事务层306还可以在事务层分组(TLP)中经由链路层304和PHY层302在核心115和处理器的存储器系统以及另一设备之间传送信息。如所提及的，该信息可以包括存储器读取、存储器写入、输入/输出(I/O)、I/O写入、消息、完成等。
链路层304(也称为数据链路层)充当事务层306与PHY 302之间的中间阶段。在一个实施例中，链路层304可以提供用于在链路中的两个组件之间交换TLP的可靠机制。链路层304可以在发送数据时将信息(例如，分组序列标识)附加到TLP，并且可以在接收数据时从分组中移除信息。链路层304还可以确定错误检测码(CRC)并将其附加到TLP的分组报头/有效载荷。链路层304将修改后的TLP发送到PHY 306，以用于跨物理设备(例如，接口105和连接器107)传输到外部设备。
在一个实施例中，互连协议栈300还可以包括PHY 302，PHY 302可以包括逻辑子块314和电子块318，用于物理地将分组发送到外部设备。在一些实施例中，PHY 302可以包括接口逻辑110、接口105和连接器107或引脚的部分，如图1和图2A-2D中示出的。
在一些实例中，逻辑子块314可以被划分为介质访问控制(MAC)子层和物理编码子层(PCS)。在一些实例中，用于由公司出版的快速PCI的PHY接口(PIPE)定义了MAC/PCS功能划分以及这两个子层之间的接口。PIPE规范还识别物理介质附件(PMA)层，其包括串行化器/解串器(SerDes)电路和其他模拟电路。
逻辑子块314还可以负责PHY 302的逻辑功能。逻辑子块314包括可以用作漂移缓冲器或弹性缓冲器的缓冲器。此外，逻辑子块314包括数据编码部分，其可以使用128b/130b传输码对数据进行编码，其中发送/接收130比特符号。在一些实施例中，逻辑子块314包括：用于准备传出信息以用于由电子块318发送的发送部分，以及用于在将接收到的信息传递到链路层304之前识别和准备接收到的信息的接收器部分。电子块318包括发送器和接收器，以用于发送和接收数据。发送器由逻辑子块314提供符号并发送到外部设备。接收器被提供来自外部设备的符号，并将接收到的信号转换为比特流。比特流被提供给逻辑子块314。
图3B示出了互连框图350的实施例，用于支持处理器设备100的一组公共引脚或连接器107上的多种互连协议。在所示示例中，接口逻辑110可以控制和确定一种或多种互连协议，例如，串行链路协议、一致性链路协议和加速器链路协议，以支持在一致性结构310组件与经由PHY层302耦合的另一设备之间发送和接收信息和数据。在实施例中，每种互连协议可以包括单独的互连协议栈，具有事务层306、链路层304和PHY层的至少一部分，即，PHY层逻辑314或逻辑PHY。互连协议可以共享PHY层302的电子块318，即，模拟PHY。此外，复用器362可以在电子块318与互连协议栈中的每个互连协议栈之间，以基于配置将信息和数据指引至适当的互连协议栈，如先前讨论的。
在实施例中，互连协议栈中的每个互连协议栈可以与协议代理耦合，协议代理可以是一致性结构310的一部分。协议代理包括但不限于串行链路协议代理352、一致性链路协议代理354和加速器链路协议代理356，其可以基于配置激活和去激活，如上面讨论的。激活协议代理可以在一致性结构310中建立各种协议映射和路由表，以将与所选择的协议相关联的动作请求和消息引导至激活的协议代理，并且将来自激活的协议代理的动作请求和消息引导至一致性结构310的其他组件，例如，核心115、处理器高速缓存、存储器逻辑112、存储器等。
在一个示例中，如果激活串行链路协议代理352，则一个或多个协议映射和路由表可以被配置为将来自一致性结构310的组件的动作请求和消息发送到串行链路协议代理352以用于由串行链路协议栈进一步处理。串行链路协议栈可以包括事务层306-1、链路层304-1、PHY层逻辑314-1。层306-1、304-1和314-1可以处理信息并且使得通过一个或多个连接器107经由电子块318与另一设备通信。类似地，经由被配置用于串行链路的一个或多个连接器107接收的信息可以由电子块318、PHY层逻辑314-1、链路层304-1和事务层306-1处理。串行链路协议代理352可以将包括动作请求和消息的信息发送到一致性结构310的组件。
在第二示例中，一致性链路协议代理354和一致性链路栈可以以与串行链路协议代理352类似的方式处理信息。例如，当一致性链路协议代理354被激活时，一个或多个协议映射和路由表格被配置为将来自一致性结构310的组件的信息发送到一致性链路协议代理354，以用于由事务层306-2、链路层304-2、PHY层逻辑314-2处理，并且用于通过经由电子块318与连接器107耦合的设备传送。经由被配置用于一致性链路的连接器107接收的信息可以由电子块318、PHY层逻辑314-2、链路层304-2和事务层306-2处理。一致性链路协议代理354可以将包括动作请求和消息的信息发送到一致性结构310的组件。
加速器链路协议代理356可以在被激活时以类似的方式操作。发送到加速器链路协议代理356的、来自一致性结构310的组件的信息可以由事务层306-3、链路层304-3、PHY层逻辑314-3处理，并且经由电子块318传送到与连接器107耦合的设备。经由被配置用于加速器链路的连接器107接收的信息可以由电子块318、PHY层逻辑314-3、链路层304-3和事务层306-3处理。加速器链路协议代理356可以将包括动作请求和消息的信息发送到一致性结构310的组件。
如先前讨论的，可以通过在熔丝逻辑114中设置一个或多个熔丝来确定接口逻辑110的配置。在一些实施例中，接口逻辑110包括复用器362，其被配置为例如使得基于熔丝逻辑114中的一个或多个设置来应用针对特定连接器107的特定互连协议。更具体地，可以设置一个或多个熔丝(或反熔丝)并配置复用器以及激活串行链路协议代理352，以经由第一组连接器107发送和接收数据。在另一示例中，可以将一个或多个熔丝(或反熔丝)设置为激活一致性链路协议代理354并配置复用器362以经由第二组连接器107发送和接收数据。在第三示例中，可以将一个或多个熔丝(或反熔丝)设置为激活加速器链路协议代理356并配置复用器362以经由第三组连接器107传送信息。实施例不限于这些示例，并且不同的互连协议可以应用于各组连接器107中的一个或多个。此外，熔丝逻辑110可以被配置为使得协议代理中的一个或多个协议代理被去激活。可以将这些熔丝和配置改变和重新编程为使得不同的互连协议应用于一组或多组连接器107。
在操作中，处理器设备100可以经由一个或多个连接器107从耦合的设备接收数据或信息。耦合的设备可以是任何类型的设备，其可以将信息发送到处理器设备100以用于由一个或多个核心115和一致性结构(一致性结构可以连接核心115)、处理器的存储器系统(包括存储器逻辑112和存储器)、接口逻辑110和互连协议栈处理。PHY层302可以接收数据或信息并根据适当的互连协议栈对其进行处理。所使用的互连协议栈可以基于在其上接收数据或信息的一个或多个连接器107或引脚以及复用器362。
PHY层逻辑314可以接收信息或数据并执行解码和解扰以确保维持信息或数据的完整性。不同的互连协议可以使用不同的编码/解码技术来确保比特完整性。例如，PCIe2.0利用8b/10b编码，这意味着对于每八个有效载荷比特或编码有十个已编码比特来传输数据，导致20％的开销。在另一示例中，PCIe 3.0利用使用较少开销的128b/130b编码。PHY层逻辑314可以基于所利用的互连协议来执行处理。实施例不限于此方式。
PHY层逻辑314可以将数据或信息传递或发送到互连协议栈的其他层(例如，链路层304和事务层306)，以进行进一步处理。这些层中的每个层可以根据特定的互连协议处理数据或信息。可以将信息或数据发送到适当的协议代理和一致性结构310以进行处理。
以类似的方式，处理器设备100可以向另一设备发送或传送数据或信息。例如，信息或数据可以基于配置的映射和路由表由一致性结构310和适当的协议代理来接收。如上面先前讨论的，信息或数据可以由包括事务层306、链路层304和PHY层逻辑314的互连协议层来处理。信息和数据可以由复用器362和电子块318经由适当的连接器107传送到目的地设备。
图4A示出了用于利用一种或多种互连协议配置接口逻辑110和一个或多个连接器107的第一逻辑流程图400。尽管逻辑流程图400示出了某些操作以特定顺序发生，但实施例不限于此方式。一些操作可能在其他操作之前或之后发生，并且一些操作可能并行发生。此外，逻辑流程400可以表示由本文描述的一个或多个实施例执行的操作中的一些或全部操作。
在框402处，实施例包括确定互连的配置以及哪些互连协议对于一个或多个连接器是活动的和非活动的。在实施例中，可以基于熔丝逻辑的配置和一个或多个熔丝的设置来进行确定。还可以基于被执行以检测与互连耦合的卡或设备的发现操作来确定配置。例如，可以执行发现操作并检测设备是PCIe设备、OAP设备等。在一些实施例中，还可以使用平台带来确定或检测配置，平台带可以包括在启动期间在一个或多个引脚或连接器上的信令。
在框404处，逻辑流程400包括基于系统的配置来激活和去激活协议代理。例如，如果配置包括将一个或多个连接器配置为串行链路，则可以激活串行链路协议代理。类似地，如果要将一个或多个连接器107配置为一致性链路，则激活一致性链路协议代理。如果要将一个或多个连接器配置为加速器链路，则可以激活加速器链路协议代理。如果一个或多个连接器不被配置为特定链路，例如，串行链路、一致性链路和加速器链路，则可以去激活对应的协议。例如，如果连接器不被配置为串行链路，则可以激活串行链路协议代理。
在框406处，逻辑流程400可以包括基于活动协议代理来配置一个或多个协议映射和路由表。例如，协议映射和路由表可以被配置为：如果连接器中的一个或多个连接器被配置为串行链路，则将请求和消息引导至串行链路协议代理，以及适当的互连协议层。类似地，协议映射和路由表可以被配置为：如果一个或多个连接器被配置为一致性链路和加速器链路，则将特定请求和消息引导至一致性链路协议代理和加速器链路协议代理。实施例不限于此方式。
图4B示出了用于经由连接器接收信息的第二逻辑流程图450和用于将信息发送到另一设备或组件的第三逻辑流程图470。尽管逻辑流程图450和470示出了某些操作以特定顺序发生，但实施例不限于此方式。一些操作可能在其他操作之前或之后发生，并且一些操作可能并行发生。此外，逻辑流程450和470可以表示由本文描述的一个或多个实施例执行的操作中的一些或全部操作。
在框452处，实施例包括经由接口和一个或多个连接器接收信息。例如，可以从与一个或多个连接器耦合的另一设备或组件接收数据。在框454处，逻辑流程450包括将信息发送到适当的互连协议栈。在一个实例中，接口逻辑可以基于连接器和配置来确定互连协议栈，如图4A中所讨论的。在一个示例中，该配置可以使得复用器将信息引导至适当的互连协议栈。例如，可以基于配置将信息发送到串行链路协议栈，并且由与串行链路协议栈相关联的PHY层、链路层和事务层来处理该信息。在框458处，可以根据互连协议处理数据。类似地，可以基于配置利用一致性协议栈和加速器协议栈。
在框456处，可以由PHY层、链路层和事务处理该信息，如图3A和图3B中所讨论的。而且，用于互连协议栈的协议代理可以确定用于发送信息的一致性结构的一个或多个组件。例如，实施例可以包括将信息传送到核心、存储器、存储器逻辑等。在框458处，可以将信息发送到一致性结构的组件。
逻辑流程470可以包括从组件接收信息以发送到经由连接器耦合的设备。在框472处，协议代理可以从一致性结构的组件接收信息(例如，请求、消息等)，以发送到设备。在框474处，协议代理(其可以是串行链路协议代理、一致性链路协议代理和加速器链路协议代理中的一个)可以将信息发送到对应的互连协议。该信息可以在框476处由事务层、链路层和PHY层处理，并且在框478处传送到设备。
图5示出了用于经由一个或多个连接器处理数据的第一处理流程500的示例。处理流程500可以表示由本文描述的一个或多个实施例执行的操作中的一些或全部操作。例如，处理流程500用图1和图2A至图2D中所示的组件示出。然而，实施例不限于此方式。
在框505处，处理流程500包括经由PHY层接口的多个连接器发送和接收数据。例如，可以从另一设备或组件接收数据，以用于由一个或多个核心处理，以用于经由多个连接器进行处理。在另一示例中，可以经由多个连接器将数据发送到另一设备。实施例不限于此方式。
在框510处，逻辑流程500可以包括：使得根据第一互连协议来处理数据以用于经由多个连接器的第一子集的通信，并且使得根据第二互连协议来处理数据以用于经由多个连接器的第二子集的通信，第一互连协议和第二互连协议是不同的协议，并且各自包括串行链路协议、一致性链路协议和加速器链路协议中的一个。
图6示出了适用于实现如先前描述的各种实施例的示例性计算架构600的实施例。在一个实施例中，计算架构600可以包括或实现为先前讨论的一个或多个系统和设备的一部分。
如本申请中所使用的，术语“系统”和“组件”旨在指代与计算机相关的实体(硬件、硬件和软件的组合、软件或执行中的软件)，这些实体的示例由示例性计算架构600提供。例如，组件可以是但不限于是处理器上运行的进程、处理器、硬盘驱动器、(光和/或磁存储介质的)多个存储驱动器、对象、可执行文件、执行线程、程序和/或计算机。通过说明的方式，在服务器上运行的应用和服务器两者都可以是组件。一个或多个组件可以驻留在进程和执行线程内，并且组件可以位于一个计算机上和/或分布在两个或更多个计算机之间。此外，组件可以通过各种类型的通信介质彼此通信地耦合以协调操作。协调可以涉及单向或双向信息交换。例如，组件可以传送以信号形式通过通信介质传送的信息。信息可以实现为分配给各种信号线的信号。在这种分配中，每个消息都是信号。然而，另外的实施例可以可替代地采用数据消息。可以跨各种连接来发送这样的数据消息。示例性连接包括并行接口、串行接口以及总线接口。
计算架构600包括各种常见的计算元件，例如，一个或多个处理器、多核心处理器、协处理器、存储器单元、芯片组、控制器、外围设备、接口、振荡器、定时设备、视频卡、音频卡、多媒体输入/输出(I/O)组件、电源等。然而，实施例不限于由计算架构600实现。
如图6所示，计算架构600包括处理单元604、系统存储器606以及系统总线608。处理单元604可以是各种商业可用处理器中的任一种，例如，关于处理电路所描述的那些在图1中示出。
系统总线608为系统组件提供接口，包括但不限于系统存储器606到处理单元604。系统总线608可以是若干类型的总线结构中的任一种，该总线结构还可以使用各种商业可用的总线架构中的任一种互连到存储器总线(具有或不具有存储器控制器)、外围总线以及本地总线。接口适配器可以经由插槽架构连接到系统总线608。示例插槽架构可以包括而不限于加速图形端口(AGP)、卡总线、(扩展)工业标准架构((E)ISA)、微通道架构(MCA)、NuBus、外围组件互连(扩展)(PCI(X))、快速PCI、个人计算机存储卡国际协会(PCMCIA)等。
计算架构600可以包括或实现各种制品。制品可以包括用于存储逻辑的计算机可读存储介质。计算机可读存储介质的示例可以包括能够存储电子数据的任何有形介质，包括易失性存储器或非易失性存储器、可移除或不可移除存储器、可擦除或不可擦除存储器、可写或可重写存储器等。逻辑的示例可以包括使用任何合适类型的代码实现的可执行计算机程序指令，该代码例如为源代码、编译代码、解释代码、可执行代码、静态代码、动态代码、面向对象代码、可视代码等。实施例还可以至少部分地实现为包含在非暂时性计算机可读介质中或包含在其上的指令，这些指令可以由一个或多个处理器读取并执行以使得能够执行本文中描述的操作。
系统存储器606可以包括以一个或多个较高速存储器单元形式的各种类型的计算机可读存储介质，例如，只读存储器(ROM)、随机存取存储器(RAM)、动态RAM(DRAM)、双倍数据速率DRAM(DDRAM)、同步DRAM(SDRAM)、静态RAM(SRAM)、可编程ROM(PROM)、可擦除可编程ROM(EPROM)、电可擦除可编程ROM(EEPROM)、闪速存储器、诸如铁电聚合物存储器之类的聚合物存储器、双向存储器、相变存储器或铁电存储器、硅-氧化物-氮化物-氧化物-硅(SONOS)存储器、磁卡或光卡、诸如独立磁盘冗余阵列(RAID)驱动器之类的设备阵列、固态存储器设备(例如，USB存储器、固态驱动器(SSD))以及适合于存储信息的任何其他类型的存储介质。在图6示出的所示实施例中，系统存储器606可以包括非易失性存储器610和易失性存储器612。基本输入/输出系统(BIOS)可以存储在非易失性存储器610中。
计算机602可以包括以一个或多个较低速存储器单元形式的各种类型的计算机可读存储介质，包括内部(或外部)硬盘驱动器(HDD)614、用于从可移除磁盘618读取或写入可移除磁盘618的磁性软盘驱动器(FDD)616、以及用于从可移除光盘622(例如，CD-ROM或DVD)读取或写入可移除光盘622的光盘驱动器620。HDD 614、FDD 616以及光盘驱动器620可以分别通过HDD接口624、FDD接口626以及光盘驱动器接口628连接到系统总线608。用于外部驱动器实现的HDD接口624可以包括通用串行总线(USB)和IEEE 1394接口技术中的至少一个或两者。
驱动器和相关联的计算机可读介质提供对数据、数据结构、计算机可执行指令等的易失性存储和非易失性存储。例如，许多程序模块可以存储在驱动器和存储器单元610、612中，包括操作系统630、一个或多个应用程序632、其他程序模块634以及程序数据636。在一个实施例中，一个或多个应用程序632、其他程序模块634以及程序数据636可以包括例如各种应用和系统100的组件。
用户可以通过一个或多个有线/无线输入设备(例如，键盘638和诸如鼠标640之类的定点设备)将命令和信息输入到计算机602中。其他输入设备可以包括麦克风、红外线(IR)遥控器、射频(RF)遥控器、游戏手柄、手写笔、读卡器、加密狗(dongle)、指纹读取器、手套、图形平板、操纵杆、键盘、视网膜读取器、触摸屏(例如，电容式、电阻式等)、轨迹球、跟踪板、传感器、触笔等。这些和其他输入设备通常通过耦合到系统总线608的输入设备接口642连接到处理单元604，但是可以通过其他接口(例如，并行端口、IEEE 1394串行端口、游戏端口、USB端口、IR接口等)连接。
监视器644或另一类型的显示设备还经由诸如视频适配器646之类的接口连接到系统总线608。监视器644可以在计算机602的内部或外部。除了监视器644之外，计算机典型地还包括其他外围输出设备，例如，扬声器、打印机等。
计算机602可以在联网环境中使用经由有线通信和无线通信到一个或多个远程计算机(例如，远程计算机648)的逻辑连接来操作。远程计算机648可以是工作站、服务器计算机、路由器、个人计算机、便携式计算机、基于微处理器的娱乐装置、对等设备或其他公共网络节点，并且典型地包括相对于计算机602描述的元件中的许多或所有元件，但是出于简洁的目的，仅示出了存储器/存储设备650。所描述的逻辑连接包括到局域网(LAN)652和更大网络(例如，广域网(WAN)654)的有线/无线连接。这种LAN和WAN联网环境常见于办公室和公司，并且促进企业范围的计算机网络(例如，内联网)，所有这些联网环境都可以连接到全球通信网络(例如，互联网)。
当在LAN联网环境中使用时，计算机602通过有线和无线通信网络接口或适配器656连接到LAN 652。适配器656可以促进到LAN 652的有线通信和无线通信，LAN 652还可以包括设置在其上用于与适配器656的无线功能进行通信的无线接入点。
当在WAN联网环境中使用时，计算机602可以包括调制解调器658，或者连接到WAN654上的通信服务器，或者具有用于通过WAN 654(例如，通过互联网)建立通信的其他单元。调制解调器658(其可以是内部的或外部的以及是有线设备和无线设备)经由输入设备接口642连接到系统总线608。在联网环境中，相对于计算机602描述的程序模块或其部分可以存储在远程存储器/存储设备650中。应当理解，所示出的网络连接是示例性的，并且可以使用在计算机之间建立通信链路的其他单元。
计算机602可操作以用于使用IEEE 802系列标准与有线和无线的设备或实体进行通信，例如，在无线通信中可操作地设置的无线设备(例如，IEEE 802.11空中调制技术)。这至少包括WiFi(或无线保真)、WiMax以及BluetoothTM无线技术，3G、4G、LTE无线技术等。因此，通信可以是与常规网络一样的预定义结构，或者仅仅是至少两个设备之间的特设通信。WiFi网络使用称为IEEE 802.11x(a、b、g、n等)的无线电技术来提供安全、可靠、快速的无线连接。WiFi网络可以用于将计算机彼此连接，将计算机连接到互联网以及连接到有线网络(使用与IEEE 802.3相关的介质和功能)。
如先前参考图1-图5描述的各种元件和组件可以包括各种硬件元件、软件元件或两者的组合。硬件元件的示例可以包括设备、逻辑器件、组件、处理器、微处理器、电路、处理器、电路元件(例如，晶体管、电阻器、电容器、电感器等)、集成电路、专用集成电路(ASIC)、可编程逻辑器件(PLD)、数字信号处理器(DSP)、现场可编程门阵列(FPGA)、存储器单元、逻辑门、寄存器、半导体器件、芯片、微型芯片、芯片组等。软件元件的示例可以包括软件组件、程序、应用、计算机程序、应用程序、系统程序、软件开发程序、机器程序、操作系统软件、中间件、固件、软件模块、例程、子例程、函数、方法、过程、软件接口、应用程序接口(API)、指令集、计算代码、计算机代码、代码段、计算机代码段、字、值、符号或其任何组合。然而，确定是否使用硬件元件和/或软件元件来实现实施例可以根据任何数量的因素而变化，例如，所期望的计算速率、功率水平、热容差、处理周期预算、输入数据速率、输出数据速率、存储器资源、数据总线速度以及其他设计或性能限制，如对于给定实现方式所期望的。
详细公开现在转向提供与另外的实施例有关的示例。下面提供的示例一至二十五(1-25)旨在是示例性而非限制性的。
在第一示例中，系统、设备、装置等可以包括：物理(PHY)层接口，其包括多个连接器，多个连接器被配置为与一个或多个其他设备耦合，并且经由多个连接器发送和接收数据；以及接口逻辑，其与PHY层接口耦合，接口逻辑使得根据第一互连协议来处理数据以用于经由多个连接器的第一子集的通信，并且使得根据第二互连协议来处理数据以用于经由多个连接器的第二子集的通信，第一互连协议和第二互连协议是不同的协议，并且各自包括串行链路协议、一致性链路协议以及加速器链路协议中的一个。
在第二示例中并且促进第一示例，系统、设备、装置等可以包括：接口逻辑使得根据第三互连协议来处理数据以用于经由多个连接器的第三子集的通信，第三互连协议与第一互连协议和第二互连协议不同，并且第三互连协议包括串行链路协议、一致性链路协议以及加速器链路协议中的一个。
在第三示例中并且促进先前的示例，系统、设备、装置等可以包括：熔丝逻辑；以及一个或多个熔丝，其与接口逻辑耦合，一个或多个熔丝可编程为将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联。
在第四示例中并且促进先前的示例，系统、设备、装置等可以包括：一个或多个熔丝静态地可编程为防止对哪种互连协议与多个连接器的特定子集相关联的改变。
在第五示例中并且促进先前的示例，系统、设备、装置等可以包括：一个或多个熔丝可重新编程为将第三互连协议与多个连接器的第一子集和多个连接器的第二子集中的至少一个进行关联，第三互连协议与第一互连协议和第二互连协议中的至少一个不同。
在第六示例中并且促进先前的示例，系统、设备、装置等可以包括：接口逻辑基于基本输入/输出系统(BIOS)中的设置使得根据第一互连协议和第二互连协议来处理数据以用于经由多个连接器的通信。
在第七示例中并且促进先前的示例，系统、设备、装置等可以包括：BIOS；以及一个或多个熔丝，其与BIOS耦合，一个或多个熔丝可编程为将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联。
在第八示例中并且促进先前的示例，系统、设备、装置等可以包括：接口逻辑基于信号将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联，信号是基于与第一子集耦合的第一设备和与第二子集耦合的第二设备而生成的。
在第九示例中并且促进先前的示例，系统、设备、装置等可以包括：接口逻辑基于在运行时期间由应用生成的信号，动态地将第一互连协议与多个连接器的第一子集的关联和第二互连协议与多个连接器的第二子集的关联中的至少一个改变为不同的互连协议。
在第十示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其包括多个指令，该多个指令在被执行时使得处理电路能够：确定多个连接器的配置，配置用于将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联，第一互连协议和第二互连协议是不同的互连协议，并且各自包括串行链路协议、一致性链路协议以及加速器链路协议中的一个；使得根据第一互连协议来处理数据以用于经由多个连接器的第一子集的通信；以及使得根据第二互连协议来处理数据以用于经由多个连接器的第二子集的通信。
在第十一示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其包括多个指令，该多个指令在被执行时使得处理电路能够：基于配置将第三互连协议与多个连接器的第三子集进行关联，第三互连协议与第一互连协议和第二互连协议不同，并且第三互连协议包括串行链路协议、一致性链路协议以及加速器链路协议中的一个；以及使得根据第三互连协议来处理数据以用于经由多个连接器的第三子集的通信。
在第十二示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其包括多个指令，该多个指令在被执行时使得处理电路能够：检测一个或多个熔丝，以确定用于将第一互连协议与多个连接器的第一子集进行关联并且将第二互连协议与多个连接器的第二子集进行关联的配置。
在第十三示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其中，一个或多个熔丝静态地可编程为防止对哪种互连协议与多个连接器的特定子集相关联的改变。
在第十四示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其中，一个或多个熔丝可重新编程为将不同的互连协议与多个连接器的第一子集和多个连接器的第二子集中的至少一个进行关联，不同的互连协议与第一互连协议和第二互连协议中的至少一个不同。
在第十五示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其包括多个指令，该多个指令在被执行时使得处理电路能够：基于基本输入/输出系统(BIOS)中或只读存储器中的设置来确定配置。
在第十六示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其包括多个指令，该多个指令在被执行时使得处理电路能够：基于信号将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联，信号是根据第一设备与第一子集耦合并且第二设备与第二子集耦合而生成的。
在第十七示例中并且促进先前的示例，实施例可以包括非暂时性计算机可读存储介质，其包括多个指令，该多个指令在被执行时使得处理电路能够：基于在运行时期间由应用生成的信号，动态地将第一互连协议与多个连接器的第一子集的关联和第二互连协议与多个连接器的第二子集的关联中的至少一个改变为不同的互连协议。
在第十八示例中并且促进先前的示例，实施例可以包括计算机实现的方法，包括：确定多个连接器的配置，配置用于将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联，第一互连协议和第二互连协议是不同的互连协议，并且各自包括串行链路协议、一致性链路协议以及加速器链路协议中的一个；使得根据第一互连协议来处理数据以用于经由多个连接器的第一子集的通信；以及使得根据第二互连协议来处理数据以用于经由多个连接器的第二子集的通信。
在第十九示例中并且促进先前的示例，实施例可以包括计算机实现的方法，包括：基于配置将第三互连协议与多个连接器的第三子集进行关联，第三互连协议与第一互连协议和第二互连协议不同，并且第三互连协议包括串行链路协议、一致性链路协议以及加速器链路协议中的一个；以及使得根据第三互连协议来处理数据以用于经由多个连接器的第三子集的通信。
在第二十示例中并且促进先前的示例，实施例可以包括计算机实现的方法，包括：检测一个或多个熔丝，以确定用于将第一互连协议与多个连接器的第一子集进行关联并且将第二互连协议与多个连接器的第二子集进行关联的配置。
在第二十一示例中并且促进先前的示例，实施例可以包括计算机实现的方法，其中，一个或多个熔丝静态地可编程为防止对哪种互连协议与多个连接器的特定子集相关联的改变。
在第二十二示例中并且促进先前的示例，实施例可以包括计算机实现的方法，其中，一个或多个熔丝可重新编程为将不同的互连协议与多个连接器的第一子集和多个连接器的第二子集中的至少一个进行关联，不同的互连协议与第一互连协议和第二互连协议中的至少一个不同。
在第二十三示例中并且促进先前的示例，实施例可以包括计算机实现的方法，包括：基于基本输入/输出系统(BIOS)中或只读存储器中的设置来确定配置。
在第二十四示例中并且促进先前的示例，实施例可以包括计算机实现的方法，包括：基于信号将第一互连协议与多个连接器的第一子集进行关联，并且将第二互连协议与多个连接器的第二子集进行关联，信号是根据第一设备与第一子集耦合并且第二设备与第二子集耦合而生成的。
在第二十五示例中并且促进先前的示例，实施例可以包括计算机实现的方法，包括：基于在运行时期间由应用生成的信号，动态地将第一互连协议与多个连接器的第一子集的关联和第二互连协议与多个连接器的第二子集的关联中的至少一个改变为不同的互连协议。
可以使用表述“一个实施例”或“实施例”以及其派生词来描述一些实施例。这些术语意味着结合实施例描述的特定特征、结构、或特性包括在至少一个实施例中。短语“在一个实施例中”在说明书中各处的出现并不一定都指代相同的实施例。此外，可以使用表述“耦合”和“连接”以及其派生词来描述一些实施例。这些术语并不一定旨在作为彼此的同义词。例如，可以使用术语“连接”和“耦合”来描述一些实施例，以指示两个或更多个元件彼此直接物理或电接触。然而，术语“耦合”还可以意味着两个或更多个元件彼此没有直接接触，但是仍然彼此协作或交互。
需要强调的是，提供公开内容的摘要以允许读者快速地确定本技术公开内容的实质。所主张的是理解本摘要不用于解释或限制权利要求的范围或含义。而且，在前述具体实施方式中，可以看到出于精简公开内容的目的，将各种特征一起组合在单个实施例中。本公开内容的方法不应被解释为反映了这样的意图：要求保护的实施例要求比在每项权利要求中明确引述的特征更多的特征。相反，如所附权利要求反映的，发明主题在于少于单个公开的实施例的所有特征。因此，所附权利要求在此刻并入具体实施方式中，其中每项权利要求本身作为单独的实施例。在所附权利要求中，将术语“包括(including)”和“其中(inwhich)”分别用作相应术语“包含(comprising)”和“其中(wherein)”的通俗英文同义词。此外，术语“第一”、“第二”、“第三”等仅用作标签，而非旨在对其对象施加数字要求。
以上所描述的内容包括所公开的架构的示例。当然，不可能描述组件和方法的每一个可想到的组合，但是本领域普通技术人员可以认识到许多另外的组合和排列是可能的。因此，新颖的架构旨在涵盖落入所附权利要求的精神和范围内的所有此类改变、修改和变型。

Claims (25)

1.一种用于支持多种互连协议的装置，包括：
集成到封装中的多个集成电路管芯上的多个处理核心，
所述多个处理核心用于执行指令并且处理数据；
用于耦合到存储器设备的存储器逻辑；
用于连接所述多个处理核心和所述存储器逻辑的一致性互连结构单元；
物理(PHY)层接口，其包括：
耦合到多个数据通道的多个连接器，
所述多个连接器包括：
连接器的第一子集，其用于根据第一互连协议进行通信，
连接器的第二子集，其用于根据第二互连协议进行通信，以及
连接器的第三子集，其用于根据第三互连协议进行通信；
第一逻辑子块，其用于根据所述第一互连协议对数据进行编码；
第二逻辑子块，其用于根据所述第二互连协议对数据进行编码；
第三逻辑子块，其用于根据所述第三互连协议对数据进行编码；
复用器，其用于：
将所述连接器的第一子集连接到所述第一逻辑子块，
将所述连接器的第二子集连接到所述第二逻辑子块，以及
将所述连接器的第三子集连接到所述第三逻辑子块；
第一事务层，其用于根据所述第一互连协议在所述一致性互连结构单元与所述第一逻辑子块之间传送数据；
第二事务层，其用于根据所述第二互连协议在所述一致性互连结构单元与所述第二逻辑子块之间传送数据；以及
第三事务层，其用于根据所述第三互连协议在所述一致性互连结构单元与所述第三逻辑子块之间传送数据。
2.根据权利要求1所述的装置，其中，所述复用器用于基于物理或逻辑控制输入，将所述连接器的第一子集连接到所述第一逻辑子块，将所述连接器的第二子集连接到所述第二逻辑子块，并且将所述连接器的第三子集连接到所述第三逻辑子块。
3.根据权利要求2所述的装置，其中，所述物理或逻辑控制输入包括从计算机系统的基本输入输出系统(BIOS)接收的配置信号。
4.根据权利要求2或3所述的装置，其中，所述物理或逻辑控制输入包括基于一个或多个熔丝的设置的配置信号。
5.根据权利要求2或3所述的装置，其中，所述物理或逻辑控制输入是基于由计算机系统的固件和/或软件执行的发现操作而生成的。
6.根据权利要求2或3所述的装置，其中，所述一致性互连结构单元包括用于根据所述第一互连协议与一个或多个第一事务层进行通信的第一代理。
7.根据权利要求6所述的装置，其中，所述一致性互连结构单元包括用于根据所述第二互连协议与一个或多个第二事务层进行通信的第二代理。
8.根据权利要求2或3所述的装置，其中，所述第一互连协议包括串行链路协议，并且所述连接器的第一子集用于执行串行输入/输出(IO)通信。
9.根据权利要求8所述的装置，其中，所述第二互连协议包括存储器协议，并且所述连接器的第二子集耦合到支持远程存储器访问的第二串行互连。
10.根据权利要求2或3所述的装置，其中，所述第一逻辑子块包括第一物理编码子层(PCS)，所述第二逻辑子块包括第二PCS，并且所述第三逻辑子块包括第三PCS。
11.一种用于支持多种互连协议的方法，包括：
提供包括多个集成电路管芯的封装，所述多个集成电路管芯中的一个或多个集成电路管芯包括存储器控制器、多个处理核心以及一致性互连结构单元，所述存储器控制器用于耦合到存储器设备，所述多个处理核心用于执行指令并且处理数据，所述一致性互连结构单元用于耦合所述多个处理核心与所述存储器控制器；
将物理(PHY)接口电路的连接器的第一子集与第一互连协议进行关联；
将物理(PHY)接口电路的连接器的第二子集与第二互连协议进行关联；
将物理(PHY)接口电路的连接器的第三子集与第三互连协议进行关联；
基于物理或逻辑控制输入经由复用器将包括第一物理编码子层(PCS)的第一子块连接到所述连接器的第一子集，将包括第二PCS的第二子块连接到所述连接器的第二子集，并且将包括第三PCS的第三子块连接到所述连接器的第三子集；
分别由所述第一PCS、所述第二PCS和所述第三PCS根据所述第一互连协议、所述第二互连协议和所述第三互连协议对数据进行编码，以用于分别在所述连接器的第一子集、所述连接器的第二子集和所述连接器的第三子集上进行通信；
由第一协议层电路根据所述第一互连协议将从所述一致性互连结构单元接收的数据提供给所述第一子块；
由所述第一协议层电路根据所述第一互连协议将从所述第一子块接收的数据提供给所述一致性互连结构单元；
由第二协议层电路根据所述第二互连协议将从所述一致性互连结构单元接收的数据提供给所述第二子块；
由所述第二协议层电路根据所述第二互连协议将从所述第二子块接收的数据提供给所述一致性互连结构单元；
由第三协议层电路根据所述第三互连协议将从所述一致性互连结构单元接收的数据提供给所述第三子块；以及
由所述第三协议层电路根据所述第三互连协议将从所述第三子块接收的数据提供给所述一致性互连结构单元。
12.根据权利要求11所述的方法，其中，所述物理或逻辑控制输入包括从计算机系统的基本输入输出系统(BIOS)接收的配置信号。
13.根据权利要求11至12中的任一项所述的方法，其中，所述物理或逻辑控制输入是基于由计算机系统的固件和/或软件执行的发现操作而生成的。
14.根据权利要求11至12中的任一项所述的方法，其中，所述一致性互连结构单元包括用于根据所述第一互连协议与第一一个或多个协议层电路进行通信的第一代理。
15.根据权利要求14所述的方法，其中，所述一致性互连结构单元包括用于根据所述第二互连协议与第二一个或多个协议层电路进行通信的第二代理。
16.根据权利要求11至12中的任一项所述的方法，其中，所述第一互连协议包括串行链路协议，并且所述连接器的第一子集用于执行串行输入/输出(IO)通信。
17.根据权利要求16所述的方法，其中，所述第二互连协议包括存储器协议，并且所述连接器的第二子集耦合到支持远程存储器访问的第二串行互连。
18.一种用于支持多种互连协议的系统，包括：
系统存储器设备；
包括多个集成电路管芯的封装，所述多个集成电路管芯中的一个或多个集成电路管芯包括：
用于耦合到所述系统存储器设备的存储器控制器；
用于执行指令并且处理数据的多个处理核心；
用于耦合所述多个处理核心和所述存储器控制器的一致性互连结构单元；
物理(PHY)接口层，其包括：
用于将所述PHY接口层耦合到多个数据通道的多个连接器，所述多个连接器包括：与第一互连协议相关联的连接器的第一子集，与第二互连协议相关联的连接器的第二子集，以及与第三互连协议相关联的连接器的第三子集；
第一逻辑子块，其包括第一物理编码子层(PCS)，用于根据所述第一互连协议对数据进行编码，以用于在所述连接器的第一子集上进行通信；
第二逻辑子块，其包括第二PCS，用于根据所述第二互连协议对数据进行编码，以用于在所述连接器的第二子集上进行通信；
第三逻辑子块，其包括第三PCS，用于根据所述第三互连协议对数据进行编码，以用于在所述连接器的第三子集上进行通信；能够基于物理或逻辑控制输入进行操作的复用器，用于将所述连接器的第一子集连接到所述第一逻辑子块，将所述连接器的第二子集连接到所述第二逻辑子块，并且将所述连接器的第三子集连接到所述第三逻辑子块；
第一事务层，其用于根据所述第一互连协议，将从所述一致性互连结构单元接收的数据提供给所述第一逻辑子块，并且将从所述第一逻辑子块接收的数据提供给所述一致性互连结构单元；
第二事务层，其用于根据所述第二互连协议，将从所述一致性互连结构单元接收的数据提供给所述第二逻辑子块，并且将从所述第二逻辑子块接收的数据提供给所述一致性互连结构单元；以及
第三事务层，其用于根据所述第三互连协议，将从所述一致性互连结构单元接收的数据提供给所述第三逻辑子块，并且将从所述第三逻辑子块接收的数据提供给所述一致性互连结构单元；
用于将所述系统耦合到有线或无线网络的网络适配器；
耦合到所述封装的存储接口；
经由所述存储接口耦合到所述封装的存储设备；以及
用于耦合到监视器的视频适配器。
19.根据权利要求18所述的系统，其中，所述物理或逻辑控制输入包括从计算机系统的基本输入输出系统(BIOS)接收的配置信号。
20.根据权利要求18或19所述的系统，其中，所述物理或逻辑控制输入包括基于一个或多个熔丝的设置的配置信号。
21.根据权利要求18或19所述的系统，其中，所述物理或逻辑控制输入是基于由计算机系统的固件和/或软件执行的发现操作而生成的。
22.根据权利要求18或19所述的系统，其中，所述一致性互连结构单元包括用于根据所述第一互连协议与第一一个或多个协议层电路进行通信的第一代理。
23.根据权利要求22所述的系统，其中，所述一致性互连结构单元包括用于根据所述第二互连协议与第二一个或多个协议层电路进行通信的第二代理。
24.根据权利要求18或19所述的系统，其中，所述第一互连协议包括串行链路协议，并且所述连接器的第一子集用于执行串行输入/输出(IO)通信。
25.根据权利要求24所述的系统，其中，所述第二互连协议包括存储器协议，并且所述连接器的第二子集耦合到支持远程存储器访问的第二串行互连。
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