CN105023926B - 一种存储器元件及其制作方法 - Google Patents
一种存储器元件及其制作方法 Download PDFInfo
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Abstract
本发明公开了一种存储器元件及其制作方法,该存储器元件包括一串接存储单元阵列,包括:由绝缘材质所分离的多个导电条纹的多个叠层,包括至少由多个导电条纹所构成的一底部阶层、由多个导电条纹所构成的多个中间阶层、以及由多个导电条纹所构成的一顶部阶层;多个垂直有源条纹,位于这些叠层之间;多个电荷储存结构,位于这些叠层中的这些中间阶层的这些导电条纹的多个侧壁表面,与这些垂直有源条纹之间的多个交错处的接口区中;以及一栅介电层,具有与这些电荷储存结构相异的材质,且位于该顶部阶层的这些导电条纹和该底部阶层的这些导电条纹二者至少一者的多个侧壁表面,与这些垂直有源条纹之间的多个交错处的接口区中。
Description
技术领域
本发明是有关于一种高密度存储元件,且特别是有关于一种将存储单元的多阶层排列成三维空间的立体阵列的存储元件及其制作方法。
背景技术
三维立体存储元件,已经发展出多种不同的结构形态。其中包含由被绝缘材料所隔离的导电条纹(conductive strips)所构成的叠层(Stacks of conductive strips),以及位于这些叠层之间的垂直有源条纹(vertical active strips)。包含电荷储存结构的存储单元,则位于叠层中导电条纹的中间阶层(intermediate planes of conductivestrips in the stacks)和垂直有源条纹之间的接口区(interface regions)之中。串行选择开关,位于叠层中导电条纹的顶部阶层(top plane of conductive strips in thestacks)与垂直有源条纹之间的接口区之中。参考选择开关(reference select switch),位于叠层中导电条纹的底部阶层(bottom plane of conductive strips)与垂直有源条纹之间的接口区之中。为了可靠地控制存储单元的操作,串行选择开关和参考选择开关的阈值电压,必须保持稳定。当串行选择开关和参考选择开关,纳入电荷储存结构,用来作为存储单元时,串行选择开关和参考选择开关会被充电,因而造成这些开关阈值电压改变,需要额外的电流来对这些开关进行写入与擦除。
因此,有需提供三维立体集成电路存储器一种结构,可提供串行选择开关和参考选择开关稳定的阈值电压,使其在存储单元写入及擦除时,不需要额外电流来控制其阈值电压。
发明内容
本发明是有关于一种包含串接存储单元阵列的存储元件。此一元件包括由绝缘材质所分离的多个导电条纹的多个叠层,至少由多个导电条纹所构成的一底部阶层(GSL)、由多个导电条纹所构成的多个中间阶层(WLs)、以及由多个导电条纹所构成的一顶部阶层(SSLs);多个垂直有源条纹,位于这些叠层之间;多个电荷储存结构,位于这些叠层中的这些中间阶层的这些导电条纹的多个侧壁表面(side surfaces of the conductive stripsin the plurality of intermediate planes in the stacks),与这些垂直有源条纹之间的多个交错处的接口区(interface regions at cross-points)中;以及一栅介电层,具有与这些电荷储存结构相异的材质,且位于该顶部阶层的这些导电条纹和该底部阶层的这些导电条纹二者至少一者的多个侧壁表面,与这些垂直有源条纹中的垂直有源条纹(thevertical active strips in the plurality of vertical active strips以下简称为「垂直有源条纹」)之间的多个交错处的接口区中。
此一元件包括形成在导电条纹的顶部阶层(SSL)上方的金属硅化物层。此一元件包括,用来隔离导电条纹的顶部阶层和垂直有源条纹的间隙壁,以及形成在垂直有源条纹顶部的金属硅化物层。栅介电层,包含一层厚度比电荷储存结构还要薄的氧化硅材质层。其中,栅介电层的厚度约为7奈米(nanometer,nm)。
一参考导体层,位于导电条纹的底部阶层和集成电路基材之间,并且与多个垂直有源条纹连接。此参考导体层,包含N+掺杂的半导体材质。
本发明的实施例,也提供制作前述存储器元件的方法。
为了对本发明的上述及其他方面有更佳的了解,下文特举较佳实施例,并配合所附图式,作详细说明如下:
附图说明
图1是根据本发明的一实施例所绘示的一种三维立体存储器元件的剖面结构示意图。
图1A是根据本发明的另一实施例所绘示的一种三维立体存储元件的剖面结构示意图。
图1B是根据本发明的又一实施例所绘示的一种三维立体存储元件的剖面结构示意图。
图2是根据本发明的一实施例所绘示的一种集成电路的简化方块图。
图3是根据本发明的一实施例所绘示的制作存储器元件的方法流程图。
图4至图15是根据本发明的一实施例所绘示,制作存储器元件的一系列工艺结构剖面示意图。
图16至图27是根据本发明的另一实施例所绘示,制作存储器元件的一系列工艺结构剖面示意图。
【符号说明】
100:存储器元件 105:绝缘材质
111:导电条纹 111g:栅介电层
111m:电荷储存结构 112:导电条纹
112m:电荷储存结构 112g:栅介电层
113:导电条纹 113g:栅介电层
113m:电荷储存结构 114:导电条纹
114g:栅介电层 114m:电荷储存结构
115:绝缘材质 121:导电条纹
122:导电条纹 123:导电条纹
124:导电条纹 125:绝缘材质
131:导电条纹 132:导电条纹
133:导电条纹 134:导电条纹
135:绝缘材质 141:导电条纹
141m:电荷储存结构 142:导电条纹
142m:电荷储存结构 143:导电条纹
143m:电荷储存结构 144:导电条纹
144m:电荷储存结构 145:绝缘材质
151:导电条纹 151m:电荷储存结构
152:导电条纹 152m:电荷储存结构
153:导电条纹 153m:电荷储存结构
154:导电条纹 154m:电荷储存结构
155:栅介电层 156:栅介电层
157:栅介电层 158:栅介电层
161:垂直有源条纹 162:垂直有源条纹
170:绝缘材料 181:间隙壁
183:间隙壁 185:间隙壁
187:间隙壁 191:金属硅化物层
192:金属硅化物层 193:金属硅化物层
195:金属硅化物层 196:金属硅化物层
197:金属硅化物层 200:集成电路
258:阶层译码器 259:串行选择线
260:垂直通道存储器阵列 261:行译码器
262:字线 263:列译码器
266:感测放大器和数据输入结构
267:数据总线 268:方块
269:偏压配置状态机 271:数据输入线
272:数据输出线 274:其他电路
275:集成电路
310、320、330、340、350、360、370、380:步骤
405:绝缘层 410:导电层
410a:牺牲层 411:导电条纹
411a:导电条纹 411m:存储层
412:导电条纹 412a:导电条纹
412m:存储层 413:导电条纹
413a:导电条纹 413m:存储层
414:导电条纹 414a:导电条纹
414m:存储层 415:绝缘层
420:牺牲层 421:导电条纹
422:导电条纹 423:导电条纹
424:导电条纹 425:绝缘层
430:牺牲层 431:导电条纹
432:导电条纹 433:导电条纹
434:导电条纹 435:绝缘层
440:牺牲层 441:导电条纹
441m:存储层 442:导电条纹
442m:存储层 443:导电条纹
443m:存储层 444:导电条纹
444m:存储层 445:绝缘层
450:导电层 451:导电条纹
452:导电条纹 453:导电条纹
454:导电条纹 455:绝缘层
460:硬掩模层 510:开口
520:开口 615:栅介电层
616:栅介电层 617:栅介电层
618:栅介电层 655:栅介电层
656:栅介电层 657:栅介电层
658:栅介电层 661:氧化硅材质层
663:氧化硅材质层 665:氧化硅材质层
761:垂直有源条纹 762:垂直有源条纹
810:开口 905:水平开口
906:水平开口 1001:导电材质
1270:绝缘材料 1481:间隙壁
1483:间隙壁 1485:间隙壁
1487:间隙壁 1591:金属硅化物层
1592:金属硅化物层 1593:金属硅化物层
1595:金属硅化物层 1596:金属硅化物层
1597:金属硅化物层
具体实施方式
以下将配合图示,对本发明的实施例提供更详细的说明。虽然以下说明将会参照特定的结构与方法。但必须注意的是,这些特定的实施案例与方法,并非用以限定本发明。本发明仍可采用其他特征、元件方法及实施例,来加以实施。较佳实施例的提出,仅是用以例示本发明的技术特征,并非用以限定本发明的权利要求范围。该技术领域中具有通常知识者,将可根据以下说明书的描述,在不脱离本发明的精神范围内,作均等的修饰与变化。在不同实施例之中,相同的元件,将以相同的元件符号加以表示。
图1是根据本发明的一实施例所绘示的一种三维立体存储器元件100在X-Z平面上的剖面结构示意图。如图1所绘示的例子中,存储器元件100包括形成在一集成电路基材上的串接存储单元的与非门(NAND strings)阵列。存储器元件100包括多个由被绝缘材质(例如,绝缘材质105、115、125、125、135和145)所隔离的多个导电条纹所构成的叠层。其中,这些叠层至少包括导电条纹(例如,导电条纹111、112、113和114)的底部阶层(GSL)、多个导电条纹(例如,导电条纹121、122、123、124、131、132、133、134、141、142、143和144)的中间阶层(WLs)以及一个导电条纹(例如,导电条纹151、152、153和154)的顶部阶层(SSLs)。多个垂直有源条纹(例如,垂直有源条纹161和162)设置在叠层之间。电荷储存结构(例如,电荷储存结构141m、142m、143m和144m),位于叠层中构成中间阶层的导电条纹的侧壁表面与垂直有源条纹之间的交错处的接口区中。绝缘材料(例如,绝缘材料170),用来将由多个导电条纹(例如导电条纹112、122、132、142和152)所构成的叠层,与另一个相邻且由多个导电条纹(例如导电条纹113、123、133、143和153)所构成的叠层加以隔离。
栅介电层(例如,栅介电层111g、112g、113g、114g、155、156、157和158)位于顶部阶层的导电条纹及底部阶层的导电条纹二者至少一者的侧壁表面,与垂直有源条纹之间的交错处的接口区中,藉此形成串行选择线(string select lines,SSL)以及接地选择线(ground select lines,GSL)。其中,构成栅介电层(例如,栅介电层111g、112g、113g、114g、155、156、157和158)的材质,与构成电荷储存结构的材质不同。由于,由栅介电层所构成的串行选择线(SSL)和接地选择线(GSL)并不能充电,因此具有固定的阈值电压。
栅介电层可以包含一个比电荷储存结构还薄的氧化硅材质层。例如,栅介电层的厚度可约为7nm,而电荷储存结构的厚度可约为20nm。由栅介电层所构成的串行选择线(SSL)和参考选择开关,可以在较低操作电压(例如,3.3V)下进行操作。即可在小于由电荷储存结构所构成的存储单元所需的操作电压(例如,介于约5V至约20V之间)下进行操作。
存储器元件100可以包括,形成于导电条纹的顶部阶层上方的金属硅化物层(例如,金属硅化物层191、193、195和197),用来降低构成顶部阶层的导电条纹的电阻。存储器元件100可以包括,用来隔离垂直有源条纹与导电条纹的顶部阶层的间隙壁(例如间隙壁181、183、185和187),以及形成于垂直有源条纹顶端的金属硅化物层(例如,金属硅化物层192和196)。
在存储器元件之中,构成这些叠层的导电条纹,是沿着垂直X-Z平面的Y方向设置,且与译码电路连接。参考导体层(未绘示)设在导电条纹的底部阶层和集成电路基材之间的层次中,并且与这些垂直有源条纹连接。此参考导体层可包含N+掺杂的半导体材质。存储器元件100可以包括连接至这些垂直有源条纹的上方图案化导电层(未绘示),其包括多个耦接感应电路的全局位线(global bit lines)。
图1A是根据本发明的另一实施例所绘示的一种三维立体存储元件的剖面结构示意图。与图1的存储器元件的差别在于,栅介电层(例如,栅介电层155、156、157和158),只设于垂直有源条纹与叠层中构成顶部阶层的导电条纹的侧壁表面之间的交错处的接口区中。电荷储存结构(例如,电荷储存结构111m、112m、113m、和114m),设于垂直有源条纹与叠层中构成底部阶层的导电条纹的侧壁表面之间的交错处的接口区中。
图1B是根据本发明的第二另一实施例所绘示的一种三维立体存储元件的剖面结构示意图。第二另一实施例中的一个差别在于,栅介电层(例如,栅介电层111g、112g、113g和114g),只设于垂直有源条纹与叠层中构成底部阶层的导电条纹的侧壁表面之间的交错处的接口区中。电荷储存结构(例如,电荷储存结构151m、152m、153m和154m),设于垂直有源条纹与叠层中构成顶部阶层的导电条纹的侧壁表面之间的交错处的接口区中。另外一个差异点是,金属硅化物层(例如,金属硅化物层192和196)只形成于垂直有源条纹(例如,垂直有源条纹161和162)的顶端上,而不形成于电荷储存结构(例如,电荷储存结构151m、152m、153m和154m)之上。与图1和图1A所绘示的结构有所不同,在图1和图1A中,金属硅化物层(例如,金属硅化物层191、193、195和197),还同时形成于导电条纹(例如,导电条纹151、152、153和154)的顶部阶层(SSLs)上方,其包括多晶硅。
图2是根据本发明的一实施例所绘示的一种集成电路的简化方块图。图2所示的例子中,集成电路200包括位于集成电路基板上的垂直通道存储器阵列260。其中,垂直通道存储器阵列260,是通过位于导电条纹的顶部阶层(SSLs)以及导电条纹的底部阶层(GSL)的至少一者上的栅介电层来加以实现。其中,构成栅介电层的材料与构成电荷储存结构的材质不同。而此一电荷储存结构形成于多个导电条纹的中间阶层(WLs)上。
行译码器(row decoder)261与多条字线262耦接,并且沿着存储器阵列260中的行线进行配置。列译码器(column decoder)263与沿着存储器阵列260中的列线配置的多条位线264(或如前所述的串行选择线(SSL))耦接,用以从存储器阵列260中的存储单元读取并写入数据。阶层译码器258与多个位于串行选择(SSL)线259(或如前所述的位线)上的存储器阵列260耦接。地址由总线265提供给列译码器263、行译码器261和阶层译码器258。在本实施例之中,感测放大器和数据输入结构(sense amplifiers and data-in structures)266是经由数据总线267和列译码器263耦接。由集成电路275上的输入/输出端,或由集成电路275内部或外部的其他数据源输入的数据,是透过数据输入(data-in)线271,提供至方块266中的数据输入结构。在本实施例之中,集成电路中还包括其他电路274,例如一般用途处理器(general purpose processor)或是特定用途应用电路(special purposeapplication circuit),抑或是提供系统芯片(system-on-a-chip)功能且受到可编程电阻单元阵列(programmable resistance cell array)所支持的整合模块。来自于方块266中感测放大器的数据,则是透过数据输出(data-out)线272,提供至集成电路275上的输入/输出端,或至集成电路275内部或外部的其他数据目的地址。
本实施例所采用的控制器,是使用偏压配置状态机(bia arrangement statemachine)269,来控制透过方块268中的电压供应器所产生或提供的偏压配置供给电压,例如读取或写入电压的应用。可以采用已知的特定用途逻辑电路,来作为控制器。在另一实施例之中,控制器可以包括,可在同一集成电路中实施控制,且可执行计算机程序以控制元件操作的一般用途处理器。在又一实施例之中,可以整合特定用途逻辑电路和一般用途的处理器来完成此一控制器。
图3是根据本发明的一实施例所绘示的制作垂直通道结构的方法流程图。此一方法由步骤310开始:在集成电路基材上形成多个牺牲层,以及顶部导电层和底部导电层其中至少一个,其中这些牺牲层和导电层被多个绝缘层所隔离。接着,刻蚀这些牺牲层和导电层,以形成第一开口(请参照步骤320)。在第一开口中的顶部导电层和底部导电层其中至少一个的侧壁表面上形成一栅介电层(请参照步骤330)。于第一开口之中,形成多个垂直有源条纹,使垂直有源条纹与栅介电层接触(请参照步骤340)。
之后,刻蚀这些牺牲层和导电层,以在相邻的垂直有源条纹之间形成第二开口,藉此将牺牲层暴露于外,且藉此形成顶部导电层和底部导电层至少其中之一中的导电条纹的顶部阶层和导电条纹的底部阶层至少其中之一(请参照步骤350)。移除由第二开口暴露于外的牺牲层,藉以在绝缘层之间形成多个水平开口(请参照步骤360)。于水平开口中垂直有源条纹的侧壁表面上形成存储层(请参照步骤370)。于水平开口中形成多个由导电条纹所构成的阶层。阶层中的导电条纹的侧壁表面与存储层接触(请参照步骤380)。这些阶层包括多个导电条纹的中间阶层(WLs)。这些阶层可以包括的导电条纹的顶部阶层(SSL)与导电条纹的底部阶层(GSL)其中之一个,如图1B所绘示,导电条纹的顶部阶层(SSL)与存储层接触,如图1A所绘示,导电条纹的底部阶层(GSL)与存储层接触。之后,于第二开口中形成绝缘材料。
构成栅介电层的材料与构成存储层者不同。栅介电层可以包含氧化硅。存储层包括多层介电材质的电荷储存结构。以闪存技术来说,多层介电材质的电荷储存结构包括,闪存技术所已知的氧化物-氮化物-氧化物(Oxide-Nitride-Oxide,ONO)结构、氧化物-氮化物-氧化物-氮化物-氧化物(Oxide-Nitride-Oxide-Nitride-Oxide,ONONO)结构、硅-氧化物-氮化物-氧化物-硅(Silicon-Oxide-Nitride-Oxide-Silicon,SONOS)结构、能隙带工程-硅-氧化物-氮化物-氧化物-硅(Bandgap Engineered SONOS,BE-SONOS)结构、氮化坦-氧化铝-氮化硅-氧化硅-硅(Tantalum nitride,Aluminum oxide,Silicon nitride,Silicon oxide,Silicon,TANOS)结构以及金属高介电常数能隙带工程-硅-氧化物-氮化物-氧化物-硅(Metal-high-k Bandgap-Engineered SONOS,MA BE-SONOS)结构。
栅介电层可以包含厚度小于存储层的氧化硅层。例如,栅介电层的厚度可约为7nm,而电荷储存结构的厚度可约为20nm。
间隙壁可形成在垂直有源条纹侧壁上,用来隔离垂直有源条纹和导电条纹的顶部阶层。金属硅化物层可形成在垂直有源条纹的顶部上。金属硅化物层可形成在导电条纹的顶部阶层上,例如,在同一工艺步骤中,金属硅化物层也可形成在垂直有源条纹的顶部上。
在一实施例中,构成顶部阶层的导电条纹和构成底部阶层的导电条纹,二者都具有和栅介电层接触的侧壁表面。在另一实施例之中,构成顶部阶层的导电条纹具有和栅介电层接触的侧壁表面;同时构成底部阶层的导电条纹则是具有和存储层接触的侧壁表面。而在又一实施例之中,构成顶部阶层的导电条纹具有和存储层接触的侧壁表面;同时构成底部阶层的导电条纹则具有和栅介电层接触的侧壁表面。
此一方法还可包括,在这些牺牲层和导电层以及集成电路基材之间的层次中形成一参考导体层。其中,参考导体层与这些垂直有源条纹连接,且参考导体层可包括N+掺杂的半导体材料。
图4至图15是根据本发明的一实施例所绘示,制作存储器元件的一系列工艺结构剖面示意图。图4是沿着X-Z平面所绘示的存储器元件半成品的结构剖面示意图。在图4中,存储器元件包括位于集成电路基材上方的,多个用来形成字线(WLs)的牺牲层(例如,牺牲层420、430和440)、用来形成串行选择线(SSL)的顶部导电层(例如,导电层450)以及用来形成接地选择线(GSL)的底部导电层(例如,导电层410)。其中,这些牺牲层和导电层彼此被绝缘层(例如,绝缘层405、415、425、435、445和445)所隔离。这些牺牲层可包含氮化硅。底部导电层(例如,导电层410)和顶部导电层(例如,导电层450)可包含N+掺杂的多晶硅。
用来图案化这些牺牲层和导电层的硬掩模层(例如,硬掩模层460),位于这些牺牲层和导电层的上方。硬掩模层可包含多晶硅,其与用于牺牲层中的氮化硅,以及用于绝缘层的氧化材质之间,具有有高度的选择性。
图5是绘示使用硬掩模层来刻蚀牺牲层及导电层以形成多个第一开口(例如开口510和520)之后的工艺结构剖面示意图。在一实施例中,可以使用反应离子刻蚀(ReactiveIon Etch,RIE),来对牺牲层及导电层进行刻蚀。其中,第一开口穿透多个牺牲层(例如,牺牲层420、430和440)、底部导电层(例如,导电层410)和顶部导电层(例如,导电层450)。而这些多个第一开口是用来形成多个垂直有源条纹。
图6是绘示在第一开口(例如,开口510和520)中的顶部导电层的侧壁表面以及底部导电层的侧壁表面上,形成栅介电层(例如,在顶部导电层的侧壁表面上形成栅介电层655、656、657和658;以及在底部导电层的侧壁表面上形成栅介电层615、616、617和618)之后的工艺结构剖面示意图。其中,栅介电层包括一层氧化硅材质层。栅介电层的厚度约7nm。而此氧化硅材质层可以通过热氧化的方式形成于底部导电层(例如,导电层410)和顶部导电层(例如,导电层450)上,且热氧化的温度范围介于800℃至900℃之间。而此热氧化工艺,同时也会在硬掩模层(例如,硬掩模层460)上形成氧化硅材质层(例如,氧化硅材质层661、663和665)。氧化硅材质层不会形成在牺牲层(例如,牺牲层420、430和440)上。
图7是绘示在第一开口之中形成多个垂直有源条纹(例如,垂直有源条纹761和762)之后的工艺结构剖面示意图。其中,这些多个垂直有源条纹,与形成在顶部导电层的侧壁表面上的栅介电层(例如,栅介电层655、656、657和658)以及形成在底部导电层的侧壁表面上的栅介电层(例如,栅介电层615、616、617和618)接触。且这些多个垂直有源条纹可以延伸至位于牺牲与导电层下方的参考导体层(未绘示)。硬掩模层(例如,硬掩模层460)则例如使用化学机械平坦化(Chemical-Mechanical-Planarization,CMP)工艺平坦化。其中,此平坦化工艺是停止于硬掩模层下方的绝缘层(例如绝缘层455)。
图8是绘示在刻蚀牺牲层及导电层,藉以在相邻的垂直有源条纹(例如,垂直有源条纹761和762)之间形成第二开口(例如开口810)之后的工艺结构剖面示意图。其中,牺牲层(例如,牺牲层420、430和440)经由第二开口暴露于外。形成由多个导电条纹(例如,导电条纹451、452、453和454)所构成的顶部阶层,以及由多个导电条纹(例如,导电条纹411、412、413和414)所构成的底部阶层。其中,构成顶部阶层的导电条纹和构成底部阶层的导电条纹与栅介电层(例如,栅介电层655、656、657、658、615、616、617和618)接触。且构成顶部阶层的导电条纹以及构成底部阶层的导电条纹,是沿着垂直X-Z阶层的Y方向设置。
图9是绘示在移除经由第二开口暴露于外的多个牺牲层,藉以在绝缘层(例如,绝缘层415、425、435和445)之间形成多个水平开口(例如,水平开口905)之后的工艺结构剖面示意图。工艺中的此步骤留下黏着于垂直有源条纹(例如,垂直有源条纹761和762)上的绝缘层以及多个水平开口(例如,水平开口905)。其中,水平开口905可用来形成字线(WLs)。牺牲层可通过使用磷酸(H3PO4)作为刻蚀剂的刻蚀工艺移除。磷酸对于使用于牺牲层中的氮化硅材质、使用于绝缘层的氧化物材质,以及使用于顶部导电层和底部导电层的N+掺杂多晶硅材质,具有相当高的选择性。
图10是绘示在水平开口中的垂直有源条纹的侧壁表面上形成存储层(例如,存储层441m、442m、443m和444m);再经由第二开口(例如开口810)于存储层上沉积导电材质(例如导电材质1001)之后的工艺结构剖面示意图。此一导电材质可以包括氮化钛(TiN)和钨(W)。其中,第二开口的侧壁上可能余留多余的导电材质。
图11是绘示在移除余留在第二开口侧壁上的多余的导电材质之后的工艺结构剖面示意图。其中,可以采用,例如等向性刻蚀,来移除多余的导电材质。经过此一移除步骤,只有位于水平开口中的导电材质会被余留下来。藉以,在这些水平开口中,形成多个由多个导电条纹所构成的阶层。这些阶层包括多个由多个导电条纹(例如,导电条纹421、422、423、424、431、432、433、434、441、442、443和444)所构成的中间阶层(WLs)。而构成这些中间阶层的导电条纹,其侧壁表面会与存储层接触。且构成这些中间阶层的导电条纹,是沿着垂直X-Z平面的Y方向设置。
图12是绘示在第二开口(例如开口810)中,以及在绝缘层(例如,绝缘层455)上,形成绝缘材料(例如,绝缘材料1270)之后的工艺结构剖面示意图。
图13是绘示在刻蚀绝缘材料(例如,绝缘材料1270和455)之后的工艺结构剖面示意图。其中,刻蚀工艺停止于导电条纹(例如451、452、453和454)的顶部阶层和垂直有源条纹(例如,垂直有源条纹761和762)的顶部。此一工艺步骤,形成了多个由多个导电条纹所构成的叠层。每一个导电条纹的叠层,包括导电条纹(例如,导电条纹411、412、413或414)的底部阶层(GSL)、多个导电条纹(例如,导电条纹441、442、443或444)的中间阶层(WLs)以及导电条纹(例如,导电条纹451、452、453或454)的顶部阶层(SSL)。栅介电层(例如,栅介电层615、616、617、618、655、656、657和658)形成于垂直有源条纹与构成顶部阶层的导电条纹及构成底部阶层的导电条纹的侧壁表面之间的交错处的接口区中。
图14是绘示在形成间隙壁(例如间隙壁1481、1483、1485和1487)之后的工艺结构剖面示意图。其中,这些间隙壁是用来隔离垂直有源条纹(例如,垂直有源条纹761和762)和导电条纹(例如,导电条纹451、452、453和454)的顶部阶层。这些间隙壁可以是一种薄层介电衬里,且可包含氧化物材质或氮化硅材质。
图15是绘示在导电条纹(例如,导电条纹451、452、453和454)的顶部阶层上方形成金属硅化物层(例如,金属硅化物层1591,1593,1595和1597);以及/或在垂直有源条纹(例如,垂直有源条纹761和762)顶部上形成金属硅化物层(例如,金属硅化物层1592和1596)之后的工艺结构剖面示意图。其中,这些金属硅化物层可以包括钛(Ti)、钴(Co)和镍(Ni)。继续工艺步骤以完成三维立体存储器阵列的制备。
图16至图27是根据本发明的另一实施例所绘示,制作存储器元件的一系列工艺结构剖面示意图。图4至图15绘示的工艺所制备的存储器元件包含介电层,设于垂直有源条纹与构成顶部阶层的导电条纹的侧壁表面之间的交错处的接口区中,以及设于垂直有源条纹与构成底部阶层的导电条纹的侧壁表面之间的交错处接口区的中。与其相比,图16至图27绘示的工艺所制备的存储器元件包含介电层,设于垂直有源条纹与仅构成顶部阶层的导电条纹的侧壁表面之间的交错处接口区中。在上述两实施例之中,相同的元件符号代表相同元件。
图16是沿着X-Z平面所绘示的存储器元件半成品的结构剖面示意图。在图16中,存储器元件包括位于集成电路基材上方的,多个用来形成字线(WLs)的牺牲层(例如,牺牲层420、430和440)以及用来形成接地选择线(GSL)的牺牲层(例如,牺牲层410a)。其中,这些牺牲层和导电层彼此被绝缘层(例如,绝缘层405、415、425、435、445和445)所隔离。用来形成字线(WLs)的多个牺牲层和用来形成接地选择线(GSL)的牺牲层可包含氮化硅。而有关硬掩模层(例如,硬掩模层460)以及顶部导电层(例如,导电层450)的详细内容,请参照图4的相关描述。
图17是绘示在刻蚀牺牲层及导电层以形成多个第一开口(例如开口510和520)之后的工艺结构剖面示意图。其中,第一开口穿透顶部导电层(450)、用来形成字线的多个牺牲层(例如,牺牲层420、430和440)以及用来形成接地选择线(GSL)的牺牲层(例如,牺牲层410a)。而这些第一开口,是用来形成多个垂直有源条纹。
图18是绘示在第一开口(例如,开口510和520)中的顶部导电层的侧壁表面上,形成栅介电层(例如,栅介电层655、656、657和658)之后的工艺结构剖面示意图。其中,栅介电层以及制备栅介电层的热氧化工艺,已于图6中具体描述,在此不再赘述。其中,热氧化工艺并不会在用来形成接地选择线(GSL)的牺牲层(例如,牺牲层410a)上形成氧化硅材质层。
图19是绘示在第一开口之中形成多个垂直有源条纹(例如,垂直有源条纹761和762)之后的工艺结构剖面示意图。其中,这些个垂直有源条纹与形成在顶部导电层的侧壁表面上的栅介电层(例如,栅介电层655、656、657和658)接触。硬掩模层(例如,硬掩模层460)则,如图7所绘示,已被平坦化。
图20是绘示在刻蚀牺牲层及导电层,藉以在相邻的垂直有源条纹(例如,垂直有源条纹761和762)之间形成第二开口(例如开口810)之后的工艺结构剖面示意图。其中,用来形成字线的多个牺牲层(例如,牺牲层420、430和440)以及用来形成接地选择线(GSL)的牺牲层(例如,牺牲层410a)经由第二开口暴露于外。并形成由多个导电条纹(例如,导电条纹451、452、453和454)所构成的顶部阶层。其中,构成顶部阶层的导电条纹与栅介电层(例如,栅介电层655、656、657和658)接触。
图21是绘示在移除经由第二开口暴露于外的多个牺牲层,藉以在绝缘层(例如,绝缘层415、425、435和445)之间形成多个水平开口(例如,水平开口905)之后的工艺结构剖面示意图。经过这个工艺步骤,黏着于垂直有源条纹(例如,垂直有源条纹761和762)上的绝缘层被余留下来,藉以形成位于绝缘层之间的多个水平开口(例如,水平开口905和906)。其中,水平开口905是用来形成字线(WLs);而水平开口906则是用来形成接地选择线(GSL)。
图22是绘示在水平开口中的垂直有源条纹的侧壁表面上,形成用来形成字线(WLs)的存储层(例如,存储层441m、442m、443m和444m),以及形成用来形成接地选择线(GSL)的存储层(例如,存储层411m、412m、413m和414m);再经由第二开口(例如开口810)于存储层上沉积导电材质(例如导电材质1001)之后的工艺结构剖面示意图。此一导电材质可以包括氮化钛和钨。第二开口的侧壁上可能余留多余的导电材质。
图23是绘示在移除遗留在第二开口侧壁上的多余导电材质之后的工艺结构剖面示意图。其中,可以采用,例如等向性刻蚀,来移除多余的导电材质。经过此一移除步骤,只有位于水平开口中的导电材质会被余留下来。藉以,在水平开口中,形成多个由多个导电条纹所构成的阶层。这些阶层,包括多个由导电条纹(例如,导电条纹421、422、423、424、431、432、433、434、441、442、443和444)所构成的中间阶层(WLs),以及一个由导电条纹(例如,导电条纹411a、412a、413a和414a)所构成的底部阶层(GSL)。而构成这些中间阶层的导电条纹和构成底部阶层的导电条纹,其侧壁表面分别与存储层(例如,存储层411m、412m、413m、414m、441m、442m、443m和444m)接触。
图24是绘示在第二开口(例如开口810)中,以及在绝缘层(例如,绝缘层455)上,形成绝缘材料(例如,绝缘材料1270)之后的工艺结构剖面示意图。
图25是绘示在刻蚀绝缘材料(例如,绝缘材料1270和455)之后的工艺结构剖面示意图。其中,刻蚀工艺停止于导电条纹(例如451、452、453和454)的顶部阶层和垂直有源条纹(例如,垂直有源条纹761和762)的顶部。此一工艺步骤形成了多个由多个导电条纹所构成的叠层。每一个叠层,包括一个导电条纹(例如,导电条纹411a、412a、413a或414a)的底部阶层(GSL)、多个导电条纹(例如,导电条纹441、442、443或444)的中间阶层(WLs)以及一个导电条纹(例如,导电条纹451、452、453或454)的底部阶层(GSL)。栅介电层(例如,栅介电层655、656、657和658),形成于垂直有源条纹与构成顶部阶层的导电条纹的侧壁表面之间的交错处接口区中。包含电荷储存结构的存储层(例如,存储层411m、412m、413m和414m),则形成于垂直有源条纹与构成底部阶层的导电条纹的侧表面之间的交错处接口区中。
图26是绘示在形成间隙壁(例如间隙壁1481、1483、1485和1487)之后的工艺结构剖面示意图。其中,这些间隙壁是用来隔离垂直有源条纹(例如,垂直有源条纹761和762)与导电条纹(例如,导电条纹451、452、453和454)的顶部阶层。这些间隙壁可以是一种薄层介电衬里,且可包含氧化物材质或氮化硅材质。
图27是绘示在导电条纹(例如,导电条纹451、452、453和454)的顶部阶层上方形成金属硅化物层(例如,金属硅化物层1591,1593,1595,1597);以及/或在垂直有源条纹(例如,垂直有源条纹761和762)顶部形成金属硅化物层(例如,金属硅化物层1592和1596)之后的工艺结构剖面示意图。其中,这些金属硅化物层可以包括,钛、钴和镍。后续,再继续其他工艺步骤,以完成三维立体存储器阵列的制备。
综上所述,虽然本发明已以较佳实施例揭露如上,然其并非用以限定本发明。本发明所属技术领域中具有通常知识者,在不脱离本发明的精神和范围内,当可作各种的更动与润饰。因此,本发明的保护范围当视随附的权利要求范围所界定的为准。
Claims (15)
1.一种存储器元件,包括一串接存储单元阵列,包括:
由绝缘材质所分离的多个导电条纹的多个叠层,包括至少由多个导电条纹所构成的一底部阶层、由多个导电条纹所构成的多个中间阶层、以及由多个导电条纹所构成的一顶部阶层;
多个垂直有源条纹,位于这些叠层之间;
多个电荷储存结构,位于这些叠层中的这些中间阶层的这些导电条纹的多个侧壁表面,与这些垂直有源条纹之间的多个交错处的接口区中;以及
一栅介电层,具有与这些电荷储存结构相异的材质,位于该顶部阶层的这些导电条纹和该底部阶层的这些导电条纹二者至少一者的多个侧壁表面,与这些垂直有源条纹之间的多个交错处的接口区中,且该栅介电层系直接接触于导电条纹。
2.根据权利要求1所述的存储器元件,包括多个金属硅化物层,位于该顶部阶层的导电条纹上。
3.根据权利要求1所述的存储器元件,包括:
多个间隙壁,用来隔离该顶部阶层的导电条纹和这些垂直有源条纹;以及
多个金属硅化物层,形成在这些垂直有源条纹的顶部上。
4.根据权利要求1所述的存储器元件,其中该栅介电层包括一氧化硅材质层,具有小于这些电荷储存结构的一厚度。
5.根据权利要求1所述的存储器元件,更包括一参考导体层,位于该底部阶层的导电条纹和一集成电路基材之间的一层次中,并且连接至这些垂直有源条纹。
6.根据权利要求5所述的存储器元件,其中该参考导体层包含N+掺杂的半导体材质。
7.一种存储器元件的制作方法,包括:
在一集成电路基材上形成被多个绝缘层所分开的多个牺牲层、以及一顶部导电层和一底部导电层其中至少一个;
刻蚀这些牺牲层与导电层以形成多个第一开口;
在这些第一开口中的该顶部导电层和该底部导电层其中该至少一个的多个侧壁表面上形成一栅介电层;
于这些第一开口之中,形成多个垂直有源条纹,并使这些垂直有源条纹与该栅介电层接触;
刻蚀这些牺牲层与导电层和该底部导电层,以在相邻的这些垂直有源条纹之间形成多个第二开口,藉此将这些牺牲层暴露于外,且藉此在该顶部导电层和该底部导电层其中该至少一个中,形成由多个导电条纹所构成的一顶部阶层和由多个导电条纹所构成的一底部阶层中至少一个;
移除由这些第二开口暴露于外的这些牺牲层,藉以在这些绝缘层之间形成多个水平开口;
于这些水平开口中的这些垂直有源条纹的多个侧壁表面上形成一存储层;
于这些水平开口中形成由多个导电条纹所构成的多个阶层,使构成这些阶层的这些导电条纹的多个侧壁表面与该存储层接触;其中该栅介电层具有与该存储层相异的材质,且该栅介电层系直接接触于导电条纹。
8.根据权利要求7所述的存储器元件的制作方法,更包括于这些第二开口中形成绝缘材料。
9.根据权利要求7所述的存储器元件的制作方法,更包括:
形成多个间隙壁,用来隔离该顶部阶层的导电条纹和这些垂直有源条纹;以及
在这些垂直有源条纹的顶部上形成多个金属硅化物层。
10.根据权利要求7所述的存储器元件的制作方法,更包括,在该顶部阶层的导电条纹上形成多个金属硅化物层。
11.根据权利要求7所述的存储器元件的制作方法,其中构成该顶部阶层的这些导电条纹具有多个侧壁表面与该栅介电层接触。
12.根据权利要求7所述的存储器元件的制作方法,其中构成该底部阶层的这些导电条纹具有多个侧壁表面与该栅介电层接触。
13.根据权利要求7所述的存储器元件的制作方法,其中该栅介电层包括一氧化硅材质层,具有小于该存储层的一厚度。
14.根据权利要求7所述的存储器元件的制作方法,更包括于该牺牲层与导电层和该集成电路基材之间的一层次(level)中形成一参考导体层,并使该参考导体层与这些垂直有源条纹连接。
15.根据权利要求14所述的存储器元件的制作方法,其中该参考导体层包含N+掺杂的半导体材质。
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Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9362302B1 (en) * | 2015-01-28 | 2016-06-07 | Macronix International Co., Ltd. | Source line formation in 3D vertical channel and memory |
JP2016225614A (ja) * | 2015-05-26 | 2016-12-28 | 株式会社半導体エネルギー研究所 | 半導体装置 |
US9419012B1 (en) * | 2015-06-19 | 2016-08-16 | Sandisk Technologies Llc | Three-dimensional memory structure employing air gap isolation |
CN107919156B (zh) * | 2016-10-11 | 2020-06-30 | 旺宏电子股份有限公司 | 存储器元件及其应用 |
JP2018142654A (ja) * | 2017-02-28 | 2018-09-13 | 東芝メモリ株式会社 | 半導体装置及びその製造方法 |
US10163926B2 (en) | 2017-05-16 | 2018-12-25 | Macronix International Co., Ltd. | Memory device and method for fabricating the same |
CN109003987B (zh) * | 2017-06-06 | 2020-10-16 | 旺宏电子股份有限公司 | 存储器元件及其制作方法 |
CN109841631A (zh) * | 2017-11-29 | 2019-06-04 | 旺宏电子股份有限公司 | 存储元件及其制造方法 |
US10283524B1 (en) * | 2017-12-20 | 2019-05-07 | Micron Technology, Inc. | Methods of filling horizontally-extending openings of integrated assemblies |
US10170493B1 (en) * | 2017-12-20 | 2019-01-01 | Micron Technology, Inc. | Assemblies having vertically-stacked conductive structures |
US10424593B2 (en) | 2018-01-09 | 2019-09-24 | Macronix International Co., Ltd. | Three-dimensional non-volatile memory and manufacturing method thereof |
CN109285836B (zh) * | 2018-08-28 | 2023-10-10 | 中国科学院微电子研究所 | 半导体存储设备及其制造方法及包括存储设备的电子设备 |
KR20210035465A (ko) | 2019-09-24 | 2021-04-01 | 삼성전자주식회사 | 실리사이드를 갖는 스트링 선택 라인 게이트 전극을 포함하는 3차원 메모리 소자 |
KR20210115646A (ko) | 2020-03-16 | 2021-09-27 | 삼성전자주식회사 | 반도체 메모리 장치 및 이의 제조 방법 |
US11762563B1 (en) | 2021-01-28 | 2023-09-19 | Board Of Trustees Of The University Of Alabama, For And On Behalf Of The University Of Alabama In Huntsville | Systems and methods for improving radiation tolerance of memory |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102034829A (zh) * | 2009-09-29 | 2011-04-27 | 三星电子株式会社 | 垂直型非易失性存储器件及其制造方法 |
Family Cites Families (574)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3271591A (en) | 1963-09-20 | 1966-09-06 | Energy Conversion Devices Inc | Symmetrical current controlling device |
US3530441A (en) | 1969-01-15 | 1970-09-22 | Energy Conversion Devices Inc | Method and apparatus for storing and retrieving information |
US4115914A (en) | 1976-03-26 | 1978-09-26 | Hughes Aircraft Company | Electrically erasable non-volatile semiconductor memory |
USRE31083E (en) | 1979-02-15 | 1982-11-16 | International Business Machines Corporation | Non-volatile memory devices fabricated from graded or stepped energy band gap insulator MIM or MIS structure |
US4217601A (en) | 1979-02-15 | 1980-08-12 | International Business Machines Corporation | Non-volatile memory devices fabricated from graded or stepped energy band gap insulator MIM or MIS structure |
IL61678A (en) | 1979-12-13 | 1984-04-30 | Energy Conversion Devices Inc | Programmable cell and programmable electronic arrays comprising such cells |
US4452592A (en) | 1982-06-01 | 1984-06-05 | General Motors Corporation | Cyclic phase change coupling |
JPS5955071A (ja) | 1982-09-24 | 1984-03-29 | Hitachi Micro Comput Eng Ltd | 不揮発性半導体装置 |
JPS60137070A (ja) | 1983-12-26 | 1985-07-20 | Toshiba Corp | 半導体装置の製造方法 |
US4719594A (en) | 1984-11-01 | 1988-01-12 | Energy Conversion Devices, Inc. | Grooved optical data storage device including a chalcogenide memory layer |
US4881114A (en) | 1986-05-16 | 1989-11-14 | Actel Corporation | Selectively formable vertical diode circuit element |
US4876220A (en) | 1986-05-16 | 1989-10-24 | Actel Corporation | Method of making programmable low impedance interconnect diode element |
JP2685770B2 (ja) | 1987-12-28 | 1997-12-03 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2606857B2 (ja) | 1987-12-10 | 1997-05-07 | 株式会社日立製作所 | 半導体記憶装置の製造方法 |
US5534712A (en) | 1991-01-18 | 1996-07-09 | Energy Conversion Devices, Inc. | Electrically erasable memory elements characterized by reduced current and improved thermal stability |
US5166758A (en) | 1991-01-18 | 1992-11-24 | Energy Conversion Devices, Inc. | Electrically erasable phase change memory |
US5177567A (en) | 1991-07-19 | 1993-01-05 | Energy Conversion Devices, Inc. | Thin-film structure for chalcogenide electrical switching devices and process therefor |
JP2825031B2 (ja) | 1991-08-06 | 1998-11-18 | 日本電気株式会社 | 半導体メモリ装置 |
JPH0582795A (ja) | 1991-08-22 | 1993-04-02 | Rohm Co Ltd | 半導体記憶装置 |
JPH0555596A (ja) | 1991-08-22 | 1993-03-05 | Rohm Co Ltd | 半導体不揮発性記憶装置 |
FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
US5166096A (en) | 1991-10-29 | 1992-11-24 | International Business Machines Corporation | Process for fabricating self-aligned contact studs for semiconductor structures |
JPH05206394A (ja) | 1992-01-24 | 1993-08-13 | Mitsubishi Electric Corp | 電界効果トランジスタおよびその製造方法 |
US5329486A (en) | 1992-04-24 | 1994-07-12 | Motorola, Inc. | Ferromagnetic memory device |
JP3229012B2 (ja) | 1992-05-21 | 2001-11-12 | 株式会社東芝 | 半導体装置の製造方法 |
US5958358A (en) | 1992-07-08 | 1999-09-28 | Yeda Research And Development Co., Ltd. | Oriented polycrystalline thin films of transition metal chalcogenides |
JP2884962B2 (ja) | 1992-10-30 | 1999-04-19 | 日本電気株式会社 | 半導体メモリ |
US5364813A (en) | 1993-09-01 | 1994-11-15 | Industrial Technology Research Institute | Stacked DRAM poly plate capacitor |
US5515488A (en) | 1994-08-30 | 1996-05-07 | Xerox Corporation | Method and apparatus for concurrent graphical visualization of a database search and its search history |
US5785828A (en) | 1994-12-13 | 1998-07-28 | Ricoh Company, Ltd. | Sputtering target for producing optical recording medium |
US5879955A (en) | 1995-06-07 | 1999-03-09 | Micron Technology, Inc. | Method for fabricating an array of ultra-small pores for chalcogenide memory cells |
US5789758A (en) | 1995-06-07 | 1998-08-04 | Micron Technology, Inc. | Chalcogenide memory cell with a plurality of chalcogenide electrodes |
US6420725B1 (en) | 1995-06-07 | 2002-07-16 | Micron Technology, Inc. | Method and apparatus for forming an integrated circuit electrode having a reduced contact area |
US5869843A (en) | 1995-06-07 | 1999-02-09 | Micron Technology, Inc. | Memory array having a multi-state element and method for forming such array or cells thereof |
US5831276A (en) | 1995-06-07 | 1998-11-03 | Micron Technology, Inc. | Three-dimensional container diode for use with multi-state material in a non-volatile memory cell |
US5751012A (en) | 1995-06-07 | 1998-05-12 | Micron Technology, Inc. | Polysilicon pillar diode for use in a non-volatile memory cell |
US5837564A (en) | 1995-11-01 | 1998-11-17 | Micron Technology, Inc. | Method for optimal crystallization to obtain high electrical performance from chalcogenides |
KR0182866B1 (ko) | 1995-12-27 | 1999-04-15 | 김주용 | 플래쉬 메모리 장치 |
US5687112A (en) | 1996-04-19 | 1997-11-11 | Energy Conversion Devices, Inc. | Multibit single cell memory element having tapered contact |
JP2809200B2 (ja) | 1996-06-03 | 1998-10-08 | 日本電気株式会社 | 半導体装置の製造方法 |
US6025220A (en) | 1996-06-18 | 2000-02-15 | Micron Technology, Inc. | Method of forming a polysilicon diode and devices incorporating such diode |
US5912489A (en) | 1996-06-18 | 1999-06-15 | Advanced Micro Devices, Inc. | Dual source side polysilicon select gate structure utilizing single tunnel oxide for NAND array flash memory |
US5866928A (en) | 1996-07-16 | 1999-02-02 | Micron Technology, Inc. | Single digit line with cell contact interconnect |
US5789277A (en) | 1996-07-22 | 1998-08-04 | Micron Technology, Inc. | Method of making chalogenide memory device |
US5814527A (en) | 1996-07-22 | 1998-09-29 | Micron Technology, Inc. | Method of making small pores defined by a disposable internal spacer for use in chalcogenide memories |
US6337266B1 (en) | 1996-07-22 | 2002-01-08 | Micron Technology, Inc. | Small electrode for chalcogenide memories |
US5985698A (en) | 1996-07-22 | 1999-11-16 | Micron Technology, Inc. | Fabrication of three dimensional container diode for use with multi-state material in a non-volatile memory cell |
US5998244A (en) | 1996-08-22 | 1999-12-07 | Micron Technology, Inc. | Memory cell incorporating a chalcogenide element and method of making same |
US5688713A (en) | 1996-08-26 | 1997-11-18 | Vanguard International Semiconductor Corporation | Method of manufacturing a DRAM cell having a double-crown capacitor using polysilicon and nitride spacers |
US6147395A (en) | 1996-10-02 | 2000-11-14 | Micron Technology, Inc. | Method for fabricating a small area of contact between electrodes |
US6087674A (en) | 1996-10-28 | 2000-07-11 | Energy Conversion Devices, Inc. | Memory element with memory material comprising phase-change material and dielectric material |
US5716883A (en) | 1996-11-06 | 1998-02-10 | Vanguard International Semiconductor Corporation | Method of making increased surface area, storage node electrode, with narrow spaces between polysilicon columns |
EP0843360A1 (en) | 1996-11-15 | 1998-05-20 | Hitachi Europe Limited | Memory device |
US6015977A (en) | 1997-01-28 | 2000-01-18 | Micron Technology, Inc. | Integrated circuit memory cell having a small active area and method of forming same |
US5856923A (en) | 1997-03-24 | 1999-01-05 | Micron Technology, Inc. | Method for continuous, non lot-based integrated circuit manufacturing |
US6469343B1 (en) | 1998-04-02 | 2002-10-22 | Nippon Steel Corporation | Multi-level type nonvolatile semiconductor memory device |
US5952671A (en) | 1997-05-09 | 1999-09-14 | Micron Technology, Inc. | Small electrode for a chalcogenide switching device and method for fabricating same |
US6031287A (en) | 1997-06-18 | 2000-02-29 | Micron Technology, Inc. | Contact structure and memory element incorporating the same |
US5933365A (en) | 1997-06-19 | 1999-08-03 | Energy Conversion Devices, Inc. | Memory element with energy control mechanism |
US5902704A (en) | 1997-07-02 | 1999-05-11 | Lsi Logic Corporation | Process for forming photoresist mask over integrated circuit structures with critical dimension control |
JPH1140682A (ja) | 1997-07-18 | 1999-02-12 | Sony Corp | 不揮発性半導体記憶装置及びその製造方法 |
US6768165B1 (en) | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
US6475704B1 (en) | 1997-09-12 | 2002-11-05 | Canon Kabushiki Kaisha | Method for forming fine structure |
US6617192B1 (en) | 1997-10-01 | 2003-09-09 | Ovonyx, Inc. | Electrically programmable memory element with multi-regioned contact |
US7023009B2 (en) | 1997-10-01 | 2006-04-04 | Ovonyx, Inc. | Electrically programmable memory element with improved contacts |
US6969866B1 (en) | 1997-10-01 | 2005-11-29 | Ovonyx, Inc. | Electrically programmable memory element with improved contacts |
US5851881A (en) | 1997-10-06 | 1998-12-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making monos flash memory for multi-level logic |
US5993667A (en) | 1997-10-20 | 1999-11-30 | Texaco Inc. | Process for removing selenium from refinery process water and waste water streams |
FR2770328B1 (fr) | 1997-10-29 | 2001-11-23 | Sgs Thomson Microelectronics | Point memoire remanent |
JPH11150195A (ja) | 1997-11-19 | 1999-06-02 | Nec Corp | 半導体装置及びその製造方法 |
US5991193A (en) | 1997-12-02 | 1999-11-23 | International Business Machines Corporation | Voltage biasing for magnetic ram with magnetic tunnel memory cells |
US6026026A (en) | 1997-12-05 | 2000-02-15 | Hyundai Electronics America, Inc. | Self-convergence of post-erase threshold voltages in a flash memory cell using transient response |
JPH11177067A (ja) | 1997-12-09 | 1999-07-02 | Sony Corp | メモリ素子およびメモリアレイ |
DE19756601A1 (de) | 1997-12-18 | 1999-07-01 | Siemens Ag | Verfahren zum Herstellen eines Speicherzellen-Arrays |
FR2774209B1 (fr) | 1998-01-23 | 2001-09-14 | St Microelectronics Sa | Procede de controle du circuit de lecture d'un plan memoire et dispositif de memoire correspondant |
US6087269A (en) | 1998-04-20 | 2000-07-11 | Advanced Micro Devices, Inc. | Method of making an interconnect using a tungsten hard mask |
US6074917A (en) | 1998-06-16 | 2000-06-13 | Advanced Micro Devices, Inc. | LPCVD oxide and RTA for top oxide of ONO film to improve reliability for flash memory devices |
KR100294691B1 (ko) | 1998-06-29 | 2001-07-12 | 김영환 | 다중층양자점을이용한메모리소자및제조방법 |
US6372651B1 (en) | 1998-07-17 | 2002-04-16 | Advanced Micro Devices, Inc. | Method for trimming a photoresist pattern line for memory gate etching |
US6141260A (en) | 1998-08-27 | 2000-10-31 | Micron Technology, Inc. | Single electron resistor memory device and method for use thereof |
US6251717B1 (en) | 1998-09-30 | 2001-06-26 | Advanced Micro Devices, Inc. | Viable memory cell formed using rapid thermal annealing |
US6351406B1 (en) | 1998-11-16 | 2002-02-26 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6034882A (en) | 1998-11-16 | 2000-03-07 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6483736B2 (en) | 1998-11-16 | 2002-11-19 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6009033A (en) | 1998-11-24 | 1999-12-28 | Advanced Micro Devices, Inc. | Method of programming and erasing an EEPROM device under an elevated temperature and apparatus thereof |
JP2000164830A (ja) | 1998-11-27 | 2000-06-16 | Mitsubishi Electric Corp | 半導体記憶装置の製造方法 |
US6487106B1 (en) | 1999-01-12 | 2002-11-26 | Arizona Board Of Regents | Programmable microelectronic devices and method of forming and programming same |
US6291137B1 (en) | 1999-01-20 | 2001-09-18 | Advanced Micro Devices, Inc. | Sidewall formation for sidewall patterning of sub 100 nm structures |
US6245669B1 (en) | 1999-02-05 | 2001-06-12 | Taiwan Semiconductor Manufacturing Company | High selectivity Si-rich SiON etch-stop layer |
KR100441692B1 (ko) | 1999-03-25 | 2004-07-27 | 오보닉스, 아이엔씨. | 개선된 접점을 갖는 전기적으로 프로그램가능한 메모리 소자 |
US6943365B2 (en) | 1999-03-25 | 2005-09-13 | Ovonyx, Inc. | Electrically programmable memory element with reduced area of contact and method for making same |
US6750079B2 (en) | 1999-03-25 | 2004-06-15 | Ovonyx, Inc. | Method for making programmable resistance memory element |
US6177317B1 (en) | 1999-04-14 | 2001-01-23 | Macronix International Co., Ltd. | Method of making nonvolatile memory devices having reduced resistance diffusion regions |
US6548825B1 (en) | 1999-06-04 | 2003-04-15 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device including barrier layer having dispersed particles |
US6075719A (en) | 1999-06-22 | 2000-06-13 | Energy Conversion Devices, Inc. | Method of programming phase-change memory element |
US6255166B1 (en) | 1999-08-05 | 2001-07-03 | Aalo Lsi Design & Device Technology, Inc. | Nonvolatile memory cell, method of programming the same and nonvolatile memory array |
US6077674A (en) | 1999-10-27 | 2000-06-20 | Agilent Technologies Inc. | Method of producing oligonucleotide arrays with features of high purity |
US6326307B1 (en) | 1999-11-15 | 2001-12-04 | Appllied Materials, Inc. | Plasma pretreatment of photoresist in an oxide etch process |
US6314014B1 (en) | 1999-12-16 | 2001-11-06 | Ovonyx, Inc. | Programmable resistance memory arrays with reference cells |
KR20010056888A (ko) | 1999-12-17 | 2001-07-04 | 박종섭 | 반도체 메모리 제조방법 |
US6576546B2 (en) | 1999-12-22 | 2003-06-10 | Texas Instruments Incorporated | Method of enhancing adhesion of a conductive barrier layer to an underlying conductive plug and contact for ferroelectric applications |
TW586154B (en) | 2001-01-05 | 2004-05-01 | Macronix Int Co Ltd | Planarization method for semiconductor device |
US6677640B1 (en) | 2000-03-01 | 2004-01-13 | Micron Technology, Inc. | Memory cell with tight coupling |
US6444557B1 (en) | 2000-03-14 | 2002-09-03 | International Business Machines Corporation | Method of forming a damascene structure using a sacrificial conductive layer |
US6420216B1 (en) | 2000-03-14 | 2002-07-16 | International Business Machines Corporation | Fuse processing using dielectric planarization pillars |
US6888750B2 (en) | 2000-04-28 | 2005-05-03 | Matrix Semiconductor, Inc. | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication |
US6420215B1 (en) | 2000-04-28 | 2002-07-16 | Matrix Semiconductor, Inc. | Three-dimensional memory array and method of fabrication |
AU2001262953A1 (en) | 2000-04-28 | 2001-11-12 | Matrix Semiconductor, Inc. | Three-dimensional memory array and method of fabrication |
US6501111B1 (en) | 2000-06-30 | 2002-12-31 | Intel Corporation | Three-dimensional (3D) programmable device |
US6440837B1 (en) | 2000-07-14 | 2002-08-27 | Micron Technology, Inc. | Method of forming a contact structure in a semiconductor device |
US6563156B2 (en) | 2001-03-15 | 2003-05-13 | Micron Technology, Inc. | Memory elements and methods for making same |
EP1312120A1 (en) | 2000-08-14 | 2003-05-21 | Matrix Semiconductor, Inc. | Dense arrays and charge storage devices, and methods for making same |
US6624011B1 (en) | 2000-08-14 | 2003-09-23 | Matrix Semiconductor, Inc. | Thermal processing for three dimensional circuits |
US6512263B1 (en) | 2000-09-22 | 2003-01-28 | Sandisk Corporation | Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming |
US6555860B2 (en) | 2000-09-29 | 2003-04-29 | Intel Corporation | Compositionally modified resistive electrode |
US6567293B1 (en) | 2000-09-29 | 2003-05-20 | Ovonyx, Inc. | Single level metal memory cell using chalcogenide cladding |
US6429064B1 (en) | 2000-09-29 | 2002-08-06 | Intel Corporation | Reduced contact area of sidewall conductor |
US6339544B1 (en) | 2000-09-29 | 2002-01-15 | Intel Corporation | Method to enhance performance of thermal resistor device |
DE10050076C2 (de) | 2000-10-10 | 2003-09-18 | Infineon Technologies Ag | Verfahren zur Herstellung einer ferromagnetischen Struktur und ferromagnetisches Bauelement |
US6555858B1 (en) | 2000-11-15 | 2003-04-29 | Motorola, Inc. | Self-aligned magnetic clad write line and its method of formation |
KR100382729B1 (ko) | 2000-12-09 | 2003-05-09 | 삼성전자주식회사 | 반도체 소자의 금속 컨택 구조체 및 그 형성방법 |
US6569705B2 (en) | 2000-12-21 | 2003-05-27 | Intel Corporation | Metal structure for a phase-change memory device |
US6271090B1 (en) | 2000-12-22 | 2001-08-07 | Macronix International Co., Ltd. | Method for manufacturing flash memory device with dual floating gates and two bits per cell |
TW490675B (en) | 2000-12-22 | 2002-06-11 | Macronix Int Co Ltd | Control method of multi-stated NROM |
US6627530B2 (en) | 2000-12-22 | 2003-09-30 | Matrix Semiconductor, Inc. | Patterning three dimensional structures |
US6534781B2 (en) | 2000-12-26 | 2003-03-18 | Ovonyx, Inc. | Phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact |
CN101174633A (zh) | 2001-01-30 | 2008-05-07 | 株式会社日立制作所 | 半导体集成电路器件及其制造方法 |
KR100400037B1 (ko) | 2001-02-22 | 2003-09-29 | 삼성전자주식회사 | 콘택 플러그를 구비하는 반도체 소자 및 그의 제조 방법 |
US6487114B2 (en) | 2001-02-28 | 2002-11-26 | Macronix International Co., Ltd. | Method of reading two-bit memories of NROM cell |
US6680505B2 (en) | 2001-03-28 | 2004-01-20 | Kabushiki Kaisha Toshiba | Semiconductor storage element |
US6596589B2 (en) | 2001-04-30 | 2003-07-22 | Vanguard International Semiconductor Corporation | Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer |
US6730928B2 (en) | 2001-05-09 | 2004-05-04 | Science Applications International Corporation | Phase change switches and circuits coupling to electromagnetic waves containing phase change switches |
US6514788B2 (en) | 2001-05-29 | 2003-02-04 | Bae Systems Information And Electronic Systems Integration Inc. | Method for manufacturing contacts for a Chalcogenide memory device |
US6720630B2 (en) | 2001-05-30 | 2004-04-13 | International Business Machines Corporation | Structure and method for MOSFET with metallic gate electrode |
US6613604B2 (en) | 2001-08-02 | 2003-09-02 | Ovonyx, Inc. | Method for making small pore for use in programmable resistance memory element |
US6774387B2 (en) | 2001-06-26 | 2004-08-10 | Ovonyx, Inc. | Programmable resistance memory element |
US6589714B2 (en) | 2001-06-26 | 2003-07-08 | Ovonyx, Inc. | Method for making programmable resistance memory element using silylated photoresist |
DE10228768A1 (de) | 2001-06-28 | 2003-01-16 | Samsung Electronics Co Ltd | Nicht-flüchtige Floating-Trap-Halbleiterspeichervorrichtungen, die Sperrisolationsschichten mit hohen Dielektrizitätskonstanten enthaltend, und Verfahren |
US6605527B2 (en) | 2001-06-30 | 2003-08-12 | Intel Corporation | Reduced area intersection between electrode and programming element |
US6673700B2 (en) | 2001-06-30 | 2004-01-06 | Ovonyx, Inc. | Reduced area intersection between electrode and programming element |
US6511867B2 (en) | 2001-06-30 | 2003-01-28 | Ovonyx, Inc. | Utilizing atomic layer deposition for programmable device |
KR100589569B1 (ko) | 2001-07-17 | 2006-06-19 | 산요덴키가부시키가이샤 | 반도체 메모리 장치 |
US6891262B2 (en) | 2001-07-19 | 2005-05-10 | Sony Corporation | Semiconductor device and method of producing the same |
US6643165B2 (en) | 2001-07-25 | 2003-11-04 | Nantero, Inc. | Electromechanical memory having cell selection circuitry constructed with nanotube technology |
KR100395762B1 (ko) | 2001-07-31 | 2003-08-21 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
US6709928B1 (en) | 2001-07-31 | 2004-03-23 | Cypress Semiconductor Corporation | Semiconductor device having silicon-rich layer and method of manufacturing such a device |
KR100407573B1 (ko) | 2001-08-09 | 2003-11-28 | 삼성전자주식회사 | 부유 트랩형 비휘발성 메모리 장치 형성 방법 |
US6792365B2 (en) | 2001-08-10 | 2004-09-14 | Micron Technology, Inc. | Sequential unique marking |
US6737312B2 (en) | 2001-08-27 | 2004-05-18 | Micron Technology, Inc. | Method of fabricating dual PCRAM cells sharing a common electrode |
JP2003068893A (ja) | 2001-08-28 | 2003-03-07 | Hitachi Ltd | 不揮発性記憶素子及び半導体集積回路 |
US7476925B2 (en) | 2001-08-30 | 2009-01-13 | Micron Technology, Inc. | Atomic layer deposition of metal oxide and/or low asymmetrical tunnel barrier interploy insulators |
US7012297B2 (en) | 2001-08-30 | 2006-03-14 | Micron Technology, Inc. | Scalable flash/NV structures and devices with extended endurance |
US6709958B2 (en) | 2001-08-30 | 2004-03-23 | Micron Technology, Inc. | Integrated circuit device and fabrication using metal-doped chalcogenide materials |
US6507061B1 (en) | 2001-08-31 | 2003-01-14 | Intel Corporation | Multiple layer phase-change memory |
US6586761B2 (en) | 2001-09-07 | 2003-07-01 | Intel Corporation | Phase change material memory device |
US6861267B2 (en) | 2001-09-17 | 2005-03-01 | Intel Corporation | Reducing shunts in memories with phase-change material |
US7045383B2 (en) | 2001-09-19 | 2006-05-16 | BAE Systems Information and Ovonyx, Inc | Method for making tapered opening for programmable resistance memory element |
US6800563B2 (en) | 2001-10-11 | 2004-10-05 | Ovonyx, Inc. | Forming tapered lower electrode phase-change memories |
US6566700B2 (en) | 2001-10-11 | 2003-05-20 | Ovonyx, Inc. | Carbon-containing interfacial layer for phase-change memory |
US6512696B1 (en) | 2001-11-13 | 2003-01-28 | Macronix International Co., Ltd. | Method of programming and erasing a SNNNS type non-volatile memory cell |
US6791859B2 (en) | 2001-11-20 | 2004-09-14 | Micron Technology, Inc. | Complementary bit PCRAM sense amplifier and method of operation |
US7115469B1 (en) | 2001-12-17 | 2006-10-03 | Spansion, Llc | Integrated ONO processing for semiconductor devices using in-situ steam generation (ISSG) process |
US6545903B1 (en) | 2001-12-17 | 2003-04-08 | Texas Instruments Incorporated | Self-aligned resistive plugs for forming memory cell with phase change material |
US6512241B1 (en) | 2001-12-31 | 2003-01-28 | Intel Corporation | Phase change material memory device |
US6867638B2 (en) | 2002-01-10 | 2005-03-15 | Silicon Storage Technology, Inc. | High voltage generation and regulation system for digital multilevel nonvolatile memory |
JP3948292B2 (ja) | 2002-02-01 | 2007-07-25 | 株式会社日立製作所 | 半導体記憶装置及びその製造方法 |
US6605840B1 (en) | 2002-02-07 | 2003-08-12 | Ching-Yuan Wu | Scalable multi-bit flash memory cell and its memory array |
US6784480B2 (en) | 2002-02-12 | 2004-08-31 | Micron Technology, Inc. | Asymmetric band-gap engineered nonvolatile memory device |
US6972430B2 (en) | 2002-02-20 | 2005-12-06 | Stmicroelectronics S.R.L. | Sublithographic contact structure, phase change memory cell with optimized heater shape, and manufacturing method thereof |
US7151273B2 (en) | 2002-02-20 | 2006-12-19 | Micron Technology, Inc. | Silver-selenide/chalcogenide glass stack for resistance variable memory |
US7122281B2 (en) | 2002-02-26 | 2006-10-17 | Synopsys, Inc. | Critical dimension control using full phase and trim masks |
JP3796457B2 (ja) | 2002-02-28 | 2006-07-12 | 富士通株式会社 | 不揮発性半導体記憶装置 |
CN100514695C (zh) | 2002-03-15 | 2009-07-15 | 阿克松技术公司 | 微电子可编程构件 |
TW527704B (en) | 2002-03-19 | 2003-04-11 | Macronix Int Co Ltd | Mask ROM structure and its manufacturing method |
US6579760B1 (en) | 2002-03-28 | 2003-06-17 | Macronix International Co., Ltd. | Self-aligned, programmable phase change memory |
US7057938B2 (en) | 2002-03-29 | 2006-06-06 | Macronix International Co., Ltd. | Nonvolatile memory cell and operating method |
US6643159B2 (en) | 2002-04-02 | 2003-11-04 | Hewlett-Packard Development Company, L.P. | Cubic memory array |
US7623370B2 (en) | 2002-04-04 | 2009-11-24 | Kabushiki Kaisha Toshiba | Resistance change memory device |
US6861715B2 (en) | 2002-04-08 | 2005-03-01 | Guobiao Zhang | Electrically programmable three-dimensional memory |
WO2003085740A1 (fr) | 2002-04-09 | 2003-10-16 | Matsushita Electric Industrial Co., Ltd. | Memoire non volatile et procede de fabrication |
US6864500B2 (en) | 2002-04-10 | 2005-03-08 | Micron Technology, Inc. | Programmable conductor memory cell structure |
US6605821B1 (en) | 2002-05-10 | 2003-08-12 | Hewlett-Packard Development Company, L.P. | Phase change material electronic memory structure and method for forming |
US7042045B2 (en) | 2002-06-04 | 2006-05-09 | Samsung Electronics Co., Ltd. | Non-volatile memory cell having a silicon-oxide nitride-oxide-silicon gate structure |
US7081377B2 (en) | 2002-06-27 | 2006-07-25 | Sandisk 3D Llc | Three-dimensional memory |
US6737675B2 (en) | 2002-06-27 | 2004-05-18 | Matrix Semiconductor, Inc. | High density 3D rail stack arrays |
US6798712B2 (en) | 2002-07-02 | 2004-09-28 | Advanced Micro Devices, Inc. | Wordline latching in semiconductor memories |
US6862223B1 (en) | 2002-07-05 | 2005-03-01 | Aplus Flash Technology, Inc. | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout |
US6831854B2 (en) | 2002-08-02 | 2004-12-14 | Unity Semiconductor Corporation | Cross point memory array using distinct voltages |
US6828240B2 (en) | 2002-08-02 | 2004-12-07 | Advanced Micro Devices, Inc. | Method of manufacturing multi-level contacts by sizing of contact sizes in integrated circuits |
US6864503B2 (en) | 2002-08-09 | 2005-03-08 | Macronix International Co., Ltd. | Spacer chalcogenide memory method and device |
US6850432B2 (en) | 2002-08-20 | 2005-02-01 | Macronix International Co., Ltd. | Laser programmable electrically readable phase-change memory method and device |
KR100448908B1 (ko) | 2002-09-03 | 2004-09-16 | 삼성전자주식회사 | 상전이 기억 소자 구조 및 그 제조 방법 |
JP4190238B2 (ja) | 2002-09-13 | 2008-12-03 | 株式会社ルネサステクノロジ | 不揮発性半導体記憶装置 |
US6897533B1 (en) | 2002-09-18 | 2005-05-24 | Advanced Micro Devices, Inc. | Multi-bit silicon nitride charge-trapping non-volatile memory cell |
AU2003259447A1 (en) | 2002-10-11 | 2004-05-04 | Koninklijke Philips Electronics N.V. | Electric device comprising phase change material |
KR100446632B1 (ko) | 2002-10-14 | 2004-09-04 | 삼성전자주식회사 | 비휘발성 sonsnos 메모리 |
US6858899B2 (en) | 2002-10-15 | 2005-02-22 | Matrix Semiconductor, Inc. | Thin film transistor with metal oxide layer and method of making same |
US6992932B2 (en) | 2002-10-29 | 2006-01-31 | Saifun Semiconductors Ltd | Method circuit and system for read error detection in a non-volatile memory array |
US6940744B2 (en) | 2002-10-31 | 2005-09-06 | Unity Semiconductor Corporation | Adaptive programming technique for a re-writable conductive memory device |
JP4928045B2 (ja) | 2002-10-31 | 2012-05-09 | 大日本印刷株式会社 | 相変化型メモリ素子およびその製造方法 |
US6869883B2 (en) | 2002-12-13 | 2005-03-22 | Ovonyx, Inc. | Forming phase change memories |
US6791102B2 (en) | 2002-12-13 | 2004-09-14 | Intel Corporation | Phase change memory |
US6744088B1 (en) | 2002-12-13 | 2004-06-01 | Intel Corporation | Phase change memory device on a planar composite layer |
US7589343B2 (en) | 2002-12-13 | 2009-09-15 | Intel Corporation | Memory and access device and method therefor |
US6849905B2 (en) | 2002-12-23 | 2005-02-01 | Matrix Semiconductor, Inc. | Semiconductor device with localized charge storage dielectric and method of making same |
US6815266B2 (en) | 2002-12-30 | 2004-11-09 | Bae Systems Information And Electronic Systems Integration, Inc. | Method for manufacturing sidewall contacts for a chalcogenide memory device |
US7005350B2 (en) | 2002-12-31 | 2006-02-28 | Matrix Semiconductor, Inc. | Method for fabricating programmable memory array structures incorporating series-connected transistor strings |
US6912163B2 (en) | 2003-01-14 | 2005-06-28 | Fasl, Llc | Memory device having high work function gate and method of erasing same |
EP1439583B1 (en) | 2003-01-15 | 2013-04-10 | STMicroelectronics Srl | Sublithographic contact structure, in particular for a phase change memory cell, and fabrication process thereof |
KR100476690B1 (ko) | 2003-01-17 | 2005-03-18 | 삼성전자주식회사 | 반도체 장치 및 그 제조방법 |
CN100505086C (zh) | 2003-01-31 | 2009-06-24 | Nxp股份有限公司 | 用于低功耗和高选择性的mram结构 |
KR100486306B1 (ko) | 2003-02-24 | 2005-04-29 | 삼성전자주식회사 | 셀프 히터 구조를 가지는 상변화 메모리 소자 |
US7115927B2 (en) | 2003-02-24 | 2006-10-03 | Samsung Electronics Co., Ltd. | Phase changeable memory devices |
US7323734B2 (en) | 2003-02-25 | 2008-01-29 | Samsung Electronics Co., Ltd. | Phase changeable memory cells |
US6936544B2 (en) | 2003-03-11 | 2005-08-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of removing metal etching residues following a metal etchback process to improve a CMP process |
US6815764B2 (en) | 2003-03-17 | 2004-11-09 | Samsung Electronics Co., Ltd. | Local SONOS-type structure having two-piece gate and self-aligned ONO and method for manufacturing the same |
US7400522B2 (en) | 2003-03-18 | 2008-07-15 | Kabushiki Kaisha Toshiba | Resistance change memory device having a variable resistance element formed of a first and second composite compound for storing a cation |
US7606059B2 (en) | 2003-03-18 | 2009-10-20 | Kabushiki Kaisha Toshiba | Three-dimensional programmable resistance memory device with a read/write circuit stacked under a memory cell array |
KR100560659B1 (ko) | 2003-03-21 | 2006-03-16 | 삼성전자주식회사 | 상변화 기억 소자 및 그 제조 방법 |
US6879505B2 (en) | 2003-03-31 | 2005-04-12 | Matrix Semiconductor, Inc. | Word line arrangement having multi-layer word line segments for three-dimensional memory array |
US7233024B2 (en) | 2003-03-31 | 2007-06-19 | Sandisk 3D Llc | Three-dimensional memory device incorporating segmented bit line memory array |
KR100504698B1 (ko) | 2003-04-02 | 2005-08-02 | 삼성전자주식회사 | 상변화 기억 소자 및 그 형성 방법 |
WO2004090984A1 (en) | 2003-04-03 | 2004-10-21 | Kabushiki Kaisha Toshiba | Phase change memory device |
US7459715B2 (en) | 2003-04-03 | 2008-12-02 | Kabushiki Kaisha Toshiba | Resistance change memory device |
JP4634014B2 (ja) | 2003-05-22 | 2011-02-16 | 株式会社日立製作所 | 半導体記憶装置 |
KR100979710B1 (ko) | 2003-05-23 | 2010-09-02 | 삼성전자주식회사 | 반도체 메모리 소자 및 제조방법 |
KR100553687B1 (ko) | 2003-05-29 | 2006-02-24 | 삼성전자주식회사 | 축소가능한 2개의 트랜지스터 기억 소자 및 그 형성방법 |
US20060006472A1 (en) | 2003-06-03 | 2006-01-12 | Hai Jiang | Phase change memory with extra-small resistors |
JP4040534B2 (ja) | 2003-06-04 | 2008-01-30 | 株式会社東芝 | 半導体記憶装置 |
US7067865B2 (en) | 2003-06-06 | 2006-06-27 | Macronix International Co., Ltd. | High density chalcogenide memory cells |
US7115942B2 (en) | 2004-07-01 | 2006-10-03 | Chih-Hsin Wang | Method and apparatus for nonvolatile memory |
EP1487013A3 (en) | 2003-06-10 | 2006-07-19 | Samsung Electronics Co., Ltd. | SONOS memory device and method of manufacturing the same |
US20040256679A1 (en) | 2003-06-17 | 2004-12-23 | Hu Yongjun J. | Dual work function metal gates and method of forming |
US7236394B2 (en) | 2003-06-18 | 2007-06-26 | Macronix International Co., Ltd. | Transistor-free random access memory |
US6838692B1 (en) | 2003-06-23 | 2005-01-04 | Macronix International Co., Ltd. | Chalcogenide memory device with multiple bits per cell |
US6898128B2 (en) | 2003-07-18 | 2005-05-24 | Freescale Semiconductor, Inc. | Programming of a memory with discrete charge storage elements |
US20050018526A1 (en) | 2003-07-21 | 2005-01-27 | Heon Lee | Phase-change memory device and manufacturing method thereof |
US7132350B2 (en) | 2003-07-21 | 2006-11-07 | Macronix International Co., Ltd. | Method for manufacturing a programmable eraseless memory |
KR20050011203A (ko) | 2003-07-22 | 2005-01-29 | 주식회사 하이닉스반도체 | 반도체소자의 플러그 형성방법 |
KR100615586B1 (ko) | 2003-07-23 | 2006-08-25 | 삼성전자주식회사 | 다공성 유전막 내에 국부적인 상전이 영역을 구비하는상전이 메모리 소자 및 그 제조 방법 |
US7893419B2 (en) | 2003-08-04 | 2011-02-22 | Intel Corporation | Processing phase change material to improve programming speed |
DE102004039977B4 (de) | 2003-08-13 | 2008-09-11 | Samsung Electronics Co., Ltd., Suwon | Programmierverfahren und Treiberschaltung für eine Phasenwechselspeicherzelle |
US6815704B1 (en) | 2003-09-04 | 2004-11-09 | Silicon Storage Technology, Inc. | Phase change memory device employing thermally insulating voids |
US6927410B2 (en) | 2003-09-04 | 2005-08-09 | Silicon Storage Technology, Inc. | Memory device with discrete layers of phase change memory material |
KR100505709B1 (ko) | 2003-09-08 | 2005-08-03 | 삼성전자주식회사 | 상 변화 메모리 장치의 파이어링 방법 및 효율적인파이어링을 수행할 수 있는 상 변화 메모리 장치 |
US20050062087A1 (en) | 2003-09-19 | 2005-03-24 | Yi-Chou Chen | Chalcogenide phase-change non-volatile memory, memory device and method for fabricating the same |
US7012299B2 (en) | 2003-09-23 | 2006-03-14 | Matrix Semiconductors, Inc. | Storage layer optimization of a nonvolatile memory device |
DE10345455A1 (de) | 2003-09-30 | 2005-05-04 | Infineon Technologies Ag | Verfahren zum Erzeugen einer Hartmaske und Hartmasken-Anordnung |
DE10345475B4 (de) | 2003-09-30 | 2008-04-17 | Infineon Technologies Ag | Nichtflüchtiger integrierter Halbleiterspeicher |
KR100562743B1 (ko) | 2003-10-06 | 2006-03-21 | 동부아남반도체 주식회사 | 플래시 메모리 소자의 제조방법 |
DE10349750A1 (de) | 2003-10-23 | 2005-05-25 | Commissariat à l'Energie Atomique | Phasenwechselspeicher, Phasenwechselspeicheranordnung, Phasenwechselspeicherzelle, 2D-Phasenwechselspeicherzellen-Array, 3D-Phasenwechselspeicherzellen-Array und Elektronikbaustein |
KR100579844B1 (ko) | 2003-11-05 | 2006-05-12 | 동부일렉트로닉스 주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
US7115509B2 (en) | 2003-11-17 | 2006-10-03 | Micron Technology, Inc. | Method for forming polysilicon local interconnects |
US7485891B2 (en) | 2003-11-20 | 2009-02-03 | International Business Machines Corporation | Multi-bit phase change memory cell and multi-bit phase change memory including the same, method of forming a multi-bit phase change memory, and method of programming a multi-bit phase change memory |
KR100558548B1 (ko) | 2003-11-27 | 2006-03-10 | 삼성전자주식회사 | 상변화 메모리 소자에서의 라이트 드라이버 회로 및라이트 전류 인가방법 |
US6937507B2 (en) | 2003-12-05 | 2005-08-30 | Silicon Storage Technology, Inc. | Memory device and method of operating same |
US7928420B2 (en) | 2003-12-10 | 2011-04-19 | International Business Machines Corporation | Phase change tip storage cell |
US7291556B2 (en) | 2003-12-12 | 2007-11-06 | Samsung Electronics Co., Ltd. | Method for forming small features in microelectronic devices using sacrificial layers |
US7265050B2 (en) | 2003-12-12 | 2007-09-04 | Samsung Electronics Co., Ltd. | Methods for fabricating memory devices using sacrificial layers |
KR100569549B1 (ko) | 2003-12-13 | 2006-04-10 | 주식회사 하이닉스반도체 | 상 변화 저항 셀 및 이를 이용한 불휘발성 메모리 장치 |
US7148538B2 (en) | 2003-12-17 | 2006-12-12 | Micron Technology, Inc. | Vertical NAND flash memory array |
KR100564602B1 (ko) | 2003-12-30 | 2006-03-29 | 삼성전자주식회사 | 상 변화 메모리 어레이의 셋 프로그래밍 방법 및 기입드라이버 회로 |
US7038230B2 (en) | 2004-01-06 | 2006-05-02 | Macronix Internation Co., Ltd. | Horizontal chalcogenide element defined by a pad for use in solid-state memories |
JP2005197624A (ja) | 2004-01-09 | 2005-07-21 | Genusion:Kk | 不揮発性記憶装置 |
JP4124743B2 (ja) | 2004-01-21 | 2008-07-23 | 株式会社ルネサステクノロジ | 相変化メモリ |
US7151692B2 (en) | 2004-01-27 | 2006-12-19 | Macronix International Co., Ltd. | Operation scheme for programming charge trapping non-volatile memory |
KR100564608B1 (ko) | 2004-01-29 | 2006-03-28 | 삼성전자주식회사 | 상변화 메모리 소자 |
US6936840B2 (en) | 2004-01-30 | 2005-08-30 | International Business Machines Corporation | Phase-change memory cell and method of fabricating the phase-change memory cell |
US6906940B1 (en) | 2004-02-12 | 2005-06-14 | Macronix International Co., Ltd. | Plane decoding method and device for three dimensional memories |
US7858980B2 (en) | 2004-03-01 | 2010-12-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Reduced active area in a phase change memory structure |
KR100574975B1 (ko) | 2004-03-05 | 2006-05-02 | 삼성전자주식회사 | 상 변화 메모리 어레이의 셋 프로그래밍 방법 및 기입드라이버 회로 |
JP4529493B2 (ja) | 2004-03-12 | 2010-08-25 | 株式会社日立製作所 | 半導体装置 |
KR100598100B1 (ko) | 2004-03-19 | 2006-07-07 | 삼성전자주식회사 | 상변환 기억 소자의 제조방법 |
DE102004014487A1 (de) | 2004-03-24 | 2005-11-17 | Infineon Technologies Ag | Speicherbauelement mit in isolierendes Material eingebettetem, aktiven Material |
KR100532509B1 (ko) | 2004-03-26 | 2005-11-30 | 삼성전자주식회사 | SiGe를 이용한 트렌치 커패시터 및 그 형성방법 |
US7158411B2 (en) | 2004-04-01 | 2007-01-02 | Macronix International Co., Ltd. | Integrated code and data flash memory |
US20050230724A1 (en) | 2004-04-16 | 2005-10-20 | Sharp Laboratories Of America, Inc. | 3D cross-point memory array with shared connections |
US7075828B2 (en) | 2004-04-26 | 2006-07-11 | Macronix International Co., Intl. | Operation scheme with charge balancing erase for charge trapping non-volatile memory |
US7209390B2 (en) | 2004-04-26 | 2007-04-24 | Macronix International Co., Ltd. | Operation scheme for spectrum shift in charge trapping non-volatile memory |
US7133313B2 (en) | 2004-04-26 | 2006-11-07 | Macronix International Co., Ltd. | Operation scheme with charge balancing for charge trapping non-volatile memory |
US7164603B2 (en) | 2004-04-26 | 2007-01-16 | Yen-Hao Shih | Operation scheme with high work function gate and charge balancing for charge trapping non-volatile memory |
US7187590B2 (en) | 2004-04-26 | 2007-03-06 | Macronix International Co., Ltd. | Method and system for self-convergent erase in charge trapping memory cells |
US7482616B2 (en) | 2004-05-27 | 2009-01-27 | Samsung Electronics Co., Ltd. | Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same |
US7133316B2 (en) | 2004-06-02 | 2006-11-07 | Macronix International Co., Ltd. | Program/erase method for P-channel charge trapping memory device |
US7190614B2 (en) | 2004-06-17 | 2007-03-13 | Macronix International Co., Ltd. | Operation scheme for programming charge trapping non-volatile memory |
US6977181B1 (en) | 2004-06-17 | 2005-12-20 | Infincon Technologies Ag | MTJ stack with crystallization inhibiting layer |
US7378702B2 (en) | 2004-06-21 | 2008-05-27 | Sang-Yun Lee | Vertical memory device structures |
KR100668824B1 (ko) | 2004-06-30 | 2007-01-16 | 주식회사 하이닉스반도체 | 상변환 기억 소자 및 그 제조방법 |
US7359231B2 (en) | 2004-06-30 | 2008-04-15 | Intel Corporation | Providing current for phase change memories |
JP2006019455A (ja) | 2004-06-30 | 2006-01-19 | Nec Electronics Corp | 半導体装置およびその製造方法 |
KR100657897B1 (ko) | 2004-08-21 | 2006-12-14 | 삼성전자주식회사 | 전압 제어층을 포함하는 메모리 소자 |
US7365385B2 (en) | 2004-08-30 | 2008-04-29 | Micron Technology, Inc. | DRAM layout with vertical FETs and method of formation |
KR100610014B1 (ko) | 2004-09-06 | 2006-08-09 | 삼성전자주식회사 | 리키지 전류 보상 가능한 반도체 메모리 장치 |
TW200620473A (en) | 2004-09-08 | 2006-06-16 | Renesas Tech Corp | Nonvolatile memory device |
US7443062B2 (en) | 2004-09-30 | 2008-10-28 | Reliance Electric Technologies Llc | Motor rotor cooling with rotation heat pipes |
TWI277207B (en) | 2004-10-08 | 2007-03-21 | Ind Tech Res Inst | Multilevel phase-change memory, operating method and manufacture method thereof |
TWI254443B (en) | 2004-10-08 | 2006-05-01 | Ind Tech Res Inst | Multilevel phase-change memory, manufacture method and status transferring method thereof |
KR100688575B1 (ko) | 2004-10-08 | 2007-03-02 | 삼성전자주식회사 | 비휘발성 반도체 메모리 소자 |
CN101040290A (zh) | 2004-10-15 | 2007-09-19 | 应用材料股份有限公司 | 半导体组件的晶粒跟踪装置及其测试设备 |
KR100626388B1 (ko) | 2004-10-19 | 2006-09-20 | 삼성전자주식회사 | 상변환 메모리 소자 및 그 형성 방법 |
JP2006120834A (ja) | 2004-10-21 | 2006-05-11 | Disco Abrasive Syst Ltd | ウェーハの分割方法 |
JP2006127583A (ja) | 2004-10-26 | 2006-05-18 | Elpida Memory Inc | 不揮発性半導体記憶装置及び相変化メモリ |
DE102004052611A1 (de) | 2004-10-29 | 2006-05-04 | Infineon Technologies Ag | Verfahren zur Herstellung einer mit einem Füllmaterial mindestens teilweise gefüllten Öffnung, Verfahren zur Herstellung einer Speicherzelle und Speicherzelle |
US7364935B2 (en) | 2004-10-29 | 2008-04-29 | Macronix International Co., Ltd. | Common word line edge contact phase-change memory |
US20060091467A1 (en) | 2004-10-29 | 2006-05-04 | Doyle Brian S | Resonant tunneling device using metal oxide semiconductor processing |
US7238959B2 (en) | 2004-11-01 | 2007-07-03 | Silicon Storage Technology, Inc. | Phase change memory device employing thermally insulating voids and sloped trench, and a method of making same |
US20060097341A1 (en) | 2004-11-05 | 2006-05-11 | Fabio Pellizzer | Forming phase change memory cell with microtrenches |
US7608503B2 (en) | 2004-11-22 | 2009-10-27 | Macronix International Co., Ltd. | Side wall active pin memory and manufacturing method |
US7413588B2 (en) | 2004-11-24 | 2008-08-19 | Fleetguard, Inc. | High efficiency, low restriction, cost effective filter |
US7202493B2 (en) | 2004-11-30 | 2007-04-10 | Macronix International Co., Inc. | Chalcogenide memory having a small active region |
JP2006156886A (ja) | 2004-12-01 | 2006-06-15 | Renesas Technology Corp | 半導体集積回路装置およびその製造方法 |
KR100827653B1 (ko) | 2004-12-06 | 2008-05-07 | 삼성전자주식회사 | 상변화 기억 셀들 및 그 제조방법들 |
US7220983B2 (en) | 2004-12-09 | 2007-05-22 | Macronix International Co., Ltd. | Self-aligned small contact phase-change memory method and device |
JP4928773B2 (ja) | 2004-12-10 | 2012-05-09 | 株式会社東芝 | 半導体装置 |
TWI260764B (en) | 2004-12-10 | 2006-08-21 | Macronix Int Co Ltd | Non-volatile memory cell and operating method thereof |
US20060131555A1 (en) | 2004-12-22 | 2006-06-22 | Micron Technology, Inc. | Resistance variable devices with controllable channels |
US20060138467A1 (en) | 2004-12-29 | 2006-06-29 | Hsiang-Lan Lung | Method of forming a small contact in phase-change memory and a memory cell produced by the method |
US7642585B2 (en) | 2005-01-03 | 2010-01-05 | Macronix International Co., Ltd. | Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays |
US7315474B2 (en) | 2005-01-03 | 2008-01-01 | Macronix International Co., Ltd | Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays |
US7709334B2 (en) | 2005-12-09 | 2010-05-04 | Macronix International Co., Ltd. | Stacked non-volatile memory device and methods for fabricating the same |
DE602006018807D1 (de) | 2005-01-03 | 2011-01-27 | Macronix Int Co Ltd | Nichtflüchtige Speicherzellen, Speicherarrays damit und Verfahren zum Betrieb der Zellen und Arrays |
TWI297154B (en) | 2005-01-03 | 2008-05-21 | Macronix Int Co Ltd | Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays |
US20060198189A1 (en) | 2005-01-03 | 2006-09-07 | Macronix International Co., Ltd. | Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays |
US7473589B2 (en) | 2005-12-09 | 2009-01-06 | Macronix International Co., Ltd. | Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same |
US8264028B2 (en) | 2005-01-03 | 2012-09-11 | Macronix International Co., Ltd. | Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays |
JP4646634B2 (ja) | 2005-01-05 | 2011-03-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7419771B2 (en) | 2005-01-11 | 2008-09-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming a finely patterned resist |
US20060172067A1 (en) | 2005-01-28 | 2006-08-03 | Energy Conversion Devices, Inc | Chemical vapor deposition of chalcogenide materials |
US7214958B2 (en) | 2005-02-10 | 2007-05-08 | Infineon Technologies Ag | Phase change memory cell with high read margin at low power operation |
US7361925B2 (en) | 2005-02-10 | 2008-04-22 | Infineon Technologies Ag | Integrated circuit having a memory including a low-k dielectric material for thermal isolation |
US7099180B1 (en) | 2005-02-15 | 2006-08-29 | Intel Corporation | Phase change memory bits reset through a series of pulses of increasing amplitude |
US20090039417A1 (en) | 2005-02-17 | 2009-02-12 | National University Of Singapore | Nonvolatile Flash Memory Device and Method for Producing Dielectric Oxide Nanodots on Silicon Dioxide |
JP2005184029A (ja) | 2005-02-18 | 2005-07-07 | Renesas Technology Corp | 不揮発性記憶素子及び半導体集積回路装置 |
US7229883B2 (en) | 2005-02-23 | 2007-06-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Phase change memory device and method of manufacture thereof |
JP2006244561A (ja) | 2005-03-01 | 2006-09-14 | Renesas Technology Corp | 半導体装置 |
US7154774B2 (en) | 2005-03-30 | 2006-12-26 | Ovonyx, Inc. | Detecting switching of access elements of phase change memory cells |
US7488967B2 (en) | 2005-04-06 | 2009-02-10 | International Business Machines Corporation | Structure for confining the switching current in phase memory (PCM) cells |
DE602005011249D1 (de) | 2005-04-08 | 2009-01-08 | St Microelectronics Srl | Phasenwechselspeicher mit rohrförmiger Heizstruktur sowie deren Herstellungsverfahren |
US7166533B2 (en) | 2005-04-08 | 2007-01-23 | Infineon Technologies, Ag | Phase change memory cell defined by a pattern shrink material process |
US7397700B2 (en) | 2005-04-11 | 2008-07-08 | Stmicroelectronics S.R.L. | Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor |
KR100675279B1 (ko) | 2005-04-20 | 2007-01-26 | 삼성전자주식회사 | 셀 다이오드들을 채택하는 상변이 기억소자들 및 그제조방법들 |
US7408240B2 (en) | 2005-05-02 | 2008-08-05 | Infineon Technologies Ag | Memory device |
US8217490B2 (en) | 2005-05-09 | 2012-07-10 | Nantero Inc. | Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same |
US7279740B2 (en) | 2005-05-12 | 2007-10-09 | Micron Technology, Inc. | Band-engineered multi-gated non-volatile memory device with enhanced attributes |
US7612403B2 (en) | 2005-05-17 | 2009-11-03 | Micron Technology, Inc. | Low power non-volatile memory and gate stack |
KR100682946B1 (ko) | 2005-05-31 | 2007-02-15 | 삼성전자주식회사 | 상전이 램 및 그 동작 방법 |
KR100668846B1 (ko) | 2005-06-10 | 2007-01-16 | 주식회사 하이닉스반도체 | 상변환 기억 소자의 제조방법 |
US7636257B2 (en) | 2005-06-10 | 2009-12-22 | Macronix International Co., Ltd. | Methods of operating p-channel non-volatile memory devices |
US7388273B2 (en) | 2005-06-14 | 2008-06-17 | International Business Machines Corporation | Reprogrammable fuse structure and method |
US7514367B2 (en) | 2005-06-17 | 2009-04-07 | Macronix International Co., Ltd. | Method for manufacturing a narrow structure on an integrated circuit |
US8237140B2 (en) | 2005-06-17 | 2012-08-07 | Macronix International Co., Ltd. | Self-aligned, embedded phase change RAM |
US7238994B2 (en) | 2005-06-17 | 2007-07-03 | Macronix International Co., Ltd. | Thin film plate phase change ram circuit and manufacturing method |
US7696503B2 (en) | 2005-06-17 | 2010-04-13 | Macronix International Co., Ltd. | Multi-level memory cell having phase change element and asymmetrical thermal boundary |
US7514288B2 (en) | 2005-06-17 | 2009-04-07 | Macronix International Co., Ltd. | Manufacturing methods for thin film fuse phase change ram |
US7321130B2 (en) | 2005-06-17 | 2008-01-22 | Macronix International Co., Ltd. | Thin film fuse phase change RAM and manufacturing method |
US7534647B2 (en) | 2005-06-17 | 2009-05-19 | Macronix International Co., Ltd. | Damascene phase change RAM and manufacturing method |
US7598512B2 (en) | 2005-06-17 | 2009-10-06 | Macronix International Co., Ltd. | Thin film fuse phase change cell with thermal isolation layer and manufacturing method |
US20060289848A1 (en) | 2005-06-28 | 2006-12-28 | Dennison Charles H | Reducing oxidation of phase change memory electrodes |
US20060289847A1 (en) | 2005-06-28 | 2006-12-28 | Richard Dodge | Reducing the time to program a phase change memory to the set state |
US7309630B2 (en) | 2005-07-08 | 2007-12-18 | Nanochip, Inc. | Method for forming patterned media for a high density data storage device |
TWI290369B (en) | 2005-07-08 | 2007-11-21 | Ind Tech Res Inst | Phase change memory with adjustable resistance ratio and fabricating method thereof |
US7345907B2 (en) | 2005-07-11 | 2008-03-18 | Sandisk 3D Llc | Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements |
US7829938B2 (en) | 2005-07-14 | 2010-11-09 | Micron Technology, Inc. | High density NAND non-volatile memory device |
US7763927B2 (en) | 2005-12-15 | 2010-07-27 | Macronix International Co., Ltd. | Non-volatile memory device having a nitride-oxide dielectric layer |
US7468299B2 (en) | 2005-08-04 | 2008-12-23 | Macronix International Co., Ltd. | Non-volatile memory cells and methods of manufacturing the same |
US7576386B2 (en) | 2005-08-04 | 2009-08-18 | Macronix International Co., Ltd. | Non-volatile memory semiconductor device having an oxide-nitride-oxide (ONO) top dielectric layer |
US20070037101A1 (en) | 2005-08-15 | 2007-02-15 | Fujitsu Limited | Manufacture method for micro structure |
TWI273703B (en) | 2005-08-19 | 2007-02-11 | Ind Tech Res Inst | A manufacture method and structure for improving the characteristics of phase change memory |
KR100628875B1 (ko) | 2005-08-19 | 2006-09-26 | 삼성전자주식회사 | 소노스 타입의 비휘발성 메모리 장치 및 그 제조 방법 |
US7381982B2 (en) | 2005-08-26 | 2008-06-03 | Macronix International Co., Ltd. | Method for fabricating chalcogenide-applied memory |
US20070045606A1 (en) | 2005-08-30 | 2007-03-01 | Michele Magistretti | Shaping a phase change layer in a phase change memory cell |
US7327592B2 (en) | 2005-08-30 | 2008-02-05 | Micron Technology, Inc. | Self-identifying stacked die semiconductor components |
US7629641B2 (en) | 2005-08-31 | 2009-12-08 | Micron Technology, Inc. | Band engineered nano-crystal non-volatile memory device utilizing enhanced gate injection |
US7420242B2 (en) | 2005-08-31 | 2008-09-02 | Macronix International Co., Ltd. | Stacked bit line dual word line nonvolatile memory |
KR100655443B1 (ko) | 2005-09-05 | 2006-12-08 | 삼성전자주식회사 | 상변화 메모리 장치 및 그 동작 방법 |
US7301818B2 (en) | 2005-09-12 | 2007-11-27 | Macronix International Co., Ltd. | Hole annealing methods of non-volatile memory cells |
US8846549B2 (en) | 2005-09-27 | 2014-09-30 | Macronix International Co., Ltd. | Method of forming bottom oxide for nitride flash memory |
US7514742B2 (en) | 2005-10-13 | 2009-04-07 | Macronix International Co., Ltd. | Recessed shallow trench isolation |
US7615770B2 (en) | 2005-10-27 | 2009-11-10 | Infineon Technologies Ag | Integrated circuit having an insulated memory |
US7417245B2 (en) | 2005-11-02 | 2008-08-26 | Infineon Technologies Ag | Phase change memory having multilayer thermal insulation |
US7397060B2 (en) | 2005-11-14 | 2008-07-08 | Macronix International Co., Ltd. | Pipe shaped phase change memory |
US20070111429A1 (en) | 2005-11-14 | 2007-05-17 | Macronix International Co., Ltd. | Method of manufacturing a pipe shaped phase change memory |
US7450411B2 (en) | 2005-11-15 | 2008-11-11 | Macronix International Co., Ltd. | Phase change memory device and manufacturing method |
US7394088B2 (en) | 2005-11-15 | 2008-07-01 | Macronix International Co., Ltd. | Thermally contained/insulated phase change memory device and method (combined) |
US7786460B2 (en) | 2005-11-15 | 2010-08-31 | Macronix International Co., Ltd. | Phase change memory device and manufacturing method |
US7635855B2 (en) | 2005-11-15 | 2009-12-22 | Macronix International Co., Ltd. | I-shaped phase change memory cell |
US7414258B2 (en) | 2005-11-16 | 2008-08-19 | Macronix International Co., Ltd. | Spacer electrode small pin phase change memory RAM and manufacturing method |
US7507986B2 (en) | 2005-11-21 | 2009-03-24 | Macronix International Co., Ltd. | Thermal isolation for an active-sidewall phase change memory cell |
US7829876B2 (en) | 2005-11-21 | 2010-11-09 | Macronix International Co., Ltd. | Vacuum cell thermal isolation for a phase change memory device |
US7449710B2 (en) | 2005-11-21 | 2008-11-11 | Macronix International Co., Ltd. | Vacuum jacket for phase change memory element |
US7479649B2 (en) | 2005-11-21 | 2009-01-20 | Macronix International Co., Ltd. | Vacuum jacketed electrode for phase change memory element |
US7599217B2 (en) | 2005-11-22 | 2009-10-06 | Macronix International Co., Ltd. | Memory cell device and manufacturing method |
US7688619B2 (en) | 2005-11-28 | 2010-03-30 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7459717B2 (en) | 2005-11-28 | 2008-12-02 | Macronix International Co., Ltd. | Phase change memory cell and manufacturing method |
US7233054B1 (en) | 2005-11-29 | 2007-06-19 | Korea Institute Of Science And Technology | Phase change material and non-volatile memory device using the same |
JP4476919B2 (ja) | 2005-12-01 | 2010-06-09 | 株式会社東芝 | 不揮発性記憶装置 |
US7605079B2 (en) | 2005-12-05 | 2009-10-20 | Macronix International Co., Ltd. | Manufacturing method for phase change RAM with electrode layer process |
US7486534B2 (en) | 2005-12-08 | 2009-02-03 | Macronix International Co., Ltd. | Diode-less array for one-time programmable memory |
KR100673019B1 (ko) | 2005-12-12 | 2007-01-24 | 삼성전자주식회사 | 적층 구조를 가지는 낸드형 비휘발성 메모리 장치, 그 형성방법 및 동작 방법 |
US20070132049A1 (en) | 2005-12-12 | 2007-06-14 | Stipe Barry C | Unipolar resistance random access memory (RRAM) device and vertically stacked architecture |
US7642539B2 (en) | 2005-12-13 | 2010-01-05 | Macronix International Co., Ltd. | Thin film fuse phase change cell with thermal isolation pad and manufacturing method |
JP2009520374A (ja) | 2005-12-20 | 2009-05-21 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | 縦型相変化メモリセルおよびその製造方法 |
US7531825B2 (en) | 2005-12-27 | 2009-05-12 | Macronix International Co., Ltd. | Method for forming self-aligned thermal isolation cell for a variable resistance memory array |
JP4822841B2 (ja) | 2005-12-28 | 2011-11-24 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
US8062833B2 (en) | 2005-12-30 | 2011-11-22 | Macronix International Co., Ltd. | Chalcogenide layer etching method |
US20070156949A1 (en) | 2005-12-30 | 2007-07-05 | Rudelic John C | Method and apparatus for single chip system boot |
US7292466B2 (en) | 2006-01-03 | 2007-11-06 | Infineon Technologies Ag | Integrated circuit having a resistive memory |
KR100763908B1 (ko) | 2006-01-05 | 2007-10-05 | 삼성전자주식회사 | 상전이 물질, 이를 포함하는 상전이 메모리와 이의 동작방법 |
US7560337B2 (en) | 2006-01-09 | 2009-07-14 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7741636B2 (en) | 2006-01-09 | 2010-06-22 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US7595218B2 (en) | 2006-01-09 | 2009-09-29 | Macronix International Co., Ltd. | Programmable resistive RAM and manufacturing method |
US20070158632A1 (en) | 2006-01-09 | 2007-07-12 | Macronix International Co., Ltd. | Method for Fabricating a Pillar-Shaped Phase Change Memory Element |
US7825396B2 (en) | 2006-01-11 | 2010-11-02 | Macronix International Co., Ltd. | Self-align planerized bottom electrode phase change memory and manufacturing method |
US7351648B2 (en) | 2006-01-19 | 2008-04-01 | International Business Machines Corporation | Methods for forming uniform lithographic features |
US7432206B2 (en) | 2006-01-24 | 2008-10-07 | Macronix International Co., Ltd. | Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram |
US7456421B2 (en) | 2006-01-30 | 2008-11-25 | Macronix International Co., Ltd. | Vertical side wall active pin structures in a phase change memory and manufacturing methods |
US7956358B2 (en) | 2006-02-07 | 2011-06-07 | Macronix International Co., Ltd. | I-shaped phase change memory cell with thermal isolation |
US7426134B2 (en) | 2006-02-24 | 2008-09-16 | Infineon Technologies North America | Sense circuit for resistive memory |
US7910907B2 (en) | 2006-03-15 | 2011-03-22 | Macronix International Co., Ltd. | Manufacturing method for pipe-shaped electrode phase change memory |
JP5016832B2 (ja) | 2006-03-27 | 2012-09-05 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
US20070252127A1 (en) | 2006-03-30 | 2007-11-01 | Arnold John C | Phase change memory element with a peripheral connection to a thin film electrode and method of manufacture thereof |
US20070253233A1 (en) | 2006-03-30 | 2007-11-01 | Torsten Mueller | Semiconductor memory device and method of production |
US7382654B2 (en) | 2006-03-31 | 2008-06-03 | Macronix International Co., Ltd. | Trapping storage flash memory cell structure with inversion source and drain regions |
US20070235811A1 (en) | 2006-04-07 | 2007-10-11 | International Business Machines Corporation | Simultaneous conditioning of a plurality of memory cells through series resistors |
US8896045B2 (en) | 2006-04-19 | 2014-11-25 | Infineon Technologies Ag | Integrated circuit including sidewall spacer |
US7928421B2 (en) | 2006-04-21 | 2011-04-19 | Macronix International Co., Ltd. | Phase change memory cell with vacuum spacer |
US20070249090A1 (en) | 2006-04-24 | 2007-10-25 | Philipp Jan B | Phase-change memory cell adapted to prevent over-etching or under-etching |
US7514705B2 (en) | 2006-04-25 | 2009-04-07 | International Business Machines Corporation | Phase change memory cell with limited switchable volume |
US8129706B2 (en) | 2006-05-05 | 2012-03-06 | Macronix International Co., Ltd. | Structures and methods of a bistable resistive random access memory |
US7608848B2 (en) | 2006-05-09 | 2009-10-27 | Macronix International Co., Ltd. | Bridge resistance random access memory device with a singular contact structure |
US20070267618A1 (en) | 2006-05-17 | 2007-11-22 | Shoaib Zaidi | Memory device |
US7704847B2 (en) | 2006-05-19 | 2010-04-27 | International Business Machines Corporation | On-chip heater and methods for fabrication thereof and use thereof |
US7423300B2 (en) | 2006-05-24 | 2008-09-09 | Macronix International Co., Ltd. | Single-mask phase change memory element |
US7696506B2 (en) | 2006-06-27 | 2010-04-13 | Macronix International Co., Ltd. | Memory cell with memory material insulation and manufacturing method |
US7663909B2 (en) | 2006-07-10 | 2010-02-16 | Qimonda North America Corp. | Integrated circuit having a phase change memory cell including a narrow active region width |
US7746694B2 (en) | 2006-07-10 | 2010-06-29 | Macronix International Co., Ltd. | Nonvolatile memory array having modified channel region interface |
US7785920B2 (en) | 2006-07-12 | 2010-08-31 | Macronix International Co., Ltd. | Method for making a pillar-type phase change memory element |
JP2008034456A (ja) | 2006-07-26 | 2008-02-14 | Toshiba Corp | 不揮発性半導体記憶装置 |
US7542338B2 (en) | 2006-07-31 | 2009-06-02 | Sandisk 3D Llc | Method for reading a multi-level passive element memory cell array |
US7394089B2 (en) | 2006-08-25 | 2008-07-01 | International Business Machines Corporation | Heat-shielded low power PCM-based reprogrammable EFUSE device |
JP2008078404A (ja) | 2006-09-21 | 2008-04-03 | Toshiba Corp | 半導体メモリ及びその製造方法 |
TWI355664B (en) | 2006-09-29 | 2012-01-01 | Macronix Int Co Ltd | Method of reading a dual bit memory cell |
US7504653B2 (en) | 2006-10-04 | 2009-03-17 | Macronix International Co., Ltd. | Memory cell device with circumferentially-extending memory element |
US7477535B2 (en) | 2006-10-05 | 2009-01-13 | Nokia Corporation | 3D chip arrangement including memory manager |
US7646664B2 (en) | 2006-10-09 | 2010-01-12 | Samsung Electronics Co., Ltd. | Semiconductor device with three-dimensional array structure |
US7684225B2 (en) | 2006-10-13 | 2010-03-23 | Ovonyx, Inc. | Sequential and video access for non-volatile memory arrays |
US20080090400A1 (en) | 2006-10-17 | 2008-04-17 | Cheek Roger W | Self-aligned in-contact phase change memory device |
US20080225489A1 (en) | 2006-10-23 | 2008-09-18 | Teledyne Licensing, Llc | Heat spreader with high heat flux and high thermal conductivity |
US20080101110A1 (en) | 2006-10-25 | 2008-05-01 | Thomas Happ | Combined read/write circuit for memory |
US7851848B2 (en) | 2006-11-01 | 2010-12-14 | Macronix International Co., Ltd. | Cylindrical channel charge trapping devices with effectively high coupling ratios |
US7697344B2 (en) | 2006-11-03 | 2010-04-13 | Samsung Electronics Co., Ltd. | Memory device and method of operating and fabricating the same |
US7778063B2 (en) | 2006-11-08 | 2010-08-17 | Symetrix Corporation | Non-volatile resistance switching memories and methods of making same |
US7728318B2 (en) | 2006-11-16 | 2010-06-01 | Sandisk Corporation | Nonvolatile phase change memory cell having a reduced contact area |
US8101989B2 (en) | 2006-11-20 | 2012-01-24 | Macronix International Co., Ltd. | Charge trapping devices with field distribution layer over tunneling barrier |
US8344475B2 (en) | 2006-11-29 | 2013-01-01 | Rambus Inc. | Integrated circuit heating to effect in-situ annealing |
WO2008067494A1 (en) | 2006-11-29 | 2008-06-05 | Rambus Inc. | Integrated circuit with built-in heating circuitry to reverse operational degeneration |
US7682868B2 (en) | 2006-12-06 | 2010-03-23 | Macronix International Co., Ltd. | Method for making a keyhole opening during the manufacture of a memory cell |
US7473576B2 (en) | 2006-12-06 | 2009-01-06 | Macronix International Co., Ltd. | Method for making a self-converged void and bottom electrode for memory cell |
US7476587B2 (en) | 2006-12-06 | 2009-01-13 | Macronix International Co., Ltd. | Method for making a self-converged memory material element for memory cell |
US20080137400A1 (en) | 2006-12-06 | 2008-06-12 | Macronix International Co., Ltd. | Phase Change Memory Cell with Thermal Barrier and Method for Fabricating the Same |
KR101169396B1 (ko) | 2006-12-22 | 2012-07-30 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 동작 방법 |
US8076715B2 (en) | 2006-12-27 | 2011-12-13 | Spansion Llc | Dual-bit memory device having isolation material disposed underneath a bit line shared by adjacent dual-bit memory cells |
US7718989B2 (en) | 2006-12-28 | 2010-05-18 | Macronix International Co., Ltd. | Resistor random access memory cell device |
US8085615B2 (en) | 2006-12-29 | 2011-12-27 | Spansion Llc | Multi-state resistance changing memory with a word line driver for applying a same program voltage to the word line |
US20080165569A1 (en) | 2007-01-04 | 2008-07-10 | Chieh-Fang Chen | Resistance Limited Phase Change Memory Material |
US7515461B2 (en) | 2007-01-05 | 2009-04-07 | Macronix International Co., Ltd. | Current compliant sensing architecture for multilevel phase change memory |
JP4945248B2 (ja) | 2007-01-05 | 2012-06-06 | 株式会社東芝 | メモリシステム、半導体記憶装置及びその駆動方法 |
US20080164453A1 (en) | 2007-01-07 | 2008-07-10 | Breitwisch Matthew J | Uniform critical dimension size pore for pcram application |
US7440315B2 (en) | 2007-01-09 | 2008-10-21 | Macronix International Co., Ltd. | Method, apparatus and computer program product for stepped reset programming process on programmable resistive memory cell |
JP5091491B2 (ja) | 2007-01-23 | 2012-12-05 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US7456460B2 (en) | 2007-01-29 | 2008-11-25 | International Business Machines Corporation | Phase change memory element and method of making the same |
US7535756B2 (en) | 2007-01-31 | 2009-05-19 | Macronix International Co., Ltd. | Method to tighten set distribution for PCRAM |
US7701759B2 (en) | 2007-02-05 | 2010-04-20 | Macronix International Co., Ltd. | Memory cell device and programming methods |
US7463512B2 (en) | 2007-02-08 | 2008-12-09 | Macronix International Co., Ltd. | Memory element with reduced-current phase change element |
US8138028B2 (en) | 2007-02-12 | 2012-03-20 | Macronix International Co., Ltd | Method for manufacturing a phase change memory device with pillar bottom electrode |
US7884343B2 (en) | 2007-02-14 | 2011-02-08 | Macronix International Co., Ltd. | Phase change memory cell with filled sidewall memory element and method for fabricating the same |
US8008643B2 (en) | 2007-02-21 | 2011-08-30 | Macronix International Co., Ltd. | Phase change memory cell with heater and method for fabricating the same |
US7382647B1 (en) | 2007-02-27 | 2008-06-03 | International Business Machines Corporation | Rectifying element for a crosspoint based memory array architecture |
EP1975998A3 (en) | 2007-03-26 | 2013-12-04 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing a plurality of island-shaped SOI structures |
US20080251934A1 (en) | 2007-04-13 | 2008-10-16 | Jack Allan Mandelman | Semiconductor Device Structures and Methods of Fabricating Semiconductor Device Structures for Use in SRAM Devices |
US20080251878A1 (en) | 2007-04-13 | 2008-10-16 | International Business Machines Corporation | Structure incorporating semiconductor device structures for use in sram devices |
US7719048B1 (en) | 2007-04-26 | 2010-05-18 | National Semiconductor Corporation | Heating element for enhanced E2PROM |
JP2008277543A (ja) | 2007-04-27 | 2008-11-13 | Toshiba Corp | 不揮発性半導体記憶装置 |
US20080265234A1 (en) | 2007-04-30 | 2008-10-30 | Breitwisch Matthew J | Method of Forming Phase Change Memory Cell With Reduced Switchable Volume |
TWI333273B (en) | 2007-05-02 | 2010-11-11 | Powerchip Technology Corp | Methods for reducing a contact area between heating electrode and phase-change material layer, phase-change memory devices and methods for fabricating the same |
US20080285350A1 (en) | 2007-05-18 | 2008-11-20 | Chih Chieh Yeh | Circuit and method for a three dimensional non-volatile memory |
US7906368B2 (en) | 2007-06-29 | 2011-03-15 | International Business Machines Corporation | Phase change memory with tapered heater |
US7745807B2 (en) | 2007-07-11 | 2010-06-29 | International Business Machines Corporation | Current constricting phase change memory element structure |
US7995371B2 (en) | 2007-07-26 | 2011-08-09 | Unity Semiconductor Corporation | Threshold device for a memory array |
US7755935B2 (en) | 2007-07-26 | 2010-07-13 | International Business Machines Corporation | Block erase for phase change memory |
US7737488B2 (en) | 2007-08-09 | 2010-06-15 | Macronix International Co., Ltd. | Blocking dielectric engineered charge trapping memory cell with high speed erase |
JP5281770B2 (ja) | 2007-08-17 | 2013-09-04 | スパンション エルエルシー | 半導体装置およびその製造方法 |
JP2009049208A (ja) | 2007-08-20 | 2009-03-05 | Spansion Llc | 半導体装置およびその製造方法 |
US8193573B2 (en) | 2007-09-05 | 2012-06-05 | Rambus Inc. | Repairing defects in a nonvolatile semiconductor memory device utilizing a heating element |
JP5376789B2 (ja) | 2007-10-03 | 2013-12-25 | 株式会社東芝 | 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の制御方法 |
JP2009094236A (ja) * | 2007-10-05 | 2009-04-30 | Toshiba Corp | 不揮発性半導体記憶装置 |
KR20090037690A (ko) | 2007-10-12 | 2009-04-16 | 삼성전자주식회사 | 비휘발성 메모리 소자, 그 동작 방법 및 그 제조 방법 |
US7848148B2 (en) | 2007-10-18 | 2010-12-07 | Macronix International Co., Ltd. | One-transistor cell semiconductor on insulator random access memory |
JP2009135448A (ja) | 2007-11-01 | 2009-06-18 | Semiconductor Energy Lab Co Ltd | 半導体基板の作製方法及び半導体装置の作製方法 |
TW200926356A (en) | 2007-12-11 | 2009-06-16 | Ind Tech Res Inst | Method for fabricating phase-change memory |
KR100936808B1 (ko) | 2007-12-26 | 2010-01-14 | 주식회사 하이닉스반도체 | 저 시트저항 워드라인과 수직채널트랜지스터를 구비한반도체소자 및 그 제조 방법 |
US7663900B2 (en) | 2007-12-31 | 2010-02-16 | Hitachi Global Storage Technologies Netherlands B.V. | Tree-structure memory device |
US8236623B2 (en) | 2007-12-31 | 2012-08-07 | Sandisk 3D Llc | Memory cell that employs a selectively fabricated carbon nano-tube reversible resistance-switching element and methods of forming the same |
KR20090079694A (ko) | 2008-01-18 | 2009-07-22 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조 방법 |
US7785973B2 (en) | 2008-01-25 | 2010-08-31 | Spansion Llc | Electronic device including a gate electrode having portions with different conductivity types and a process of forming the same |
US8269208B2 (en) | 2008-03-07 | 2012-09-18 | Ovonyx, Inc. | Memory device |
JP2009224468A (ja) * | 2008-03-14 | 2009-10-01 | Toshiba Corp | 不揮発性半導体記憶装置 |
US7868313B2 (en) | 2008-04-29 | 2011-01-11 | International Business Machines Corporation | Phase change memory device and method of manufacture |
JP2009295694A (ja) | 2008-06-03 | 2009-12-17 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法 |
KR20080091416A (ko) | 2008-08-14 | 2008-10-13 | 김성동 | 3차원 반도체 장치, 그 제조 방법 및 동작 방법 |
CN101350360B (zh) | 2008-08-29 | 2011-06-01 | 中国科学院上海微系统与信息技术研究所 | 一种三维堆叠非相变所致电阻转换存储装置及其制造方法 |
US20100059808A1 (en) | 2008-09-10 | 2010-03-11 | Wei Zheng | Nonvolatile memories with charge trapping dielectric modified at the edges |
US8004888B2 (en) | 2008-09-22 | 2011-08-23 | Spansion Llc | Flash mirror bit architecture using single program and erase entity as logical cell |
US7907455B2 (en) | 2008-09-22 | 2011-03-15 | Spansion Llc | High VT state used as erase condition in trap based nor flash cell design |
CN101477987B (zh) | 2009-01-08 | 2010-10-13 | 中国科学院上海微系统与信息技术研究所 | 制造三维立体堆叠的电阻转换存储器的方法 |
TWI433302B (zh) | 2009-03-03 | 2014-04-01 | Macronix Int Co Ltd | 積體電路自對準三度空間記憶陣列及其製作方法 |
US8203187B2 (en) | 2009-03-03 | 2012-06-19 | Macronix International Co., Ltd. | 3D memory array arranged for FN tunneling program and erase |
KR101497547B1 (ko) | 2009-03-19 | 2015-03-02 | 삼성전자주식회사 | 비휘발성 메모리 소자 |
KR101539699B1 (ko) * | 2009-03-19 | 2015-07-27 | 삼성전자주식회사 | 3차원 구조의 비휘발성 메모리 소자 및 그 제조방법 |
US8004918B2 (en) | 2009-03-25 | 2011-08-23 | Infineon Technologies Ag | Memory cell heating elements |
US8199576B2 (en) | 2009-04-08 | 2012-06-12 | Sandisk 3D Llc | Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architecture |
US7983065B2 (en) | 2009-04-08 | 2011-07-19 | Sandisk 3D Llc | Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines |
US8829646B2 (en) | 2009-04-27 | 2014-09-09 | Macronix International Co., Ltd. | Integrated circuit 3D memory array and manufacturing method |
KR101028993B1 (ko) | 2009-06-30 | 2011-04-12 | 주식회사 하이닉스반도체 | 3차원 구조의 비휘발성 메모리 소자 및 그 제조 방법 |
JP2011035237A (ja) | 2009-08-04 | 2011-02-17 | Toshiba Corp | 半導体装置の製造方法及び半導体装置 |
WO2011022123A1 (en) | 2009-08-21 | 2011-02-24 | Rambus Inc. | In-situ memory annealing |
JP4987927B2 (ja) | 2009-09-24 | 2012-08-01 | 株式会社東芝 | 半導体記憶装置 |
US8289749B2 (en) | 2009-10-08 | 2012-10-16 | Sandisk 3D Llc | Soft forming reversible resistivity-switching element for bipolar switching |
US8383512B2 (en) | 2011-01-19 | 2013-02-26 | Macronix International Co., Ltd. | Method for making multilayer connection structure |
JP5611574B2 (ja) | 2009-11-30 | 2014-10-22 | 株式会社東芝 | 抵抗変化メモリ及びその製造方法 |
US8508997B2 (en) | 2009-12-23 | 2013-08-13 | Intel Corporation | Multi-cell vertical memory nodes |
TWI409852B (zh) | 2009-12-31 | 2013-09-21 | Inotera Memories Inc | 利用自對準雙重圖案製作半導體元件微細結構的方法 |
US8279656B2 (en) | 2010-06-25 | 2012-10-02 | Macronix International Co., Ltd. | Nonvolatile stacked nand memory |
US8134139B2 (en) | 2010-01-25 | 2012-03-13 | Macronix International Co., Ltd. | Programmable metallization cell with ion buffer layer |
US8487292B2 (en) | 2010-03-16 | 2013-07-16 | Sandisk 3D Llc | Resistance-switching memory cell with heavily doped metal oxide layer |
US20110241077A1 (en) | 2010-04-06 | 2011-10-06 | Macronix International Co., Ltd. | Integrated circuit 3d memory array and manufacturing method |
US8437192B2 (en) | 2010-05-21 | 2013-05-07 | Macronix International Co., Ltd. | 3D two bit-per-cell NAND flash memory |
US8531885B2 (en) | 2010-05-28 | 2013-09-10 | Aplus Flash Technology, Inc. | NAND-based 2T2b NOR flash array with a diode connection to cell's source node for size reduction using the least number of metal layers |
US8531886B2 (en) | 2010-06-10 | 2013-09-10 | Macronix International Co., Ltd. | Hot carrier programming in NAND flash |
KR101692389B1 (ko) * | 2010-06-15 | 2017-01-04 | 삼성전자주식회사 | 수직형 반도체 소자 및 그 제조 방법 |
US8890233B2 (en) | 2010-07-06 | 2014-11-18 | Macronix International Co., Ltd. | 3D memory array with improved SSL and BL contact layout |
US8659944B2 (en) | 2010-09-01 | 2014-02-25 | Macronix International Co., Ltd. | Memory architecture of 3D array with diode in memory string |
JP5651415B2 (ja) | 2010-09-21 | 2015-01-14 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
KR101733571B1 (ko) | 2010-11-08 | 2017-05-11 | 삼성전자주식회사 | 3차원 반도체 장치 |
US8941166B2 (en) | 2010-12-29 | 2015-01-27 | Macronix International Co., Ltd. | Multiple patterning method |
KR101113765B1 (ko) | 2010-12-31 | 2012-02-27 | 주식회사 하이닉스반도체 | 비휘발성 메모리 장치 및 그 제조 방법 |
US8432719B2 (en) | 2011-01-18 | 2013-04-30 | Macronix International Co., Ltd. | Three-dimensional stacked and-type flash memory structure and methods of manufacturing and operating the same hydride |
US20130003434A1 (en) | 2011-01-18 | 2013-01-03 | Macronix International Co., Ltd. | Method for operating a semiconductor structure |
US20120181580A1 (en) | 2011-01-18 | 2012-07-19 | Macronix International Co., Ltd. | Semiconductor Structure and Manufacturing Method of the Same |
US9018692B2 (en) | 2011-01-19 | 2015-04-28 | Macronix International Co., Ltd. | Low cost scalable 3D memory |
US8598032B2 (en) | 2011-01-19 | 2013-12-03 | Macronix International Co., Ltd | Reduced number of masks for IC device with stacked contact levels |
US8503213B2 (en) | 2011-01-19 | 2013-08-06 | Macronix International Co., Ltd. | Memory architecture of 3D array with alternating memory string orientation and string select structures |
US8609554B2 (en) | 2011-01-19 | 2013-12-17 | Macronix International Co., Ltd. | Semiconductor structure and method for manufacturing the same |
US8363476B2 (en) | 2011-01-19 | 2013-01-29 | Macronix International Co., Ltd. | Memory device, manufacturing method and operating method of the same |
US8811077B2 (en) | 2011-01-19 | 2014-08-19 | Macronix International Co., Ltd. | Memory architecture of 3D array with improved uniformity of bit line capacitances |
US8724390B2 (en) | 2011-01-19 | 2014-05-13 | Macronix International Co., Ltd. | Architecture for a 3D memory array |
US8486791B2 (en) | 2011-01-19 | 2013-07-16 | Macronix International Co., Ltd. | Mufti-layer single crystal 3D stackable memory |
US8630114B2 (en) | 2011-01-19 | 2014-01-14 | Macronix International Co., Ltd. | Memory architecture of 3D NOR array |
US8699258B2 (en) | 2011-01-21 | 2014-04-15 | Macronix International Co., Ltd. | Verification algorithm for metal-oxide resistive memory |
US9048341B2 (en) | 2011-03-16 | 2015-06-02 | Macronix International Co., Ltd. | Integrated circuit capacitor and method |
KR101842237B1 (ko) * | 2011-04-19 | 2018-03-27 | 삼성전자주식회사 | 3차원 반도체 메모리 소자 및 이를 제조하는 방법 |
US8824212B2 (en) | 2011-05-02 | 2014-09-02 | Macronix International Co., Ltd. | Thermally assisted flash memory with segmented word lines |
US8724393B2 (en) | 2011-05-02 | 2014-05-13 | Macronix International Co., Ltd. | Thermally assisted flash memory with diode strapping |
US8488387B2 (en) | 2011-05-02 | 2013-07-16 | Macronix International Co., Ltd. | Thermally assisted dielectric charge trapping flash |
US8432746B2 (en) | 2011-05-05 | 2013-04-30 | Macronix International Co., Ltd. | Memory page buffer |
US8605495B2 (en) | 2011-05-09 | 2013-12-10 | Macronix International Co., Ltd. | Isolation device free memory |
US20120327714A1 (en) | 2011-06-23 | 2012-12-27 | Macronix International Co., Ltd. | Memory Architecture of 3D Array With Diode in Memory String |
US8842479B2 (en) | 2011-10-11 | 2014-09-23 | Macronix International Co., Ltd. | Low voltage programming in NAND flash with two stage source side bias |
US9082656B2 (en) | 2011-11-11 | 2015-07-14 | Macronix International Co., Ltd. | NAND flash with non-trapping switch transistors |
US8951862B2 (en) | 2012-01-10 | 2015-02-10 | Macronix International Co., Ltd. | Damascene word line |
US9117515B2 (en) | 2012-01-18 | 2015-08-25 | Macronix International Co., Ltd. | Programmable metallization cell with two dielectric layers |
US9437266B2 (en) | 2012-11-13 | 2016-09-06 | Macronix International Co., Ltd. | Unipolar programmable metallization cell |
US9224474B2 (en) * | 2013-01-09 | 2015-12-29 | Macronix International Co., Ltd. | P-channel 3D memory array and methods to program and erase the same at bit level and block level utilizing band-to-band and fowler-nordheim tunneling principals |
US20140198576A1 (en) | 2013-01-16 | 2014-07-17 | Macronix International Co, Ltd. | Programming technique for reducing program disturb in stacked memory structures |
-
2014
- 2014-05-01 US US14/267,493 patent/US9559113B2/en active Active
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Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
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