TW490739B - Graded thin films - Google Patents

Graded thin films Download PDF

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Publication number
TW490739B
TW490739B TW090105107A TW90105107A TW490739B TW 490739 B TW490739 B TW 490739B TW 090105107 A TW090105107 A TW 090105107A TW 90105107 A TW90105107 A TW 90105107A TW 490739 B TW490739 B TW 490739B
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Taiwan
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patent application
scope
item
evaporation stage
source gas
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TW090105107A
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English (en)
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Christiaan J Werkhoven
Ivo Raaijmakers
Suvi P Haukka
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Asm Inc
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
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    • C23C16/029—Graded interfaces
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    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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    • C23C16/452—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials by activating reactive gas streams before their introduction into the reaction chamber, e.g. by ionisation or addition of reactive species
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    • C23C16/45534—Use of auxiliary reactants other than used for contributing to the composition of the main film, e.g. catalysts, activators or scavengers
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    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
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  • Electrodes Of Semiconductors (AREA)

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490739 A7 B7 7324pif.doc/008 五、發明說明（丨） 發明領域 本發明大體而言是有關於一種積體電路之形成層，且 特別是有關於一種具漸變形雜質濃度之沉積薄膜。 發明背景 在現代積體電路(Integrated Circuit，簡稱1C)之發展中， 包括了眾多的半導體製程步驟。從最初的矽基底的製造到 最後的封裝與測試，積體電路製造包括許多步驟，包括照 相印刷、摻質、蝕刻、及薄膜沉積。由於這些步驟，積體 電路是由精微的元件及包在數個層次間的佈線所形成的。 積體電路的基本構成方塊爲薄膜電晶體（Thin Film Transistor，簡稱TFT)。此電晶體包括一閘極介電層，夾在 ”金屬”層與半導體基底之間，因而將金屬氧化半導體簡稱 爲 nM〇S(Metal-〇xide-Semiconductor)n。實際上，閘極通常 是以導電性摻植矽形成的，而非金屬。閘極介電質一般大 多使用的是Si02或矽二極體。 今日的市場需要更高性能及更快的積體電路。爲了尋 求速度及較低的功率消耗，藉由縮小元件的尺寸而持續地 增加元件封裝密度。直到今日，此尺度已將閘極寬度減小 到0.25μπι以下。目前，已可購得利用〇·18μηι或更小的閘 極寬度或關鍵尺寸的商業產品。應用於這些小元件的尺寸 標準稱爲極薄閘極氧化層，其已發展得比每一代的M0S 積體電路都還小。閘極氧化物的厚度儘可能的做到很小’ 因而增加切換速度。當尺寸持續地縮小時’習知的聞極氧 化層在許多觀點上都不適用。 本紙張尺度適用中國國家標準（CNS)Al規格（21〇χ 297公釐） ★ V 裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif.doc/008
五、發明說明（D 極薄二氧化矽閘極介電質會產生不想要的現象，諸如 量子機械穿隧（Quantum-mechanical tunneling)。在古典的意 義上，對於電子注入矽的導電帶，假使其具有之動能小於 3.1 eV，氧化物代表是相對地不能穿透的障壁。然而，即 使此電子並非具有足夠動能’此電子表示穿過此障壁的有 限機率。此機率會隨較大的閘極電場及/或較薄的閘極氧化 物而增加。對於小於3 nm的氧化厚度，直接穿隧電流變 得大到足以使載子移除的速度快於由熱發生供應的載子。 於是，二氧化砂閘極介電質似乎已達到約1.5 nm至2 nm 的較低尺寸極限。 閘極氧化物的另一個問題是其易受覆蓋閘極的摻植物 擴散影響。多晶矽閘極層通常是以摻植硼來增強其導電 性。當閘極厚度降低，硼可以很容易地穿透閘極氧化物， 使元件的特性產生不穩定現象。硼穿透至閘極介電質會產 生不想要的結果，如啓始電壓的正偏移，副啓始點擺動增 力口，電荷陷套增加，低場電洞移動性降低，及由於P-MOSFET 的多晶矽耗乏引起的電流驅動的降低。 爲了對付二氧化矽的缺陷所做的努力包括將氮加入閘 極介電質。氮化矽(Si3N4)具有比Si02高的介電常數，理論 上可以使非穿隧極限的閘極介電質的等效氧化物厚度變 薄，以及更可用來當作雜質擴散的有效障壁。然而，氮化 矽薄膜與下面的半導體基底之間的介面品質通常很差，會 產生局密度的電荷陷套座（charge trapping site)及針孔 (pinhole)，以及伴隨而來的漏電流。因此，進而試圖產生 Si〇2與Si3N4的混合物，例如氮氧化砂(silicon oxynitride)薄 本紙張尺度適用中國國家標準（cns)a‘丨規格（2丨〇 x 297公釐）
Aw ——I—訂·1———— (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 ^0739 ^0739 經濟部智慧財產局員工消費合作杜印製 ‘7324pif.doc/008 五、發明說明（3 ) 膜，用來當作閘極介電質。然而，將氮結合至氧化矽閘極 介電質的習知方法是很難控制的，特別是對於未來世代的 元件的超薄閘極介電質。 對於縮小的問題的其他解決方法，包括使用高介電常 數材料（高K)，例如五氧化鉬、鉬鉍緦（strontium bismuth tantalate，簡稱 SBT)、鉬緦鋇（barium strontium tantalate， 簡稱BST)等。雖然其大幅增加介電強度，但這些材料難以 與現存的製造技術整合。 積體電路的尺寸持續縮小所產生的另一個問題是，很 難適當地製造傳導金屬線，用來連結積體電路內的電路。 一個簡化金屬化製程的方式是利用波紋技術（damascene technique)。波紋製程不採用沉積金屬覆蓋層以及將多餘的 金屬蝕刻掉藉以留下接線圖案的方式，而是包括經由切挖 在絕緣層形成用於接線的模版。將金屬塡充至溝渠內以及 經磨光步驟將溢出溝渠外的金屬去除。因而將金屬保留在 溝渠內的所需的接線圖案中。其中從溝渠的底面延伸至下 方的傳導元件的接觸孔或貫孔也同時塡入金屬，此方法稱 爲雙波紋製程。 很不幸的，波紋製程在縮小尺寸時有困難，特別是當 用如銅之快速擴散金屬來做爲金屬線及接觸時。爲了避免 金屬線從周圍的絕緣體剝落以及避免擴散突尖導致金屬線 之間的短路，在塡充金屬之前，在溝渠（以及貫孔，在雙 波紋製程）之間形成一個或多個金屬線層。典型的，利用 金屬黏著層及金屬氮化物障壁層。假如是以電鍍來塡充溝 渠，則亦需要金屬種子層(metal seed layer)。 -----------裝--------訂--— — — — — — (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準 (CNS)A1規格（2K) x 297公坌） 490739 A7 B7 7324pif.doc/008 五、發明說明（β ) 這些金屬層佔據了可用的溝渠的可觀的容積，減少了 更高傳導性金屬塡充物的可用空間。相對於完全塡充金屬 的相同溝渠，其傳導性因而降低。甚至，利用金屬氮化物 線，雖然有利於容納金屬塡充物及避免短路，但已知在電 路運作期間會產生電子遷移，會導致延著金屬線產生空隙 以及更進一步降低傳導性。 因此，對於薄膜，需要克服關於以傳統材料，例如氮 化矽及氧化矽，建構的閘極介電質的問題。同時亦需改善 用以在波紋溝渠內容納金屬而不會過度地減少傳導性的結 構及方法。 發明總結 前面敘述及其他需求可由本發明之數個觀點來達成。 依照本發明之一觀點，於一積體電路中提供一薄膜。 該膜具有很小的厚度，定義在一上表面與一下表面之間。 提供一受控制的及不同的成分貫穿該很小的厚度。實例的 厚度最好小於約1〇〇 A’小於約50 A更佳，以及可以在10 A 的等級。 依照一實施例，該膜包括一閘極介電質，用於一積體 薄膜電晶體。在一配置中，以漸變濃度的氮提供一氧化矽 屢…。不管該階層如何薄，仍可維持梯度。其爲有利的，一 相當純的二氧化矽可以提供在較低的準位，用於高品質通 道界面，而一高氮含量在上表面側，抵制硼自多晶矽閘極 電極擴散過來。在另一配置中，其他介電材料可以以漸變 方式混合，藉以得到得自於一種材料之所需的界面特性以 本紙張尺度適用中國國家標準（CNS)A1規格（210 x 297公釐） * J 裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif.doc/008 五、發明說明) 及得自於另一材料之所需的主體特性，而在該閘極介電質 中沒有不想要的陡峭的界面。例如，Al2〇3具有高介電常 數以及所需的界面特性，而Zr02具有更高的介電常數，其 爲閘極介電質之"主體(bulk)"所需的。 依照本發明之第二實施例，該薄膜包括一轉變層，於 一障壁膜與一更具導電性繞線材料之間。在所闡述的實施 例中，所提供之一薄氮化金屬層具有一漸變濃度的銅。該 氮化層可以做得非常地薄，留下更多的空間給更具導電性 金屬在一雙波紋溝渠中，例如。其爲有利的，可以提供具 有氮化金屬的有效的擴散障壁在該下表面，而高銅含量在 上表面，提供當作電鍍種子層所需的導電性。平緩的轉變 亦可減少電子遷移，相較於具有陡峭障壁-金屬界面的結 構。 依照本發明之另一觀點，提供一種方法用以形成一薄 膜在一積體電路，具有變化的成分貫穿其厚度。該方法包 括交替地引介至少一第一物種及一第二物種至一基底，在 複數個沉積週期中的每一個，當該基底支撐在一反應腔室 之中。一第三物種引介至該基底，在複數個沉積週期中。 該第三物種的分量在其引介的不同的週期中可以改變。另 外，該第三物種在其自身之來源氣體脈動中供應’在該薄 膜沉積進行中時，其脈動是以漸增或漸減的頻率來利用的 (例如，在第一階段時沒有，在第二階段期間爲每四個週 期，在第三階段期間每個週期，等等）。 其爲有利的，該雜質的分量變化爲在早期的沉積週期 期間爲零而在最後沉積週期期間爲最大分量。在一實例 -------------------^--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（2]ϋ X 297公釐） 經濟部智慧財產局員工消費合作社印製 490739 7324pif.doc/008 五、發明說明（b) 中，在每一週期的第一階段時，一矽來源氣體吸附在該基 底上，而在形成氧化矽的週期的第二階段時爲氧化劑來源 氣體。在相當純的氧化矽覆蓋該基底表面後’在該第二階 段期間引介小量的氮來源氣體。此後每一週期增加氮來源 氣體的分量。在該第二階段期間亦可減少氧化劑的分量， 使得最好可以產生一純氮化砂上表面’在上表面與下表面 之間具有漸變的氮含量。同樣的，在第二實例中，鎢，還 原及氮來源提供氮化金屬，在第一至第三階段中。一銅來 源及還原劑在第四及第五階段提供銅。在接著的週期中， 改變第一至第三階段（只產生約一單屬的WN)與第四至第 五階段（只產·生約一單屬的Cu)的相對比例。此漸增/漸減 可以逐步地交替，例如每兩個週期，每三個週期，每五個 週期，等等。 依照本發明之另一觀點，在熱動力偏愛取代反應中， 選擇性地引介雜質階段或脈動可以取代先前階段的原子。 可以藉由改變跨越原子層沉積製程的雜質階段的頻率來達 成漸變。另外，雜質階段的頻率可以保持固定，而改變跨 越原子層沉積製程的雜質階段的持續時間，或是可以利用 改變頻率及持續時間的組合。 由於藉由原子層沉積提供精良的控制，可以在極薄階 層提供此漸變。此外，在製程期間的低溫可以保持所需的 雜質含量量變曲線(profile)。 圖式之簡單說明 從下面的說明及所附圖式，習知此技藝者可以很容易 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公楚） --------------------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 490739 A7 B7 7324pif.doc/008 五、發明說明（q ) 地瞭解本發明之這些及其他觀點，其中： (請先閱讀背面之注意事項再填寫本頁) 第1圖是單一基底反應腔室之部分架構剖面圖，包括 一些周圍的反應器元件，用以使用於本發明之較佳實施 例。 第2圖是部分製造的積體電路的架構剖面圖，闡述夾 在閘極電極與半導體層間之閘極介電層。 第3圖至第6圖槪要的繪示閘極介電質的逐個單屬 (monolayer-by-monolayer)地沉積，依照本發明之一較佳實 施例。在所闡述的實施例中，在交替循環的製程中的每幾 個週期形成一’’單屬π。 第7圖是依照一較佳的沉積極薄漸變形介電層的方法 的實例的氣體流量圖。 第8圖是依照一較佳實施例所建構的漸變形介電層的 理論的反螺旋(Auger)量變曲線。 第9圖是分別以雙波紋溝渠及貫孔所形成的繞線及接 觸，包括障壁及金屬層，的架構剖面圖。 第10圖是第9圖的區域10-10的放大圖，闡述形成在 層間之漸變形介電層。 經濟部智慧財產局員工消費合作社印製 第11圖是依照一較佳實施例所建構的漸變形障壁至 金屬轉變區域的理論的螺旋(Auger)量變曲線。 第12圖是依照一實施例的實例的氣體流量圖，用以 沉積漸變形傳導層。 圖式中標示之簡單說明 10CVD反應器 12反應腔室 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 490739 A7 7324pif.doc/008 五、發明說明（3 ) 經濟部智慧財產局員工消費合作社印製 13上部加熱元件 14下部加熱元件 15聚光燈 16晶圓 18基底支撐結構 20容納器 22支撐架 24軸 26套筒 40進口埠 42出口埠 44進口零件 45狹縫 48出口零件 49排氣開口 50排氣導管 60激勵物種產生器 62氣體管線 63前導氣體 64載送氣體 65分支管線 72閘極介電層 74閘極電極 76半導體基底 78基底界面 80電極界面 82側壁間隔 84介電蓋層 102第一單屬 104第二單屬 106第三單屬 114最後單屬 340氧含量 350雜質含量 400雙波紋結構 402上絕緣層 404下絕緣層 406傳導性電路元件 408蝕刻阻止層 410下絕緣障壁層 420溝，渠 422接觸貫孔 424內襯層 426高導電性材料 430黏著層 432障壁區域 434轉變區域 436種子層區域 450第一五階段週期 455第二週期 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A.l規格X 297公t ) 490739 A7 B7 7324pif.d〇c/〇〇i 五、發明說明（1 ) 460週期 較佳實施例之詳細說明 雖然所說明的是關於在積體電晶體疊層及從障壁至金 屬層之漸變形轉變中的漸變形閘極介電層，但熟習此技藝 者可以很容易地發現應用此處所揭露之原理之其他方面的 應用。此處所揭露之製程及層結構特別適用於需要具有經 由層厚度的調製濃度的雜質的極薄層。 在積體電路中，時常需要經由膜厚度提供漸變的或其 他可變的成分。不同層間的陡變邊界可以說明不利的拙劣 黏著性、不想要的電性品質、缺乏製程控制等等。 對於每個薄膜，例如厚度在10 nm以下者，以習知製 造方法很難實現精確的調製量變曲線。然而，此較佳實施 例採用原子階層沉積法（Atomic Layer deposition，簡稱 ALD)，其有助於藉由單屬(mon〇iayer)來形成薄膜單屬。實 際上’控制存在於小於單屬尺度，由於龐大來源化學分子 之空間障礙產生少於每週期一個單屬。原子級的薄單屬的 鋪層能力使得可以在下表面(例如閘極氧化物/Si基底界面) 至上表面(例如閘極電極/閘極介電質界面）間形成更精準的 濃度梯度。 因此，此較佳實施例提供用以在形成於積體電路中之 薄層中更精確地調製雜質含量的方法。因而以下所闡述的 較佳實施例包括在材料的單屬的不連續階層中建構薄膜的 方法以及因而爲原子階層沉積法(Atomic Layer deposition， 簡稱ALD)中的一種。每一不連續階層的成分可以藉由選 本紙張尺度適用中國國家標準規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝--------訂·！ 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif.doc/008 五、發明說明（（。） 擇性地引介對於要沉積的每一單屬所需的化學成分來調製 (tailor)。例如，使用ALD，引介氣體的特定組合與之起化 學反應，沉積或吸附於該工作部件上，藉由沉積化學成分 本身的性質，此製程自行結束。不管暴露的長短，製程氣 體不再促成沉積。要沉積後面的單屬，要在製程腔室中引 介不同的化合物，例如要與先前形成的單屬起化學反應或 吸附於其上。最好，第二化學成分或後面的化學成分形成 另一個單屬，也是以自我限制的方式。輪替這些自我限制 的單屬達所需的次數，藉以形成適當厚度的膜。 此方法的特有性質允許對於每一不連續週期的化學成 分的改變。因此，產生的薄膜的成分可以逐步地改變，例 如，在每一週期，在每每第二週期，或是在任意其他所需 的進展中。此外，由於相對於習知熱氧化作用及習知CVD 製程，ALD可以在非常低的溫度中進行，可以有效的限制 在此製程期間的擴散。爲了說明氧化物厚度與對應的層數 之間之比例之目的，例如，2nm的氧化矽薄膜包含約七(7) 個單屬。依照此說明之實施例，可以在約ALD製程的18-22週期形形成氧化矽的七個單屬。於是，即使是此種極薄 層，其成分亦可改變，使得混合至第一單屬的雜質濃度可 以不同於混合至第七單屬的雜質濃度。 &佳製程反應器_ 第1圖繪示化學蒸發沉積（Chemical Vapor Deposition， 簡化CVD)反應器1〇，包括石英製程或反應腔室12，依照 較佳實施例建構’以及對於此處所揭露之方法具有特別效 本紙張尺度適用中國國家標準（CNS)A‘l規格（21〇χ 297公坌） (請先閱讀背面之注意事項再填寫本頁) I 裝--------訂·! ------I . 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif.doc/008 五、發明說明（u) 用。所闇述之反應器10包括一製程模組，在商業上可以 由 Phoenix，AZ 的 ASM America, Inc.，以商標名 Epsilon™ 取得，適用於遠端電漿源。雖然所討論的較佳實施例是關 於單一基底CVD反應器，但需瞭解所揭露之製程可以應 用在其他型式之CVD反應器，具有不同於此處所討論的 不同幾何形狀的反應腔室。在其他的配置中，此較佳製程 可以在商業上可取得的反應器進行，其爲由Finland的ASM Microchemistry，Ltd·，以商標名 Pulsar™ 2000 取得，其特 別爲ALD設計。 複數個幅射熱源支撐在腔室12的外部，藉以提供熱 能給腔室12，而不會被石英腔室12壁顯著地吸收。雖然 所討論的較佳實施例是關於用以處理半導體晶圓的”冷壁 (cold wall)n CVD反應器，但需瞭解此處所討論的處理方法 可與其他加熱/冷卻系統結合使用，例如使用感應或電阻加 熱的系統。 所闡述的幅射熱源包括細長管型幅射加熱元件13的 上部加熱組成。上部加熱元件13最好是以平行分開關係 來配置，且實質上與經過下面的反應腔室12的反應氣體 流動路徑平行。下部加熱組成包括同樣的細長管型幅射加 熱元件14，在反應腔室12下方，最好其方向橫切於上部 加熱元件13。最好，幅射熱的一部分會分別經由上部及下 部燈泡13、14的上面及下面的粗糙鏡反射器來擴散地反 射進腔室12。此外，複數個聚光燈15提供集中的熱至晶 圓支撐結構的底面，藉以抵消經由反應腔室12底部延伸 之冷支撐結構所造成的散熱效應。 本紙張尺度適用中國國家標準（CNS)Al規格（210 X 297公釐） * , 裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 490739 7324pif.doc/008 A7 B7 經濟部智慧財產局員工消費合作钍印製 五、發明說明（γ τ) 每一細長管型加熱元件13、14最好是高強度鎢絲燈 泡，具有透明的石英燈殼，其中包含鹵素氣體，例如碘。 此種燈泡產生全頻譜的幅射熱能，可經由反應腔室12的 壁傳送，而不會被顯著地吸收。如在半導體製程設備之技 藝中所知曉的，不同的燈泡13、14、15的電源可以依據 溫度感測器來獨立控制或以群組區域來控制。 如圖所示，工作物件或基底，最好包括矽晶圓16，支 撐在反應腔室12的工作物件或基底支撐結構18上。注意， 雖然所討論的實施例的基底是單晶矽晶圓，但需瞭解名詞 ”基底"泛指任何要在其上沉積一階層之結構。支撐結構18 包括容納器（susceptor)20，石英支撐架22，由經由套筒26 的軸24延伸出來，以及多個周圍元件，用來促進橫越晶 圓16的氣體層流及均勻溫度。 反應腔室12包括進口埠40，用以注入反應物及載送 氣體，以及晶圓16亦可經其送入。出口埠42在腔室12 的相對側，晶圓支撐結構18則位於進口 40與出口 42之 間。 進口零件44恰合於反應腔室，適合於圍繞進口埠40， 以及包括水平延伸的狹縫45，晶圓16經其插入。在運作 期間，狹縫45可選擇性地由閘門閥（未繪示)密封。通常爲 垂直的進q 46接收來自遠端來源之氣體’以及與狹縫45 及進口埠40交流該氣體。 反應器也包括處理氣體之遠端來源（未繪示）’其與進 口 46交流是經由伴隨安全及控制閥之氣體管線’以及大 量流量控制器(mass flow controller，簡稱MFC) ’其位於氣 (請先閱讀背面之注意事項再填寫本頁) 一裝 n I ϋ 一-口、· ϋ n ϋ I 1 ϋ - 本紙張尺度適用中國國家標準（CNS)A〗規格（21〇χ 297公釐） 490739 A7 B7 7324pif.doc/008 五、發明說明（h) 體控制盤，其爲習知此技藝者所瞭解的。 對於所闇述之第一實施例，氣體源包括保持含矽氣體 的儲存槽，最好是矽甲烷（silane)，例如甲硅烷（SiH4)，四 氯化矽（SiCl4)，雙氯矽甲烷（dichlorosilane)(DCS 或 SiH2Cl2)， 三氯矽甲烷（trichlorosilane)(TCS或SiCl3)，或其他矽甲烷 或矽甲烷鹽矽（halosilane silicon)來源；氧化劑來源氣體， 例如〇2，〇3，〇radicals，H2〇，NO或N2〇；以及氮來源氣 體，例如NH3。金屬來源氣體亦可用於高k金屬氧化物之 沉積。對於第二實施例，來源氣體包括一種或多種金屬來 源氣體(例如〜？5，1^14，(：11(：1，等），氮來源氣體(例如1^3)， 以及還原劑（例如三乙硼（triethyl boron)或TEB)。 矽來源可以包括發泡器(bubbler)及氣體管線，用以經 由液體溶劑，例如TCS，使H2冒泡，藉以更有效地將含 矽氣體以氣體狀態輸送至反應腔室。許多金屬來源可以同 樣地包括液體溶劑及發泡器。反應器10亦可包括其他來 源氣體，例如摻植物氣體，包括磷化氫（PH3)，砷化三氫 (AsH3)，以及/或硼乙烷（b2H6);用以淸潔反應器壁的蝕刻 劑(例如HC1);用以摻植或形成SiGe膜的鍺；等等。 在所闡述的實施例中，激勵物體的選擇性產生器，一 般稱爲遠端電漿產生器60,提供在遠端或反應區域的上 游，以及最好是腔室12的上游。一個遠端激勵物體產生 器的實例爲可在商業上從德國，Munich的Rapid Reactive
Radicals Technology GmbH，以商標名 TR-850 得到。如此 技藝所知的’產生器60將電源耦接至氣體，藉以產生激 勵物體。在所闡述的實施例中，產生器60將來自磁電管 本紙張尺度適用中國國家標準（CNS)A‘丨現格（210 x 297公釐） 9 -----------Int---------訂---------^_wl (請先閱讀背面之注咅？事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif.doc/008 五、發明說明（ίθ) (magnetron)的微波能量耦接至在沿著氣體管線的塗抹器的 流動氣體。前導氣體63的來源被耦接至氣體管線62 ’用 以引介至激勵物體產生器60。載送氣體64的來源也耦接 至氣體管線62。亦可提供用於額外的反應物的一個或多個 更進一步的分支管線65。如在此技藝所知的，氣體來源63 ' 64可以包括氣體高壓筒、發泡器等，取決於反應物種類的 形式及揮發度。每一氣體管線可以提供分離的大量流量控 制器(mass flow controller，簡稱MFC)及閥門，如大家已知 的，藉以允許選擇引介至產生器60以及於該處進入反應 腔室12的載送物體及反應物體的量的比例。 出口零件48裝設至處理腔室12，使得排氣開口 49與 出口埠42對齊以及通至排氣導管50。導管50，依次地， 與合適的真空裝置(未繪示)交流，用以抽吸經由腔室12之 處理氣體以及藉以減少壓力，假如需要的話。 漸戀形閘極介電質 如以上所提到的，積體電路製造的趨勢爲更進一步地 縮小元件。隨著裝置變得更小，變得更難以藉由習知裝置 來沉積薄的階層，例如閘極氣化層。更進一步，氧化砂層 的性質需要改變，藉以符合所需的閘極介電質的電氣特 性。 ， 積體電晶體中的閘極介電質應該不只具有低缺陷密 度，而且也應該防止雜質從上面的閘極電極擴散至閘極介 電質。以氧化矽當作閘極介電材料至今已經成功地用了十 多年，然而今天的電路設計強調薄還要更薄的階層。由於 本紙張尺度適用中國國家標準（CNS)AO見格（210 X 297公釐） (請先閱讀背面之注音？事項再填寫本頁) --------訂---— II-- 經濟部智慧財產局員工消費合作社印製 739 7 3 2 4pi f . doc/00
經濟部智慧財產局員工消費合作社印製 五、發明說明（$ ) 胃胃的階層’摻植物(例如硼）的擴散變成更大的問題。 H夸氮加至閘極介電膜可以有效地減少硼的擴散。如此 技藝之別處所承認的，然而，在通道界面的氮化物會導致 拙劣的界面特性以及必然地拙劣的電氣效能。因此，結果 白勺介電結構在通道界面具有純氧化矽以及在較高層有氮化 矽。 習慣上，氧化矽閘極介電膜是藉由下面的矽基底的熱 氧化來製造的。要加入氮，可以將含氮氣體加至主氧氣氣 ^ ’及/或可以用含氮氣體或氮植入執行後沉積處理。此種 方法可以將氮加入至氧化材料，藉以在氧化物上形成氮氧 化矽（SiOxNy)或形成Si3N4階層。在任一情況中，皆難以控 制膜中的氮含量，特別是對於現代或未來的積體電路元 件’其中閘極介電材料非常薄(例如，小於7 nm)。對於如 Ifc的超薄介電質，將氮加至閘極介電質之習知方法無法控 制’藉以在整個基底上產生均勻的電氣特性，而且氮含量 會在與基底的界面處變得最小。 第一實施例包括交替的吸附不超過大約矽的一個單 屬，以先前吸附的單屬的氧化物，在氧化矽程序的交替層 中。在氧化階段期間，氮亦可選擇性地加入。顯然的，藉 由混合這兩種氣體，可以長出在氮右入任何比例的氧的含 氧氮化物膜(oxynitride film)。在此較佳實施例中，在循環 程序期間改變反應物的比例，可以調製每一週期形成的成 分。最好，沉積以純氧化矽開始以及以純氮化矽結束，以 任意所需的階段貫穿整個厚度。 要在其上發生沉積的基底在啓始時製備成可用於自我 1 8 -----------41^ 裝--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)/Y1规格（210 x 297公釐） 490739 Γ； 經濟部智慧財產局員工消費合作社印製 7324pif .doc/008 ______B7____ 、發明說明（（4 ) 限制沉積製程。在所闡述的實施例中，此基底係〜半導體 材料，於其中形成電晶體通道。此半導體基底可以用取^ 附生的階層（epitaxial layer)來形成或在本質地摻植砂晶_ 的頂部形成。在其他配置中，此基底可以包括替代的材^了 例如III-V半導體。 表面製備可以留下表面邊界，其很容易與較佳的ALd 製程中的第一反應物起反應作用。在所闌述的實施例中， 其中在單晶砂層或基底上形成一介電層，裸砂表面最好是 以氫氧根（OH)結尾（tail)來終結。如熟習此技藝者可瞭解 的’此種表面邊界可以很容易地只要在晶圓淸潔後暴露g 潔淨室空氣中來得到。 依照此較佳實施例，將至少一工作物或晶圓載入處Ϊ里 腔室中，以及準備好處理。最好以淨化氣體流經腔室來移 除任何空氣中的污染物。 可以修改溫度及壓力處理參數，藉以得到所需的膜特 性。假如需要的話，藉由增加燈泡13、14及15的功率輸 出來使晶圓提昇至所需之處理溫度。其爲有利地，然而， 所闡述的自我限制反應可以在低溫下進行，使得反應器可 以保持固定的反應溫度，而不會在工作物改變之間跳昇。 所需的壓力位準，假如和大氣不同，可以使用習知的真空 幫浦來得到，如習知此技藝者所熟知的。對於現行的氮氧 化矽製程，例如，處理溫度最好是維持在約100°c至500 t之間，在約20(TC至400°C之間更好，而在約300°C至400 °C之間是最好的。其爲合意地，此製程對於壓力是相當不 敏感的，雖然較佳的壓力範圍是在約1陶爾(Torr)與100 Γ靖先閱讀背面之注意事項再填寫本頁} 本紙張尺度適用中國國家標準（CNLS)A4規格（210 X 297公釐） 490739 A7 B7 7 3 2 4pi f . doc /0 0 8 五、發明說明（ο ) 陶爾之間’以及在約5陶爾與15陶爾之間更好。 在本發明的另外的實施例中，此自我限制反應可以在 更低的溫度上進行。使用遠端電漿激勵氧及/或氮來源，甚 至室溫的處理亦是可行的。因此’可以避免不連續階層的 互相擴散，以及只要高溫的後處理不在含氧或含氮氣體的 環境中進行，沉積成分的量變曲線將保持完整。如以上所 提到的，第1圖的電漿產生器60可以將微波能量耦接至 流動的反應氣體，藉以激發一電漿。其爲合意地，在進入 處理腔室之前，離子物種重新組合，因而使工作物及腔室 本身的損害減至最小，而諸如N及Ο之激進分子可殘留下 來，藉以對製程之氧及/或N位相(phase)提供促進反應性。 當工作物在所需的反應溫度及腔室在所需的壓力位準 時，然後將處理及載送氣體傳送至處理腔室。不反應的處 理及載送氣體以及任何氣態反應副產品因而被排出。載送 氣體可以包括一些已知的任何的不反應氣體，例如H2N2、 Ar、He等。在所闡述的實施例中，用队來當載送氣體。 然後一第一化學物種被吸附至製備的沉積基底上。在 所闡述的實施例中，第一物種包括第一含矽物種，以及包 括至少一個其他的配位子(ligand)，其爲含矽物種之自我終 結單屬所產生的。例如，用於氧化矽的沉積的矽來源氣體 可以包括：分子式爲8丨1^2〇1+2的矽甲烷，其中m爲1-3的 整數，分子式爲siyOy^i^y·^的砂氧院’其中y爲2-4的整 數；以及分子式爲Siy(NH)y_丨L2y+2的silazane，其中y爲2-4 的整數。在這些分子式中，每個L可以分別爲Η、F、C1、 烷基（alkyl)、芳香族羥基（aryl)、烷氧基（alkoxy)、乙烯基 本紙張尺度適用中國國家標準（CN、S)A‘1規格（210 X 297公楚） (請先閱讀背面之注意事項再填寫本頁) ▼裝--------訂---—丨丨丨丨· . 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 經濟部智慧財產局員工消費合作社印製 7324pif.doc/008 五、發明說明（) (vinyl)(-CH-CH2)、氰基（cyano)(-CN)、異氰酸鹽 (isocyanato)(-NC〇）、氨基（amino)、砂化氫（silyl)(H2Si·)、石夕 化氫院基（alkylsilyl)、砂院氧基(alkoxysilyl)、silylene 或矽 氧院烴基（alkylsiloxane)，其中院基（alkyl)及院氧基（alkoxy) 群可以線性或分支的以及可以包含至少一個替代物。揮發 性的矽甲烷（sUanols)及循環矽化合物爲其他合適的矽來源 化合物的實例。 在這些矽化合物中，純氮化矽的沉積最好是使用矽甲 院及silazane，因爲砍氧院具有相當強健的Si-Ο鍵。砂化 合物可由，例如，Gelest，Inc.，612 William Leigh Drive, Tullytown，PA 19007-6308，美國購得。 最好，砍來源氣體包括雙氯砂甲院(dichlorosilane)(DCS) 或三氯矽甲垸（tdchlorosilane)(TCS)，其加入至載送氣體 流。在此較佳的反應器中，矽來源氣體之流速約在10 seem 至500 seem之間，約在100 seem至300 seem之間是更佳 的。矽來源氣體在較佳的溫度及壓力條件下維持約0,1秒 至1秒之間，以及在約0.3秒至0.7秒之間更佳。矽的單 屬吸附在矽基底表面上，以氯化物結尾或配位子(ligand)終 結。表面終結可以使其不再與矽來源氣體及載送氣體反 應。 在第一物種的脈動(pulse)之後，提供第二物種至該基 底。在所闡述的實施例中，第二物種包括氧化劑，最好包 括純H2〇蒸汽。H2〇最好是以約10 seem至500 seem的速 率注入載送氣體流，約100 seem至300 seem更佳。在較 佳的溫度及壓力條件下，H20脈動維持在較佳的溫度及壓 本纸張尺度適用中國國家標準（CNS)A‘4規格（210x297公釐） (請先閱讀背面之注意事項再填寫本頁)
490739 A7 B7 7324pif.doc/008 五、發明說明（) 力條件下約0.1秒至1秒之間，以及在約0.3秒至0.7秒之 間更佳。在氧化劑脈動關掉之後，載送氣體最好允許流動 足夠的時間，藉以在下一個反應物脈動之前，將氧化劑從 腔室中排除掉。在其他的配置中，必須要瞭解可以排空該 腔室，藉以移除該第二物種。 在第二反應物脈動期間，氧化劑與前面的脈動的氯化 物終結反應，留下氧，代替配位子(ligand)。其爲合意地， 留下化學量（stoichiometric)或接近化學量的Si〇2。 依照原子階層沉積的原理，然後將矽來源氣體的第二 脈動注入載送氣體流，該脈動停止及由腔室中將該砂來源 氣體移除，接著第二氧化劑來源氣體脈動，然後輪到其停 止及由腔室中移除。然後這些脈動持續交替著，直到介電 層達到所需的厚度。 在該交替程序中的至少一個週期中，提供雜質來源氣 體。在此介電質實施例顯7K，此雜質最好包括氮，以及雜 質來源氣體最好包括氨（NH3)或聯氨（N2H4)加至該交替程 序。氨及聯氨皆爲相當易反應的氣體，使得其適於低溫ALD 製程。必需要瞭解，在下面的第9圖至第13圖所揭露的 實施例的觀點中，其在一個實施例，氨是在接著矽階段的 分離的氨階段中加入的（每一包括一氣脈動及一排空脈 動）。氨階段可以逐步地取代氧化劑來源氣體階段，例如 每十週期一次，逐步增加至每隔一個週期一次，以及最好 結束於完全取代氧化劑階段。因此，該交替程序開始沉積 氧化矽（藉由交替矽及氧化劑階段）；在程序的中間部分以 增加氮的位準沉積漸變氮氧化矽（藉由逐步地將氧化劑階 ------------裝--------訂--------- (請先閱讀背面之注咅？事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國豕標準（CNS)A彳規格（21〇χ 297公坌） 490739 A7 B7 經濟部智慧財產局員工消費合作li印到仅 7324pif.d〇c/〇〇8 五、發明說明) 段的增加部分代之以氮及特別地氨階段）；以及，在達到 所需的介電質厚度的時候，該交替程序即沉積了氮氧化砂 (藉由交替矽及氮階段）。 在所闡述的實施例中，然而，將氨加至氧階段。在整 個製程中，將不同量的NH3加入至不同的氧化劑來源氣 體。因此’所需的氮的量可以選擇性地加入至二氧化矽及 氮氧化矽的每一單屬，產生調製的氮含量量變曲線。 熟習此技藝者可以瞭解，以本揭露之觀點，氨與矽複 合物間的反應將具有不同的熱力學優點，當其與氧化劑與 矽複合物間的反應來比較。因此，氨對氧化劑的比例不需 要等於在產生的氮氧化矽中的氮對氧的比例。熟習此技藝 者可以很容易地解釋熱力學比較，經由常規的實驗來決定 對於氮結合的所需位準的適當參數。經由遠端電漿產生器 提供氮活動物種，特別是與氧活動物種結合，可以使改變 氧對氮來源的比例的效果達到最大。 第7圖是依照一實施例之氣體流動圖，繪示在示範的 自我限制沉積順序的最前面的四個週期301a-301d。所闡 述的順序包括載送氣體的固定流動300。如圖所示，提供 矽來源氣體的第一脈動或突起302a，藉以形成第一自我結 束矽單屬。在第一排空步驟303之後，在此期間，載送氣 體持續流動，直到矽來源氣體已經由腔室移除，提供第一 氧化劑來源氣體脈動或突起304a。在第二排空303之後， 提供第二矽來源氣體脈動302b，其後跟著第二氧化劑來源 氣體304b，第三矽來源氣體脈動302c，第三氧化劑來源氣 體脈動304c等，在被排空步驟303分開的交替的脈動中。 (請先閱讀背面之注意事項再填寫本頁)
本紙張尺度適用中國國家標準（CNS)AO見格（210 X 297公釐） 490739 A7 B7 7324pif.doc/008 五、發明說明) 如圖所示，在第一週期301a之後的某些點（形成第— 氧化矽單屬）提供第一雜質來源氣體脈動306b，最好是在 氧化劑來源氣體脈動304b期間。其爲合意的，相當低百 分比的雜質來源氣體(最好包括NH3)是在第一脈動306b期 間提供的。在後面的氧化劑來源氣體脈動304c、3〇4d等期 間，在脈動306c、306d等提供漸漸增大流量的雜質來源氣 體。其中利用漸漸增大流量的雜質來源氣體，其有利於垂 直地供應反應物至基底表面，例如經由頂部噴灑頭。在兩 種來源化學品的競爭吸附的情形，全部基底表面最好同時 暴露至該氣體混合物中。因而可以避免從基底的進口側到 排出側的濃度梯度。 注意第7圖只是槪要的，並非按比例繪製。另外，較 佳的製程條件實際地產生在複數個週期之後形成完整單屬 時。當理論上反應物會吸附在工作物的暴露層上的每個可 能的部位，吸附物種（以及特別是與終結配位子（ligand))的 實體大小通常會限制每一週期覆蓋至單屬之片段。在所闡 述的賓施例中，每週期大約形成1人的Si02，而Si02的確 實單屬約3 A的厚度，使得大約每三個週期有效地形成一 個完整單屬，其中每個週期由一對矽來源氣體及氧化劑來 源氣體脈動來表示。 因此，第一雜質來源氣體脈動308b最好是在三個矽 來源氣體脈動與三個氧化劑來源氣體脈動交替之後進行° 以此方式，在引介氮摻植之前，至少提供一二氧化砂的完 整單屬。其爲更佳的，在六個週期之後提供第一氨脈動 306b，因而可以對於避免氮擴散通過到基底-介電質界面提 本紙張尺度適用中國國家標準（CNS)Al規格（210x297公釐） -----------41^^--------訂--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif.doc/008 五、發明說明（ 供額外的保障。在所闡述的實施例中，氨是在接著第一脈 動306b之後流動，其約在〇 sccm至1〇 sccm之間，在約〇 sccm 至5 seem之間是更佳的。在此之後’熱脈動母週期約每 力口 50 seem 〇 雖然並未闡述，在增加雜質來源氣體流量的過程中， 可以減少氧化劑來源氣體脈動3〇4a、304b等。因此，在產 生的氮氧化矽介電層中的氮含量可以由在下部表面的百分 之零往上增加至上部表面的化學量的Si3N4。 第2圖繪示在部分製造的積體電路中的電晶體結構7〇 的槪要剖面視圖，依照一較佳實施例建構成’以及於其中 特別利用此處所揭露之方法。閘極介電層72夾在閘極電 極74與半導體基底76之間。閘極介電質72因而在基底 界面78與電極界面80之間延伸。在所闡述的實施例中， 閘極電極74包括一多晶矽層。基底76包括任何適合的半 導體材料以及在所闡述的實施例中包括一本質摻植單晶矽 的階層。依照本發明之一實施例，閘極介電質72包括氧 化矽，具有改變的及較佳地漸變地氮含量貫穿其厚度。在 另一實施例，A1203可以當作與矽的純界面，漸次變化至 較高介電常數材料，例如Zr02，藉以提供較高的總介電常 數。閘極電極74另外以側壁間隔(spacer)82及介電蓋層84 來保護，每個都可包括習知之絕緣材料，例如氧化矽或氮 化矽。閘極電極74亦可包括高導電性束帶層（strapping layer)，例如氮化金屬、矽化金屬、及純金屬，用於較高 速的橫向訊號傳輸。 第3圖至第5圖繪示形成較佳的閘極介電質72的過 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) -裝--------訂· II--I I I I. 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif . doc/008 五、發明說明（）~ ) 程，一次一個單屬。注意這些圖式只是槪要性的表示。通 常，每一單屬中的雜質濃度可以按需要改變。在所闡述的 實施例中，具有線性量變曲線的雜質濃度是較佳的。在其 他的配置中，雜質濃度可以指數地變化，藉由步級函數等， 貫穿薄膜的厚度。 第3圖繪示氧化砂的第一單屬102，直接形成在半導 體基底76的表面上。依照較佳的製程條件，於上面依據 第7圖所提出的，如此的單屬可以形成在平均約ALD的 三個週期之後，交替矽及氧化劑來源氣體脈動。其爲合意 地，第一或基底界面單屬102具有微小或無雜質濃度’最 好是小於約0.1%的雜質，以及以純Si02B成單屬102是 更佳的。 第4圖繪示氧化矽的第二單屬104，直接形成在氧化 矽的第一單屬102的表面上。第二單屬104最好具有小量 的雜質濃度(在此較佳實施例爲氮），但大於先前的單屬102 的濃度。 請參照第5圖，第三單屬106直接沉積在第二單屬104 的表面上。在所闡述的實施例中，第三單屬106具有比第 二單屬104還要高的雜質(氮）濃度。同樣的，沉積複數個 額外的單屬，一次一個，直到達到所需的最終厚度。每個 單屬可以具有不同的雜質濃度以及因而可以週製貫穿薄膜 的厚度的雜質量變曲線。 請參照第6圖，沉積最後單屬114藉以完成閘極介電 層的形成。因而最後單屬114定義了與沉積於其上的導電 材料之間的閘極電極界面80。必需要瞭解，當然，第6圖 本紙張尺度適用中國國家標準（CNS)A‘l規格（21〇χ 297公釐） (請先閱讀背面之注意事項再填寫本頁) - -------訂--I--I I ! 經濟部智慧財產局員工消費合作社印製 490739 .… / A7 7324pif-d〇c/〇〇8 ___ B7 五、發明說明 只是槪要的以及可以利用除了所闡述的七個之外的許多另 外的單屬來形成所需的最終厚度。此外，個別的單屬102 至114在最終結構並非銳利地可定義的，與槪要的圖示相 反。 在所闡述的實施例中，控制雜質濃度從在基底界面78 的最低濃度變化至在閘極電極界面80的最高濃度。其爲 較佳的，閘極介電質72在基底界面78具有的氮濃度約小 於0.1%，以及約0%更佳。在閘極電極界面80的氮含量， 另一方面，最好大於約5%，大於約8%更佳。在這兩個界 面78、80之間的氮含量大略地線性地漸次變化。必需要 瞭解，然而，任何其他所需的漸變量變曲線（例如拋物線 的、指數的、橢圓的等等）可以藉由在每個氧化階段期間 調製氮來源氣體的百分比來達到。 結果的薄膜具有約小於7 nm的實際厚度。最好，該 閘極介電質具有約小於6 nm的實際厚度，以及在所闡述 的實施例中，具有約2 nm的厚度，包括約7個單屬。因 爲所闡述的閘極介電質72加入了顯著的氮含量，其較佳 地展現出小於2 nm的等效氧化物厚度，更佳地小於約1.7 nm以及最佳地小於約1.6 nm。所闡述的線性漸變氮氧化 物具有約1.7 nm的等效氧化物厚度。 第8圖是依照一較佳實施例所建構的介電層的理論的 反向螺旋量變曲線，繪示介電層中的雜質含量的百分比爲 至半導體基底界面的距離的函數。如圖所示，在此較佳實 施例中，位於或接近半導體基底界面處，雜質含量350(即 氮）是在最小値，而氧含量340是在最大値。當與半導體 本紙張尺度適用中國國家標準（CNS)A‘1規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) · I I I I 11 I 訂·1111111· 經濟部智慧財產局員工消費合作社印製 490739 A7 B7 7324pif.doc/008 ^__ 經濟部智慧財產局員工消費合作社印製 發明說明（涔） 基底界面之間的距離增加，雜質含量350大約是線性的增 加，直到最大値，而氧含量340則降低至最小値。 (請先閱讀背面之注音？事項再填寫本頁) 因此，在基底界面處，閘極介電質最好包括接近純 (Si〇2)，而接近階層頂端處（閘極電極界面），閘極介電質最 好包括接近純氮化砂（Si3N4)。必需瞭解，此種結構可以用 類似第7圖的ALD製程來建構，但在每個週期或每幾個 週期降低氧化劑脈動的幅度。 因此，儘管該較佳閘極介電質的厚度極低，亦可做到 精確地控制貫穿整個厚度的雜質含量。因而，在所闡述的 實施例中，可以在基底表面處得到二氧化矽的界面特性， 而在閘極介電質的其餘處加入氮，藉以減少硼的穿透深度 以及藉以增加閘極介電質的總有效介電常數。使用ALD 可以達成原子階層水準的精確控制。此外，在沉積中包含 的低溫允許維持在厚度中的不同點的任何所需的雜質濃 度，而不會互相擴散。相反的，習知技藝無法如此精確地 控制，以及易於在如此的薄階層產生任何雜質的均勻分 佈，由於製程期間的擴散及/或如此薄的閘極介電層的形成 期間的控制的欠缺。 此外，漸次變化貫穿該階層之厚度有益於允許後面製 程的更佳控制。例如，閘極介電質通常是在主動區之上蝕 刻（例如，電晶體的源極及汲極區域），以便形成與基底之 追些區域接觸之介電質。氣含S從闊極介電質上表面逐步 向下改變至基底界面，允許在此種蝕刻製程上的更佳控 制，如習知此技藝者所瞭解的。因此，可使對基底的損害 達到最小。習知此技藝者應當瞭解將漸變形量變曲線的薄 本紙張尺度適用中國國家標準（CNS)A.I規格（210 X 297公釐) 490739 A7 B7 7324pif.doc/008 五、發明說明（4) 膜使用在積體電路的其他優點。 雖然所闡述的實施例包括在氧化矽層的漸變形氮濃 度，習知此技藝者應當很容易地瞭解，由於此處所揭露的， 相同的原理可以應用至使用ALD的其他閘極介電質材料 來形成漸變形量變曲線。例如，發明人發現氧化鋁有益於 展示高介電常數（k)以及與氧化矽及/或矽基底亦具有良好 界面特性。因此，純氧化鋁(Al2〇3)層可以先以ALD形成， 使用鋁來源氣體及氧化劑的交替脈動。 鋁來源氣體的實例包括烷基鋁化合物，例如三甲基鋁 (CH3)3A1，三乙基鋁（CH3CH2)3A：l，三-η-丁基鋁(n-C4H9)3Al， 二異丁基鋁氫化物（I-C4H9 )2A1H，二乙基鋁二乙醚 (C2H5 )2A1〇C2H5，乙基鋁二氯化物（C2H5)2A1C12，乙基鋁三 氯化物（C2H5)3A1C13，二異 丁基鋁氯化物(i-C4H9)2AlCl，二 乙基鋁碘化物(C2H5)2A1I。這些化合物在商業上可以從，例 如，Albemarle Corporation，USA購得。其他的銘來源氣體 包括含有A1-0-C鍵的氧鹼鋁，例如二乙醚（ethoxide) A1(〇C2H5)3 ，氧化異丙銘（aluminum isopropoxide) A1[(〇CH(CH3)2)3 及 s-氧化丁銘（aluminum s-butoxide) A1(〇C4H9)3。這些化合物在商業上可以從，例如，Strem Chemicals，Inc.，USA購得。該鋁來源亦可包括甜菜鹼二酮 銘（aluminum beta-diketonate)，例如乙醯丙酮銘 A1(CH3C〇CHC〇CH3)3，通常縮寫爲 Al(acac)3，三-(2,2,6,6-四甲基-3,5- —^ 庚院）銘（tris-(2,2,6,6-tetramethyl-3,5-heptanedionato)aluminum)，通常縮寫爲 Al(thd)3、A1(MHD)3、 或A1(DPM)3。揮發性鹵化鋁甜菜鹼二酮在商業上亦可以， 29 本紙張尺度適用中國國家標準（CNS)Al規格（210 X 297公釐） (請先閱讀背面之注音？事項再填寫本頁) _ 裝 i II----訂--I I I I I I I. 經濟部智慧財產局員工消費合作社印製 490739 7 3 2 4 p i f . d 〇 C / 0 0 8 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明 例如，六氟乙醯丙酮銘（aluminum hexafluoroacetylacetonate) A1(CF3C〇CHC〇CF3)3，通常縮寫爲Al(hfac)3購得。這些化 合物在商業上可以從，例如，Strem Chemicals，Inc，USA購 得。揮發性，純無機鹵化鋁例如氯化鋁A1C13或A12C16、 溴化鋁AlBr3、及碘化鋁A1I3亦可用來當前導。在低基應 溫度，無水硝酸鋁可以當做ALD的鋁來源化學藥品。無 水 A1(N〇3)3 的合成已由 G· N. Shirokova 及 V. Ya. Rosolovskii 提出於 Russian Journal of Inorganic Chemistry，vol. 21，1976, pp. 799-802，其所揭露的爲此處之參考。硝酸鋁分子中斷 成氧化鋁，當其與有機化合物接觸時，例如乙醚。 實例的氧來源氣體包括氧、水、過氧化氫、臭氧、醇 (例如甲醇、乙醇、異丙醇)等。 實例的製程包括交替三甲基鋁或帶水TMA，其中具有 排空脈動或撤空步驟。每一脈動可以具有約0.5秒的持續 期間，以及該基底可以維持在約300°C。此製程沉積一 Al2〇3 層’其後跟著逐步地將來源氣體加至ALD製程，產生額 外的所需的堆積特性(例如較高的介電常數）。例如，TMA 脈動可以每數個週期以锆來源氣體代替，並增加頻率，直 到形成純二氧化锆(Zr02)。在實例的製程中，ZrCl4當做锆 來源氣體以及可以相同溫度（例如300°C)沉積爲氧化鋁 ALD製程。另外，在金屬脈動期間可以同時引介锆來源氣 體以及做爲鋁來源氣體的增加部份，其持續地與氧化劑脈 動交替。在此情形，習知此技藝者可以經由常規實驗決定 金呂來源氣體對銷來源氣體的比例，藉以用來得到階層的所 需的材料特性。同樣的，習知此技藝者可以很容易地瞭解 本紙張尺度過用中國國家標準（CNSMj規格（210x297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝 ^1 ϋ ϋ ·1 ·ϋ )：OJ馨 Μ·· MM I MM MM - 490739 A7 B7 經濟部智慧財產局員工消費合作社印製 7324pif.doc/008 五、發明說明（j ) 其他的閘極介電材料亦可以此形式來建構。 在上述氧化鋁及氧化锆的實例中，氧化鋁當做具有良 好電性界面特性的良好障壁擴散，而氧化銷對於介電質提 供較高的總介電常數値。閘極介電質可以再次地由Zr〇2來 漸次變化直到氧化銘形成上部界面，提供良好的障壁擴散 障壁，防止從閘極電極至閘極介電質的向下的硼（B)擴散。 用於閘極介電質的漸變形材料的另一實例爲在下部界 面的氧化矽，漸次變化至純氧化鋁，用於閘極介電質的堆 積及上部表面。 障壁與金屬層間之漸變形界两 第9圖至第13圖變示本發明之第二實施例。並非介 電層，第二實施例包括漸變形導電薄膜，特別是在障壁層 (例如氮化金屬）與更具導電性的塡充增（例如原始的金屬) 之間的漸變形轉變。 請先參考第9圖至第10圖，繪示雙波紋結構400，依 照一較佳實施例所建構的。特別是，上絕緣層402及下絕 緣層404形成在傳導性電路元件406之上。絕緣層402、404 可以包括習知的氧化物，例如得自四乙基正矽酸鹽 (tetraethylorthosilicate，簡稱TEOS)或磷硼矽酸鹽玻璃 (borophosphosilicate glass，簡稱 BPSG)的氧化物，或是其 可以包括”低kn介電質，依照先進製程技術。下方的電路 元件406通常包括下金屬層或搭載襯墊(landing pad)，但在 某些實例中可以包括一半導體層。 結構400也繪示出在絕緣層402、404之間的蝕刻阻止 (請先閱讀背面之注意事項再填寫本頁)
本紙張尺度適用中國國家標準（CNS)Al規格（210 X 297公釐） 490739 7324pif.doc/008 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（·> I) 層408，其在雙波紋結構的形成時可以當作硬遮罩（hard mask) ’如習知此技藝者可以瞭解的。下絕緣障壁層41〇也 繪不在下絕緣層404與下導電層406之間。此種階層是特 別適當的，當下導電層406或上面的金屬層包括銅時，其 可以很容易地經由典型的中程度介電質擴散以及引起短 路。每一硬遮罩408及障壁410可以包括氮化矽或氮氧化 砂。 雙波紋結構400之形成是藉由在上絕緣層402提供溝 渠420。溝渠420通常是形成在橫跨工作物的所需的模版。 複數個接觸貫孔422(繪示一個)在不連續的位置從溝渠420 延著溝渠420向下延伸，藉以暴露下方的電路節點。同時， 溝渠420及接觸貫孔422配置在電路上，藉以依照一積體 電路設計連結上方與下方的電路元件。溝渠及接觸點以導 電材料塡充，藉以形成這些互連。以導電材料塡充的溝渠 稱爲金屬流道(metal runner)，而塡充接觸貫孔422的部份 稱爲接觸點。在雙波紋結構中，如圖所示，溝渠42〇及貫 孔422同時塡充，而在其他結構中，接觸點及流道可以分 開形成。 典型地，雙波紋溝渠及貫孔首先與內襯層（lining layei*)424 一致，以及然後以高導電性材料426塡充。在所 聞述的實施例中，內襯424形成在溝渠420及貫孔422的 所有表面，內襯424爲導電性的。在其他配置中，其中內 襯爲選擇地只形成在絕緣表面，該內襯不必爲導電性的。 內豫層可以包括黏著層、障壁層及/或種子層。其爲較佳的， 內襯層424包括黏著、障壁及種子層中之至少兩個，在階
(請先閱讀背面之注意事項再填寫本頁) _裝--- 訂--------- 490739 7324pif.doc/008 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明) 層之間至少一界面區域，包括以交替階層沉積（Alternating Layer Deposition，簡稱ALD)產生之漸變形區域。 請參照第10圖，在所闡述的實施例的內襯層424包 括一選擇性的黏著層430,其特性爲與雙波紋結構之絕緣 表面402、404、408、410(參見第9圖）之良好黏著性。黏 著層可以藉由ALD製程來形成，如先前所揭露之暫時性 專利申請案號60/159,799，由Raaijmakers等提出，於1999 年10月15日提出，發明名稱爲CONFORMAL LINING LAYERS FOR DAMASCENE METALLIZATION，以及對應的 應用申請案號09/644,416，由Raaijmakers等提出，於2000 年8月23日提出，發明名稱相同。799申請案及對應的’416 U.S.使用申請案的揭露做爲此處之參考。 所闡述的內襯層424更包括障壁區域432、轉變區域 434及種子層區域436。其爲較佳的，障壁區域432包括導 電性氮化物，以及特別是金屬氮化物(例如WN、TiN、TaN 等）。轉變區域(transition region)434也包括導電性氮化物， 但具有不同位準的氮化物貫穿其厚度及/或不同的金屬含 量。種子區域436最好導電性π原始"金屬，具有適於電鍍 其上之塡充金屬426之導電性。 在所闡述的實施例中，黏著層430包括鎢(W);障壁 區域432包括氮化鎢(WN);轉變區域434包括氮化鎢銅 ((WNx)yCuz)的漸變層，其中y及ζ隨著貫穿轉變區域434 的厚度而變化；以及種子區域436包括銅(Cu)。最好，障 壁432、轉變434及種子436區域是以連續的製程形成的， 而未將工作物移出反應腔室，以及如此從一製程觀點來考 ------------裝--- (請先閱讀背面之注意事項再填寫本頁) ·% 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） 490739 7324pif.d〇c/008 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明丨） 慮，在一單一沉積層438之內的區域具有可變成分貫穿其 厚度。 區域432、434、436可以具有任何所需的厚度，適於 特定的應用。對於較佳雙波紋背景，內襯最好是儘可能的 薄，而達到其個別的目的。特別是，障壁區域432當作擴 散障壁，但最好儘可能少佔用溝渠及貫孔。因此，障壁區 域432最好是在約20 A與200 A之間，在約40 A與80 A 之間更佳，以一實例的厚度爲約50 A的WN。轉變區域434 由氮化金屬轉變至純金屬，而期望避免電路運作期間的電 子遷移以及其他尖銳的金屬/氮化金屬邊界的缺點及降低整 體厚度。因此，轉變區域434的厚度最好是在約7 A與200 人之間，在約10人與80 A之間更佳。在一實施例中，轉 變區域具有約10 A的厚度以及在與障壁區域432之界面 處的銅含量約0%以及在與種子區域436(或是與銅塡充料， 在種子層不存在時）之界面處的銅含量約50%。種子區域436 可提供整個工作物的均勻電鑛的充分傳導性。而種子區域 436太厚並非是功能性的缺點，在以電鍍來完成塡充時， 可以藉由使用ALD來沉積最小量的銅來增進產量。因此’ 種子區域436最好大於約100 A，一個實際的Cu的厚度爲 約150 A。每一階層具有極佳的雙波紋溝渠及貫孔的階層 覆蓋，最好是大於約90%(側壁覆蓋對場覆蓋的比例），大 於約93%更佳，以及大於約97%最佳。 請參考第11圖，繪示第10圖的轉變區域434的理論 的螺旋(Auger)量變曲線。圖的右側代表轉變區域434的較 低的表面，當其混合至下面的WN障壁區域432時。左圖 本紙張尺度適用中國國家標準（CNS)A<丨規格（210 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) -· H ϋ H ϋ 訂---------線痛 490739 7324pif.doc/008 A7 五、發明說明（3乃 的側代表轉變區域434的頂表面，當其混合至上面的Cu 種子區域436時。如圖所示，轉變區域具有逐步減少的w 及N含量’從右至左，以及同時增加的Cu濃度。必須要 瞭解，此曲線的形狀可以呈現任何所需的形狀以及所闡述 的含量變化比例只是實例而已。 其爲有利的，此製程使用中間減少階段（intermediate reduction phase)，藉以去除金屬與氮來源階段之間的鹵化 物渣滓。此中間減少階段避免了鹵化氫的產生，其可能對 後面要形成的金屬造成傷害，例如銅。然而，必須要瞭解， 在其他的配置中，此中間減少階段可以省略。 (請先閱讀背面之注意事項再填寫本頁) · I ϋ -ϋ ϋ n ϋ ϋ 一-0、 I ΗΒ · am
經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 490739 p d
7 7 A B 五、發明說明（V)) 表格 脈動 載送氣 體流量 (slm) 反應物 反應物 流量 (seem) 溫度 re) 壓力 (Torr) 時間 (秒） 第一金 屬 400 wf6 20 350 10 0.25 排空 400 -- -- 350 10 1.0 第一還 原 400 TEB 40 350 10 0.05 排空 400 一- —— 350 10 1.0 氮 400 nh3 100 350 10 0.75 排空 400 -- -- 350 10 1.0 第二金 屬 400 CuCl 4 350 10 0.2 排空 400 -- -- 350 10 1.0 第二還 原 400 TEB 40 350 10 0.2 排空 400 -- -- 350 10 1.0 (請先閱讀背面之注意事項再填寫本頁) 裝--------訂--------- 經濟部智慧財產局員工消費合作社印製 參考上面的表格，一個實例製程方法用以形成所需之 漸變形階層，包括障壁、轉變及種子區域，將說明如下。 五個階段（每一階段定義爲，在所闡述的實施例中，包括 接著反應物脈動之後的排空）之說明爲： (1) 第一金屬階段(例如wf6脈動+排空）； (2) 第一還原階段(例如TEB脈動+排空脈動）； 本紙張尺度適用中國國家標準（CNS)A4規格（21〇χ 297公釐） 490739 7324pif.doc/008 A7 B7 五 經濟部智慧財產局員工消費合作社印製 發明說明（2A 0)氮階段(例如NH3脈動+排空脈動）； (4) 第二金屬階段(例如CuCl脈動+排空脈動）；以及 (5) 第二還原階段(例如TEB脈動+排空脈動）。 這些階段的不同特性被利用在連續的沉積製程期間， 取決於沉積製程之階段。在所闡述的實施例中，在障壁階1 段期間，例如，只有利用階段（1M3)，一起代表〜個週期， 其只遺留下約一個WN的單屬。在轉變階段期間，利用階 段（1M3)及（4M5)的變化特性。在種子階段期間，只有利 用階段(4)-(5)，一起代表一個週期，其只遺留下約—個Cu 的單屬。 這些階段現在將在下面更詳細地說明。 障壁沉積階段 在一啓始障壁沉積階段，只有沉積一障壁材料，最好 是氣化金屬。在所闡述的實施例中，只有父替上述表格φ 的階段（1)-(3)。在約120-180週期中，產生約50 A的WN。 每個週期可以是一樣的。 在第一週期的第一階段（1)中，WF6用化學方法吸附在 下面的基底上，在所闡述的實施例中，其包括前面形成的 氮化金屬。氮化金屬最好是以類似的ALD製程來形成。 第一金屬來源氣體最好包括充分比例的載送氣體流量以及 提供充分的時間，給定其他的製程參數，藉以滲透下面的 障壁層。只有約一個單屬的鎢複合物遺留在障壁層上’以 及此單屬是以氟化物渣滓自我終結。如以上所提到的’雖 然通常少於一個單屬，此複合物在此爲了方便仍以’’單屬Π 稱之。 (請先閱讀背面之注意事項再填寫本頁) · ϋ ϋ n ϋ· I mm— I > i·— ϋ —mw i ammmm - .參 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐) 490739 A7 B7 7324pif .doc/008 五、發明說明 在wf6流停止及藉由持續的載送氣體流排空之後，將 第二階段(2)，包括還原氣體(TEB)脈動，供應至該工作物。 其爲有利的，此還原氣體移除來自鎢複合物的氟化物渣 滓，避免氫鹵化物的形成，其可能蝕刻銅。必須要瞭解， 在其他的配置中，可以不需要此還原階段。 在TEB流停步及排空後，第三階段（3)，包括氮來源 氣體(NH3)，被供應至該工作物。在第三階段中，氨最好包 括充分比例的載送氣體流量以及提供充分的時間，給定其 他的製程參數，藉以滲透包含金屬的單層的表面。NH3很 容地與被還原階段暴露後遺留的鎢反應，形成氮化鎢(WN) 的單屬。此反應爲自我限制的。不論是氣或載送氣體都不 會再與產生的氮化鎢單屬反應，以及此單屬遺留下氮及NHX 橋接終結。較佳的溫度及壓力參數，此外，抑制氨經由金 屬單層擴散。 接著氮階段(3)，即在將氮來源氣體由腔室中移除後， 最好是以持續的載送氣體排空，開始新的週期的第一階段 (1)，即伴隨第一金屬來源氣體(WF6)。 其爲合意的，重覆此三階段週期（1M3)直到形成足夠 的障壁層，最好在約20 A與200 A之間，在約40 A與80 A 之間更佳，實例的厚度爲約50 A。其爲有利的，此薄階層 提供了極佳的階層覆蓋。 在所闡述的實施例中，在每一週期的所有階段中，載 送氣體以固定速率持續流動。必須要瞭解，然而，在交替 氣體脈動之間，反應物可以藉由腔室的排空來移除。在一 種配置中，較佳的反應器包含硬體及軟體，藉以在脈動沉 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝----I---訂-----I I ! 經濟部智慧財產局員工消費合作社印製 490739 A7 7324pif.doc/008 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（从） 積期間維持固定壓力。U.S· Patent No. 4,747,367，1988年 五月 31 日核發給 Posa 以及 U.S. Patent No. 4,761，269，1988 年八月31日核發給Conger等，做爲此處之參考。 轉變沉積階段 障壁區域的接著的形成，在連續的製程中，交替該些 週期，藉以在形成轉變區域的形成期間加入新的階段。特 別是，在所闇述的第四及第五階段（4)、（5)被引介至該些 週期，因而將銅引介至該轉變區域。至少兩個，以及最少 是多於十個週期，包括階段(4)及(5)。 此引介可以是逐步的。例如，兩個週期可以只包括階 段（1M3)，如以上所述，產生WN，接著第三週期包括全 部五個階段（1)_(5)，產生WN及Cu的混合物，再接著兩個 週期只包括階段（1M3)。逐步地，增加Cu引介的頻率。在 某些點，在一列中的數個週期會包括全部五個階段（1H5)。 第12圖繪示兩個此種五階段週期，以及上述表格表 示ALD製程的一個週期的參數，用以沉積氮化鎢(WN)與 銅(Cu)的漸變形階層。最好該階層當作雙波紋結構的溝渠 及接觸貫孔中的氮化鎢障壁層與銅種子層之間的界面。在 實例的製程方法中，第一金屬來源氣體包括六氟化鎢 (WF6);載送氣體包括氮（N2);第一還原劑包括三乙基硼 (TEB);氮來源氣體包括氨(NH3);第二金屬來源氣體包括 氯化銅(CuCl);以及第二還原劑包括二乙基硼(TEB)。 第一五階段週期450繪不在第圖中。開始時，進 行最前面的三個週期（1M3)，如以上關於障壁區域之形成 之敘述。接著氮階段0)，即在氮來源氣體已從腔室移除後’ (請先閱讀背面之注意事項再填寫本頁) 一裝---- ·
本紙張尺度適用中國國家標準（匸~9八‘1規格（2丨[^ 297公釐） 490739 7324pif.doc/008 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（^7 ) 最好是以持續的載送氣體流排空’第四階段(4)包括流過第 二金屬來源氣體。氯化銅最好包括充分部分的載送氣體流 以及提供充分的時間，藉以滲透前面階段遺留的表面。只 有約一單屬的自我終結的金屬複合物，特別是氯化物終結 銅，遺留在前面兩個階段形成的氮化金屬上。然後將第二 金屬來源氣體由腔室中移除，最好是以持續的載送氣體流 排空。 在第五階段(5)，氯化物終結表面跟著以接著的還原劑 來還原。最好，以TEB流來移除前面階段遺留的氯化物渣 滓。 在下一個週期455,第一階段（1)再次引介第一金屬來 源氣體，其很容易地與銅單屬的表面反應，再次遺留氟化 物終結鎢階層。第二週期的第二至第五階段此時可以如上 面關於週期450之敘述。可以重覆這些週期，每當需要時， 以確保銅與氮化金屬的充分混合。高度傳導性階層可以沉 積在界面材料上面，藉由任何合適的方式。 其爲更佳的，某些週期引介時省略WN的形成，使得 只包括階段(4)及(5)。在第12圖中，此以截短的週期460 來表示，其省略WN階段以及由階段(4)-(5)的組成來代替， 產生只有一單屬的原始Cu。此製程接著繼續另外的五階 段週期470，混合WN與Cu。 在進行的週期間，可以逐步減少WN階段（1)-(3)的頻 率，因而增加成長的階層的Cu的比例。最後，只有產生 Cu沉積。必須要瞭解，在轉變區域的WN對Cu的相對比 例，以及其量變曲線，可以藉由控制WN階段（1)-(3)相較 (請先閱讀背面之注意事項再填寫本頁) --------訂· —--— II-- 1. 本紙張尺度適用中國國家標準（CNS)A、丨規格（210 X 297公餐） 490739 A7 B7 7324pif.doc/008 五、發明說明（功） 於Cii階段⑷-(5)的相對頻率來良好地控制。因此，可以籍 由此處所揭露之方法來達到任何所需的含量量變曲線。$ 其爲有利的’轉變區域可以具有成分變化貫穿該材料 的非常小的厚度。最好，所闡述的實施例的轉變區域，在 氮化金屬障壁區域與金屬種子區域之間，是在約7 A與200 A之間，在10 A與80 A之間更佳，以特別是小於約50 a。 一個用於金屬/金屬氮化物轉變區域的實例的厚度爲約1〇 人。其爲有利的，此薄階層提供極佳的階層覆蓋。 種子沉積階段 轉變區域的接著的形成，在連續的製程中，可以在原 處沉積種子層在轉變區域之上。在所闡述的實施例中，其 中需要銅塡充在雙波紋溝渠及接觸貫孔內，在電鍍之前需 要一種子層。因此，在形成界面之後，重覆所闡述的ALD 製程的第四及第五階段。於是，可以藉由ALD將銅沉積 在混合或複合的階層的界面之上（即在轉變區域之上），藉 以提供均勻厚度的電鍍種子層。 其爲合意的’接著繼續此兩階段週期，沒有第一金屬 及氮階段’直到形成的銅階層的厚度足以當作電鑛種子 層。此種子層最好是大於約50A，大於約ιοοΑ更佳，以 及在此實例的實施例中約150A。 接著此晶圓可以從腔室中移出以及該溝渠及接觸貫孔 以及咼導電性金屬塡充。最好，銅是電鍍在銅種子層之上。 於是，此氮化金屬障壁、漸變形界面或轉變區域及銅 種子區域可以在連續的製程中全部沉積在同一位置，在相 同的溫度及壓力條件之下。其爲有利的，混合及以及最好 f請先閱讀背面之注意事項再填寫本頁}
經濟部智慧財產局員工消費合阼fi印糾π 本紙張尺度適用中國國家標準（CNS)A】規格（2Ιϋχ297公餐） 490739 7324pif.d〇c/008 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（^1) 是漸變形界面或轉變區域可避免電子遷移的問題，其在積 體電路的電性運作期間會發生在急劇的金屬/氮化金屬界 面。 習知此技藝者可以瞭解，在某些配置中，可以藉由改 變單一反應階段的成分來控制反應物的相關位準，如關於 第7圖之揭露。由於在ALD製程中同時暴露的反應物之 間的熱力學競爭的複雜性，然而，其較願意藉由改變連續 的製程中的每一週期的階段次數及/或型式來引介成分變化 至成長的階層中，如第12圖所繪示的。 逐步使用代替反應物 在上述實施例的最前面，所敘述的一雜質被引介至該 氣體階段，當作主要反應物之一（例如增加所提供之氮之 比例。在第7圖之製程之氧化物的同時）。在第二實施例 中’雜質是在ALD製程的選擇的週期中以分開的脈動引 介的。雜質脈動可以代替啓始製程的脈動，或可以提供爲 主要反應物的增加部分，以及這些脈動引介可以用增加的 頻率提供貫穿該製程(例如，在第12圖中，銅來源氣體脈 動可以增加至或代替鎢及氮來源氣體脈動）。 此外’發明人發現雜質的引介可以經由在成長的膜上 白勺已經吸附的物種的熱動力偏愛(thermodynamically favored) 的取代。例如，在藉由ALD來成長Ti02的製程中，氯化 錦(A1C13)氣體脈動的引介可以以Ai-o鍵取Tl_〇鍵，其爲 熱動力偏愛，以及在處理中釋放揮發性TiCl4氣體。同樣 的’ A1C13的脈動可以將表面Si02轉換成A1203，釋放SiCl4 氣體。在另外的實例中，在成長的階層表面的Zr02可以暴 42 (請先間讀背面之注意事項再填寫本頁) 裝---- 訂---------. 經濟部智慧財產局員工消費合作钍印製 490739 五、發明說明（吵） 露在A1C13中以形成A1203。這些實例是特別有利的，在形 成主體TiOfSiOz或21*02介電質與形成在其上之閘極電 極之間的上部界面時。 因爲取代反應爲熱動力偏愛的，延長的曝光可以以 Al2〇3取代較不偏愛氧（less favored oxide)的一個或兩個分 子層。假如在漸變製程需要此種完全階層取代時，此種曝 光可以較不頻繁地引介至沉積中的早期的ALD製程中， 而往製程的後期時則以較高的頻率，藉以產生大的或純的 Al2〇3上表面。相對地，此種曝光可以較頻繁地引介至早 期的ALD製程中，以及在製程的後期時則以較少的頻率， 藉以產生大的或純的A1203下表面，漸變至主體介電質。 另外，藉由對A1C13脈動選擇縮短的時間長度，在每 一 A1C13脈動中不會有對於Ti〇2、Si〇2或Zr〇2的Al2〇3的 完全取代可以完成。對於取代反應的曝光時間在製程期間 可以每個週期或每數個週期逐步地增加，因而在成長的介 電層的上表面完成較大部分的A1203。其中漸變（grading)是 藉著改變曝光時間來達成，其爲有利的，在垂直地供應反 應物氣體至基底時，例如經由頂部噴灑頭進口。於是可以 避免濃度由基底的進口側漸變至排出側。 其已顯示，即使正的Gibb自由能量値用於取代反應， 足夠長的暴露在取代來源氣體下，可以得到成長的介電質 的頂部分子層的最終的取代。參見；iarkko Ihanus，Mikko Ritala，Markku Leskela 及 Eero rauhala，”ALE growth of ZnS丨·xSex thin films by substituting surface with elemetal selenium”，APPLIED SURFACE SCIENCE，Vol. 112，pp. (請先閱讀背面之注意事項再填寫本頁)
本紙張尺度適用中國國家標準（CNS)A.丨規格（21〇χ 297公釐） 7324pif.d〇c/008
490739 五、發明說明（C^) 154-158 (1997)。在其情況中，其顯示暴露硫化物或-SH表 面終結至純硒會導致硫原子被硒取代。 必須要瞭解，類似的取代反應亦可利用在漸變的傳導 性材料，例如氮化金屬與不同的金屬經由上述的漸變形障 壁層。 雖然本發明已以特定較佳實施例說明如上，然而對於 熟習此技藝者’以此處所揭露之觀點可以明瞭其他的實施 例。特別是’可以改變每一週期的階段的次數。例如，在 某些配可以不需要中間還原階段。此外，雖然所揭露 $二，貫施，是關於傳導性薄膜內襯一雙波紋結構，以及 力施例是揭露關於極薄閘極介電膜，習知此技藝者可 以^艮谷易_現此處所揭露之原理在其他方面的應用。 laiit#發明並非被所述的較佳實施例所限制，而以後 附之申請專利範咖界定者爲準。 (請先閱讀背面之注意事項再填寫本頁) 裝 I ϋ ϋ ϋ^OJ· 1 ϋ n ϋ ϋ I «ϋ 經濟部智慧財產局員工消費合作社印製 44 )A‘〗規格（210 X 297公釐）

Claims (1)

  1. 490739 A8 B8 C8 D8 7324pif.doc/008 六、申請專利範圍 1.一種以變化的成分在積體電路形成薄膜之方法，包 括： 將一基底放置在一反應腔室； 在複數個沉積週期，交替地引介第一及第二蒸發(vapor) 階段反應物以及短暫地分隔脈動至該基底；以及 在該複數個沉積週期期間，引介不同分量之一第三蒸 發階段反應物至該基底。 2·如申請專利範圍第1項所述之方法，其中該第一蒸 發階段反應物包括一矽來源氣體。 3·如申請專利範圍第2項所述之方法，其中該矽來源 氣體係選擇自由分子式SlmL2m+2的矽甲烷，分子式Siy〇v iL2y+2的石夕氧院，以及分子式Si/NHhdLhe的silazane戶斤 構成的群，其中m及y爲整數，而L係一配位子(ligand)。 4·如申請專利範圍第3項所述之方法，其中在該矽來 源氣體中之該配位子係選擇自由Η，F，Cl，Br，I，烷基， 芳香族羥基，烷氧基(alkoxy)，乙烯基，氰基，異氰酸鹽， 氨，砂化氫（silyl)，砂化氫院基（alkysilyl)，砂垸氧基 (slkoxysilyl)，silylene 及砂氧院烴基（alkylsiloxane)群所組 成的群。 5·如申請專利範圍第3項所述之方法，其中該第二蒸 發階段反應物包括一氧化劑來源氣體以及該第三蒸發階段 反應物包括一氮來源氣體。 6·如申請專利範圍第5項所述之方法，其中該氧化劑 來源氣體包括水蒸汽及該氮來源氣體包括氨。 7.如申請專利範圍第1項所述之方法，其中該第一蒸 (請先閱讀背面之注意事項再填寫本頁) 以 · n n n t— n n an 一 0、B n ft·— 11 1 n I 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（2】0 X 297公t ) 經濟部智慧財產局員工消費合作社印製 490739 A8 B8 7 3 24pif . doc/ 0 0 8 惡 六、申請專利範圍 發階段反應物包括一第一金屬來源氣體。 8. 如申請專利範圍第7項所述之方法，其中該第二蒸 發階段反應物包括一氧化劑以及該第三蒸發階段反應物包 括一第二金屬來源氣體，其異於該第一金屬來源氣體。 9. 如申請專利範圍第8項所述之方法，其中該第一及 該第二蒸發階段反應物對一閘極介電質產生一界面層，以 及該第三蒸發階段反應物產生一較高介電常數材料。 10. 如申請專利範圍第9項所述之方法，其中該界面層 包括氧化錦。 11. 如申請專利範圍第10項所述之方法，其中該較高 介電常數材料包括氧化锆。 12. 如申請專利範圍第1項所述之方法，其中該第一蒸 發階段反應物係一第一金屬來源氣體，該第二蒸發階段反 應物係一氮來源氣體，以及該第三蒸發階段反應物係一第 二金屬來源氣體。 13. 如申請專利範圍第12項所述之方法，其中該薄膜 包括在一氮化金屬障壁層與一更具導電性金屬之間之一漸 變形轉變層。 14. 如申請專利範圍第12項所述之方法，該第三蒸發 階段反應物係一銅來源氣體。 15. 如申請專利範圍第14項所述之方法，其中該薄膜 在一氮化金屬障壁層與塡充在一雙波紋溝渠之一銅之間形 成一漸變形轉變層。 16. 如申請專利範圍第15項所述之方法，其中引介包 括逐漸增加地添加更多銅來源氣體至該沉積週期。 (請先閱讀背面之注意事項再填寫本頁) • 裝--------訂--I I I I I-- 本紙張尺度適用中國國家標準（CNS)A4規格（210x 297公t ) 經濟部智慧財產局員工消費合作社印制农 490739 A8 B8 7324pif.doc/008 惡 六、申請專利範圍 Π.如申請專利範圍第16項所述之方法，其中引介不 同分量的該第三蒸發階段反應物包括在沉積進行時以較高 頻率提供銅來源氣體脈動至該沉積週期。 18. 如申請專利範圍第14項所述之方法，其中引介不 同分量的該第三蒸發階段反應物包括從該轉變層之一下表 面至該轉變層之一上表面改變一銅濃度。 19. 如申請專利範圍第18項所述之方法，其中該銅濃 度在該下表面最低以及在該上表面最高。 20. 如申請專利範圍第19項所述之方法，其中引介不 同分量的該第三蒸發階段反應物包括從該下表面至該上表 面線性地漸變該銅濃度。 21. 如申請專利範圍第19項所述之方法，其中引介不 同分量的該第三蒸發階段反應物包括提供0%銅在該下表 面以及約50%銅在該上表面。 22. 如申請專利範圍第19項所述之方法，其中引介不 同分量的該第三蒸發階段反應物包括形成一純氮化金屬在 該下表面以及一純銅層在該上表面。 23. 如申請專利範圍第19項所述之方法，形成該漸變 形轉變層之厚度小於50 A。 24. 如申請專利範圍第19項所述之方法，形成該漸變 形轉變層之厚度小於10 A。 25. 如申請專利範圍第1項所述之方法，其中引介不同 分量的該第三蒸發階段反應物包括在沉積進行時以不同頻 率提供該第三蒸發階段反應物之脈動至該沉積週期。 26. 如申請專利範圍第25項所述之方法，其中引介不 (請先閱讀背面之注意事項再填寫本頁) — · ϋ- n n n n n νϋ 一一eJI VI n an I n 1 n 本紙張尺度適用中國國家標準（CNS)A4規格（2】〇χ 297公釐） 經濟部智慧財產局員工消費合作社印製 490739 B8 7324pif>d〇c/〇〇8 C8 Do 六、申請專利範圍 同分量的該第三蒸發階段反應物包括在沉積進行時以較高 頻率提供該第三蒸發階段反應物之脈動至該沉積週期。 27. 如申請專利範圍第25項所述之方法，其中引介不 同分量的該第三蒸發階段反應物包括在沉積進行時以較少 頻率提供該第三蒸發階段反應物之脈動至該沉積週期。 28. 如申請專利範圍第1項所述之方法，其中引介不同 分量的該第三蒸發階段反應物包括在沉積進行時於該每一 沉積週期提供不同位準之該第三蒸發階段反應物。 29. 如申請專利範圍第28項所述之方法，其中在每一 週期該不同位準之該第三蒸發階段反應物與該第二蒸發階 段反應物同時提供。 30. 如申請專利範圍第28項所述之方法，其中該不同 位準之該第三蒸發階段反應物在不同持續時間的分開的脈 動中提供。 31. 如申請專利範圍第28項所述之方法，其中該不同 位準之該第三蒸發階段反應物取代來自一先前脈動之該薄 膜之該表面上之原子。 32. 如申請專利範圍第1項所述之方法，形成該漸變形 轉變層之厚度小於50 A。 33. 如申請專利範圍第32項所述之方法，其中引介不 同分量的該第三蒸發階段反應物包括在沉積期間線性地改 變加入至該階層之一雜質之一分量。 34. —種薄膜，在積體電路之中，具有小於50 A之厚 度，定義在一上表面與一下表面之間，該薄膜在該上表面 與該下表面之間具有一受控制的及不同的成分。 -----------裝--------訂--I--I--- (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（2】0 X 297公釐） 490739 A8 B8 C8 D8 7324pif.doc/008 六、申請專利範圍 35. 如申請專利範圍第34項所述之薄膜，其中該厚度 小於約7 A及80 A。 (請先閱讀背面之注意事項再填寫本頁) 36. 如申請專利範圍第35項所述之薄膜’其中該厚度 小於50 A。 37. 如申請專利範圍第36項所述之薄膜，其中該不同 的成分包括漸變濃度之一雜質。 38. 如申請專利範圍第37項所述之薄膜，其中該雜質 之濃度在該下表面處小於約0.1%。 39. 如申請專利範圍第38項所述之薄膜，其中該雜質 之濃度在該下表面處爲約〇%。 40. 如申請專利範圍第37項所述之薄膜，其中該雜質 之濃度在該上表面處大於約5%。 41. 如申請專利範圍第40項所述之薄膜，其中該雜質 之濃度在該上表面處大於約10%。 42. 如申請專利範圍第34項所述之薄膜，形成一電晶 體閘極介電質。 線· 43. 如申請專利範圍第42項所述之薄膜，展示小於約 2.0 nm之一等效氧化物厚度。 經濟部智慧財產局員工消費合作社印製 44. 如申請專利範圍第43項所述之薄膜，展示小於約 1.7 nm之一等效氧化物厚度。 45. 如申請專利範圍第42項所述之薄膜，包括至少一 個氧化矽的分子單屬在該下表面處。 46. 如申請專利範圍第45項所述之薄膜，包括至少一 個氮化矽的分子單屬在該上表面處。 47. 如申請專利範圍第42項所述之薄膜，包括氧化鋁 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 490739 7324pif.doc/008 六、申請專利範圍 位於該上表面與該下表面之一，以及一較高介電材料毗連 該處。 (請先閱讀背面之注意事項再填寫本頁) 如申請專利範_1第47項所述之薄膜，其中該氧化 鋁係形成在該下表面處，直接毗連一半導體基底，該氧化 鋁係以該較高介電材料來漸次變化。 49·如申請專利範園第48項所述之薄膜，其中該較高 介電材料包括氧化鐯。 5〇·如申請專利範圍第34項所述之薄膜，其中該不同 的成分包括從該下表面至該上表面之一不同的氮化物濃 度。 51·如申請專利範圍第5〇項所述之薄膜，其中該氮化 物濃度係逐漸增加地從在該下表面之一最低濃度變化至在 該上表面之最高濃度。 52·如申請專利範圍第51項所述之薄膜，包括一線性 漸變氮化物濃度從該下表面至該上表面。 53.如申請專利範圍第52項所述之薄膜，其中該氮化 物濃度在該下表面處小於約〇. 1 %以及該上表面處大於約 5%。 經濟部智慧財產局員工消費合作社印製 54·如申請專利範圍第53項所述之薄膜，包括實質地 純二氧化矽在該下表面處以及實質地純氮化矽在該上表面 處。 55.如申請專利範圍第34項所述之薄膜，其中該不同 的成分包括從該下表面至該上表面之一漸增的銅濃度。 56·如申請專利範圍第55項所述之薄膜，其中該不同 的成分包括從該下表面至該上表面之一漸減的氮化金屬濃 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 490739 A8 B8 7324pif.doc/008 六、申請專利範圍 度。 57. 如申請專利範圍第56項所述之薄膜，具有約7人 與80 A之間的厚度。 58. —種形成一積體電路之方法，包括沉積一階層，具 有從一下表面至一上表面之之一雜質之漸變濃度，藉由將 一基底暴露至蒸發階段反應物之一交替的表面反應。 (請先閱讀背面之注意事項再填寫本頁) π裝 訂---------. 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）
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