WO2022007271A1 - 线路板及其制作方法 - Google Patents

线路板及其制作方法 Download PDF

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Publication number
WO2022007271A1
WO2022007271A1 PCT/CN2020/127013 CN2020127013W WO2022007271A1 WO 2022007271 A1 WO2022007271 A1 WO 2022007271A1 CN 2020127013 W CN2020127013 W CN 2020127013W WO 2022007271 A1 WO2022007271 A1 WO 2022007271A1
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WIPO (PCT)
Prior art keywords
circuit board
module
inductance
embedded
groove body
Prior art date
Application number
PCT/CN2020/127013
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English (en)
French (fr)
Inventor
黄立湘
王泽东
缪桦
Original Assignee
深南电路股份有限公司
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Publication date
Application filed by 深南电路股份有限公司 filed Critical 深南电路股份有限公司
Priority to EP20827984.4A priority Critical patent/EP4156874A4/en
Priority to US17/138,786 priority patent/US11602054B2/en
Publication of WO2022007271A1 publication Critical patent/WO2022007271A1/zh

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    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09072Hole or recess under component or special relationship between hole and component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

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Abstract

一种线路板及其制作方法,所述线路板包括:线路板(11、21、41、51、61、71)、嵌入式元件(12、22、42、52、62、72)、贴附元件(13、23、43、53、63、73)。其中,线路板(11、21、41、51、61、71)上开设有槽体,嵌入式元件(12、22、42、52、62、72)设置在槽体内,贴附元件(13、23、43、53、63、73)设置在线路板(11、21、41、51、61、71)的至少一表面上,并与嵌入式元件(12、22、42、52、62、72)电连接。以此将体积较大的器件设置在线路板内部,以此减小产品的体积。

Description

线路板及其制作方法 【技术领域】
本申请涉及芯片埋入技术领域,特别是涉及一种线路板及其制作方法。
【背景技术】
随着电子工业的飞速发展,在PCB板内需要置入电容等器件。目前,在PCB板内埋入所述器件的集成度低,工艺复杂,制造成本高,难以满足现代工艺发展的要求。
【发明内容】
本申请主要提供一种线路板及其制作方法,使线路板实现小体积,高集成的目的。
为解决上述技术问题,本申请提供的第一个技术方案是:提供一种线路板,包括:线路板,开设有槽体;嵌入式元件,设置在所述槽体内;贴附元件,设置在所述线路板的至少一表面上,并与所述嵌入式元件电连接。
其中,所述嵌入式元件的至少一表面设置有导电端子,所述线路板对应所述导电端子的位置处具有盲孔,所述导电端子穿过所述盲孔而与所述贴附元件电连接,且所述导电端子将所述嵌入式元件与所述线路图形层电连接。
其中,所述嵌入式元件包括电感模块;所述贴附元件包括:相互耦接的功能模块、电容模块及电阻模块;所述电感模块设置于所述槽体中,所述功能模块、电容模块及电阻模块贴附在所述线路板的一表面上。
其中,所述贴附元件包括:相互耦接的电容模块及电阻模块;所述嵌入式元件包括:相互耦接的电感模块及功能模块;所述槽体包括第一槽体及第二槽体,所述电感模块及所述功能模块分别设置在所述第一槽体及所述第二槽体中;其中,所述第一槽体及所述第二槽体之间并排设置;或所述第一槽体及所述第二槽体之安静层叠设置。
其中,所述嵌入式元件包括:相互耦接的功能模块、电容模块及电阻模块;所述贴附元件包括:电感模块;其中,所述电感模块与所述线路板在所述线路板的厚度方向上的投影完全重合。
其中,所述嵌入式元件包括电感模块;所述贴附元件包括:相互藕接的功能模块、电容模块及电阻模块;所述电感模块设置于所述槽体中,所述电容模块及电阻模块贴附在所述线路板的一表面;所述线路板靠近所述电容模块及电阻模块的一表面设有多个连接柱,所述功能模块设置在所述多个连接柱上;其中,所述连接柱的高度不小于所述电容模块及电阻模块的高度。
其中,所述线路板包括层叠设置的第一线路板、第二线路板及位于所述第一线路板及所述第二线路板之间连接所述第一线路板及所述第二线路板的连接件;所述第一线路板包括第一槽体、设置在所述第一槽体内的第一嵌入式元件;所述第二线路板包括第二槽体、设置在所述第二槽体内的第二嵌入式元件。
其中,所述贴附元件设置在所述第一线路板远离所述第二线路板的一表面;或所述贴附元件设置在所述第一线路板及所述第二线路板之间,所述连接件的高度大于或等于所述贴附元件的高度。
其中,所述第一嵌入式元件为电感模块,所述第二嵌入式元件为电源模块,所述贴附元件为相互藕接的电容模块及电阻模块。
其中,所述电感模块的传输电流大于等于5A;所述槽体为贯穿所述线路板两表面的通槽;或所述槽体为贯穿所述线路板一表面的盲槽。
为解决上述技术问题,本申请提供的第二个技术方案是:提供一种线路板的制作方法,包括:提供线路板;在所述线路板上开设槽体;在所述槽体中设置嵌入式元件;进行压合,以使所述嵌入式元件固定在所述线路板中;在所述线路板的一表面设置贴附元件。
区别于现有技术,本申请通过在线路板上开设槽体,在槽体中设置嵌入式元件,并在线路板的至少一表面设置与嵌入式元件连接的贴附元件。以此实现线路板的小体积。
【附图说明】
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性 劳动的前提下,还可以根据这些附图获得其他的附图。其中:
图1是本申请线路板的第一实施例的结构示意图;
图2是本申请线路板的第二实施例的结构示意图;
图3是本申请线路板的第三实施例的结构示意图;
图4是本申请线路板的第四实施例的结构示意图;
图5是本申请线路板的第五实施例的结构示意图;
图6是本申请线路板的第六实施例的结构示意图;
图7是本申请电路板的第七实施例的结构示意图;
图8是本申请线路板的制作方法的第一实施例的结构示意图。
【具体实施方式】
下面将结合本申请实施方式中的附图,对本申请实施方式中的技术方案进行清楚、完整地描述,显然,所描述的实施方式仅仅是本申请一部分实施方式,而不是全部实施方式。基于本申请中的实施方式,本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施方式,都属于本申请保护的范围。
本申请提供一种埋入电感、电容、电阻及功能模块的线路板,以实现线路板的小体积。具体地,在线路板上开设槽体,将嵌入式元件放置在线路板的槽体中,再在线路板的至少一表面设置贴附元件,并按照要求使贴附元件与嵌入式元件耦接。
具体地,请参见图1,为本申请线路板的第一实施例的结构示意图。包括:线路板11,开设有槽体(图未示),嵌入式元件12嵌入在槽体中,在本实施例中,嵌入式元件12包括电感模块121,即电感模块121设置在槽体中。贴附元件13包括相互耦接的功能模块131、电容模块132及电阻模块133;其分别贴附在线路板11的一表面。
在一实施例中,放置嵌入式元件12的槽体可以为贯穿线路板11的通槽,还可以为不贯穿线路板11的盲槽。在本实施例中,槽体为不贯穿线路板11的盲槽,在一实施例中,盲槽还可以为贯穿线路板11一表面的盲槽,此时嵌入式元件12放置在槽体中时,一表面会裸露在线路板11的表面。在另一实施例中,若槽体为贯穿线路板11的通槽时,嵌入式元件12放置 在槽体中时两表面均裸露于线路板11的表面。
在一实施例中,在将嵌入式元件12放置在槽体中时,还需要在槽体中即嵌入式元件12的四周添加粘结胶,以将嵌入式元件12与线路板11粘合在一起,在此实施例中,粘结胶为树脂或molding硅胶。
在一实施例中,嵌入式元件12中的电感模块121的传输电流大于等于5A。
在本实施例中,嵌入式元件12至少一表面设置后导电端子14,线路板11对应导电端子14的位置处设置有盲孔。导电端子14穿过盲孔与线路板11表面的贴附元件13电连接;或导电端子14穿过盲孔连接至线路板表面的线路图形层,贴附元件13贴附在线路板的表面与线路图形层连接,进而使嵌入式元件12中的电感模块与贴附元件13中的功能模块131、电容模块132及电阻模块133电连接。
在一实施例中,线路板11由多块芯板层叠设置且通过粘结胶粘合,并在芯板的表面设置线路图形层而制成。具体地,芯板为覆铜板,粘结胶为半固化片。具体地,覆铜板为制作线路板的基础材料,包括基材板及覆盖在所述基材板上的铜箔,所述基材板由纸基板、玻纤布基板、合成纤维布基板、无纺布基板、复合基板等材料浸以树脂,制成粘结片,由多张粘结片组合制成,在制作好的基材板单面或双面覆以铜箔,再进行热压固化以制成覆铜板。半固化片为为层压时的层间粘结层,具体地,所述半固化片主要由树脂和增强材料组成,在制作多层线路板时,通常采用玻纤布做增强材料,将其浸渍上树脂胶液,再经热处理预烘制成薄片,其加热加压下会软化,冷却后会固化,且具有黏性,在高温压合过程中能将相邻的两层黏合。
在一实施例中,电感模块121、功能模块131、电容模块132及电阻模块133互相藕接。在具体实施例中可以按要求设置,在此不做限定。
本实施例中,将电感模块121嵌入在线路板11中,并将功能模块131、电容模块132及电阻模块133设置在线路板的表面,其功能模块131、电容模块132及电阻模块133在垂直方向的投影部分与电感模块121重合,相较于将电感模块121、功能模块131、电容模块132及电阻模块133均贴附在线路板11的表面,减小了线路板11的面积。
在另一实施例中,本实施例中的嵌入式元件12还可以为功率芯片;贴附元件13还可以为:相互藕接的功能模块、电感模块及电阻模块。即图中所示的131为电感模块,132为功能模块,133为电阻模块。在一具体实施例中,贴附元件13还可以包括电容模块等,其可以根据需求进行设置,具体不做限定。当然,嵌入式元件12的功率芯片还可以为多个,其可以层叠的设置于线路板中,还可以并排的设置于线路板中,具体不做限定。
请参见图2,为本申请线路板的第二实施例的结构示意图。与上述图1所示的第一实施例相比,图2的区别在于:本实施例中槽体包括第一槽体及第二槽体,且第一槽体及第二槽体在线路板21中横向并排设置。本实施例中的贴附元件23包括:相互耦接的电容模块231及电阻模块232,嵌入式元件22包括相互藕接的电感模块221及功能模块222,电感模块221设置在第一槽体中,功能模块222设置在第二槽体中。具体地,在一实施例中,电感模块221可以设置在左侧,还可以设置在右侧。
在本实施例中,嵌入式元件22(电感模块221及功能模块222)的一表面设置有导电端子24,线路板对应导电端子24的位置处设置有盲孔。导电端子24穿过盲孔与线路板21表面的贴附元件23(电容模块231及电阻模块232)电连接;或者导电端子24穿过盲孔与线路板表面的线路图形层连接,贴附元件23(电容模块231及电阻模块232)与线路板表面的线路图像层连接,进而通过线路图形层将嵌入式元件22(电感模块221及功能模块222)与贴附元件23(电容模块231及电阻模块232)电连接。
请参见图3,为本申请线路板的第三实施例的结构示意图。与上述图2所示的第二实施例相比,图3的区别在于:槽体包括第一槽体及第二槽体,且第一槽体及第二槽体在线路板21中竖向并排设置。本实施例中的贴附元件23包括:相互耦接的电容模块231及电阻模块232,嵌入式元件22包括相互藕接的电感模块221及功能模块222,电感模块221设置在第一槽体中,功能模块222设置在第二槽体中。
在本实施例中,功能模块222设置在线路板21中的位于上方的槽体中,电感模块221设置在线路板21中的位于下方的槽体中。在另一实施例中,功能模块222还可以设置在线路板21中的位于下方的槽体中,电感模块221还可以设置在线路板21中的位于上方的槽体中,具体不做限定。
在本实施例中,嵌入式元件22(电感模块221及功能模块222)的一表面设置有导电端子24,线路板对应导电端子24的位置处设置有盲孔。在本实施例中,嵌入式元件22中的电感模块221靠近功能模块222的位置处也设置有盲孔25。嵌入式元件22中的电感模块221的导电端子24穿过盲孔与功能模块222连接。嵌入式元件22中的功能模块222的导电端子24穿过盲孔与线路板21表面的贴附元件23(电容模块231及电阻模块232)电连接;或者导电端子24穿过盲孔与线路板表面的线路图形层连接,贴附元件23(电容模块231及电阻模块232)与线路板表面的线路图像层连接,进而通过线路图形层将嵌入式元件22(电感模块221及功能模块222)与贴附元件23(电容模块231及电阻模块232)电连接。
请参见图4,为本申请线路板的第四实施例的结构示意图。本实施例中,嵌入式元件42包括:相互耦接的功能模块421、电容模块422及电阻模块423;贴附元件43包括:电感模块431。即功能模块421、电容模块422及电阻模块423设置在槽体中,电感模块431贴附在线路板41的表面。
由于电感模块431一般体积较大,在一实施例中,为了进一步减小线路板41的面积,使电感模块431与线路板41在线路板41的厚度方向上的投影完全重合。以此可以保证线路板41的面积进一步较小。
在本实施例中,嵌入式元件42(功能模块421、电容模块422及电阻模块423)至少一表面具有导电端子44,导电端子44分别将功能模块421、电容模块422及电阻模块423与电感模块431连接。
请参见图5,为本申请线路板的第五实施例的结构示意图。在本实施例中,嵌入式元件52包括电感模块521;贴附元件53包括:相互藕接的功能模块533、电容模块531及电阻模块532。
其中,嵌入式元件52的电感模块521设置在线路板51的槽体中,贴附元件53中的电容模块531及电阻模块532贴附在线路板51的一表面。线路板51靠近贴附元件53的一表面具有多个连接柱54,贴附元件53的功能模块533设置在连接柱54上。在一实施例中,连接柱54的高度大于等于贴附元件53中的电容模块531及电阻模块532的高度。
本实施例中,将功能模块接在线路板的上方,将电容模块及电阻模块设置在线路板及功能模块之间,以此可以减小线路板的占地面积,还可以 在一定程度上减小整体产品的厚度。
本实施例中,嵌入式元件52(电感模块521)一表面具有导电端子55,导电端子55将嵌入式元件52(电感模块521)与贴附元件(电容模块531及电阻模块532)电连接。另外导电端子55还能够将嵌入式元件52(电感模块521)与线路板表面的线路图形层连接,在本实施例中,贴附元件53中的功能模块533通过连接柱54与线路板连接,具体地,连接柱54与线路板表面的线路图形层电连接,进而将功能模块533与嵌入式元件52(电感模块521)电连接。
请参见图6,为本申请线路板的第六实施例的结构示意图。在本实施例中,线路板61包括第一线路板611及第二线路板612,其中,第一线路板611上设置有第一槽体,第二线路板612上设有第二槽体,且第一线路板611及第二线路板612层叠设置。第一线路板611及第二线路板612之间设置有连接件64,以将第一线路板611及第二线路板612电连接。其中,在一实施例中,连接件64为焊锡球。
在本实施例中,嵌入式元件62包括第一嵌入式元件621及第二嵌入式元件622,第一嵌入式元件621设置在第一槽体中,第二嵌入式元件622设置在第二槽体中,在一具体实施例中,第一嵌入式元件621为电感模块,第二嵌入式元件622为功能模块。或者在另一实施例中,第一嵌入式元件621为功能模块,第二嵌入式元件622为电感模块。
其中贴附元件63设置在第一线路板611的一表面,贴附元件63具体包括电容模块631及电阻模块632。
本实施例中,第二嵌入式元件622一表面也具有导电端子65,导电端子65将第二嵌入式元件622与第二线路板612的表面的线路图形层电连接,进而通过连接件64将第一线路板611与第二线路板612电连接。
请参见图7,为本申请线路板的第五实施例的结构示意图。在本实施例中,贴附元件73包括:相互耦接的电容模块731及电阻模块732,嵌入式元件72包括:第一嵌入式元件721及第二嵌入式元件722,其中,第一嵌入式元件721为电感模块,第二嵌入式元件722为功能模块。线路板71包括层叠设置的第一线路板711及第二线路板712。其中,第一线路板711及第二线路板712之间具有间隙,贴附元件73设置在第一线路板711及第二 线路板712之间的间隙中,在一实施例中,贴附元件73可以贴附于位于上方的第一线路板711靠近位于下方的第二线路板712的一表面,还可以贴附于位于下方的第二线路板712靠近位于上方的第一线路板711的一表面。且第一线路板711及第二线路板712之间设置有连接柱74,在一实施例中,连接柱74为铜柱、焊锡球或两者的任意组合。
其中,第一线路板711上设置有第一槽体,第二线路板712中设置有第二槽体,电感模块721及功能模块722分别设置在第一槽体及第二槽体中。在第一实施例中,第一线路板711位于第二线路板712上方,电感模块721可以设置在第一槽体中,功能模块722设置在第二槽体中。在另一实施例中,第一线路板711还可以位于第二线路板712下方,电感模块721可以设置在第二槽体中,功能模块722可以设置在第一槽体中。
其中,连接柱74的高度不小于贴附元件73的高度。具体地,在一实施例中,连接柱74的高度大于电容模块731及电阻模块732的高度,在另一实施例中,连接柱的高度还可以等于电容模块731及电阻模块732的高度。
本实施例中,电感模块721及功能模块722均通过导电端子75与第一线路板711及第二线路板712表面的线路图形层电连接,再通过连接柱74将电感模块721及功能模块722电连接,进一步地,贴附元件73(电容模块731及电阻模块732)也通过导电端子与线路图像层连接。
请参见图7,为本申请线路板的制作方法的第一实施例的流程示意图。包括:
步骤S71:提供线路板。
其中,线路板由多块芯板层叠设置且通过粘结胶粘合,并在芯板的表面设置线路图形层而制成。具体地,芯板为覆铜板,粘结胶为半固化片。具体地,覆铜板为制作线路板的基础材料,包括基材板及覆盖在所述基材板上的铜箔,所述基材板由纸基板、玻纤布基板、合成纤维布基板、无纺布基板、复合基板等材料浸以树脂,制成粘结片,由多张粘结片组合制成,在制作好的基材板单面或双面覆以铜箔,再进行热压固化以制成覆铜板。半固化片为为层压时的层间粘结层,具体地,所述半固化片主要由树脂和增强材料组成,在制作多层线路板时,通常采用玻纤布做增强材料,将其 浸渍上树脂胶液,再经热处理预烘制成薄片,其加热加压下会软化,冷却后会固化,且具有黏性,在高温压合过程中能将相邻的两层黏合。
具体地,芯板的表面还可以按照要求设置线路图形层。
步骤S72:在所述线路板上开设槽体。
利用控深铣或蚀刻的方式在线路板的指定位置开设槽体,在开设槽体时需要注意避开设置线路图形层的位置,以防止损坏线路。
其中,槽体可以为贯穿线路板的通槽,还可以为不贯穿线路板的盲槽。
步骤S73:在所述槽体中设置嵌入式元件。
将嵌入式元件设置在槽体中,为了将嵌入式元件与线路板黏合成一整体,需要在嵌入式元件与槽体的侧壁设置粘结胶,具体地,可填充树脂。
步骤S74:进行压合,以使所述嵌入式元件固定在所述线路板中。
在将嵌入式元件设置到槽体中,对线路板进行压合,使嵌入式元件固定在线路板中。
步骤S75:在所述线路板的一表面设置贴附元件。
将贴附元件设置在线路板的至少一表面。在一实施例中,可通过半固化片将贴附元件粘结在线路板上,也可以通过引脚将贴附元件连接在线路板的一表面上。
本申请提供的线路板通过将部分大体积的器件设置在线路板,并在线路板的表面贴附贴附元件,以此减小线路板的体积,进而减小产品的体积。
以上仅为本申请的实施方式,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。

Claims (15)

  1. 一种线路板,其中,包括:
    线路板,开设有槽体,所述线路板包括有若干线路图形层。
    嵌入式元件,设置在所述槽体内;
    贴附元件,设置在所述线路板的至少一表面上,并与所述嵌入式元件电连接。
  2. 根据权利要求1所述的线路板,其中,
    所述嵌入式元件的至少一表面设置有导电端子,所述线路板对应所述导电端子的位置处具有盲孔,所述导电端子穿过所述盲孔而与所述贴附元件电连接,且所述导电端子将所述嵌入式元件与所述线路图形层电连接。
  3. 根据权利要求2所述的线路板,其中,
    所述嵌入式元件包括电感模块;
    所述贴附元件包括:相互耦接的功能模块、电容模块及电阻模块;
    所述电感模块设置于所述槽体中,所述功能模块、电容模块及电阻模块贴附在所述线路板的一表面上。
  4. 根据权利要求2所述的线路板,其中,
    所述贴附元件包括:相互耦接的电容模块及电阻模块;
    所述嵌入式元件包括:相互耦接的电感模块及功能模块;
    所述槽体包括第一槽体及第二槽体,所述电感模块及所述功能模块分别设置在所述第一槽体及所述第二槽体中;
    其中,所述第一槽体及所述第二槽体之间并排设置;或
    所述第一槽体及所述第二槽体之安静层叠设置。
  5. 根据权利要求2所述的线路板,其中,
    所述嵌入式元件包括:相互耦接的功能模块、电容模块及电阻模块;
    所述贴附元件包括:电感模块;
    其中,所述电感模块与所述线路板在所述线路板的厚度方向上的投影完全重合。
  6. 根据权利要求2所述的线路板,其中,
    所述嵌入式元件包括电感模块;
    所述贴附元件包括:相互藕接的功能模块、电容模块及电阻模块;
    所述电感模块设置于所述槽体中,所述电容模块及电阻模块贴附在所述线路板的一表面;
    所述线路板靠近所述电容模块及电阻模块的一表面设有多个连接柱,所述功能模块设置在所述多个连接柱上;
    其中,所述连接柱的高度不小于所述电容模块及电阻模块的高度。
  7. 根据权利要求2所述的线路板,其中,
    所述线路板包括层叠设置的第一线路板、第二线路板及位于所述第一线路板及所述第二线路板之间连接所述第一线路板及所述第二线路板的连接件;
    所述第一线路板包括第一槽体、设置在所述第一槽体内的第一嵌入式元件;
    所述第二线路板包括第二槽体、设置在所述第二槽体内的第二嵌入式元件。
  8. 根据权利要求7所述的线路板,其中,
    所述贴附元件设置在所述第一线路板远离所述第二线路板的一表面;或
    所述贴附元件设置在所述第一线路板及所述第二线路板之间,所述连接件的高度大于或等于所述贴附元件的高度。
  9. 根据权利要求8所述的线路板,其中,
    所述第一嵌入式元件为电感模块,所述第二嵌入式元件为电源模块,所述贴附元件为相互藕接的电容模块及电阻模块。
  10. 根据权利要求3所述的线路板,其中,所述电感模块的传输电流大于等于5A;
    所述槽体为贯穿所述线路板两表面的通槽;或
    所述槽体为贯穿所述线路板一表面的盲槽。
  11. 根据权利要求4所述的线路板,其中,所述电感电感模块的传输电流大于等于5A;
    所述槽体为贯穿所述线路板两表面的通槽;或
    所述槽体为贯穿所述线路板一表面的盲槽。
  12. 根据权利要求5所述的线路板,其中,所述电感电感模块的传输电流大于等于5A;
    所述槽体为贯穿所述线路板两表面的通槽;或
    所述槽体为贯穿所述线路板一表面的盲槽。
  13. 根据权利要求6所述的线路板,其中,所述电感电感模块的传输电流大于等于5A;
    所述槽体为贯穿所述线路板两表面的通槽;或
    所述槽体为贯穿所述线路板一表面的盲槽。
  14. 根据权利要求9所述的线路板,其中,所述电感电感模块的传输电流大于等于5A;
    所述槽体为贯穿所述线路板两表面的通槽;或
    所述槽体为贯穿所述线路板一表面的盲槽。
  15. 一种线路板的制作方法,其中,包括:
    提供线路板;
    在所述线路板上开设槽体;
    在所述槽体中设置嵌入式元件;
    进行压合,以使所述嵌入式元件固定在所述线路板中;
    在所述线路板的一表面设置贴附元件。
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