CN112203410A - 埋入式电路板及其制备方法 - Google Patents
埋入式电路板及其制备方法 Download PDFInfo
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- CN112203410A CN112203410A CN202010645377.8A CN202010645377A CN112203410A CN 112203410 A CN112203410 A CN 112203410A CN 202010645377 A CN202010645377 A CN 202010645377A CN 112203410 A CN112203410 A CN 112203410A
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- circuit board
- electronic device
- embedded circuit
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- H05K1/00—Printed circuits
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- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
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- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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Abstract
本申请涉及电路板技术领域,公开了一种埋入式电路板及其制备方法,该埋入式电路板包括:基板,基板中开设有至少一个槽体;电子器件,设置在相应的槽体内;封装体,包覆在电子器件的外表面,以隔离电子器件与槽体侧壁,其中封装体为塑封材料,塑封材料包含二氧化硅、碳化硅、氮化硅微粉、结晶型硅中的至少一种以及基质。通过上述方式,本申请在电子器件外表面包覆有塑封材料的封装体,塑封材料具备热固性、良好的散热能力、低热膨胀系数、耐高温、结合力好、可靠性高等特性,因此,在电子器件工作时,电子器件温度升高,封装体能迅速将热释放出来。
Description
技术领域
本申请涉及电路板技术领域,特别是涉及一种埋入式电路板及其制备方法。
背景技术
电路板,常使用英文缩写PCB(Printed circuit board),是重要的电子部件,是电子元件的支撑体,是电子元器件线路连接的提供者。印刷电路板几乎会出现在每一种电子设备当中。
本申请的发明人在长期研发过程中,发现目前电路板在热加工制程中会因为温度的变化影响而产生翘曲或膨胀的情况,从而造成电路板中的电子器件脱落、膨胀变形。
发明内容
本申请主要解决的技术问题是提供一种埋入式电路板及其制备方法,结构灵活,能够适应于不同的应用场景。
为解决上述技术问题,本申请采用的一个技术方案是:提供一种埋入式电路板,包括:基板,基板中开设有至少一个槽体;电子器件,设置在相应的槽体内;封装体,包覆在电子器件的外表面,以隔离电子器件与槽体侧壁,其中封装体为塑封材料,塑封材料包含二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种以及基质。
为解决上述技术问题,本申请采用的另一个技术方案是:提供一种埋入式电路板的制备方法,制备方法包括:提供一开设有至少一个槽体的基板;电子器件置于槽体内,其中,电子器件的外表面上设置有用于形成封装体的塑封材料,塑封材料包含二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种以及基质;压合基板,以使塑封材料熔融后形成包覆在电子器件外表面的封装体,且封装体隔离电子器件与槽体侧壁。
为解决上述技术问题,本申请采用的又一个技术方案是:提供一种移动设备,包括前述的埋入式电路板。
为解决上述技术问题,本申请采用的再一个技术方案是:提供一种汽车设备,包括前述的埋入式电路板。
为解决上述技术问题,本申请采用的再一个技术方案是:提供一种基站设备,包括前述的埋入式电路板。
为解决上述技术问题,本申请采用的再一个技术方案是:提供一种传感组件,包括前述的埋入式电路板。
本申请的有益效果是:通过上述方式,本申请在电子器件外表面包覆有塑封材料的封装体,塑封材料具备热固性、良好的散热能力、低热膨胀系数、耐高温、结合力好、可靠性高等特性,因此,在电子器件工作时,电子器件温度升高,封装体能迅速将热释放出来。同时,封装体与电子器件、槽体侧壁的结合力好且封装体的热膨胀系数低,很大程度上解决了电子器件脱落、膨胀的问题。
附图说明
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。其中:
图1是本申请埋入式电路板一实施方式的剖面结构示意图;
图2是本申请埋入式电路板的制备方法一实施方式的流程示意图。
具体实施方式
下面将结合本申请实施例中的附图,对本申请实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本申请一部分实施例,而不是全部实施例。基于本申请中的实施例,本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例,都属于本申请保护的范围。
本申请中的术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。本申请的描述中,“多个”的含义是至少两个,例如两个,三个等,除非另有明确具体的限定。
本申请实施例中所有方向性指示(诸如上、下、左、右、前、后……)仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。此外,术语“包括”和“具有”以及它们任何变形,意图在于覆盖不排他的包含。例如包含了一系列步骤或单元的过程、方法、没有限定于已列出的步骤或单元,而是可选地还包括没有列出的步骤或单元,或可选地还包括对于这些过程、方法、固有的其它步骤或单元。
参阅图1,本申请实施例提供一种埋入式电路板200,埋入式电路板200包括:基板10、电子器件30以及封装体70。
其中基板10中开设有至少一个槽体101,电子器件30设置在相应的槽体101内,封装体70包覆在电子器件30的外表面,以隔离电子器件30与槽体101侧壁。其中封装体70为塑封材料,该塑封材料包含二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种以及基质。
具体地,该塑封材料包含基质以及填料,其中,基质为聚酰亚胺、环氧树脂、酚醛树脂、可固化的聚合物基材料或可固化的树脂基材料中的至少一种,填料为二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种。
上述电子器件30可以为封装或未封装(即没有金属底座、塑封胶或陶瓷壳)的电子器件30为芯片、电容元件、电阻元件、电源器件、电感元件中的至少一种。
其中,芯片可以为MOS芯片,MOS芯片由于可以取代传统的大功率晶体三极管用于放大电路或开关电路中,因而被广泛用于高清、液晶、等离子电视中。
基板10开设有槽体101,电子器件30嵌设在槽体101内。其中,槽体101的数量可以与电子器件30的数量相同,此时一个槽体101中设置一个电子器件30,当然,槽体101的数量也可以与电子器件30的数量不同,具体为槽体101的数量小于电子器件30的数量,此时两个或两个以上的电子器件30可以同时设置在一个槽体101中。
槽体101的制作工艺采用控深铣,所谓控深铣就是控制Z方向的深度的一种铣床技术,由于受到铣床Z方向控深铣精度的限制。其中,槽体101的长度、宽度的都大于所需埋入芯片的尺寸,以使槽体101能足够容纳所需埋入的芯片。槽体101的形状可以为规则的长方体,或为梯形体,或阶梯状,可以根据实际的工艺要求进行设计,在此不做限制,说明书附图中为了较直观的表述,统一的将槽体101表示成长方体的形状。
进一步地,封装体70的材料可以是高散热材料、磁性材料或者低传输损耗的材料。当封装体70的材料是高散热材料时,可以提高埋入式电路板200100的散热性能,当封装体70的材料是磁性材料时,可以起到电磁屏蔽的作用,当封装体70的材料是低传输损耗的材料时,有利于射频信号、高频信号的传输。
通过上述方式,本申请在电子器件30外表面包覆有塑封材料的封装体70,塑封材料具备热固性、良好的散热能力、低热膨胀系数、耐高温、结合力好、可靠性高等特性,因此,该封装体70能耐高温,且具有极佳的热散失能力,在电子器件30工作时,电子器件30温度升高,封装体70能迅速将热释放出来。同时,封装体70与电子器件30、槽体101侧壁的结合力好且封装体70的热膨胀系数低,很大程度上解决了脱落、膨胀的问题。
在一实施例中,塑封材料包含导热绝缘填料,其中导热绝缘填料可以为纳米氮化硅颗粒、纳米氮化硼颗粒等。
在一实施例中,封装体70中设有金属片(图未示出),金属片设置于封装体70中,金属片的一端与电子器件30电连接,另一端凸设于封装体70并电连接接地线路层、信号线路层或导电孔,以实现电子器件30与线路层的电连接。
具体地,封装体70填充于电子器件30与槽体101的侧壁之间并密封电子器件30,其中封装体70内设置有金属片,且金属片用于电连接电子器件30和线路层或导电孔。该金属片可以为纯金属制成,用到的金属材料包括但不限于铜、铜合金、铝、铝合金、铁、铁合金、镍、镍合金、金、金合金、银、银合金、铂族、铂族合金、铬、铬合金、镁、镁合金、钨、钨合金、钼、钼合金、铅、铅合金、锡、锡合金、铟、铟合金、锌或锌合金等。在另一实施例中,该金属片的材料也可以由金属基块和导电石墨片组成。由于导电石墨片的热阻较普通金属及合金的小,可以在金属中嵌入导电石墨片使得导热更加迅速。
在其他实施例中,电子器件30包括电子器件主体和与电子器件主体电连接的引脚。电子器件主体位于封装体70内,引脚自电子器件主体延伸到封装体70的外部。
在一实施例中,基板10包括交替层叠设置的若干层子体10A、10B、10C和若干层可熔融介质层20A、20B、20C、20D,至少一层子体10B开设有用于嵌设电子器件30的槽体101。其中子体100和可熔融介质层20压合后,至少部分可熔融介质层20流入封装体70与槽体101的侧壁之间并接触封装体70。
具体地,若干层子体10A、10B、10C和若干层可熔融介质层20A、20B、20C、20D在整个埋入式电路板200中起到支撑作用。其中,若干层子体10A、10B、10C可以为无铜芯板或覆铜板,覆铜板中的铜层具有良好的导电性能,是印刷电路板最常用的线路材料。对每一子体10进行图案化处理,即可得到所需要的线路图形,并根据功能设计可以将金属铜层和分为信号线路层和接地线路层;其中信号线路层的图案较接地线路层的图案复杂。通常,信号线路层为用于形成电子器件30之间的电连接的多条金属线路所在的层;接地线路层用于与地连接,通常为大面积连续金属区域的层。
同时为了保证可熔融介质层20可以填满相邻子体10之间的间隙以保证埋入式电路板200的整体强度,可熔融介质层20的厚度范围为60-300um,具体为60um、100um、200um或300um。
在一实施例中,封装体70的热膨胀系数小于或等于嵌设有电子器件30的子体10B的热膨胀系数,且封装体70的热膨胀系数小于或等于电子器件30的热膨胀系数,封装体70的热膨胀系数范围为1-27ppm/℃,例如为1ppm/℃、5ppm/℃、7ppm/℃、10ppm/℃、20ppm/℃或者27ppm/℃。
优选地,封装体70的热膨胀系数小于嵌设有电子器件30的子体10B的热膨胀系数,且封装体70的热膨胀系数等于电子器件30的热膨胀系数,封装体70的热膨胀系数范围为3-17ppm/℃,例如为1ppm/℃、5ppm/℃、7ppm/℃、10ppm/℃、13ppm/℃或者17ppm/℃。
进一步地,为了保证封装体70可以填满电子器件30与槽体101之间的间隙以保证埋入式电路板200的整体强度,封装体70的直径范围为1-30um,具体为1um、10um、20um或30um。
通过上述方式,本实施例的埋入式电路板200中,封装体70的热膨胀系数小于或等于嵌设有电子器件30的子体的热膨胀系数,由于封装体70和嵌设有电子器件30的子体具有非常接近的热膨胀系数以及它们随温度增加而膨胀的程度也非常接近,因此不会产生由于热膨胀系数差异太大而引起的对电子器件30明显应力,有效防止电子器件30发生断裂或者电子器件30从子体上剥落。
在一实施例中,上述可熔融介质层20为树脂或塑封材料中的一种。
具体地,树脂是指受热后有软化或熔融范围,软化时在外力作用下有流动倾向,常温下是固态、半固态,有时也可以是液态的有机聚合物。树脂可以为环氧树脂、有机硅树脂、聚酰亚胺树脂、酚醛树脂、聚氨酯、丙烯酸树脂等胶黏剂体系。
进一步地,最外侧可熔融介质层20A、20D的材料可以是高散热材料、磁性材料或者低传输损耗的材料。当最外侧可熔融介质层20A、20D的材料是高散热材料时,可以提高埋入式电路板200的散热性能,当最外侧可熔融介质层20A、20D的材料是磁性材料时,可以起到电磁屏蔽的作用,当最外侧可熔融介质层20A、20D的材料是低传输损耗的材料时,有利于射频信号、高频信号的传输。
优选地,可熔融介质层20与封装体70的材料相同,即可熔融介质层20与封装体70均为塑封材料,且可熔融介质层20与封装体70热膨胀系数相同。
具体地,可熔融介质层20与封装体70的热膨胀系数越小,能够防止因可熔融介质层20热胀冷缩而对各层子体10产生明显应力而导致子体变形、电子器件30断裂或者脱落的情况,使得电路板200尽量保持平整的状态。
在一实施例中,埋入式电路板200还包括:第一线路层40和第二线路层50,且第一线路层40、第二线路层50分别设置在基板10的相背两侧,且覆盖槽体101的相对两侧。电子器件30具有连接端子,电子器件30的连接端子与第一线路层和/或第二线路层电连接。电子器件30的连接端子通过导电孔60与第一线路层40和/或第二线路层50电连接。在此不做限定。或者,电子器件30的连接端子可以与第一线路层40和/或第二线路层50直接接触以实现电连接。
具体地,在埋入式电路板200上还可以开设导通孔。在本实施例中,该导通孔贯穿各层子体10和各层可熔融介质层20,该导通孔内还设置有电连接子体10的信号层和/或接地层的导电层,以得到导电孔60。在本实施例中,可通过电镀的方式对导通孔进行金属化处理。具体地,可在含有欲镀金属的盐类溶液中,以导通孔的金属为阴极,通过电解作用,使镀液中欲镀金属的阳离子在导通孔的金属表面沉积出来,从而形成导电层。常用的用于电镀的金属包括但不限于钛钯、锌、镉、金或黄铜、青铜等。当然,在其他实施例中,还可以通过例如涂覆的方式实现该导通孔的金属化处理。
可选地,设置一个或一个以上元器件(图未示出)在第一线路层40远离槽体101的一侧上或第二线路层50远离基板10的一侧上,还可以有多个元器件分别设置在第一线路层40远离基板10的一侧上、第二线路层50远离基板10的一侧上,元器件通过第一线路层40和/或第二线路层50实现与电子器件30电连接,其中,元器件可以是芯片、电容元件、电阻元件、电源器件中的一种或几种。
参阅图2,一种埋入式电路板的制备方法,该制备方法包括:
S10:提供一开设有至少一个槽体的基板。
其中,基板为绝缘基板,用于形成该绝缘基板的材料可以为环氧树脂、聚酰亚胺、双马来酰亚胺三嗪、聚苯醚、聚四氟乙烯、苯丙环丁稀等。本实施例中的基板为半固化片基板,该基板在一定条件(例如高温高压)下具有粘性,且经过处理后会完全固化,本实施例中的基板为半固化片经过处理完全固化后的基板。
基板还可以为印刷电路板,由多层无铜芯板或覆铜板以及位于相邻无铜芯板或覆铜板之间的可熔融介质层依次层叠压制而成。
槽体的尺寸可根据所需埋入的电子器件的大小而定。通常情况下,设置槽体的尺寸大于电子器件的尺寸。具体地,槽体沿基板的厚度方向上的尺寸可大于电子器件的尺寸,这样在后续处理时,基板可以对电子器件形成保护,减小电子器件在处理过程中受到的压力。槽体沿与基板的厚度方向垂直的方向上的尺寸可大于电子器件的尺寸,便于电子器件无损精确地埋入槽体中。
S20:电子器件置于槽体内,其中,电子器件的外表面上设置有用于形成封装体的塑封材料。塑封材料包含二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种以及基质。
具体地,该塑封材料包含基质以及填料,其中,基质为聚酰亚胺、环氧树脂、酚醛树脂、可固化的聚合物基材料或可固化的树脂基材料中的至少一种,填料为二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种。
S30:压合基板,以使塑封材料熔融后形成包覆在电子器件外表面的封装体,且封装体隔离电子器件与槽体侧壁。
在本实施例中,选用塑封材料作为封装体的材料,该塑封材料未经过处理,在高温高压的条件下会熔融。将塑封材料填充在槽体内,且将电子器件放置在塑封材料中间。对基板和塑封材料进行热压处理,使得塑封材料熔融后包覆在电子器件的外表面,并填充在槽体侧壁与电子器件之间,形成封装体。
在其他实施例中,可以先将塑封材料熔融后包覆在电子器件的外表面,冷却归化后得到已封装的电子器件,再将已封装的电子器件置于槽体内。压合基板,封装体熔融后填入电子器件与槽体侧壁之间。
通过上述方式,本申请在电子器件外表面包覆有塑封材料的封装体,塑封材料具备热固性、良好的散热能力、低热膨胀系数、耐高温、结合力好、可靠性高等特性,因此,该封装体能耐高温,且具有极佳的热散失能力,在电子器件工作时,电子器件温度升高,封装体能迅速将热释放出来。同时,封装体与电子器件、槽体侧壁的结合力好且封装体的热膨胀系数低,很大程度上解决了脱落、膨胀的问题。
本申请的埋入式电路板用于移动设备、汽车设备、基站设备或传感组件。
本申请还提供一种移动设备,包括上述实施例中的埋入式电路板。
本申请还提供一种汽车设备,包括上述实施例中的埋入式电路板。
本申请还提供一种基站设备,包括上述实施例中的埋入式电路板。
本申请还提供一种传感组件,包括上述实施例中的埋入式电路板。
以上所述仅为本申请的实施方式,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。
Claims (16)
1.一种埋入式电路板,其特征在于,包括:
基板,所述基板中开设有至少一个槽体;
电子器件,设置在相应的所述槽体内;
封装体,包覆在所述电子器件的外表面,以隔离所述电子器件与所述槽体侧壁,其中所述封装体为塑封材料,所述塑封材料包含二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种以及基质。
2.根据权利要求1所述的埋入式电路板,其特征在于,
所述塑封材料包含导热绝缘填料。
3.根据权利要求1所述的埋入式电路板,其特征在于,
所述封装体中设有金属片,所述金属片的一端与所述电子器件电连接,另一端凸设于所述封装体,以实现所述电子器件与线路层的电连接。
4.根据权利要求1所述的埋入式电路板,其特征在于,
所述基板包括交替层叠设置的若干层子体和若干层可熔融介质层,至少一层所述子体开设有用于嵌设所述电子器件的所述槽体;
其中所述子体和可熔融介质层压合后,至少部分所述可熔融介质层流入所述封装体与所述槽体的侧壁之间并接触所述封装体。
5.根据权利要求4所述的埋入式电路板,其特征在于,
所述封装体的热膨胀系数小于嵌设有所述电子器件的所述子体的热膨胀系数,且所述封装体的热膨胀系数小于或等于所述电子器件的热膨胀系数,所述封装体的热膨胀系数范围为1-27ppm/℃。
6.根据权利要求5所述的埋入式电路板,其特征在于,
所述封装体的热膨胀系数小于嵌设有所述电子器件的所述子体的热膨胀系数,且所述封装体的热膨胀系数等于嵌设有所述电子器件的热膨胀系数,所述封装体的热膨胀系数范围为3-17ppm/℃。
7.根据权利要求4所述的埋入式电路板,其特征在于,
所述可熔融介质层为树脂或所述塑封材料中的至少一种。
8.根据权利要求7所述的埋入式电路板,其特征在于,
所述可熔融介质层与所述封装体的材料相同。
9.根据权利要求1所述的埋入式电路板,其特征在于,
所述电子器件为芯片、电容元件、电阻元件、电源器件、电感元件中的至少一种。
10.根据权利要求1所述的埋入式电路板,其特征在于,所述埋入式电路板还包括:
第一线路层和第二线路层,且所述第一线路层、所述第二线路层分别设置在所述基板的相背两侧,且覆盖所述槽体的相对两侧;
其中,所述电子器件具有连接端子,所述电子器件的连接端子与所述第一线路层和/或所述第二线路层电连接。
11.根据权利要求1所述的埋入式电路板,其特征在于,所述埋入式电路板用于移动设备、汽车设备、基站设备或传感组件。
12.一种埋入式电路板的制备方法,其特征在于,所述制备方法包括:
提供一开设有至少一个槽体的基板;
所述电子器件置于所述槽体内,其中,所述电子器件的外表面上设置有用于形成封装体的塑封材料,所述塑封材料包含二氧化硅、碳化硅、氮化硅、结晶型硅微粉中的至少一种以及基质;
压合所述基板,以使所述塑封材料
熔融后形成包覆在所述电子器件外表面的所述封装体,且所述封装体隔离所述电子器件与所述槽体侧壁。
13.一种移动设备,其特征在于,包括如上述权利要求1-11任一项所述的埋入式电路板。
14.一种汽车设备,其特征在于,包括如上述权利要求1-11任一项所述的埋入式电路板。
15.一种基站设备,其特征在于,包括如上述权利要求1-11任一项所述的埋入式电路板。
16.一种传感组件,其特征在于,包括如上述权利要求1-11任一项所述的埋入式电路板。
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