CN211580313U - 线路板 - Google Patents

线路板 Download PDF

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Publication number
CN211580313U
CN211580313U CN201922061876.8U CN201922061876U CN211580313U CN 211580313 U CN211580313 U CN 211580313U CN 201922061876 U CN201922061876 U CN 201922061876U CN 211580313 U CN211580313 U CN 211580313U
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China
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layer
circuit
out terminal
leading
chip
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CN201922061876.8U
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黄立湘
王泽东
缪桦
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Shennan Circuit Co Ltd
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Shennan Circuit Co Ltd
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    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/143—Masks therefor
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    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
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    • H01F27/324—Insulation between coil and core, between different winding sections, around the coil; Other insulation structures
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    • H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08—Magnetic details
    • H05K2201/083—Magnetic materials
    • H05K2201/086—Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09072—Hole or recess under component or special relationship between hole and component
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
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    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

Abstract

本实用新型提供一种线路板，包括：芯板、至少一个芯片、第一线路层、第一绝缘层。其中，芯板上开设有槽体；芯片设置在槽体中，芯片具有第一引出端子，第一线路层设置在芯板的至少一侧，第一绝缘层设置在芯板与第一线路层之间；其中，所述第一引出端子穿过第一绝缘层与第一线路层连接，进而将芯片与第一线路层电连接。以此使芯片与线路之前的接线更加灵活。

Description

线路板
技术领域
本申请涉及芯片埋入技术领域，特别是涉及一种线路板。
背景技术
今日的电子封装不但要提供芯片的保护，同时还要在一定的成本下满足不断增加的性能、可靠性、散热、功率分配等要求，功能芯片速度及处理能力的增加需要更多的引脚数，更快的时钟频率和更好的电源分配。同时由于用户对超薄，微缩，多功能，高性能且低耗电的智能移动电子产品的需求越来越大，直接促成移动终端芯片计算和通信功能的融合，出现集成度，复杂度越来越高，功耗和成本越来越低的趋势。
实用新型内容
本申请主要提供一种线路板，使芯片与线路之间接线更加灵活方便。
为解决上述技术问题，本实用新型提供的第一个技术方案是：提供一种线路板，包括：芯板，开设有槽体；至少一个芯片，设置在所述槽体中，所述芯片具有第一引出端子；第一线路层，设置在所述芯板的至少一侧；第一绝缘层，设置在所述芯板与所述第一线路层之间；其中，所述第一引出端子穿过所述第一绝缘层与所述第一线路层连接，进而将所述芯片与所述第一线路层电连接。
其中，所述线路板还包括：第二线路层，设置在所述第一线路层远离所述芯板的一侧；第二绝缘层，设置在所述第一线路层与所述第二线路层之间；其中，所述第二绝缘层中设置有第二引出端子，以将所述第二线路层与所述第一线路层电连接，进而将所述芯片与所述第二线路层电连接。
其中，所述线路板还包括：第三线路层，设置在所述第二线路层远离所述芯板的一侧；第三绝缘层，设置在所述第二线路层与所述第三线路层之间；其中，所述第三绝缘层中设置有第三引出端子，以将所述第三线路层与所述第二线路层电连接，进而将所述芯片与所述第三线路层电连接。
其中，所述第一线路层上设有多个不同的第一线路网络；所述芯片通过不同的第一引出端子分别与多个不同的第一线路网络电连接。
其中，所述第二线路层上设有多个不同的第二线路网络；所述第二引出端子将所述第一引出端子连接的第一线路网络与第二线路网络电连接，进而将所述芯片与所述第二线路网络电连接；所述第三线路层上设有多个不同的第三线路网络；所述第三引出端子将所述第二引出端子连接的第二线路网络与第三线路网络电连接，进而将所述芯片与所述第三线路网络电连接。
其中，所述第二引出端子是所述第一引出端子的n倍，其中，n为整数；所述第三引出端子是所述第二引出端子的m倍，其中，m为整数；所述第一引出端子、所述第二引出端子及所述第三引出端子为铜柱或导电通孔中的一种或任意组合；所述第一引出端子、所述第二引出端子及所述第三引出端子的连接的两端具有焊盘。
其中，所述槽体为贯穿所述芯板的两表面的通槽；或所述槽体为贯穿所述芯板的一表面的盲槽；其中，所述芯片与所述槽体的侧壁之间的距离为20-50μm，且填充有molding硅胶。
其中，所述第一绝缘层、所述第二绝缘层、所述第一线路层以及所述第二线路层的厚度为10-40μm。
其中，所述第一绝缘层、所述第二绝缘层、所述第三绝缘层、所述第一线路层、所述第二线路层以及所述第三线路层的厚度为10-40μm；所述第一绝缘层、所述第二绝缘层及所述第三绝缘层的厚度为30μm；所述第一线路层、所述第二线路层及所述第三线路层的厚度为18μm；所述第一绝缘层、所述第二绝缘层及所述第三绝缘层为可固化粘性胶体；所述芯板为覆铜板。
区别于现有技术，本申请通过在芯板上开设槽体，将芯片设置在芯板的槽体中，再在芯板的至少一侧设置第一绝缘层及第一线路层，芯片的第一引出端子穿过第一绝缘层与第一线路层电连接。由此，能够使芯片与线路之间接线更加灵活。
附图说明
图1是本实用新型线路板的第一实施例的结构示意图；
图2是本实用新型线路板的第二实施例的结构示意图；
图3是本实用新型线路板的第三实施例的结构示意图；
图4是本实用新型线路板的第四实施例的结构示意图。
具体实施方式
下面将结合本申请实施方式中的附图，对本申请实施方式中的技术方案进行清楚、完整地描述，显然，所描述的实施方式仅仅是本申请一部分实施方式，而不是全部实施方式。基于本申请中的实施方式，本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施方式，都属于本申请保护的范围。
请参见图1，为本实用新型线路板的第一实施例的结构示意图。包括：芯板11、芯片13、第一绝缘层15、第一线路层16。其中，芯板11上开设有槽体12，芯片13设置在槽体12中。在一实施例中，芯片13可包括用于拍摄的摄像芯片、用于光感指纹识别的指纹芯片、扬声器芯片等等，在此不做限定。芯片13上具有第一引出端子14，在一实施例中，芯片13的两表面均具有第一引出端子14，在另一实施例中，芯片13仅一表面具有第一引出端子14。其第一引出端子14可以为铜柱或导电通孔。第一线路层16设置在芯板11的相对两表面，第一绝缘层15设置在芯板11与第一线路层16之间，以将第一线路层16与芯板11粘合。
其中，芯板11为覆铜板，即为制作线路板的基础材料，包括基材板及覆盖在所述基材板上的铜箔，所述基材板由纸基板、玻纤布基板、合成纤维布基板、无纺布基板、复合基板等材料浸以树脂，制成粘结片，由多张粘结片组合制成，在制作好的基材板单面或双面覆以铜箔，再进行热压固化以制成覆铜板。在一实施例中，芯板11的两表面的铜箔上可以具有线路图形层，也可以不具有线路图形层，具体按要求设置，在此不做限定。
其中，第一绝缘层15对应芯片13的第一引出端子14位置处具有通孔(图未示)，第一引出端子14穿过通孔与第一线路层16电连接，在第一引出端子14是铜柱时，可直接在芯片13的指定位置进行电镀，在第一引出端子14是导电通孔时，可直接在第一绝缘层15的指定位置设置通孔，在通孔的侧壁进行电镀形成导电层。
在本实施例中，若一个芯片13上的第一引出端子14为一个时，即第一线路层16具有一个第一线路网络，若一个芯片13上的第一引出端子14为多个时，即第一线路层16具有多个第一线路网络，且多个第一线路网络相互独立，每个第一引出端子14将芯片13连接到不同的第一线路网络。
在本实施例中，芯板11上的槽体12为贯穿芯板11两表面的通槽，在将芯片13放置在槽体12中时，芯片13与槽体12的侧壁之间的距离为20～50μm，且在此距离中填充有molding硅胶，其是一种无色透明液体，能够在150℃以上高温下进行硫化，固化时具有一定的透气性及弹性。其主要具有耐温特性、耐候性、电气绝缘性、生理惰性、低表面张力和低表面能。在槽中填充molding硅胶可以将芯片13与芯板11粘合在一起。
在一实施例中，第一绝缘层15及第一线路层16的厚度为10-40μm。具体地，第一绝缘层15的厚度为30μm，第一线路层16的厚度为18μm。第一线路层16由在铜层上制作线路图案所得。第一绝缘层15为可固化粘性胶体，具体地，第一绝缘层15为半固化片，其作为层压时的层间粘结层，具体地，所述半固化片主要由树脂和增强材料组成，在制作多层线路板时，通常采用玻纤布做增强材料，将其浸渍上树脂胶液，再经热处理预烘制成薄片，其加热加压下会软化，冷却后会固化，且具有黏性，在高温压合过程中能将相邻的两层黏合。即第一绝缘层15在高温压合时会融化，进而将第一线路层16与芯板11粘合在一起。
在一实施例中，放置芯片13的槽体12的侧壁还可以设置金属层，在线路板进行工作时，金属层能够将芯片13产生的热量传导至芯板11上。在具体实施例中，芯板11对应的第一绝缘层15上也可以设置导电孔，进而将芯片13产生的热量传到至第一线路层16，进而将热量散发出去，以此能够更好的保护芯片13，延长芯片13的使用寿命。
请参见图2，为本实用新型线路板的第二实施例的结构示意图。与上述第一实施例相比，区别在于，本实施例中用于放置芯片13的槽体12为贯穿芯板11一表面的盲槽。在本实施例中，第一线路层16位于芯板11的一表面，第一绝缘层15位于芯板11与第一线路层16之间。
可以理解的，芯片13一表面具有第一引出端子14，具体地，第一引出端子位于第一线路层16的所在侧。
请参见图3，为本实用新型线路板的第三实施例的结构示意图。与上述第一实施例相比，区别在于，本实施例在第一线路层16的外侧还依次设有第二绝缘层17及第二线路层18。其中，第二绝缘层17的指定位置处设置有通孔，且通孔中填充有导电物质以形成第二引出端子19，用于将第一线路层16与第二线路层18电连接。
可以理解的，第二引出端子19将第一线路层16与第二线路层18电连接，进而能够将芯片13与第二线路层18电连接。在一实施例中，第一线路层16上有一个第一线路网络时，一个芯片13上具有一个第一引出端子14，第一线路层16上有多个第一线路网络时，一个芯片13上具有多个第一引出端子14。具体地，第一引出端子14的数量与第一线路网络的数量对应。在一实施例中，第一线路层16上有一个第一线路网络，第二线路层18上也有一个第二线路网络时，第一引出端子14及第二引出端子19数量均为一，第一线路层16上有多个第一线路网络，第二线路层18上也有多个第二线路网络时，且第一线路层16上的第一线路网络与第二线路层18上的第二线路网络数量相等时，第一引出端子14与第二引出端子19数量对应。若第二线路层18上的第二线路网络数量是第一线路层16上的第一线路网络的n倍时，第二引出端子19的数量是第一引出端子14的数量的n倍。
在一实施例中，为了增强第一引出端子14及第二引出端子19的信号传输效率，第一引出端子14连接芯片13的一端及连接第一线路层16的一端均设有焊盘(图未示)，第二引出端子19连接第一线路层16的一端及连接第二线路层18的一端也设有焊盘(图未示)。
在一实施例中，第二绝缘层17及第二线路层18的厚度为10-40μm。具体地，第二绝缘层17的厚度为30μm，第二线路层18的厚度为18μm。第二线路层18由在铜层上制作线路图案所得。第二绝缘层17为可固化粘性胶体，具体地，第二绝缘层17为半固化片，其作为层压时的层间粘结层，具体地，所述半固化片主要由树脂和增强材料组成，在制作多层线路板时，通常采用玻纤布做增强材料，将其浸渍上树脂胶液，再经热处理预烘制成薄片，其加热加压下会软化，冷却后会固化，且具有黏性，在高温压合过程中能将相邻的两层粘合。即第二绝缘层17在高温压合时会融化，进而将第一线路层16与第二线路层18粘合在一起。
在本实施例中，用于放置芯片13的槽体12为贯穿芯板11两表面的通槽，在另一实施例中，槽体12还可以为如图2所述的贯穿芯板11一表面的盲槽，靠近槽体12一侧的第一线路层16外侧依次设置有第二绝缘层17及第二线路层18。第二绝缘层17上设置有第二引出端子19，进而将第一线路层16与第二线路层18电连接。
请参见图4，为本实用新型线路板的第四实施例的结构示意图。与上述第三实施例相比，区别在于，本实施例在第二线路层18的外侧还依次设有第三绝缘层20及第三线路层21。其中，第三绝缘层20的指定位置处设置有通孔，且通孔中填充有导电物质以形成第三引出端子22，用于将第二线路层18与第三线路层21电连接。
可以理解的，第三引出端子22将第二线路层18与第三线路层21电连接，进而能够将芯片13与第三线路层21电连接。在一实施例中，若第二线路层18上具有多个第二线路网络，且第三线路层21上也具有多个第三线路网络时，第三连接端子22分别将第二线路层18上的第二线路网络与第三线路层21上的第三线路网络连接。
例如，第一线路层16上具有第一线路网络a，一个第一连接端子14将芯片13与第一线路网络a连接，此时第一连接端子14的数量为1个。
再例如，第一线路层16上具有第一线路网络a，且第二线路层18上具有第二线路网络a及第二线路网络b时，一个第二连接端子19将第一线路网络a与第二线路网络a连接，一个第二连接端子19将第一线路网络a与第二线路网络b连接，此时第二连接端子19的数量为2个。因此第二连接端子19的数量为第一连接端子14的数量的n倍，n为整数。
再例如，第二线路层18上具有第二线路网络a及第二线路网络b，第三线路层21上具有第三线路网络a及第三线路网络b时，则一个第三连接端子22将第二线路网络a与第三线路网络a连接，一个第三连接端子22将第二线路网络b与第三线路网络a连接，一个第三连接端子22将第二线路网络a与第三线路网络b连接，一个第三连接端子22将第第二线路网络b与第三线路网络b连接。此时第三连接端子22的数量为4个，因此第三连接端子22的数量为第二连接端子的数量的m倍，m为整数。
在本实施例中，第三绝缘层20及第三线路层21余上述实施例中所述的线路层及绝缘层材料、规格相同，在此不再赘述。
本申请提供的线路板通过在芯板上设置槽体，在槽体中设置芯片，使芯片的第一引出端子连接第一线路层，在第一线路层外侧设置第二线路层，设置连接第一线路层及第二线路层的第二引出端子，以此通过增加连接引脚的方法，使芯片与线路之间接线更加灵活方便。
以上仅为本申请的实施方式，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (10)

1.一种线路板，其特征在于，包括：
芯板，开设有槽体；
至少一个芯片，设置在所述槽体中，所述芯片具有第一引出端子；
第一线路层，设置在所述芯板的至少一侧；
第一绝缘层，设置在所述芯板与所述第一线路层之间；
其中，所述第一引出端子穿过所述第一绝缘层与所述第一线路层连接，进而将所述芯片与所述第一线路层电连接。
2.根据权利要求1所述的线路板，其特征在于，所述线路板还包括：
第二线路层，设置在所述第一线路层远离所述芯板的一侧；
第二绝缘层，设置在所述第一线路层与所述第二线路层之间；
其中，所述第二绝缘层中设置有第二引出端子，以将所述第二线路层与所述第一线路层电连接，进而将所述芯片与所述第二线路层电连接。
3.根据权利要求2所述的线路板，其特征在于，所述线路板还包括：
第三线路层，设置在所述第二线路层远离所述芯板的一侧；
第三绝缘层，设置在所述第二线路层与所述第三线路层之间；
其中，所述第三绝缘层中设置有第三引出端子，以将所述第三线路层与所述第二线路层电连接，进而将所述芯片与所述第三线路层电连接。
4.根据权利要求1所述的线路板，其特征在于，所述第一线路层上设有多个不同的第一线路网络；
所述芯片通过不同的第一引出端子分别与多个不同的第一线路网络电连接。
5.根据权利要求3所述的线路板，其特征在于，所述第二线路层上设有多个不同的第二线路网络；
所述第二引出端子将所述第一引出端子连接的第一线路网络与第二线路网络电连接，进而将所述芯片与所述第二线路网络电连接；
所述第三线路层上设有多个不同的第三线路网络；
所述第三引出端子将所述第二引出端子连接的第二线路网络与第三线路网络电连接，进而将所述芯片与所述第三线路网络电连接。
6.根据权利要求5所述的线路板，其特征在于，所述第二引出端子是所述第一引出端子的n倍，其中，n为整数；
所述第三引出端子是所述第二引出端子的m倍，其中，m为整数；
所述第一引出端子、所述第二引出端子及所述第三引出端子为铜柱或导电通孔中的一种或任意组合；
所述第一引出端子、所述第二引出端子及所述第三引出端子的连接的两端具有焊盘。
7.根据权利要求1所述的线路板，其特征在于，所述槽体为贯穿所述芯板的两表面的通槽；或
所述槽体为贯穿所述芯板的一表面的盲槽；
其中，所述芯片与所述槽体的侧壁之间的距离为20-50μm，且填充有molding硅胶。
8.根据权利要求3所述的线路板，其特征在于，所述第一绝缘层、所述第二绝缘层、所述第三绝缘层、所述第一线路层、所述第二线路层以及所述第三线路层的厚度为10-40μm。
9.根据权利要求3所述的线路板，其特征在于，所述第一绝缘层、所述第二绝缘层及所述第三绝缘层的厚度为30μm；
所述第一线路层、所述第二线路层及所述第三线路层的厚度为18μm。
10.根据权利要求3所述的线路板，其特征在于，所述第一绝缘层、所述第二绝缘层及所述第三绝缘层为可固化粘性胶体；所述芯板为覆铜板。
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