WO2021083367A1 - 线路板及其制作方法 - Google Patents

线路板及其制作方法 Download PDF

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Publication number
WO2021083367A1
WO2021083367A1 PCT/CN2020/125498 CN2020125498W WO2021083367A1 WO 2021083367 A1 WO2021083367 A1 WO 2021083367A1 CN 2020125498 W CN2020125498 W CN 2020125498W WO 2021083367 A1 WO2021083367 A1 WO 2021083367A1
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Prior art keywords
layer
chip
core board
circuit
metal layer
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PCT/CN2020/125498
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English (en)
French (fr)
Inventor
黄立湘
王泽东
缪桦
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深南电路股份有限公司
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Publication of WO2021083367A1 publication Critical patent/WO2021083367A1/zh

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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08—Magnetic details
    • H05K2201/083—Magnetic materials
    • H05K2201/086—Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09072—Hole or recess under component or special relationship between hole and component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

Definitions

  • This application relates to the field of chip embedding technology, and in particular to a circuit board and a manufacturing method thereof.
  • This application mainly provides a circuit board and a manufacturing method thereof, which are used for dissipating the heat generated by the chip.
  • the first technical solution provided by this application is to provide a circuit board, including: a core board with a slot body; at least one chip arranged in the slot body; wherein the slot
  • the side wall of the body is provided with a first metal layer for dissipating the heat generated by the chip.
  • a dielectric layer is provided between the chip and the side wall of the tank; wherein, the dielectric layer is a material with thermosetting and filling properties, such as one or any combination of resin, molding compound, and molding silica gel .
  • the core board is a copper clad laminate
  • a second metal layer is provided on both surfaces of the copper clad laminate
  • the first metal layer is connected to the second metal layer.
  • the circuit board further includes an insulating layer and a circuit layer, wherein the insulating layer and the circuit layer are respectively arranged on the surface of the core board in sequence; the insulating layer has a position corresponding to the chip First conductive vias to electrically connect the chip and the circuit layer; or the circuit board includes second conductive vias penetrating through the core board, the insulating layer and the circuit layer, for connecting The core board is electrically connected to the circuit layer.
  • the circuit layer includes a ground wire.
  • the insulating layer further includes a second conductive through hole penetrating the insulating layer for electrically connecting the core board and the circuit layer.
  • the first technical solution provided by this application is to provide a method for manufacturing a circuit board, including: providing a core board; opening a groove at a designated position of the core board; A first metal layer is arranged on the sidewall of the, and a chip is arranged in the groove body.
  • said disposing the first metal layer on the side wall of the tank specifically includes: depositing the first metal layer on the side wall of the tank by using methods including but not limited to chemical copper deposition, sputtering, electroplating, etc.; wherein , The first metal layer is a copper layer.
  • the core board is a copper clad laminate, both surfaces of the copper clad laminate are provided with a second metal layer, and the first metal layer is connected to the second metal layer.
  • the method further includes: disposing a dielectric layer between the side wall of the tank body and the chip to bond the chip and the core board;
  • An insulating layer is provided on the outer side of the core board, and a first conductive through hole is provided at the position of the insulating layer corresponding to the chip, and a second conductive through hole is provided at the position of the insulating layer corresponding to the core board;
  • a circuit layer is provided on a side of the insulating layer away from the core board, wherein the circuit layer includes a ground wire.
  • a groove is provided on the core board, and the first metal layer is arranged on the side wall of the groove, and the chip is placed in the groove of the core board, so as to pass through the first metal layer on the side wall of the groove.
  • a metal layer conducts the heat generated by the chip, thereby achieving a better heat dissipation effect.
  • Fig. 1 is a schematic structural diagram of a first embodiment of a circuit board of the present application
  • Fig. 2 is a schematic structural diagram of a second embodiment of the circuit board of the present application.
  • FIG. 3 is a schematic flowchart of an embodiment of a method for manufacturing a circuit board according to the present application.
  • FIG. 1 is a schematic structural diagram of an embodiment of a circuit board of this application. Including: core board 11, chip 13. Wherein, the core board 11 is provided with a groove body 12, and the chip 13 is arranged in the groove body 12. In an embodiment, the chip 13 may include a camera chip for shooting, a fingerprint chip for light-sensitive fingerprint recognition, a speaker chip, etc., which are not limited herein.
  • the core board 11 is a copper clad laminate, which is the basic material for making a circuit board, including a substrate board and a copper foil covering the substrate board.
  • the substrate board is composed of a paper substrate, a glass fiber cloth substrate, and a composite Fiber cloth substrates, non-woven fabric substrates, composite substrates and other materials are impregnated with resin to form a bonding sheet, which is made up of multiple bonding sheets, and copper foil is coated on one or both sides of the prepared substrate board. Then heat and pressure solidify to make a copper clad laminate.
  • the copper foils on both surfaces of the core board 11 are the second metal layer 17.
  • the side wall of the tank 12 for placing the chip 13 has the first metal layer 18.
  • the first metal layer 18 is connected to the second metal layer 17. Specifically, when the chip 13 generates heat, the first metal layer 18 transfers the generated heat to the second metal layer 17, and the heat is transferred on the surface of the second metal layer 17 of the core board 11, thereby dissipating the heat.
  • the circuit board further includes an insulating layer 15 and a circuit layer 16. As shown in FIG. 1, the insulating layer 15 is located outside the core board 11, and the circuit layer 16 is located outside the insulating layer 15. Further, the insulating layer 15 is located between the circuit layer 16 and the core board 11 for bonding the circuit layer 16 and the core board 11.
  • the insulating layer 15 is a prepreg, which serves as the interlayer bonding layer during lamination. Specifically, the prepreg is mainly composed of resin and reinforcing materials. When making multilayer circuit boards, glass fiber is usually used. The cloth is used as a reinforcing material. It is impregnated with resin glue, and then heat-treated and pre-baked into a thin sheet.
  • the insulating layer 15 will melt when pressed at high temperature, thereby bonding the circuit layer 16 and the core board 11 together.
  • the insulating layer 15 has a first conductive via 14 in the region corresponding to the chip 13 to electrically connect the chip 13 and the circuit layer 16.
  • the first conductive via 14 is a via that penetrates the insulating layer 15, and the sidewall of the via has a conductive metal layer, specifically, the conductive metal layer is a copper layer.
  • the insulating layer 15 may directly have a through hole at the position corresponding to the connection terminal of the chip 13, and the sidewall of the through hole has no metal layer or is not provided with a metal layer, and the connection terminal penetrates The via hole is electrically connected to the circuit layer 16.
  • the insulating layer 15 has a second conductive through hole 19 corresponding to the area where the core board 11 is located to electrically connect the first metal layer 18 and the second metal layer 17 on the core board 11 with the circuit layer 16.
  • the purpose of the second conductive via 19 is to electrically connect the first metal layer 18 and the second metal layer 17 on the core board 11 to the circuit layer 16, thereby transferring the heat generated by the chip 13 to the outer circuit layer 16 to achieve heat dissipation.
  • the second conductive via 19 may be a blind hole as shown in FIG. 1, which penetrates the insulating layer 15.
  • the second conductive via 19 may also be a through hole as shown in FIG. Through the core board 11, the insulating layer 15 and the circuit layer 16, as long as the core board 11 and the circuit layer 16 can be electrically connected.
  • the circuit layer 16 includes a ground wire, and the second conductive via 19 electrically connects the first metal layer 18 and the second metal layer 17 with the ground wire on the circuit layer 16. In this way, if other components are installed on the second metal layer 17, the second metal layer 17 can be used as the grounding terminal of the component, and through the connection with the wiring, the signal of the installed component can be shielded.
  • connection method connecting the first metal layer 18 and the second metal layer 17 to the ground line is more conducive to heat dissipation, and because of this connection method, the distance between the circuit layer 16 and the first metal layer 18 and the second metal layer 17 is reduced.
  • the ground loop is beneficial to reduce the generation of secondary inductance and parasitic capacitance, thereby helping to reduce the impact of secondary inductance and parasitic capacitance on the transmission signal, thereby helping to improve the transmission performance of high-frequency signals or other signals, and is beneficial to improve The miniaturization and integration level of the circuit board.
  • the medium layer is one or any combination of resin and molding silica gel.
  • molding silica gel which is a colorless and transparent liquid, can be vulcanized at a high temperature above 150°C, and has certain air permeability and elasticity during curing. It mainly has temperature resistance, weather resistance, electrical insulation, physiological inertia, low surface tension and low surface energy.
  • Resin refers to an organic polymer that has a softening or melting range after being heated, and has a tendency to flow under external force during softening. It is a solid, semi-solid, or liquid organic polymer at room temperature.
  • FIG. 2 is a schematic structural diagram of an embodiment of a manufacturing method of a circuit board of this application. include:
  • Step S21 Provide a core board.
  • the core board is a copper clad laminate, which is the basic material for making a circuit board, including a base board and a copper foil covering the base board.
  • the base board is composed of a paper substrate and a glass fiber cloth.
  • the substrate, synthetic fiber cloth substrate, non-woven substrate, composite substrate and other materials are impregnated with resin to form a bonding sheet, which is made of a combination of multiple bonding sheets, and the finished substrate board is covered with one or both sides
  • the copper foil is then cured by heat and pressure to make a copper clad laminate.
  • the copper layers on both surfaces of the copper clad laminate are the second metal layer.
  • Step S22 Opening a groove at the designated position of the core board.
  • a slot body is provided at a designated position on the core board.
  • the slot body is used to place the chip. Therefore, in one embodiment, the slot body needs to be larger than the chip, or in another embodiment, the slot body can be as large as the core board. , As long as the chip can be accommodated.
  • Step S23 Disposing a first metal layer on the sidewall of the tank.
  • the first metal layer is a copper layer.
  • the first metal layer is provided on the sidewall of the tank by means including but not limited to chemical copper deposition, sputtering, electroplating, etc., and the first metal layer is connected to the first metal layer on the surface of the core board.
  • the two metal layers are connected, and together serve as a metal layer for heat dissipation, and then conduct the heat generated by the chip.
  • Step S24 Set the chip in the tank.
  • the chip is set in the tank.
  • the chip and the core board need to be glued, that is, the tank needs to be filled with a dielectric layer, and the chip and the core board are connected through the dielectric layer. Gluing.
  • Step S25 A dielectric layer is arranged between the sidewall of the tank and the chip to bond the chip and the core board.
  • the dielectric layer is a material with thermosetting and filling properties, such as one or any combination of resin, molding compound, and molding silica gel.
  • molding silica gel which is a colorless and transparent liquid, can be vulcanized at a high temperature above 150°C, and has certain air permeability and elasticity during curing. It mainly has temperature resistance, weather resistance, electrical insulation, physiological inertia, low surface tension and low surface energy.
  • Resin refers to an organic polymer that has a softening or melting range after being heated, and has a tendency to flow under the action of external force during softening. It is a solid, semi-solid, or liquid organic polymer at room temperature.
  • Step S26 An insulating layer is provided on the outer side of the core board, and a first conductive through hole is provided at a position of the insulating layer corresponding to the chip, and a second conductive through hole is provided at a position of the insulating layer corresponding to the core board.
  • the insulating layer is a prepreg, which serves as the interlayer bonding layer during lamination.
  • the prepreg is mainly composed of resin and reinforcing materials.
  • resin glue When making multilayer circuit boards, glass fiber cloth is usually used.
  • resin glue As a reinforcing material, it is impregnated with resin glue, and then heat-treated and pre-baked into a thin sheet. It will soften under heating and pressure, and will solidify after cooling. Two-layer bonding. That is, the insulating layer will melt when pressed at high temperature, thereby bonding the circuit layer and the core board together.
  • a first conductive through hole needs to be provided at the position of the insulating layer corresponding to the chip to electrically connect the chip and the circuit layer.
  • the first conductive through hole may be It is directly arranged as a through hole, and the connection terminal is connected to the circuit layer through the through hole.
  • a second conductive through hole needs to be provided at the position of the insulating layer corresponding to the core plate to electrically connect the second metal layer on the surface of the core plate and the first metal layer on the sidewall of the tank with the circuit layer. connection.
  • Step S27 A circuit layer is provided on the side of the insulating layer away from the core board, wherein the circuit layer includes a ground wire.
  • a circuit layer is arranged on the side of the insulating layer away from the core board. Specifically, the insulating layer is arranged between the core board and the circuit layer. In one embodiment, a circuit pattern layer is provided on the circuit layer.
  • the circuit pattern layer contains a ground wire, and the second conductive through hole connects the second metal layer on the surface of the core board and the first metal layer on the sidewall of the tank with the ground wire of the circuit layer, thereby dissipating heat, and at the same time. Play the role of shielding the signal.
  • a groove is provided on the core board, and the first metal layer is arranged on the sidewall of the groove, and since the surface of the core board includes the second metal layer, the first metal layer and the second metal layer The two metal layers are connected to dissipate the heat generated by the chip.
  • the outer side of the core board is provided with an insulating layer and a circuit layer in sequence.
  • the insulating layer is provided with conductive through holes at the position corresponding to the core board to electrically connect the first metal layer and the second metal layer with the circuit layer, and then the photo generated The heat is released to achieve an effective heat dissipation effect.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Coils Or Transformers For Communication (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

一种线路板及其制作方法，线路板包括：芯板(11)，芯板(11)上开设有槽体(12)，至少一个芯片(13)，设置在槽体(12)中。其中，槽体(12)的侧壁上设置有第一金属层(18)，用于将所述芯片(13)产生的热量导出，进而实现更好的散热效果。

Description

线路板及其制作方法 【技术领域】
本申请涉及芯片埋入技术领域，特别是涉及一种线路板及其制作方法。
【背景技术】
今日的电子封装不但要提供芯片的保护，同时还要在一定的成本下满足不断增加的性能、可靠性、散热、功率分配等要求，功能芯片速度及处理能力的增加需要更多的引脚数，更快的时钟频率和更好的电源分配。同时由于用户对超薄，微缩，多功能，高性能且低耗电的智能移动电子产品的需求越来越大，直接促成移动终端芯片计算和通信功能的融合，出现集成度，复杂度越来越高，功耗和成本越来越低的趋势。
【发明内容】
本申请主要提供一种线路板及其制作方法，用于将芯片产生的热量导出。
为解决上述技术问题，本申请提供的第一个技术方案是：提供一种线路板，包括：芯板，开设有槽体；至少一个芯片，设置在所述槽体中；其中，所述槽体的侧壁上设置有第一金属层，用于将所述芯片产生的热量导出。
其中，所述芯片与所述槽体的侧壁之间设置有介质层；其中，所述介质层为具备热固性及填充性能的材料，如树脂、塑封料、molding硅胶中的一种或任意组合。
其中，所述芯板为覆铜板，所述覆铜板的两表面上均设置有第二金属层，所述第一金属层与所述第二金属层连接。
其中，所述线路板还进一步包括绝缘层和线路层，其中，所述绝缘层和所述线路层依次分别设置在所述芯板的表面上；所述绝缘层对应所述芯片的位置处具有第一导电通孔，以将所述芯片与所述线路层电连 接；或所述线路板包括贯穿所述芯板、所述绝缘层及所述线路层的第二导电通孔，用于将所述芯板与所述线路层电连接。
其中，所述线路层包括接地线。
其中，所述绝缘层还进一步包括贯穿所述绝缘层的第二导电通孔，用于以将所述芯板与所述线路层电连接。
为解决上述技术问题，本申请提供的第一个技术方案是：提供一种线路板的制作方法，包括：提供芯板；在所述芯板的指定位置处开设槽体；在所述槽体的侧壁设置第一金属层；在所述槽体中设置芯片。
其中，所述在所述槽体的侧壁设置第一金属层具体包括：采用包括但不限于化学沉铜、溅射、电镀等方法在所述槽体的侧壁沉积第一金属层；其中，所述第一金属层为铜层。
其中，所述芯板为覆铜板，所述覆铜板的两表面均设置有第二金属层，所述第一金属层与所述第二金属层连接。
其中，所述在所述槽体中设置芯片之后还包括：在所述槽体的侧壁与所述芯片之间设置介质层，以将所述芯片与所述芯板粘合；在所述芯板的外侧设置绝缘层，并在所述绝缘层对应所述芯片的位置处设置第一导电通孔，在所述绝缘层对应所述芯板的位置处设置第二导电通孔；在所述绝缘层远离所述芯板的一侧设置线路层，其中，所述线路层上包括接地线。
区别于现有技术，本申请通过在芯板上开设槽体，并在槽体的侧壁设置第一金属层，将芯片设置在芯板的槽体中，以此通过槽体侧壁的第一金属层将芯片产生的热量导出，进而实现更好的散热效果。
【附图说明】
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。其中：
图1是本申请线路板的第一实施例的结构示意图；
图2是本申请线路板的第二实施例的结构示意图；
图3是本申请线路板的制作方法的一实施例的流程示意图。
【具体实施方式】
下面将结合本申请实施方式中的附图，对本申请实施方式中的技术方案进行清楚、完整地描述，显然，所描述的实施方式仅仅是本申请一部分实施方式，而不是全部实施方式。基于本申请中的实施方式，本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施方式，都属于本申请保护的范围。
请参见图1，为本申请线路板的一实施例的结构示意图。包括：芯板11、芯片13。其中，芯板11上开设有槽体12，芯片13设置在槽体12中。在一实施例中，芯片13可包括用于拍摄的摄像芯片、用于光感指纹识别的指纹芯片、扬声器芯片等等，在此不做限定。
其中，芯板11为覆铜板，即为制作线路板的基础材料，包括基材板及覆盖在所述基材板上的铜箔，所述基材板由纸基板、玻纤布基板、合成纤维布基板、无纺布基板、复合基板等材料浸以树脂，制成粘结片，由多张粘结片组合制成，在制作好的基材板单面或双面覆以铜箔，再进行热压固化以制成覆铜板。在本实施例中，芯板11的两表面的铜箔为第二金属层17，在本实施例中，用于放置芯片13的槽体12的侧壁具有第一金属层18，在一实施例中，第一金属层18与第二金属层17连接。具体地，在芯片13产生热量时，第一金属层18会将产生的热量传输至第二金属层17，热量在芯板11的第二金属层17的表面传递，进而将热量散出。
在一实施例中，线路板进一步包括绝缘层15、线路层16，如图1所示，绝缘层15位于芯板11的外侧，线路层16位于绝缘层15的外侧。进一步地，绝缘层15位于线路层16与芯板11之间，用于将线路层16与芯板11粘合。在一实施例中，绝缘层15为半固化片，其作为层压时的层间粘结层，具体地，所述半固化片主要由树脂和增强材料组成，在制作多层线路板时，通常采用玻纤布做增强材料，将其浸渍上树脂胶液， 再经热处理预烘制成薄片，其加热加压下会软化，冷却后会固化，且具有黏性，在高温压合过程中能将相邻的两层黏合。即绝缘层15在高温压合时会融化，进而将线路层16与芯板11粘合在一起。
在一实施例中，绝缘层15对应芯片13所在的区域具有第一导电通孔14，以将芯片13与线路层16电连接。具体地，第一导电通孔14为贯穿绝缘层15的通孔，通孔的侧壁具有导电金属层，具体地，导电金属层为铜层。在一实施例中，若芯片13自身具有连接端子时，则绝缘层15对应芯片13的连接端子的位置处可以直接具有通孔，通孔侧壁没有金属层或不设置金属层，连接端子穿过通孔与线路层16电连接。
在一实施例中，绝缘层15对应芯板11所在的区域具有第二导电通孔19，以将芯板11上的第一金属层18及第二金属层17与线路层16电连接，具体地，第二导电通孔19的目的是为了将芯板11上的第一金属层18及第二金属层17与线路层16电连接，进而将芯片13产生的热量传输到外层的线路层16上，以实现散热。
具体地，第二导电通孔19可以为图1所示的盲孔，其贯穿绝缘层15.在另一实施例中，第二导电通孔19还可以为图2所示的通孔，其贯穿芯板11、绝缘层15及线路层16，只要能够实现芯板11与线路层16的电连接即可。
在一实施例中，线路层16上包括接地线，第二导电通孔19将第一金属层18及第二金属层17与线路层16上的接地线电连接。这样在第二金属层17上若是安装有其他元器件时，第二金属层17可作为元器件的接地端，且通过与接线的连接，可屏蔽安装的元器件的信号。
进一步地，将第一金属层18及第二金属层17连接到接地线上，更加有利于散热，且由于此连接方式减少了线路层16与第一金属层18及第二金属层17之间的接地回路，有利于减少次生电感和寄生电容的产生，进而有利于减少次生电感和寄生电容对传输信号的影响，进而有利于提高高频信号或其它信号的传输性能，且有利于提升电路板的小型化集成化水平。
在一实施例中，在将芯片13放置到槽体12中时，为了将芯片13 与芯板11粘合，要在槽体12的侧壁设置介质层。具体地，介质层为树脂、molding硅胶中的一种或任意组合。其中，molding硅胶，其是一种无色透明液体，能够在150℃以上高温下进行硫化，固化时具有一定的透气性及弹性。其主要具有耐温特性、耐候性、电气绝缘性、生理惰性、低表面张力和低表面能。树脂是指受热后有软化或熔融范围，软化时在外力作用下有流动倾向，常温下是固态、半固态，有时也可以是液态的有机聚合物。
请参见图2，为本申请线路板的制作方法的一实施例的结构示意图。包括：
步骤S21：提供芯板。
在本实施例中，芯板为覆铜板，即为制作线路板的基础材料，包括基材板及覆盖在所述基材板上的铜箔，所述基材板由纸基板、玻纤布基板、合成纤维布基板、无纺布基板、复合基板等材料浸以树脂，制成粘结片，由多张粘结片组合制成，在制作好的基材板单面或双面覆以铜箔，再进行热压固化以制成覆铜板。覆铜板两表面的铜层为第二金属层。
步骤S22：在芯板的指定位置处开设槽体。
在芯板的指定位置设置槽体，槽体是用于放置芯片的，因此在一实施例中，槽体需要比芯片大，或者在另一实施例中，槽体还可以与芯板等大，只要能够容置芯片即可。
步骤S23：在槽体的侧壁设置第一金属层。
具体地，第一金属层为铜层，使用包括但不限于化学沉铜、溅射、电镀等方式在槽体的侧壁设置第一金属层，并使第一金属层与芯板表面的第二金属层连接，共同作为用于散热的金属层，进而将芯片产生的热量导出。
步骤S24：在槽体中设置芯片。
将芯片设置到槽体中，在一实施例中，将芯片设置到槽体中后需要将芯片与芯板粘合，即需要在槽体中填充介质层，通过介质层将芯片与芯板进行粘合。
步骤S25：在槽体的侧壁与芯片之间设置介质层，以将芯片与芯板 粘合。
具体地，在一实施例中，介质层为具备热固性及填充性能的材料，如树脂、塑封料、molding硅胶中的一种或任意组合。其中，molding硅胶，其是一种无色透明液体，能够在150℃以上高温下进行硫化，固化时具有一定的透气性及弹性。其主要具有耐温特性、耐候性、电气绝缘性、生理惰性、低表面张力和低表面能。树脂是指受热后有软化或熔融范围，软化时在外力作用下有流动倾向，常温下是固态、半固态，有时也可以是液态的有机聚合物。
步骤S26：在芯板的外侧设置绝缘层，并在绝缘层对应芯片的位置处设置第一导电通孔，在所述绝缘层对应所述芯板的位置处设置第二导电通孔。
在芯板的外侧设置绝缘层。在一实施例中，绝缘层为半固化片，其作为层压时的层间粘结层，具体地，所述半固化片主要由树脂和增强材料组成，在制作多层线路板时，通常采用玻纤布做增强材料，将其浸渍上树脂胶液，再经热处理预烘制成薄片，其加热加压下会软化，冷却后会固化，且具有黏性，在高温压合过程中能将相邻的两层黏合。即绝缘层在高温压合时会融化，进而将线路层与芯板粘合在一起。
在设置绝缘层时，需要在绝缘层对应芯片的的位置处设置第一导电通孔，以将芯片与线路层电连接，在一实施例中，若芯片具有连接端子，第一导电通孔可直接设置为通孔，连接端子穿过通孔与线路层连接。另外，再设置绝缘层时，还需要在绝缘层对应芯板的位置处设置第二导电通孔，以将芯板表面的第二金属层及槽体侧壁的第一金属层与线路层电连接。
步骤S27：在绝缘层远离芯板的一侧设置线路层，其中，线路层上包括接地线。
在绝缘层远离芯板的一侧设置线路层，具体地，绝缘层设置在芯板与线路层之间。在一实施例中，线路层上设置有线路图形层。其中线路图形层中包含有接地线，第二导电通孔将芯板表面的第二金属层及槽体侧壁的第一金属层与线路层的接地线连接，进而将热量导出，同时还可 以起到屏蔽信号的作用。
本申请提供的线路板及其制作方法，通过在芯板上设置槽体，在槽体的侧壁设置第一金属层，且由于芯板的表面包括第二金属层，第一金属层与第二金属层连接，可以将芯片产生的热量导出。另外芯板的外侧依次设置有绝缘层及线路层，绝缘层对应芯板的位置处设有导电通孔，以将第一金属层及第二金属层与线路层电连接，进而将相片产生的热量进行释放，实现有效的散热效果。
以上仅为本申请的实施方式，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (10)

  1. 一种线路板，其中，包括：
    芯板，开设有槽体；
    至少一个芯片，设置在所述槽体中；
    其中，所述槽体的侧壁上设置有第一金属层，用于将所述芯片产生的热量导出。
  2. 根据权利要求1所述的线路板，其中，所述芯片与所述槽体的侧壁之间设置有介质层；
    其中，所述介质层为具备热固性及填充性能的材料，如树脂、塑封料、molding硅胶中的一种或任意组合。
  3. 根据权利要求1所述的线路板，其中，所述芯板为覆铜板，所述覆铜板的两表面上均设置有第二金属层，所述第一金属层与所述第二金属层连接。
  4. 根据权利要求3所述的线路板，其中，还进一步包括绝缘层和线路层，其中，所述绝缘层和所述线路层依次分别设置在所述芯板的表面上；
    所述绝缘层对应所述芯片的位置处具有第一导电通孔，以将所述芯片与所述线路层电连接。
  5. 根据权利要求4所述的线路板，其中，所述线路层包括接地线。
  6. 根据权利要求5所述的线路板，其中，所述绝缘层还进一步包括贯穿所述绝缘层的第二导电通孔，用于将所述芯板与所述线路层电连接；或
    所述线路板包括贯穿所述芯板、所述绝缘层及所述线路层的第二导电通孔，用于将所述芯板与所述线路层电连接。
  7. 一种线路板的制作方法，其中，包括：
    提供芯板；
    在所述芯板的指定位置处开设槽体；
    在所述槽体的侧壁设置第一金属层；
    在所述槽体中设置芯片。
  8. 根据权利要求7所述的方法，其中，所述在所述槽体的侧壁设置第一金属层具体包括：
    采用包括但不限于化学沉铜、溅射、电镀等方法在所述槽体的侧壁沉积第一金属层；
    其中，所述第一金属层为铜层。
  9. 根据权利要求8所述的方法，其中，所述芯板为覆铜板，所述覆铜板的两表面均设置有第二金属层，所述第一金属层与所述第二金属层连接。
  10. 根据权利要求9所述的方法，其中，所述在所述槽体中设置芯片之后还包括：
    在所述槽体的侧壁与所述芯片之间设置介质层，以将所述芯片与所述芯板粘合；
    在所述芯板的外侧设置绝缘层，并在所述绝缘层对应所述芯片的位置处设置第一导电通孔，在所述绝缘层对应所述芯板的位置处设置第二导电通孔；
    在所述绝缘层远离所述芯板的一侧设置线路层，其中，所述线路层上包括接地线。
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Families Citing this family (6)

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Publication number Priority date Publication date Assignee Title
CN112201652A (zh) * 2019-07-07 2021-01-08 深南电路股份有限公司 线路板及其制作方法
WO2023272642A1 (zh) * 2021-06-30 2023-01-05 深南电路股份有限公司 电子元件封装体、电子组件、电压调节模块以及稳压器件
WO2023272644A1 (zh) * 2021-06-30 2023-01-05 深南电路股份有限公司 一种电子组件、电压调节模块以及稳压器件
CN115732943A (zh) * 2021-09-01 2023-03-03 深南电路股份有限公司 用于相控阵天线收发组件的印制线路板、收发组件及雷达
CN115209609A (zh) * 2022-07-01 2022-10-18 深圳中富电路股份有限公司 埋入元件的多层线路板及线路板的制作方法
CN115206190B (zh) * 2022-07-11 2023-11-28 武汉华星光电半导体显示技术有限公司 显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101616541A (zh) * 2008-06-24 2009-12-30 华为技术有限公司 印制电路板及其制造方法、相关设备
US20130027896A1 (en) * 2011-07-29 2013-01-31 Samsung Electro-Mechanics Co., Ltd. Electronic component embedded printed circuit board and method of manufacturing the same
CN104902682A (zh) * 2014-03-05 2015-09-09 新光电气工业株式会社 配线基板及配线基板的制造方法
CN108347820A (zh) * 2017-01-25 2018-07-31 奥特斯(中国)有限公司 容纳部件的基底结构上的高导热涂层
CN211045436U (zh) * 2019-07-07 2020-07-17 深南电路股份有限公司 线路板

Family Cites Families (100)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3462282B2 (ja) * 1994-11-29 2003-11-05 株式会社東芝 樹脂封止型半導体装置、電子回路装置およびこの製造方法
JP2001102749A (ja) * 1999-09-17 2001-04-13 Internatl Business Mach Corp <Ibm> 回路基板
KR100488412B1 (ko) * 2001-06-13 2005-05-11 가부시키가이샤 덴소 내장된 전기소자를 갖는 인쇄 배선 기판 및 그 제조 방법
JP2004235266A (ja) * 2003-01-28 2004-08-19 Kyocera Corp 電子素子内蔵多層配線基板
US6928726B2 (en) * 2003-07-24 2005-08-16 Motorola, Inc. Circuit board with embedded components and method of manufacture
US7148577B2 (en) * 2003-12-31 2006-12-12 Intel Corporation Materials for electronic devices
TWI301739B (en) * 2004-12-03 2008-10-01 Via Tech Inc Structure and method for embedded passive component assembly
JP4682606B2 (ja) * 2004-12-07 2011-05-11 ソニー株式会社 インダクタンス素子及びその製造方法、並びに配線基板
CA2589485A1 (en) * 2004-12-07 2006-06-15 Ronald W. Whittaker Miniature circuitry and inductive components and methods for manufacturing same
US7687724B2 (en) * 2005-01-10 2010-03-30 Endicott Interconnect Technologies, Inc. Circuitized substrate with internal resistor, method of making said circuitized substrate, and electrical assembly utilizing said circuitized substrate
US20060286696A1 (en) * 2005-06-21 2006-12-21 Peiffer Joel S Passive electrical article
KR100704936B1 (ko) * 2005-06-22 2007-04-09 삼성전기주식회사 전자부품 내장 인쇄회로기판 및 그 제작방법
TWI269365B (en) * 2005-08-08 2006-12-21 Advanced Semiconductor Eng Substrate process and structure for embedded component
KR100700922B1 (ko) * 2005-10-17 2007-03-28 삼성전기주식회사 수동 소자를 내장한 기판 및 그 제조 방법
TWI260075B (en) * 2005-10-24 2006-08-11 Via Tech Inc Embedded inductor element and chip package applying the same
DE102005054233A1 (de) * 2005-11-14 2007-05-16 Grieshaber Vega Kg Hohlleiterübergang
WO2007054355A1 (de) * 2005-11-14 2007-05-18 Vega Grieshaber Kg Hohlleiterübergang
KR100736635B1 (ko) * 2006-02-09 2007-07-06 삼성전기주식회사 베어칩 내장형 인쇄회로기판 및 그 제조 방법
CN100542379C (zh) * 2006-03-15 2009-09-16 日月光半导体制造股份有限公司 具有嵌入式元件的基板及其制造方法
KR100796523B1 (ko) * 2006-08-17 2008-01-21 삼성전기주식회사 전자부품 내장형 다층 인쇄배선기판 및 그 제조방법
TWI376088B (en) * 2006-11-14 2012-11-01 Pulse Eng Inc Wire-less inductive devices and methods
TWI327363B (en) * 2006-11-17 2010-07-11 Unimicron Technology Corp Carrier structure for semiconductor chip and method for manufacturing the same
KR100788213B1 (ko) * 2006-11-21 2007-12-26 삼성전기주식회사 전자소자 내장형 인쇄회로기판의 제조방법
KR20080076241A (ko) * 2007-02-15 2008-08-20 삼성전기주식회사 전자소자 내장 인쇄회로기판 및 그 제조방법
TWI315658B (en) * 2007-03-02 2009-10-01 Phoenix Prec Technology Corp Warp-proof circuit board structure
TWI341577B (en) * 2007-03-27 2011-05-01 Unimicron Technology Corp Semiconductor chip embedding structure
CN101364581A (zh) * 2007-08-10 2009-02-11 全懋精密科技股份有限公司 嵌埋有芯片的承载板结构及其制作方法
JP2009054930A (ja) * 2007-08-29 2009-03-12 Cmk Corp 部品内蔵型多層プリント配線板及びその製造方法
JP5125567B2 (ja) * 2008-02-07 2013-01-23 株式会社デンソー 多層回路基板
JP5284155B2 (ja) * 2008-03-24 2013-09-11 日本特殊陶業株式会社 部品内蔵配線基板
TWI363411B (en) * 2008-07-22 2012-05-01 Advanced Semiconductor Eng Embedded chip substrate and fabrication method thereof
JP2010114434A (ja) * 2008-10-08 2010-05-20 Ngk Spark Plug Co Ltd 部品内蔵配線基板及びその製造方法
CN201345363Y (zh) * 2008-10-30 2009-11-11 欣兴电子股份有限公司 埋入式电路板结构
CN101511148B (zh) * 2009-03-13 2011-03-09 深圳市深南电路有限公司 一种集成于pcb上的谐振腔制备方法
US8120158B2 (en) * 2009-11-10 2012-02-21 Infineon Technologies Ag Laminate electronic device
CN101795539B (zh) * 2010-01-13 2011-11-09 深南电路有限公司 埋电感电路板的加工方法
CN102254885B (zh) * 2010-05-20 2014-01-15 深南电路有限公司 无源器件、无源器件埋入式电路板及其制造方法
CN201797029U (zh) * 2010-06-11 2011-04-13 深南电路有限公司 一种具有谐振腔的高频滤波器
KR101289140B1 (ko) * 2010-09-28 2013-07-23 삼성전기주식회사 임베디드 인쇄회로기판 및 그 제조방법
US8879276B2 (en) * 2011-06-15 2014-11-04 Power Gold LLC Flexible circuit assembly and method thereof
CN103703874A (zh) * 2011-07-13 2014-04-02 揖斐电株式会社 电子部件内置电路板及其制造方法
CN102300406B (zh) * 2011-08-19 2013-06-26 深南电路有限公司 埋入式电路板及其制作方法
CN103188882B (zh) * 2011-12-31 2015-12-16 深南电路有限公司 一种电路板及其制作方法
JP2013211426A (ja) * 2012-03-30 2013-10-10 Dainippon Printing Co Ltd 部品内蔵配線板、及びその製造方法
KR101472628B1 (ko) * 2012-07-02 2014-12-15 삼성전기주식회사 커패시터 내장형 기판
CN102933040A (zh) * 2012-10-23 2013-02-13 东莞生益电子有限公司 具有埋入电感器件的pcb板的制作方法
CN103840238A (zh) * 2012-11-20 2014-06-04 深圳光启创新技术有限公司 一种谐振腔、滤波器件及电磁波设备
KR101987285B1 (ko) * 2012-11-30 2019-06-10 삼성전기주식회사 인쇄회로기판용 수지 조성물, 절연필름, 프리프레그 및 인쇄회로기판
CN103871996A (zh) * 2012-12-11 2014-06-18 宏启胜精密电子(秦皇岛)有限公司 封装结构及其制作方法
CN103906372B (zh) * 2012-12-27 2017-03-01 碁鼎科技秦皇岛有限公司 具有内埋元件的电路板及其制作方法
KR101472640B1 (ko) * 2012-12-31 2014-12-15 삼성전기주식회사 회로 기판 및 회로 기판 제조방법
JP6113510B2 (ja) * 2013-01-16 2017-04-12 アルプス電気株式会社 磁気素子
US20140210111A1 (en) * 2013-01-25 2014-07-31 Apple Inc. Embedded package on package systems
CN104051405A (zh) * 2013-03-11 2014-09-17 欣兴电子股份有限公司 嵌埋有电子组件的线路板结构及其制法
US9142501B2 (en) * 2013-03-14 2015-09-22 International Business Machines Corporation Under ball metallurgy (UBM) for improved electromigration
CN203150678U (zh) * 2013-04-02 2013-08-21 武汉凡谷电子技术股份有限公司 介质谐振腔耦合连接结构
JP5639242B2 (ja) * 2013-04-12 2014-12-10 太陽誘電株式会社 電子部品内蔵基板
CN103327750B (zh) * 2013-06-03 2015-12-02 东莞生益电子有限公司 埋电感式印制电路板的制作方法以及该方法制得的电路板
US9082626B2 (en) * 2013-07-26 2015-07-14 Infineon Technologies Ag Conductive pads and methods of formation thereof
KR102192356B1 (ko) * 2013-07-29 2020-12-18 삼성전자주식회사 반도체 패키지
CN103489841B (zh) * 2013-08-08 2016-08-24 华进半导体封装先导技术研发中心有限公司 同时埋入电容、电感、电阻的pcb板及其制备方法
JP2015035497A (ja) * 2013-08-09 2015-02-19 イビデン株式会社 電子部品内蔵配線板
KR20150046615A (ko) * 2013-10-22 2015-04-30 삼성전기주식회사 다층 인쇄회로기판
CN104853522B (zh) * 2014-02-13 2018-02-23 深南电路有限公司 电路板制作方法和嵌入有金属基的电路板
AT515447B1 (de) * 2014-02-27 2019-10-15 At & S Austria Tech & Systemtechnik Ag Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte
JP6373605B2 (ja) * 2014-03-05 2018-08-15 新光電気工業株式会社 配線基板、及び、配線基板の製造方法
WO2015149364A1 (zh) * 2014-04-04 2015-10-08 史利利 印制线路板
CN105322909A (zh) * 2014-06-06 2016-02-10 精工爱普生株式会社 电子器件封装用基板、电子器件封装、电子器件及制造方法
TWI513379B (zh) * 2014-07-02 2015-12-11 Nan Ya Printed Circuit Board 內埋元件的基板結構與其製造方法
JP2016076656A (ja) * 2014-10-08 2016-05-12 イビデン株式会社 電子部品内蔵配線板及びその製造方法
JP2016076658A (ja) * 2014-10-08 2016-05-12 イビデン株式会社 電子部品内蔵配線板及びその製造方法
JP2016096297A (ja) * 2014-11-17 2016-05-26 イビデン株式会社 金属塊内蔵配線板及びその製造方法
KR102281452B1 (ko) * 2014-11-20 2021-07-27 삼성전기주식회사 전자부품 내장 인쇄회로기판 및 그 제조방법
KR102333084B1 (ko) * 2014-12-10 2021-12-01 삼성전기주식회사 임베디드 인쇄회로기판 및 그 제조 방법
DE102014118462A1 (de) * 2014-12-11 2016-06-16 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Semiflexible Leiterplatte mit eingebetteter Komponente
DE102014118464A1 (de) * 2014-12-11 2016-06-16 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Leiterplatte mit einem asymmetrischen Schichtenaufbau
KR102139755B1 (ko) * 2015-01-22 2020-07-31 삼성전기주식회사 인쇄회로기판 및 그 제조방법
CN106163128A (zh) * 2015-04-07 2016-11-23 深南电路股份有限公司 一种扁平化集成电路结构及其加工方法
EP3091821A1 (en) * 2015-05-08 2016-11-09 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Printed circuit board
JP2016219478A (ja) * 2015-05-15 2016-12-22 イビデン株式会社 配線基板及びその製造方法
CN105047630B (zh) * 2015-07-08 2018-05-22 华进半导体封装先导技术研发中心有限公司 芯片后组装有源埋入封装结构及其生产工艺
CN106470526A (zh) * 2015-08-18 2017-03-01 宏启胜精密电子(秦皇岛)有限公司 电感结构、柔性电路板及其制作方法
CN208338048U (zh) * 2016-01-07 2019-01-04 株式会社村田制作所 多层基板
JP2017123459A (ja) * 2016-01-08 2017-07-13 サムソン エレクトロ−メカニックス カンパニーリミテッド． プリント回路基板
KR102493463B1 (ko) * 2016-01-18 2023-01-30 삼성전자 주식회사 인쇄회로기판, 이를 가지는 반도체 패키지, 및 인쇄회로기판의 제조 방법
CN107295747B (zh) * 2016-03-31 2021-03-12 奥特斯(中国)有限公司 器件载体及制造器件载体的方法
JP2017195261A (ja) * 2016-04-20 2017-10-26 イビデン株式会社 インターポーザ及びインターポーザの製造方法
CN106332447B (zh) * 2016-08-31 2018-09-21 电子科技大学 一种用于印制电路板埋嵌技术的电感结构及其制作方法
CN106848519B (zh) * 2017-01-17 2020-11-17 电子科技大学 一种人工复合介质填充的介质集成悬置线
EP3478033A1 (en) * 2017-10-25 2019-05-01 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Embedding component with pre-connected pillar in component carrier
KR101963293B1 (ko) * 2017-11-01 2019-03-28 삼성전기주식회사 팬-아웃 반도체 패키지
EP3483929B1 (en) * 2017-11-08 2022-04-20 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with electrically conductive and insulating layers and a component embedded therein and manufacturing method thereof
CN207491318U (zh) * 2017-12-08 2018-06-12 中国电子科技集团公司第三十研究所 一种基于埋容材料的板级电源分配网络
JP2019117910A (ja) * 2017-12-27 2019-07-18 イビデン株式会社 プリント配線板
CN207783281U (zh) * 2018-02-27 2018-08-28 浙江万正电子科技有限公司 埋平面电阻聚酰亚胺多层线路板
CN109195327A (zh) * 2018-08-20 2019-01-11 深圳崇达多层线路板有限公司 一种解决埋磁位表面凹坑及分层爆板的方法
EP3633721A1 (en) * 2018-10-04 2020-04-08 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with face-up and face-down embedded components
US10879575B2 (en) * 2018-10-04 2020-12-29 International Business Machines Corporation Embedded filtering in PCB integrated ultra high speed dielectric waveguides using photonic band gap structures
CN109257874A (zh) * 2018-11-16 2019-01-22 深圳市和美精艺科技有限公司 一种在pcb板制作过程中芯片埋入的方法及其结构
CN111564414B (zh) * 2019-12-12 2021-09-24 奥特斯(中国)有限公司 部件承载件及制造部件承载件的方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101616541A (zh) * 2008-06-24 2009-12-30 华为技术有限公司 印制电路板及其制造方法、相关设备
US20130027896A1 (en) * 2011-07-29 2013-01-31 Samsung Electro-Mechanics Co., Ltd. Electronic component embedded printed circuit board and method of manufacturing the same
CN104902682A (zh) * 2014-03-05 2015-09-09 新光电气工业株式会社 配线基板及配线基板的制造方法
CN108347820A (zh) * 2017-01-25 2018-07-31 奥特斯(中国)有限公司 容纳部件的基底结构上的高导热涂层
CN211045436U (zh) * 2019-07-07 2020-07-17 深南电路股份有限公司 线路板
CN211580313U (zh) * 2019-07-07 2020-09-25 深南电路股份有限公司 线路板

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