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  • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

• the present invention relates to a semiconductor light emitting device having a double hetero structure in which a first conductivity type layer, an active layer, and a second conductivity type layer are stacked, and a method for manufacturing the same.
• the present invention relates to a light emitting region using a crystal layer made of a nitride semiconductor. And a method for manufacturing the same.
• a low-temperature buffer layer and an n-side contact layer made of GaN doped with Si have been formed on the entire surface of a sapphire substrate, and a GaN doped with Si has been formed thereon.
• An element in which a p-side contact layer and the like are stacked is known. Blue and green LEDs (Light Emitting Diodes) including such a structure and having a wavelength of 450 nm to 530 nm are commercially produced.
• a sapphire substrate When growing gallium nitride, a sapphire substrate is often used. When growing gallium nitride crystal from a sapphire substrate, a sapphire substrate having a C-plane as a main surface is usually used, and the surface of a gallium nitride layer formed on the main surface also has a C-plane, and the substrate is inevitably used. The active layer formed on the plane parallel to the principal plane and the cladding layer sandwiching it also extend to the plane parallel to the C plane. As described above, in a semiconductor light emitting device having a structure in which respective crystal layers are stacked on the basis of the main surface of the substrate, the smoothness required for forming electrodes and the like is obtained by utilizing the smoothness of the main surface of the substrate.
• the technology of forming a low-temperature buffer layer on a substrate is one means for suppressing defects that occur in the crystal to be grown, and for the purpose of reducing crystal defects.
• the selective crystal growth in the lateral direction (ELO: epitaxial lateral overgrowth) is combined.
• Japanese Patent Application Laid-Open No. H10-321910 discloses a hexagonal column-like structure having a side surface composed of a (10-10) or (1-100) m plane perpendicular to the main surface of the substrate.
• a semiconductor light emitting device is disclosed in which a light emitting region extending perpendicular to a main surface of a substrate is formed in a hexagonal columnar structure portion.
• Japanese Patent Application Laid-Open No. 8-2555929 discloses that one conductive type layer made of a gallium nitride-based compound semiconductor is formed on a substrate, and a part of the one conductive type layer is covered with a mask. Also disclosed is a manufacturing method in which a p-electrode and an n-electrode are formed after a gallium nitride-based compound semiconductor layer including the other conductivity type layer is formed on an uncovered portion by selective growth.
• a film is formed by HVP E (Hydride Vapor Phase Epitaxy).
• HVP E Hydrophile Vapor Phase Epitaxy
• dry etching is performed so as to obtain a side surface composed of a (10-10) or (1-101) m plane.
• damage to the crystal plane cannot generally be avoided, and consequently, while suppressing threading dislocations from the substrate side, the characteristics of the crystal deteriorate due to dry etching.
• the number of processes increases accordingly. Resulting in.
• a sharp-pointed crystal layer surrounded by the (1-101) plane, that is, the S plane is formed (for example, see Japanese Patent No. (See Paragraph 009 of the specification of No. 3 0814), but the flat surface required for electrode formation is not obtained, and it is actively used as an electronic device or light emitting device. However, it is only used as an underlayer for the crystal structure from further selective growth.
• the number of bonds to nitrogen atoms on the C + surface is one from Ga. Nitrogen atoms are easily dissociated from the C + crystal plane, and the effective VZIII ratio cannot be increased. For this reason, a problem has arisen that the crystal quality for forming the light emitting element is not sufficient for achieving high performance.
• LED elements are applied as light sources for large displays such as projection display light sources, and it is important to increase the brightness, reliability and price of LED elements. It is a development item. There are two dominant factors in increasing the brightness of LED devices: internal quantum efficiency, which depends on the crystallinity of the active layer, and light extraction efficiency, which is the rate at which light is emitted outside the device after being converted to light.
• FIG. 1 shows a main structure of a typical light emitting region of a light emitting diode.
• the first conductive layer 401 and the second conductive layer 402 are formed so as to sandwich the active layer 400 formed of InGaN or the like, and the second conductive layer 402 is formed.
• a reflection film 403 also functioning as an electrode is formed on the side opposite to the active layer 400, and the interface between the reflection film 403 and the second conductive layer 402 is a reflection surface 404.
• Part of the light generated in the active layer 400 is directly emitted from the light extraction window 405 of the first conductive layer 401, but part of the light emitted to the second conductive layer 402 is reflected. The light is reflected by the surface 404 and goes to the light extraction window 405 side of the first conductive layer 401.
• the critical angle at the interface is determined depending on the refractive indices of the two material layers forming the interface, and light incident on the interface at an angle smaller than the critical angle is totally reflected at the interface.
• a light emitting diode that emits surface light as shown in FIG.
• light that has been totally reflected at an incident angle smaller than the critical angle must have total reflection of the reflection surface 404 between the light extraction windows 405. And cannot be extracted as valid output.
• FIG. 2 is a sectional view of an example of a surface-emitting type semiconductor light-emitting device.
• a sapphire substrate is used as a growth substrate 500, and a first conductive layer 501 made of, for example, a gallium nitride-based semiconductor layer is grown on the growth substrate 500, and the first conductive layer 501 is formed.
• An active layer 502 made of a gallium nitride-based semiconductor layer and a second conductive layer 503 are stacked thereon in parallel with the main surface of the substrate.
• the active layer 92 and the second conductive layer 503 are partially formed so that an opening 506 faces the bottom and the first conductive layer 501 faces the bottom.
• a first electrode 504 is formed so as to be connected to the first conductive layer 501, and is connected to the second conductive layer 503 on the second conductive layer 503.
• a second electrode 505 is formed.
• the size of the light emitting region is limited due to the requirement of optical design, and it is difficult to manufacture a device having a large light emitting region with high luminance.
• the active region in the device is limited due to the light extraction window required inside the device and the electrode arrangement for efficiently injecting current. Therefore, in actual devices, the current situation is to respond to higher brightness by injecting current over the standard value. As described above, when the current injection amount is increased, the problem that the reliability of the device is reduced occurs.
• reducing the element size of the light emitting diode can be expected to reduce the price by improving the yield.Therefore, it is particularly necessary to apply this method to a display in which light emitting diodes are arranged for each pixel. It is. However, since reducing the element size increases the load per unit area, it usually conflicts with the aforementioned high brightness and high reliability of the light emitting element.
• the electrode regions such as the electrodes 504 and 505 shown in FIG. Greatly limits the area in which can be formed.
• the region where the conductive layers 503 and 501 and the electrodes 505 and 504 are in contact with each other needs to be as large as possible so that the resistance does not increase.
• the size of the electrode is increased, the area from which light can be led out by surface light emission becomes narrower, and the light emission luminance decreases accordingly.
• the present invention can be manufactured with good crystallinity while suppressing threading dislocations from the substrate side and without increasing the number of processes.
• the purpose of the present invention is to provide a semiconductor light emitting device that can also perform the above.
• Another object of the present invention is to provide a method of manufacturing a semiconductor light emitting device which has good crystallinity and can be miniaturized without increasing the number of steps.
• the present invention enables a shape for efficiently extracting light to the outside to be formed in a fine region with good crystallinity, thereby improving the light extraction efficiency and improving the brightness of the semiconductor light emitting device and the semiconductor light emitting device.
• the purpose is to provide a manufacturing method.
• the present invention suppresses threading dislocations from the substrate side and the like. It is an object of the present invention to provide a semiconductor light emitting device having a structure which can be manufactured with good crystallinity without any increase in the process, and at the same time, a structure in which a step near an electrode is relaxed and deterioration of an active layer is prevented. It is another object of the present invention to provide a method for manufacturing a semiconductor light emitting device which has good crystallinity and can reduce a step near an electrode without preventing an increase in the number of steps and can prevent deterioration of an active layer. Still further, the present invention provides a semiconductor light emitting device having high luminance by maintaining the reliability of the device without imposing an excessive load on an active layer serving as a light emitting region and improving light extraction efficiency. Aim. Disclosure of the invention
• a first semiconductor light emitting device is a semiconductor light emitting device comprising: a substrate having a crystal layer having an inclined crystal plane inclined with respect to a main surface of the substrate, and extending in a plane parallel to the inclined crystal plane. It is characterized in that a first conductivity type layer, an active layer, and a second conductivity type layer are formed on the crystal layer.
• the crystal layer having a tilted crystal plane has, for example, a wurtzite type crystal structure and can be formed using a nitride semiconductor, and is further provided on an opening provided in a mask layer or on a substrate. It can be formed by selective growth from the underlying growth layer. In this case, the main surface of the substrate can be set to the C plane.
• an image forming apparatus or a lighting device in which each semiconductor light emitting element forms a pixel can be formed.
• a mask layer or a crystal seed layer having an opening is formed on a substrate; Selectively forming a crystal layer having a tilted crystal plane inclined by a first conductor extending in a plane parallel to the tilted crystal plane It is characterized in that an electric type layer, an active layer and a second conductive type layer are formed on the crystal layer.
• a crystal layer having an inclined crystal plane inclined with respect to the main surface of the substrate By forming a crystal layer having an inclined crystal plane inclined with respect to the main surface of the substrate, it is possible to suppress threading dislocations from the substrate, and to form an inclined crystal plane inclined with respect to the main surface of the substrate. Is a surface that is likely to appear due to selective growth, so that good crystals can be obtained without increasing the number of steps such as etching.
• the crystal layer is composed of gallium nitride (G a N)
• the number of pounds from nitrogen atoms to gallium atoms increases compared to the case where the crystal layer is formed using the C + plane. Therefore, it is possible to increase the effective V / III ratio. Therefore, an active layer can be formed in a high-quality crystal portion, and the performance of the semiconductor light-emitting device formed can be improved.
• a second semiconductor light-emitting device forms a crystal layer having an S plane or a plane substantially equivalent to the S plane inclined with respect to the main surface of the substrate on the substrate, and the S plane or A first conductive type layer, an active layer, and a second conductive type layer extending in a plane parallel to a plane substantially equivalent to the S plane are formed on the crystal layer.
• the S-plane or a plane substantially equivalent to the S-plane may be configured to form a crystal layer by forming a substantially hexagonal pyramid-shaped slope, and may further include a C + plane or the C + plane.
• the crystal layer may be formed such that a substantially equivalent surface constitutes the upper plane portion of the above-mentioned substantially hexagonal pyramid shape.
• the main surface of the substrate can be set to the C + plane.
• an image forming apparatus or a lighting device in which each semiconductor light emitting element forms a pixel can be configured from a structure in which a plurality of the above semiconductor light emitting elements are arranged.
• the method for manufacturing a semiconductor light emitting device of the present invention includes the steps of: Forming a mask layer having a portion, selectively forming an S-plane or a crystal layer having a plane substantially equivalent to the S-plane at an opening of the mask layer; A first conductivity type layer, an active layer, and a second conductivity type layer extending in a plane parallel to a plane equivalent to the above are formed on the crystal layer.
• the S plane which is grasped as the immature stage of selective crystal growth, and use the S plane as it is, using the first conductivity type layer, active layer, and second conductivity type layer.
• a third semiconductor light emitting device is a crystal growth layer formed by selective growth and having an inclined crystal plane inclined with respect to the main surface of the growth substrate, and a required current formed in the crystal growth layer. And an active layer that emits light when injected. A part of the light output from the active layer to the outside of the device is reflected by a reflecting surface extending substantially parallel to the inclined crystal plane.
• a crystal growth layer having an inclined crystal plane inclined with respect to a main surface of the growth substrate is formed on a growth substrate by selective growth, and It is characterized by forming an active layer and a reflecting surface extending substantially in parallel.
• the light generated in the active layer is a tilted crystal layer that is tilted with respect to the main surface of the growth substrate.
• the light is reflected by a reflecting surface extending almost in parallel to. Since the reflecting surface is almost parallel to the tilted crystal layer, it is inclined with respect to the main surface of the growth substrate. Even if the light is totally reflected in minutes, the light is reflected on the reflecting surface as it travels through the tilted crystal layer, and the light path is changed to make it easier to extract light to the outside.
• the tilted crystal layer that is tilted with respect to the growth substrate is formed in a self-forming manner, and particularly, fine processing such as etching is not required.
• a fourth semiconductor light-emitting device includes forming a first growth layer of a first conductivity type on a substrate, forming a mask layer on the first growth layer, and an opening provided in the mask layer.
• a second growth layer of the first conductivity type is formed by selectively growing the first growth layer from a first conductivity type cladding layer, an active layer, and a second conductivity type extending in a plane parallel to a crystal plane of the second growth layer.
• a part or the whole of the clad layer is formed so as to extend to a position above the mask layer around the opening.
• the first growth layer and the second growth layer have, for example, a wurtzite type crystal structure, and can be configured using a nitride semiconductor. Further, the crystal plane of the second growth layer can be an inclined plane inclined with respect to the main surface of the substrate. In this case, the main surface of the substrate can be set to the C plane.
• a first growth layer of a first conductivity type is formed on a substrate, a mask layer is formed on the first growth layer, and provided on the mask layer.
• a second growth layer of the first conductivity type is formed by selective growth from the opening, and the first conductivity type cladding layer, the active layer, and the second growth layer extend in a plane parallel to the crystal plane of the second growth layer. And the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer are formed so that the entire second growth layer is covered with the second conductivity type cladding layer.
• the first Forming a first growth layer of a conductivity type, forming a mask layer on the first growth layer, and selectively growing a second growth layer of the first conductivity type from an opening provided in the mask layer;
• the first conductive type clad layer, the active layer, and the second conductive type clad layer extending in a plane parallel to the crystal plane of the second growth layer are formed so as to be in direct contact with the mask layer.
• the method is characterized in that the first conductivity type clad layer, the active layer, and the second conductivity type clad layer are formed.
• an image forming apparatus or a lighting device in which each semiconductor light emitting element forms a pixel can be formed.
• a mask layer having an opening is formed on a first growth layer laminated on a substrate, and a second growth layer is selectively formed from the opening of the mask layer.
• a first conductivity type cladding layer, an active layer, and a second conductive type so as to extend in a plane parallel to a crystal plane of the second growth layer and to extend over a mask layer around the opening.
• a conductive clad layer is formed.
• the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer By extending the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer extending in a plane parallel to the crystal plane of the second growth layer up to the mask layer around the opening,
• the mask layer exists between the substrate and the first growth layer, and the mask layer around the opening is formed between the portion composed of the 1-conductivity-type clad layer, the active layer, and the second-conductivity-type clad layer.
• the step is alleviated, and the precision when the next electrode or the like is finely processed can be increased.
• by selectively growing the second growth layer it is possible to easily form an inclined crystal plane inclined with respect to the main surface of the substrate, suppress threading dislocations from the substrate, and increase the number of processes such as etching. Good crystals can be obtained without inviting.
• the fifth semiconductor light-emitting device of the present invention is formed between a first conductive layer and a second conductive layer.
• the semiconductor device has an active layer that extends not parallel to the main surface of the growth substrate by selective growth, and the area of the active layer is larger than the area of the window region used for the selective growth on the growth substrate.
• the mapping area is larger than a mapping area when the crystal growth layer grown by the selective growth is projected in the normal direction of the growth substrate.
• the area of the active layer is such that the electrode is in contact with at least one of the conductive layer and the mapping area when the crystal growth layer grown by the selective growth is projected in the normal direction of the growth substrate. It can be greater than or equal to the sum of the areas.
• the active layer is sandwiched between the first conductive layer and the second conductive layer, and a current is injected through the first conductive layer and the second conductive layer to emit light.
• a current is injected through the first conductive layer and the second conductive layer to emit light.
• FIG. 1 is a cross-sectional view showing a structural example of a semiconductor light-emitting element
• FIG. 2 is a cross-sectional view showing another structural example of a semiconductor light-emitting element
• FIG. FIG. 4 is a view showing a mask forming step in the manufacturing process.
• FIG. 4 is a sectional view of the manufacturing step (A), a perspective view of the manufacturing step (B), and
• FIGS. 5A and 5B are cross-sectional views showing a manufacturing process of the GaN layer of FIG. 5A, a manufacturing process perspective view (B), and
• FIG. FIG. 3 is a view showing a window opening step for crystal growth in FIG.
• FIG. 6 (A) is a perspective view of a manufacturing process
• FIG. 6 (B) is a view showing a process of forming an active layer and the like in a manufacturing process of the semiconductor light emitting device according to the first embodiment of the present invention
• FIG. FIG. 7 (A) is a perspective view showing a manufacturing process
• FIG. 7 (B) is a view showing an electrode forming process in the manufacturing process of the semiconductor light emitting device according to the first embodiment of the present invention
• FIG. FIGS. 8A and 8B are process perspective views (B) and FIGS. 8A and 8B are diagrams showing a process of separating the elements in the manufacturing process of the semiconductor light emitting device according to the first embodiment of the present invention.
• Perspective view (B) FIG.
• FIG. 9 is a cross-sectional view showing the structure of the semiconductor light emitting device of Embodiment 1 of the present invention
• FIG. 10 is a mask formation in the manufacturing process of the semiconductor light emitting device of Embodiment 2 of the present invention.
• FIG. 11 is a view showing a process, in which a cross-sectional view of the manufacturing process (A) and a perspective view of the manufacturing process (B) are shown in FIG.
• FIG. 13 is a view showing a selective removal step in a manufacturing process of the semiconductor light emitting device of Example 2, wherein a manufacturing process sectional view (A), a manufacturing process perspective view (B), and FIG. FIG.
• FIG. 3 is a view showing a process of forming a crystal layer in a manufacturing process of a semiconductor light emitting device, wherein a manufacturing process sectional view (A), a manufacturing process perspective view (B), and FIG. 13 are semiconductor light emitting devices according to a second embodiment of the present invention.
• FIG. 14 is a view showing a process of forming an active layer in a device manufacturing process.
• FIG. 14 is a sectional view of the manufacturing process (A), a perspective view of the manufacturing process (B), and
• FIG. 3 is a diagram showing a process of forming an electrode in a manufacturing process
• FIG. 15 is a sectional view of the manufacturing process (A), a perspective view of the manufacturing process (B), and FIG. FIG.
• FIG. 4 is a view showing a process of separating the elements, and is a sectional view of the manufacturing process (A) and a perspective view of the manufacturing process.
• FIG. 16 is a cross-sectional view of the semiconductor light emitting device according to the second embodiment of the present invention
• FIG. 17 is a modified example in the step of separating the semiconductor light emitting device according to the second embodiment of the present invention.
• FIG. 18 is a cross-sectional view of a manufacturing process (A) and a perspective view of a manufacturing process (B)
• FIG. FIG. 6 is a view showing a mask forming step in the manufacturing process, and is a cross-sectional view of the manufacturing process.
• FIG. 20 is a view showing a process of forming an active layer in the manufacturing process of the semiconductor light emitting device according to the third embodiment of the present invention.
• FIG. 21 is a perspective view of a manufacturing process (B), and FIG. 21 is a diagram showing a process of forming an electrode in a manufacturing process of a semiconductor light emitting device according to a third embodiment of the present invention.
• FIG. 22 is a view showing an element separation step in the manufacturing process of the semiconductor light emitting element according to the third embodiment of the present invention, in which the manufacturing process cross-sectional view (A) and the manufacturing process perspective view (B
• FIG. 23 is a cross-sectional view of a semiconductor light emitting device according to a third embodiment of the present invention
• FIG. FIG. 25 is a cross-sectional view of the manufacturing process (A), a perspective view of the manufacturing process (B)
• FIG. FIG. 26 is a cross-sectional view of a manufacturing process (A), a perspective view of a manufacturing process (B)
• FIG. FIG. 27 is a sectional view of the manufacturing process (A) and a perspective view of the manufacturing process (B).
• FIG. 4 is a view showing a process of forming an electrode in a manufacturing process
• FIG. 28 is a sectional view of a manufacturing process (A), a perspective view of a manufacturing process (B)
• FIGS. 9A and 9B are cross-sectional views of a semiconductor light emitting device according to a fourth embodiment of the present invention, showing a manufacturing process cross-sectional view (A), a manufacturing process perspective view (B), and
• FIG. 30 is a diagram showing an electrode forming process in the manufacturing process of the semiconductor light emitting device according to the fifth embodiment of the present invention, wherein the manufacturing process sectional view (A), the manufacturing process perspective view (B),
• FIG. 1 shows a semiconductor light emitting device according to a fifth embodiment of the present invention.
• FIG. 6 is a view showing a separation step of the element in the manufacturing process, and is a cross-sectional view of the manufacturing process.
• FIG. 32 is a cross-sectional view of a semiconductor light emitting device of Example 5 of the present invention
• FIG. 33 is a view of a semiconductor light emitting device of Example 6 of the present invention.
• FIG. 7 is a view showing a process of forming a P electrode in a manufacturing process, wherein a manufacturing process cross-sectional view (A), a manufacturing process perspective view (B), and FIG. 34 show a manufacturing process of a semiconductor light emitting device according to a sixth embodiment of the present invention.
• FIGS. 4A and 4B are cross-sectional views showing a manufacturing process of the semiconductor light emitting device according to the sixth embodiment of the present invention.
• FIGS. 36A and 36B are cross-sectional views of a manufacturing process
• FIGS. 36A and 36B are views showing another forming process of an n-electrode.
• FIGS. Is a schematic cross-sectional view showing a laser ablation process
• FIG. 36B is a schematic cross-sectional view showing an RIE process
• FIG. 37 is a schematic cross-sectional view
• FIG. 37 is a cross-sectional view of a semiconductor light-emitting device of Example 6 of the present invention
• FIG. 38 is a rear perspective view of another structure of the semiconductor light-emitting device of Example 6 of the present invention
• FIG. 39 is a diagram showing a process of forming a transparent electrode in a manufacturing process of a modified example of the semiconductor light emitting device according to the sixth embodiment of the present invention.
• FIG. 40 is a cross-sectional view of a modified example of the semiconductor light emitting device of Embodiment 6 of the present invention
• FIG. 41 is a mask forming step in the manufacturing process of the semiconductor light emitting device of Embodiment 7 of the present invention.
• FIGS. 4A and 4B are sectional views of a manufacturing process (A) and a perspective view of a manufacturing process (B), and FIG.
• FIG. 42 shows a process of forming an active layer in a manufacturing process of a semiconductor light emitting device according to a seventh embodiment of the present invention.
• FIG. 4 is a cross-sectional view of the manufacturing process (A), a perspective view of the manufacturing process (B), and
• FIG. 14 is a view showing a step of forming an electrode in a manufacturing process of the semiconductor light emitting device of Example 7, wherein a sectional view of the manufacturing process (A), a perspective view of the manufacturing process (B), and
• FIG. 45 is a cross-sectional view of the semiconductor light emitting device of the present invention.
• FIG. 45 is a view showing a mask forming step in the manufacturing process of the semiconductor light emitting device of the eighth embodiment of the present invention.
• FIG. 46 is a cross-sectional view of a manufacturing process (A) and a perspective view of a manufacturing process (B), and FIG. 46 is a diagram showing a process of forming a crystal layer in the manufacturing process of the semiconductor light emitting device according to the eighth embodiment of the present invention.
• FIG. 47 is a cross-sectional view of a manufacturing process (A), a perspective view of a manufacturing process (B), and FIG. 47 showing a process of forming an active layer in a manufacturing process of a semiconductor light emitting device according to an eighth embodiment of the present invention.
• FIG. 48 is a cross-sectional view of a manufacturing process, FIG. 48 is a perspective view of a manufacturing process, and FIG.
• FIG. 48 is a diagram showing a process of forming an electrode in a manufacturing process of a semiconductor light emitting device according to an eighth embodiment of the present invention.
• FIG. 49 is a sectional view (A), a manufacturing process perspective view (B), and FIG. 49 are views showing an element separation process in the manufacturing process of the semiconductor light emitting device according to the eighth embodiment of the present invention.
• FIG. (A), a perspective view of a manufacturing process (B), and FIG. 50 are cross-sectional views of a semiconductor light emitting device according to an eighth embodiment of the present invention.
• FIG. 51 is a view showing an electrode forming step in a manufacturing process of a modified example of the semiconductor light emitting device according to the eighth embodiment of the present invention, wherein a manufacturing process sectional view (A) and a manufacturing process perspective view (B) are shown.
• FIG. 52 is a cross-sectional view of a modified example of the semiconductor light emitting device according to the eighth embodiment of the present invention.
• FIG. 53 is a diagram illustrating an electrode forming step in a manufacturing process of the semiconductor light emitting device according to the ninth embodiment of the present invention.
• FIG. 54 is a partial cross-sectional view of a manufacturing process (A) and a perspective view of a manufacturing process (B), and FIG.
• FIG. 54 is a partial perspective view of an apparatus using the semiconductor light emitting device of Embodiment 10 of the present invention.
• FIG. 56 is a cross-sectional view showing a structure of a semiconductor light emitting device of Example 11 of the present invention.
• FIG. 56 is a view showing an area W 1 of a window region for the semiconductor light emitting device of Example 11 of the present invention.
• FIG. 57 is a cross-sectional view of an element of the semiconductor light emitting element of Example 11 of the present invention.
• FIG. 58 is a perspective view showing the structure of a semiconductor light-emitting device having a stripe-shaped crystal growth layer of Example 12 of the present invention, and FIG.
• Example 13 A perspective view showing a structure of a semiconductor light emitting device in which a rectangular trapezoidal crystal growth layer is formed.
• FIG. 60 shows a trapezoidal pyramidal crystal growth layer of Example 14 of the present invention.
• Perspective view showing the structure of the formed semiconductor light emitting device FIG. 61 is a perspective view showing a structure of a semiconductor light emitting device having a hexagonal pyramid-shaped crystal growth layer of Example 15 of the present invention.
• FIG. 62 is a perspective view of Example 16 of the present invention.
• FIG. 63 is a perspective view showing the structure of a semiconductor light emitting device in which a hexagonal pyramid-shaped crystal growth layer is formed.
• FIG. 64 is a manufacturing process perspective view showing a step of forming a window region in the manufacturing process of the semiconductor light emitting device of Example 17 of the present invention.
• FIG. FIG. 66 is a perspective view showing a manufacturing process of a semiconductor light emitting device according to Example 17 of the present invention.
• FIG. 67 is a perspective view of a manufacturing process showing a layer forming process.
• FIG. 68 is a perspective view of a manufacturing step showing a step of forming a contact region in a step of manufacturing an optical element.
• FIG. 68 is a perspective view of a manufacturing step showing a step of forming an electrode in the step of manufacturing a semiconductor light-emitting element according to Example 17 of the present invention.
• FIG. 69 is a cross-sectional view of the semiconductor light-emitting device of Example 18 of the present invention.
• FIG. 70 is a cross-sectional view showing the structure of the semiconductor light-emitting device of Example 19 of the present invention. Is a sectional view of a principal part of the semiconductor light emitting device of Example 19 of the present invention, and
• FIG. 72 is a model of a crystal growth layer serving as a basis for calculation of the semiconductor light emitting device of Example of the present invention.
• FIG. 73 is a perspective view
• FIG. 73 is a view showing a model for calculating the angle dependency in the calculation for the semiconductor light emitting device of the embodiment of the present invention
• FIG. 74 is light extraction efficiency as a result of the above calculation.
• FIG. 75 shows the angle dependence of Fig. 76 is a diagram showing a model for calculating the height dependency in the calculation for the semiconductor light emitting device of the light emitting embodiment
• Fig. 76 is a diagram showing the height dependency of the light extraction efficiency as a result of the above calculation.
• FIG. 77 is a perspective view showing a structure of a semiconductor light emitting device having a stripe-shaped crystal growth layer of Example 20 of the present invention
• FIG. 78 is a view showing the length of Example 21 of the present invention. Forming a rectangular crystal growth layer
• FIG. 79 is a perspective view showing a structure of a semiconductor light emitting device, FIG.
• FIG. 79 is a perspective view showing a structure of a semiconductor light emitting device having a frustum of a quadrangular pyramid formed in Example 22 of the present invention
• FIG. FIG. 81 is a perspective view showing a structure of a semiconductor light-emitting device having a hexagonal pyramid-shaped crystal growth layer of Example 23 of the present invention
• FIG. FIG. 82 is a perspective view showing a structure of a semiconductor light emitting device having a layer formed thereon.
• FIG. FIG. 83 is a perspective view showing the structure of the device.
• FIG. 83 is a perspective view of a manufacturing process showing a step of forming a base growth layer in the process of manufacturing the semiconductor light emitting device of Example 25 of the present invention.
• FIG. 8 is a perspective view of a manufacturing process showing a step of forming a window region in the manufacturing process of the semiconductor light emitting device of Example 25 of the present invention
• FIG. 5 is a manufacturing process perspective view showing a step of forming a crystal growth layer in the manufacturing process of the semiconductor light emitting device of Example 25 of the present invention.
• FIG. 86 is a view of the semiconductor light emitting device of Example 25 of the present invention.
• FIG. 87 is a manufacturing process perspective view showing a step of forming a second conductive layer in a manufacturing process.
• FIG. 87 is a manufacturing process perspective view showing a step of forming a contact region in the manufacturing process of the semiconductor light emitting device of Example 25 of the present invention.
• FIG. 88 is a perspective view of a manufacturing process showing an electrode forming process in the manufacturing process of the semiconductor light emitting device of Example 25 of the present invention.
• FIG. 89 is a cross-sectional view of the semiconductor light emitting device of Example 26 of the present invention.
• the first semiconductor light-emitting device of the present invention forms a crystal layer having an inclined crystal plane inclined with respect to a main surface of the substrate on a substrate, and the crystal layer is formed in parallel with the inclined crystal plane.
• a first conductivity type layer, an active layer, and a second conductivity type layer extending in a uniform plane are formed on the crystal layer.
• the substrate used in the present invention is not particularly limited as long as it can form a crystal layer having an inclined crystal plane inclined with respect to the main surface of the substrate, and various substrates can be used.
• a substrate including 6 H, 4 H, 3 C .
• Sapphire A 1 2 ⁇ 3, A-plane, R-plane, including the C-plane.
• a sapphire substrate having a C-plane as a main surface which is widely used when growing a gallium nitride (GaN) -based compound semiconductor material, can be used.
• the C plane as the main surface of the substrate includes a plane orientation inclined in the range of 5 to 6 degrees.
• the substrate itself may have a structure that is not included in the light emitting device as a product, and may be a structure used to hold the device portion during manufacturing and removed before completion.
• the crystal layer formed on the substrate has an inclined crystal plane inclined with respect to the main surface of the substrate.
• This crystal layer is a material layer capable of forming a light emitting region composed of a first conductivity type layer, an active layer, and a second conductivity type layer on a plane parallel to a tilted crystal plane inclined with respect to a main surface of a substrate described later.
• a crystal structure of a wurtzite type there is no particular limitation as long as it has a crystal structure of a wurtzite type.
• a group III compound semiconductor, a BeMgZnCdS compound semiconductor, or a BeMgZnCdO compound semiconductor can be used.
• G aN aluminum nitride (A 1 N) -based compound semiconductors, indium nitride (InN) -based compound semiconductors, indium gallium nitride (I n G aN) -based compound semiconductors,
• An aluminum gallium nitride (AlGaN) -based compound semiconductor can be preferably formed, and a nitride semiconductor such as a gallium nitride-based compound semiconductor is particularly preferable.
• InGaN, AlGaN, GaN, etc. do not necessarily refer to a nitride semiconductor consisting of only a ternary mixed crystal or only a binary mixed crystal.
• a plane substantially equivalent to the S plane or the (111-222) plane is defined as a plane orientation inclined at 5 to 6 degrees with respect to the S plane or the (111-222) plane, respectively.
• a metal organic compound vapor phase growth method MOCVD (MOVP E) method
• MBE method molecular beam epitaxy method
• a vapor phase growth method or a hydride vapor phase growth method HVPE method
• TMG trimethylgallium
• TEG triethylgallium
• TMA trimethylaluminum aluminum
• TEA triethylaluminum
• TM is used as the In source.
• Alkyl metal compounds such as l (trimethylindium) and TEI (triethylindium) are often used, and gases such as ammonia and hydrazine are used as nitrogen sources.
• the impurity source is silane gas for Si, germane gas for Ge, Cp 2Mg (cyclopentagenenylmagnesium) for Mg, and 0 £ 2 (Jetyl zinc) for ⁇ ⁇ ⁇ 11.
• gases are used.
• these gases are supplied to the surface of a substrate heated to, for example, 600 ° C. or higher, and the gases are decomposed to form an InA1GaN-based compound semiconductor. Epitaxial growth is possible.
• the base growth layer is made of, for example, a gallium nitride layer / aluminum nitride layer, and the base growth layer includes a low-temperature buffer layer and a high-temperature buffer layer. Or a structure composed of a combination of a buffer layer and a crystal seed layer functioning as a crystal seed.
• This underlying growth layer can be formed by various vapor phase epitaxy methods like the crystal layer, such as metal organic compound vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), hydride vapor phase epitaxy A vapor phase growth method such as the HVPE method can be used.
• MOVPE metal organic compound vapor phase epitaxy
• MBE molecular beam epitaxy
• hydride vapor phase epitaxy A vapor phase growth method such as the HVPE method can be used.
• the buffer layer also has the purpose of reducing lattice mismatch between the substrate and the nitride semiconductor.
• the buffer layer may not be formed in some cases.
• a buffer layer may be formed on SiC without lowering the temperature of A1N, and a buffer layer may be grown on the Si substrate without lowering the temperature of AlN and GaN. Yes, and still form good quality GaN.
• a structure in which a buffer layer is not particularly provided may be used, and a GaN substrate may be used.
• a selective growth method can be used to form an inclined crystal plane inclined with respect to the main surface of the substrate.
• the tilted crystal plane inclined with respect to the main surface of the substrate depends on the selection of the main surface of the substrate.
• the (1 1 1 1 0) plane [M plane] the (1 1 1 0 1) plane [S plane], ( 1 1-2 0) plane [A plane], (1-101 2) plane [R plane], (1-1 2 3) plane [N plane], (1 1-2 2) plane and equivalents
• An inclined crystal plane selected from among various crystal planes can be cited, and it is particularly preferable to use an S plane, a (111-22) plane, and a crystal plane equivalent thereto.
• the crystal planes equivalent to these include plane planes tilted in the range of 5 to 6 degrees.
• the S plane is a stable plane that can be seen when grown selectively on the C + plane, and is relatively easy to obtain, with a hexagonal plane index of (1-101).
• the C + and C_ planes on the C plane the S + plane and the S + plane exist on the S plane, but in this specification, unless otherwise specified, the C + plane on the G + N
• the S + plane is growing and is described as the S plane.
• the S + plane is the stable plane.
• the plane index of the C + plane is (0 0 1).
• the S-plane when the crystal layer is formed of a gallium nitride-based compound semiconductor as described above, the number of pounds from Ga to N on the S-plane is 2 or 3, which is the second largest after the C-plane.
• the C-side is virtually unobtainable above the C + -side, so the S-side has the most pounds.
• the surface of the wurtzite-type nitride when a nitride is grown on a sapphire substrate having a C-plane as the main surface, the surface of the wurtzite-type nitride generally becomes a C + plane, but the S-plane can be formed by using selective growth.
• the bond of N tends to be detached on the plane parallel to the C plane.
• the bond of N is bonded with one pound from G a, while the bond on the inclined S plane is bonded with at least one pound or more. become. Therefore, the V / III ratio is effectively increased, which is advantageous for improving the crystallinity of the laminated structure. Also, if the crystal grows in a different direction from the substrate, the dislocations extending upward from the substrate may bend, which is also advantageous for reducing defects.
• the crystal layer is formed on the main surface of the substrate.
• the crystal layer has a structure having an inclined crystal plane
• the crystal layer may have a structure in which an S-plane or a plane substantially equivalent to the S-plane constitutes a substantially hexagonal pyramid-shaped slope.
• the S-plane or a plane substantially equivalent to the S-plane constitutes a substantially hexagonal truncated pyramid-shaped slope, respectively, and the C-plane or a plane substantially equivalent to the C-plane has the above substantially hexagonal pyramid-shaped slope.
• the structure constituting the upper plane portion may be a so-called substantially hexagonal truncated pyramid shape.
• substantially hexagonal pyramids and truncated hexagonal pyramids do not need to be exactly hexagonal pyramids, but also include those in which some faces have disappeared.
• the inclined crystal planes are arranged so as to be substantially symmetrical on six sides. Substantially symmetric includes not only the case where the shape is completely symmetric but also the case where the shape is slightly deviated from the symmetric shape. Also, the ridge line between the crystal planes of the crystal layer is not necessarily a straight line. Further, the substantially hexagonal pyramid shape or the substantially hexagonal truncated pyramid shape may be a shape extended linearly.
• such selective growth is performed by utilizing selective removal of a part of the underlying growth layer, or selectively on the underlying growth layer or the underlying growth layer. This is performed by using an opened portion of the mask layer formed before the formation of the growth layer.
• the undergrowth layer is composed of a buffer layer and a crystal seed layer
• the crystal seed layer on the buffer layer is subdivided into small areas having a diameter of about 10 m, and S is grown by crystal growth from each part. It is possible to form a crystal layer having a plane or the like.
• the subdivided crystal seed layers can be arranged so as to be separated in anticipation of a magazine for separation as a light-emitting element, and individual small regions include a band, a lattice, a circle,
• the shape can be square, hexagonal, triangular, rectangular, rhomboid, or a modified form thereof.
• Selective growth is also possible by forming a mask layer on the underlying growth layer and selectively opening the mask layer to form a window region.
• the mask layer can be composed of, for example, a silicon oxide layer or a silicon nitride layer.
• the shape of the truncated hexagonal pyramid or the shape of the approximately hexagonal pyramid may be a band-shaped window area of the mask layer. This is possible by making the crystal seed layer into a band shape. Using selective growth, the window area of the mask layer is made into a circular shape of about 10 m (or a hexagon with sides of 110 to 100 directions, or a hexagon with sides of 110 to 100 directions). It can be easily fabricated up to about twice the selective growth area. Also, if the S-plane is in a different direction from the substrate, it has the effect of bending dislocations and blocking the dislocations, which is useful for reducing the dislocation density.
• the growth surface of the Mg-doped layer generally has a poor surface condition at the AFM level, but the growth of the S-plane also grows the Mg-doped layer in a good surface condition, and the doping conditions are quite different. know.
• measurement can be performed with a resolution of about 0.5 to 1 ⁇ .
• unevenness of about 1 m pitch exists. Uniform results were obtained for the samples with S-planes obtained by selective growth.
• the flatness of the slope as seen by SEM is smoother than that of the C + plane.
• a first conductivity type layer, an active layer, and a second conductivity type layer extending in a plane parallel to an inclined crystal plane inclined with respect to a main surface of a substrate are formed in a crystal layer.
• the first conductivity type is a p-type or n-type cladding layer
• the second conductivity type is the opposite conductivity type.
• the n-type cladding layer is composed of a silicon-doped gallium nitride-based compound semiconductor layer, and an In A GaN layer is formed as an active layer, and a magnesium-doped gallium oxide-based compound semiconductor layer is formed thereon as a P-type cladding layer to form a double hetero structure. It is also possible to adopt a structure in which the InGaN layer, which is the active layer, is sandwiched between A1Gan layers.
• the active layer can be composed of a single bulk active layer, quantum wells such as a single quantum well (SQW) structure, a double quantum well (D QW) structure, and a multiple quantum well (MQW) structure can be used. It may have a well structure. In the quantum well structure, a barrier layer is used together to separate the quantum wells as necessary.
• the active layer is an InGaN layer
• the structure is easy to manufacture, especially in the manufacturing process, and the light emitting characteristics of the device can be improved.
• this InGaN layer is particularly easy to crystallize and grows in crystallinity particularly when grown on the S-plane, which has a structure in which nitrogen atoms are not easily desorbed, and can increase luminous efficiency.
• nitride semiconductors have the property of being n-type due to nitrogen vacancies formed in the crystal even in non-doped, but usually, donor impurities such as Si, Ge and Se are doped during crystal growth. By doing so, it is possible to obtain an n-type carrier with a favorable carrier concentration. Also, to make nitride semiconductors p-type However, it can be obtained by doping impurities such as Mg, Zn, C, Be, Ca, and Ba in the crystal.To obtain a p-layer with a high carrier concentration, After doping the sceptor with one impurity, it is preferable to perform annealing at 400 ° C.
• the first conductivity type layer, the active layer, and the second conductivity type layer extend in a plane parallel to the inclined crystal plane inclined with respect to the main surface of the substrate, but extend in such a plane. This can be easily performed by continuing crystal growth where the inclined crystal plane is formed.
• the crystal layer has a substantially hexagonal pyramid shape or a substantially truncated hexagonal shape, and each inclined crystal surface is an S-plane or the like, a light emitting region including the first conductivity type layer, the active layer, and the second conductivity type layer is formed.
• the first conductivity type layer, the active layer, and the second conductivity type layer can also be formed on the upper surface parallel to the main surface of the substrate.
• the first conductivity type layer, i.e., the cladding layer can be made of the same material and of the same conductivity type as the crystal layer constituting the S-plane. After forming the crystal layer constituting the S-plane, the concentration is continuously adjusted.
• a structure in which a part of the crystal layer constituting the S plane functions as a first conductivity type layer may be used. In addition, light extraction is improved when the plane is not perpendicular to the substrate.
• the luminous efficiency can be increased by utilizing the good crystallinity of the inclined crystal plane.
• the S-plane which has good crystallinity
• the S-plane has good incorporation of In and good crystallinity.
• the luminous efficiency can be increased.
• the area of the active layer extending in a plane substantially parallel to the S plane can be larger than the area of the active layer when projected onto the main surface of the substrate or the undergrowth layer.
• the state of the step becomes worse especially in the portion near the vertex of the S-plane, and the luminous efficiency is lower at the vertex.
• This is a hexagonal pyramid-shaped element, which is divided into four parts on the vertex side, the left side, the right side, and the bottom side around the center of each surface, and the top part has the most stepped state. This is because it is waving and abnormal growth tends to occur near the top.
• the two locations on the side sides are almost linear in steps, and the steps are densely packed, resulting in an extremely good growth state.
• the portion near the bottom is slightly wavy. However, abnormal growth has not occurred as much as the top.
• the semiconductor light emitting device of the present invention it is possible to control the current injection into the active layer so that the density is lower near the top than at the periphery.
• an electrode is formed on the side of the slope, but no electrode is formed at the apex, or an electrode is formed at the apex.
• a structure in which a current block region is formed before can be adopted.
• Electrodes are formed on the crystal layer and the second conductivity type layer, respectively.
• a contact layer may be formed, and then an electrode may be formed on the contact layer.
• these electrodes are formed by a vapor deposition method, short-circuits may occur if the P electrode and the n electrode are attached to both the crystal layer and the crystal seed layer formed under the mask. But Required.
• the semiconductor light emitting device of the present invention can be used to form an image display device or a lighting device by arranging a plurality of them.
• the S-plane can be used to reduce the electrode area, so that it can be used as a display with a small area.
• the semiconductor light emitting device is a semiconductor light emitting device, comprising: forming, on a substrate, an S plane inclined with respect to a main surface of the substrate or a crystal layer having a plane substantially equivalent to the S plane; A first conductivity type layer, an active layer, and a second conductivity type layer extending in a plane substantially parallel to a plane substantially equivalent to the above.
• the substrate to be used is not particularly limited as long as it can form an S plane described later or a crystal layer having an equivalent plane on the S plane, and various substrates can be used. The same one as exemplified in 1 can be used.
• the crystal layer formed on the substrate has an S plane inclined with respect to the main surface of the substrate or a plane substantially equivalent to the S plane.
• This crystal layer is a material layer capable of forming a light emitting region including a first conductivity type layer, an active layer, and a second conductivity type layer on a plane parallel to an S plane described later or a plane substantially equivalent to the S plane. Any material may be used as long as it is the same as that exemplified in the semiconductor light emitting device 1 described above.
• the method for growing the crystal layer and the underlying growth layer formed when growing the crystal layer are the same as those of the semiconductor light emitting device 1 described above.
• the plane substantially equivalent to the S plane includes a plane orientation inclined at an angle of 5 to 6 degrees with respect to the S plane.
• a selective growth method can be used to form an S plane or a plane substantially equivalent to the S plane.
• the S plane is a stable plane that can be seen when selectively grown on the C + plane, and is relatively easy to obtain.
• the hexagonal plane index is (1-101). Similar to the C + plane and the C — plane on the C plane, the S + plane and the S + plane exist on the S plane.
• the S + plane is growing on N, and this is described as the S plane.
• the crystal layer has a structure having at least an S plane or a plane substantially equivalent to the S plane.
• the crystal layer has a structure substantially corresponding to the S plane or the S plane.
• the surface equivalent to the above may be a structure each constituting a substantially hexagonal pyramid-shaped slope, or the S-plane or a plane substantially equivalent to the S-plane may constitute a substantially hexagonal pyramid-shaped slope, respectively.
• the C-plane or a plane substantially equivalent to the C-plane may be a structure forming the upper flat portion of the above-mentioned substantially truncated pyramid shape, that is, a so-called substantially truncated hexagonal pyramid shape.
• These approximately hexagonal pyramids and truncated hexagonal pyramids do not need to be exactly hexagonal pyramids, but also include those in which some surfaces have disappeared. Also, the ridges between the crystal planes of the crystal layer need not necessarily be straight lines. Further, the substantially hexagonal pyramid shape or the substantially hexagonal truncated pyramid shape may be a shape extended linearly.
• the specific selective growth method is the same as in the case of the semiconductor light emitting device 1 described above.
• a first conductivity type layer, an active layer, and a second conductivity type layer extending in a plane parallel to an S plane or a plane substantially equivalent to the S plane are formed in a crystal layer.
• the first conductivity type layer, the active layer, and the second conductivity type layer are as described in the section of the semiconductor light emitting device 1 above.
• the first conductivity type layer, the active layer, and the second conductivity type layer extend in a plane parallel to the S plane or a plane substantially equivalent to the S. plane. Extension can be easily performed by continuing crystal growth where the S-plane and the like are formed.
• the light emitting region including the first conductivity type layer, the active layer, and the second conductivity type layer is entirely or Form on some S-plane Can be.
• a substantially hexagonal truncated pyramid shape the case where the crystal layer has a substantially hexagonal pyramid shape or a substantially hexagonal truncated pyramid shape and each inclined surface is an S-plane or the like, the light emitting region including the first conductivity type layer, the active layer, and the second conductivity type layer is entirely or Form on some S-plane Can be.
• a substantially hexagonal truncated pyramid shape the case of a substantially hexagonal truncated pyramid shape
• a first conductivity type layer, an active layer, and a second conductivity type layer can be formed.
• the first conductivity type layer i.e., the cladding layer
• the first conductivity type layer can be made of the same material and of the same conductivity type as the crystal layer constituting the S-plane. After forming the crystal layer constituting the S-plane, the layer is formed while continuously adjusting the concentration.
• a structure in which a part of the crystal layer forming the S plane functions as a first conductivity type layer may be used.
• the luminous efficiency can be increased by utilizing the good crystallinity of the inclined S plane.
• the S-plane has good incorporation of In and good crystallinity, so that the luminous efficiency can be increased.
• the area of the active layer extending in a plane substantially parallel to the S plane can be larger than the area of the active layer when projected onto the main surface of the substrate or the underlying growth layer.
• the state of the step becomes worse especially in the portion near the apex of the S-plane, and the luminous efficiency is reduced at the apex.
• This is a hexagonal pyramid-shaped element, which is divided into four parts on the vertex side, the left side, the right side, and the bottom side around the center of each surface. This is because it is wavy and abnormal growth tends to occur near the top.
• the steps are almost straight, and the steps are densely packed. It is in a state, and the portion near the bottom is a slightly wavy step, but abnormal growth has not occurred as much as the top.
• the semiconductor light emitting device of the present invention it is possible to control the current injection into the active layer so that the density near the top is lower than that around the top.
• an electrode is formed on the side of the slope, but no electrode is formed at the apex, or an electrode is formed at the apex.
• a structure in which a current block region is formed beforehand can be employed. Electrodes are formed on the crystal layer and the second conductivity type layer, respectively. In order to reduce the contact resistance, a contact layer may be formed, and then an electrode may be formed on the contact layer.
• these electrodes are formed by a vapor deposition method, if the P electrode and the n electrode are attached to both the crystal layer and the crystal seed layer formed under the mask, they may be entangled with each other, and each of them is precisely deposited. It is necessary.
• the semiconductor light emitting device of the present invention can be used to form an image display device or a lighting device by arranging a plurality of them.
• the S-plane can be used to reduce the electrode area, so that it can be used as a display with a small area.
• a semiconductor light emitting device includes a crystal growth layer formed by selective growth and having a tilted crystal plane inclined with respect to a main surface of a substrate of a growth substrate; and a required current formed in the crystal growth layer and injected with a required current. And an active layer for generating light when the active layer is formed. A part of the light output from the active layer to the outside of the device is reflected by a reflecting surface extending substantially parallel to the inclined crystal plane.
• the basic configuration of the semiconductor light emitting device such as the substrate, the crystal layer, the selective growth method of the crystal layer, the first conductivity type layer, the active layer, and the second conductivity type layer, is the same as that of the semiconductor light emitting device 1 described above.
• the reflecting surface in the semiconductor light emitting device of the present invention is not particularly limited as a structure thereof, but effective reflection is possible even if there is substantially total reflection of light generated in the active layer or slight light transmission. Any aspect is fine.
• the reflecting surface extends at least partially substantially parallel to the inclined crystal plane.
• the expression that the reflecting surface is substantially parallel to the inclined crystal plane includes both the case where the reflecting surface is substantially parallel and the case where the reflecting surface extends with a slight inclination from a perfectly parallel surface.
• the reflecting surface may be a single surface, but may be two or more surfaces extending in parallel to the inclined crystal surface having a function of reflecting light generated in the active layer. In the normal direction of the inclined crystal plane 3.
• the crystal surface itself can be used as the reflection surface. If the crystal surface is used as the reflection surface, the scattering component is reduced, so that light can be extracted more efficiently.
• the crystal plane is used as a reflective surface, a structure in which a metal film is formed as an electrode after each semiconductor layer such as an active layer is formed. Can be.
• the active layer can be formed in the shape of the crystal growth layer by forming the active layer on the inclined crystal layer. Processing is not required for the formation of the reflective film.
• the reflective surface extending parallel to the inclined crystal plane may have a structure having at least two reflective surfaces facing each other at an angle smaller than 180 ° as an example.
• the at least two reflecting surfaces facing each other at an angle smaller than 180 ° may be two or more directly facing surfaces, and a reflecting surface or a crystal surface disposed at another angle between them.
• the surfaces may be opposed to each other.
• the hexagonal pyramids face each other at an angle of about 60 degrees at the apex.
• the crystal growth layer or the first conductive layer and the second conductive type layer have electrodes respectively. It is formed.
• a contact layer may be formed, and then an electrode may be formed on the contact layer.
• these electrodes are formed by a vapor deposition method, a short circuit may occur if the P electrode and the n electrode are attached to both the crystal layer and the crystal seed layer formed under the mask. It is necessary to deposit.
• electrodes may be formed on the first and second conductive layers, respectively.
• the direction of extracting light may be either front or back as necessary. It is also possible. That is, light can be extracted from the back side of the substrate regardless of the structure of the transparent substrate, and light can be extracted from the front side of either structure using the transparent electrode.
• One of the points of the semiconductor light emitting device of the present invention is that a part of the light taken out as an output is reflected by a reflecting surface extending in parallel with an inclined crystal plane formed by selective growth, Since the light extraction efficiency is improved by the reflection, the luminance of the semiconductor light emitting device can be increased.
• the inclined crystal plane serving as the base of the reflection surface is easily formed in the process by using selective growth, it can be obtained without any additional steps such as etching in a self-forming manner.
• Still another aspect of the semiconductor light emitting device of the present invention is that, when selective growth is used and the active layer is formed on a plane inclined with respect to the growth substrate, the area of the active layer can be increased. That is the point.
• the element size is limited, the larger the effective area of the active layer in the element, the smaller the current injection density per unit area required to obtain the same luminance. Therefore, a structure with a large effective area improves reliability to obtain the same brightness, and can improve brightness if the same load is applied to the active layer.
• the difference between the total area of the active layer and the area of the selective growth region occupying the growth substrate must be at least larger than the area required for contact with one electrode. For example, the active layer region limited by the contact region is compensated. Therefore, by using the semiconductor light emitting device of the present invention to form the active layer on the inclined crystal plane, even if the device size of the light emitting device is reduced as much as necessary, the structural load, that is, the current is concentrated. Such situations are reduced.
• an image display device or a lighting device can be configured by arranging a plurality of the semiconductor light emitting elements of the present invention. By arranging the elements for three primary colors and arranging them in a scannable manner, the electrode area can be reduced by using the S surface, so that it can be used as a display with a small area.
• ⁇ semiconductor light emitting device 4
• a first growth layer of a first conductivity type is formed on a substrate, a mask layer is formed on the first growth layer, and a first layer is formed from an opening provided in the mask layer.
• a first conductivity type second growth layer formed by selective growth, a first conductivity type cladding layer, an active layer, and a second conductivity type cladding extending in a plane parallel to a crystal plane of the second growth layer; A part or the whole of the layer is formed so as to extend over the mask layer around the opening.
• the substrate used in the present invention is not particularly limited as long as it can form a crystal layer having an inclined crystal plane inclined with respect to the main surface of the substrate. Can be used.
• the growth layer formed on the substrate includes a first growth layer disposed below the mask layer described below, and a second growth layer formed by growing from an opening of the mask layer.
• Both the first growth layer and the second growth layer are of the first conductivity type, and are not particularly limited, but the first conductivity type layer, the active layer, and the Any material layer can be used as long as it can form a light emitting region composed of the second conductivity type layer.
• a compound semiconductor material is used as a layer forming material for the first and second growth layers, and among them, a compound semiconductor material having a wurtzite type crystal structure is used. Is preferred.
• a group III compound semiconductor for example, a group III compound semiconductor, a BeMgZnCdS compound semiconductor, or a BeMgZnCd ⁇ compound semiconductor can be used.
• G aN) -based compound semiconductor aluminum nitride (A 1 N) -based compound semiconductor, indium nitride (InN) -based compound semiconductor, indium gallium nitride (I n G aN) -based compound semiconductor, aluminum gallium nitride (AlGaN)
• a compound semiconductor can be preferably formed, and a nitride semiconductor such as a gallium nitride compound semiconductor is particularly preferable.
• InGaN, A1GaN, GaN and the like do not necessarily refer to a nitride semiconductor consisting of only a ternary mixed crystal or only a binary mixed crystal. Needless to say, even if a small amount of A1 and other impurities are contained within a range that does not change the action of InGaN, the present invention is also within the scope of the present invention.
• a nitride is characterized by using any one of B, Al, Ga, In, and Ta for Group III and mainly using N for Group V. Things. However, in this specification, even a material whose band gap is reduced by using a small amount of As and P is included in the nitride.
• MOCVD metal organic compound vapor phase growth method
• MBE molecular beam epitaxy method
• a vapor phase growth method or a hydride vapor phase growth method (HVP E method) can be used.
• MOVPE method those with good crystallinity can be obtained quickly.
• TMG trimethylgallium
• TEG triethylgallium
• A1 source are TMA (trimethylaluminum), TEA (triethylaluminum), and
• In source are: TM l (trimethyl indium), TE I (triethyl indium), etc.
• Alkyl metal compounds are often used, and gases such as ammonia and hydrazine are used as nitrogen sources.
• the impurity source is silane gas for Si, germane gas for Ge, Cp2Mg (cyclopentyl genenylmagnesium) for Mg, and 0 £ 2 (Ge Gas such as til zinc is used.
• these gases are supplied to the surface of a substrate heated to, for example, 600 ° C. or more, and the gases are decomposed to form an InA1GaN compound semiconductor. Can be lengthened.
• the first growth layer is, for example, a gallium nitride layer / aluminum nitride layer, and the first growth layer is a combination of a low-temperature buffer layer and a high-temperature buffer layer or a combination of a buffer layer and a crystal seed layer functioning as a crystal seed.
• the structure may be composed of If the growth of the growth layer begins with the low temperature buffer layer, the problem is that polycrystals are more likely to precipitate on the mask. Therefore, by growing a surface different from the substrate on the crystal seed layer after including the crystal seed layer, a crystal having better crystallinity can be grown.
• the buffer layer also has the purpose of reducing lattice mismatch between the substrate and the nitride semiconductor. Therefore, when a substrate having a lattice constant close to that of the nitride semiconductor or a substrate having the same lattice constant is used, the buffer layer may not be formed.
• a buffer layer may be formed on SiC without lowering the temperature of A1N, and grown on the 31 substrate as a buffer layer without lowering the temperature of 811 ⁇ and GaN. And still obtain a good quality GaN layer.
• the buffer layer may have a structure that is not particularly provided. An N substrate may be used.
• the second growth layer is formed by selective growth, an inclined surface inclined with respect to the main surface of the substrate can be obtained. In general, it depends on the choice of the main surface of the substrate.
• the (001) surface [C surface] of the wurtzite type is used as the main surface of the substrate, the (111) surface [M surface] ], (1-10 1) plane [S plane], (11-20) plane [8 planes], (1-1 02.) plane [R plane], (1-1 2 3) plane [ N-plane], (11-22) plane and crystal planes equivalent to these planes can be formed. Particularly, S plane and (11-22) plane and equivalent planes can be formed. It is preferable to use a suitable crystal plane.
• these equivalent crystal planes include plane orientations inclined in the range of 5 to 6 degrees.
• the S plane is a stable plane that can be seen when selectively grown on the C + plane, and is a relatively easy-to-obtain plane with a (1, -1, 0, 1) plane in the hexagonal plane index.
• the S-plane Similar to the C + plane and the C-plane on the C-plane, the S-plane has the S + -plane and the S--plane, but in this specification, unless otherwise specified, the C + -plane and the G-N
• the S + plane is growing, and this is described as the S plane.
• the S + plane is the stable plane.
• the number of pounds from Ga to N on the S plane is 2 or 3 and the next largest number after the C plane.
• the C side is virtually unobtainable on the C + side, so the pounds on the S side are the largest.
• the surface of the wurtzite-type nitride generally becomes a C + plane, but the S-plane can be formed by using selective growth.
• the second growth layer can have a structure inclined with respect to the main surface of the substrate by selective growth.
• the second growth layer is formed on the S plane or the S plane.
• the substantially equivalent surface may be a structure forming a substantially hexagonal pyramid-shaped slope, or the S-plane or a plane substantially equivalent to the S-plane may be a substantially hexagonal pyramid-shaped slope, respectively.
• the C-plane or ⁇ substantially equivalent to the C-plane may be a structure forming the upper plane portion of the above-mentioned substantially frustum of a hexagonal pyramid, that is, a so-called substantially frustum of a hexagonal pyramid.
• substantially hexagonal pyramids and truncated hexagonal pyramids do not need to be exactly hexagonal pyramids, but also include those in which some faces have disappeared. Also, the ridge lines between the crystal planes of the crystal layer need not necessarily be straight lines. Further, the substantially hexagonal pyramid shape or the substantially hexagonal truncated pyramid shape may be a shape extended linearly.
• the selective growth is performed by using an open portion of a mask layer selectively formed on the first growth layer.
• the shape of the opening of the mask layer can be a circular shape, a square shape, a hexagonal shape, a triangular shape, a rectangular shape, a diamond shape, a band shape, a lattice shape, or a deformed shape thereof.
• the mask layer is made of, for example, an insulating material, and can be made of, for example, a silicon oxide layer or a silicon nitride layer.
• the thickness of the mask layer can be formed in the range of 0.1 to 5 ⁇ m, more preferably in the range of 0.1 to 1.0 / zm, for the purpose of reducing the step near the active layer and the electrode. It is.
• the truncated pyramid shape or the trapezoidal shape having one direction as the longitudinal direction is formed in the opening of the max layer (window region ) Can be made into a belt shape.
• the growth surface of the Mg-doped layer generally has a poor surface condition at the AFM level, but the growth of the S-plane also causes the Mg-doped layer to grow with a good surface condition, and that the doping conditions vary considerably. know.
• microphotoluminescence mapping it is possible to measure with a resolution of about 0.5-1.
• unevenness of about 1 pitch exists, and Uniform results were obtained for samples with S-plane.
• the flatness of the slope as seen by SEM is smoother than that of the C + plane.
• the semiconductor light emitting device of the present invention a first conductivity type clad layer, an active layer, and a second conductivity type clad layer extending in a plane parallel to the crystal plane of the second growth layer are formed in the second growth layer.
• the basic configurations of the first conductivity type layer, the active layer, and the second conductivity type layer are the same as those of the semiconductor light emitting device 1 described above.
• all or a part of the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer extend to the mask layer around the opening. Since the mask is not removed in this way, there is no loss of support at the lower part of the laterally grown portion, and if the entire mask layer is left, the step of the selective growth structure is reduced and laser irradiation is performed. Even if the substrate is peeled off, the n-electrode and p-electrode can be reliably separated while the mask layer functions as a support layer for the first growth layer, thereby preventing a short circuit.
• another semiconductor light emitting device of the present invention has a structure in which the entire first growth layer is covered with the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer.
• a structure can be easily configured because the second growth layer presents a crystal plane inclined by selective growth.
• the edges can be exposed to the air, but even the edges can be covered by using the inclined crystal plane.
• a structure in which each end of the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer is directly in contact with the mask layer can be provided.
• Such a structure can be easily formed because the second growth layer presents a crystal plane inclined by selective growth, and since each end directly contacts the mask layer to cover the active layer and the like, the active layer is formed. Oxidation of Such deterioration is prevented beforehand, and the effect of further increasing the light emitting area can be obtained.
• the luminous efficiency can be increased by utilizing the good crystallinity of the crystal plane.
• the S-plane when current is injected only into the S-plane, which has good crystallinity, the S-plane has high In-intake and good crystallinity, so that luminous efficiency can be increased.
• the area of the active layer extending in a plane substantially parallel to the S plane can be larger than the area of the active layer when projected onto the main surface of the substrate or the first growth layer. . By increasing the area of the active layer in this way, the light emitting area of the element increases, and the current density can be reduced by itself. In addition, increasing the area of the active layer helps to reduce luminance saturation, thereby increasing luminous efficiency.
• Electrodes are formed on the second growth layer and the second conductivity type cladding layer, respectively.
• a contact layer may be formed, and then an electrode may be formed on the contact layer.
• these electrodes are formed by a vapor deposition method, a short circuit may occur if the P electrode and the n electrode are in contact with both the layer and the first growth layer formed under the mask. It is necessary.
• the semiconductor light emitting device of the present invention can be used to form an image display device or a lighting device by arranging a plurality of them.
• the S-plane can be used to reduce the electrode area, so that it can be used as a display with a small area.
• the semiconductor light emitting device of the present invention has an active layer sandwiched between a first conductive layer and a second conductive layer and extending not parallel to the main surface of the growth substrate by selective growth, and the area of the active layer Is the window region used for the selective growth on the growth substrate. It is characterized in that it is larger than the area or larger than the mapping area when the crystal growth layer grown by the selective growth is projected in the normal direction of the growth substrate.
• the basic configuration of the semiconductor light emitting device such as the substrate, the crystal layer, the selective growth method of the crystal layer, the first conductivity type layer, the active layer, and the second conductivity type layer, is the same as that of the semiconductor light emitting device 1 described above.
• the basic element size is equal to the thickness of the crystal growth layer, that is, at most. ⁇ : About 50 microns is preferable, and the smaller the element size, the more effective.
• it can be applied to any size element as long as the one-dimensional or two-dimensional array of the basic structure is included in one element.
• the semiconductor light emitting device of the invention is effective.
• the semiconductor light emitting device of the present invention has an active layer having a structure sandwiched between a first conductive layer and a second conductive layer, and the active layer extends in a plane that is not parallel to the main surface of the growth substrate. Is done.
• the first conductivity type is a p-type or n-type cladding layer
• the second conductivity type is the opposite conductivity type.
• the n-type cladding layer is composed of a silicon-doped gallium nitride-based compound semiconductor layer, and an InGaN A layer can be formed as an active layer, and a magnesium-doped gallium nitride-based compound semiconductor layer can be formed thereon as a p-type cladding layer to form a double hetero structure. It is also possible to adopt a structure in which the InGaN layer, which is the active layer, is sandwiched between the AlGaN layers.
• the active layer can be composed of a single bulk active layer, It may have a quantum well structure such as a single quantum well (SQW) structure, a double quantum well (DQW) structure, or a multiple quantum well (MQW) structure.
• a barrier layer is also used in the quantum well structure to separate the quantum wells as necessary.
• the active layer is an InGaN layer
• the structure is easy to manufacture, especially in the manufacturing process, and the light emitting characteristics of the device can be improved.
• this InGaN layer is particularly easy to crystallize and grows in crystallinity when grown on the S-plane, which is a structure in which nitrogen atoms are not easily desorbed, so that luminous efficiency can be increased.
• nitride semiconductors have the property of being n-type due to mono-nitrogen vacancies that can be formed in the crystal even if they are not doped, usually doping with donor impurities such as Si, Ge, and Se during crystal growth is required.
• donor impurities such as Si, Ge, and Se
• an n-type carrier having a preferable carrier concentration can be obtained.
• impurities such as Mg, Zn, C, Be, Ca and Ba into the crystal.
• the first conductivity type layer, the active layer, and the second conductivity type layer are formed in a crystal growth layer inclined with respect to the main surface of the growth substrate, but are formed in a plane not parallel to the main surface of such a growth substrate.
• the extension of the active layer can be easily performed by continuing the crystal growth where the inclined crystal plane is formed. Also, by forming the active layer where the crystal plane extends on both sides of the ridge line, the active layer is extended including the bent portion.
• each inclined crystal growth layer has a substantially hexagonal pyramid shape or a substantially truncated hexagonal shape, and the surface of each inclined crystal growth layer is an S plane or the like, the first conductivity type layer, the active layer, and the second conductivity type layer
• the light emitting region can be formed on all or a part of the S plane.
• the first conductivity type layer, the active layer, and the second conductivity type layer can be formed on the upper surface parallel to the main surface of the substrate, for example, on the C plane.
• the first conductivity type layer i.e., the cladding layer
• the first conductivity type layer can be made of the same material and of the same conductivity type as the crystal layer constituting the S-plane. After forming the crystal layer constituting the S-plane, the concentration is continuously adjusted.
• a structure in which a part of the crystal layer constituting the S plane functions as a first conductivity type layer may be used.
• the luminous efficiency can be improved by utilizing the good crystallinity of the inclined crystal plane.
• the S-plane has good incorporation of In and good crystallinity, so that luminous efficiency can be increased.
• the area of the active layer extending in a plane substantially parallel to the S plane can be larger than the area of the active layer when projected onto the main surface of the substrate or the undergrowth layer.
• Electrodes are formed on the crystal growth layer or the first conductive layer and the second conductive type layer, respectively.
• a contact layer may be formed, and then an electrode may be formed on the contact layer.
• electrodes may be formed by vapor deposition, if the p-electrode and the n-electrode are attached to both the crystal layer and the crystal seed layer formed under the mask, a short circuit may occur. It is necessary to deposit.
• electrodes may be formed on the first and second conductive layers, respectively. For either structure, the direction of extracting light may be either front or back as necessary. It is also possible.
• the active layer is formed on a plane which is not parallel to the growth substrate by selective growth, thereby increasing the area of the active layer. It is.
• the device size is limited, the larger the effective area of the active layer in the device, the smaller the current injection density per unit area required to obtain the same luminance. Therefore, a structure having a large effective area improves reliability to obtain the same brightness, and can improve brightness if the same load is applied to the active layer.
• the difference between the total area of the active layer and the area of the selective growth region occupying the growth substrate is at least larger than the area required for contact with one of the electrodes, the activity limited by the contact region The layer area will be compensated. Therefore, by using the semiconductor light emitting device of the present invention, even if the device size of the light emitting device is reduced as much as necessary, the burden on the structure, that is, the situation where the current is concentrated can be reduced.
• the entire region of the active layer is grown.
• the effective area of the active layer is at most lZ cos 0 times larger.
• the mapping area is equal to the area occupied by the main surface of the substrate, and is equal to the area of the shadow portion formed by the crystal growth layer when light is virtually irradiated in the normal vector direction perpendicular to the main surface of the substrate. .
• the active layer area can be made larger than the area of the growth substrate. is there .
• the maximum area in one growth is equal to the area of the growth surface of the growth substrate, and the addition of electrodes and element isolation grooves further reduces the effective area of the active layer. Even if the total area of the active layer does not necessarily become larger than the area of the growth substrate, a sufficient effect can be obtained.
• the effective area of the active layer is larger than the area of the window region used for selective growth on the growth substrate, or when the crystal growth layer grown by selective growth is projected in the normal direction of the growth substrate
• the area By making the area larger than the mapping area, the density of the current injected into the active layer can be reduced, and the reliability of the device can be improved.
• the effective area of the active layer By making the effective area of the active layer larger than the sum of the area of the projection of the selective growth region in the normal vector direction to the growth base and the contact area between at least one electrode and the conductive layer, The density of the current injected into the device can be reduced, and the reliability of the device can be improved.
• the difference between the total area of the active layer and the mapping area of the selective growth area on the growth substrate is at least larger than the area required for contact with one electrode, the active layer limited by the contact area The area is compensated.
• the region where the first electrode and the underlying conductive layer as the first conductive layer are in contact is about 20 ⁇ 5 II m, and the selective growth region where the active layer can be arranged is It is at most about 20 / m2. Therefore, by setting the total area of the active layer to 500 m 2 or more, the device structure of the present invention can be obtained.
• the stable (1-101) plane is about 62 ° against the (001) plane of the wurtzite type, and the (0 0 1) Since the stable plane (1 1 1) plane is 54.7 °, the effect of widening the active layer area of the present invention and securing reliability can be sufficiently obtained.
• an image display device or a lighting device can be configured by arranging a plurality of the semiconductor light emitting elements of the present invention.
• the electrode area can be reduced by using the S surface, so that it can be used as a display with a small area.
• each embodiment corresponds to a manufacturing method, and an element completed by the manufacturing method is a semiconductor light emitting element having the structure of the present invention. Therefore, in each embodiment, the manufacturing process will be described first, and then the manufactured device itself will be described.
• the semiconductor light emitting device of the present invention can be modified and changed without departing from the gist of the present invention, and the present invention is not limited to the following embodiments.
• This embodiment is an example of a semiconductor light emitting device in which a crystal layer having an S-plane as an inclined crystal surface is formed by direct selective growth on a sapphire substrate, and with reference to FIGS. The structure will be described.
• An opening 13 of about 100 m is formed using photolithography and a hydrofluoric acid-based etchant (FIG. 3).
• the opening 13 has a substantially rectangular shape in the present embodiment, and the size can be changed according to the characteristics of the light emitting element to be formed.
• crystal growth is performed again as selective growth.
• This is a low temperature 500 ° C And grow a thin (20 to 30 nm) GaN layer (low-temperature buffer layer).
• the growth temperature is increased to about 1000 ° C and the G An aN layer 14 is formed.
• This silicon-doped GaN layer 14 grows in the opening 13 of the mask, but if the growth is continued for a while in a hydrogen atmosphere while maintaining this growth temperature of 100, it spreads slightly in the lateral direction.
• a mask layer 15 is formed, and a substantially circular opening 16 is formed by photolithography and etching (FIG. 5). The growth continues inside the opening 16 and the GaN layer 17 of silicon dopant is formed.
• a hexagonal pyramidal crystal layer consisting of At this time, the surface of the hexagonal pyramid-shaped crystal layer is covered with S (1-101) plane. If the growth conditions are different, for example, the growth time is insufficient, the upper surface side becomes a hexagonal trapezoid having a C + plane parallel to the main surface of the substrate.
• a crystal layer consisting of 17 is grown. After a lapse of a sufficient growth time, the hexagonal pyramid-shaped slopes of the surface of the silicon-doped GaN layer 17 are covered with the S-plane. At this time, the pitch of the openings 16 needs to be sufficiently separated.
• the hexagonal pyramid was formed with a silicon-doped GaN layer 17, it grew for a while and the hexagonal pyramid became approximately 15 to 20 in width (7.5 to 1 Om on each side) At this time, the height of the hexagonal pyramid is about 1.6 times that of one side, and therefore about 10 to 16 m. It should be noted that the size of about 10 to 16 m is an example, and a size of 10 m or less in width may be used.
• a silicon-doped GaN layer 17 is further grown, and then the growth temperature is reduced to grow an InGaN layer 18. Thereafter, the growth temperature is increased, and a GaN layer 19 of magnesium doped is grown as shown in FIG.
• the thickness of the InGaN layer 18 is about 0.5 nm to 3 nm.
• (A 1) G a N / In n G It may be an aN quantum well layer, a multiple quantum well layer, or the like, and may have a multiple structure using GaN or InGaN which functions as a guide layer. At this time, it is desirable to grow an A 1 G aN layer on the layer immediately above the In G a N.
• Electrode 22 is completed (Fig. 7). At the time of these depositions, the electrodes 22 and the n-electrode 20 are formed on both the hexagonal pyramidal silicon doped GaN layer 17 and the silicon-doped GaN layer 14 formed under the mask. If they do, short circuits will occur, so it is necessary to deposit each with high precision. Thereafter, as shown in FIG. 8, the light emitting device is separated by RIE (reactive ion etching) or dicer (FIG. 8). Thus, the light emitting device according to the present embodiment is completed.
• RIE reactive ion etching
• dicer FIG. 8
• the light emitting device of this example manufactured by such a manufacturing process has the device structure shown in FIG. Its main configuration is a silicon-doped G as a crystal layer grown on a sapphire substrate 10 having a C + plane as the main surface of the substrate via a silicon-doped GaN layer 14 serving as a crystal seed layer. a It has an N layer 17.
• the silicon layer G a N layer 17 has an S-plane inclined with respect to the main surface of the substrate.
• An N layer 18 is formed, and a magnesium doped GaN layer 19 is formed on the InGaN layer 18 as a cladding layer.
• the p-electrode 22 is formed on the upper surface of the GaN layer 19 of magnesium doped, and the n-electrode 20 is formed in a region opened on the side of the hexagonal pyramid portion. To the silicon-doped GaN layer 17 via the GaN layer Connected.
• the semiconductor light emitting device of this embodiment having such a structure uses the S-plane inclined with respect to the main surface of the substrate, the number of pounds from nitrogen atoms to gallium atoms increases, and The effective vz i II ratio can be increased, and the performance of the semiconductor light emitting device to be formed can be improved.
• the main surface of the substrate is a C + surface and the S surface is different from the main surface of the substrate, dislocations extending upward from the substrate may bend, and defects can be reduced.
• the inclined crystal plane inclined with respect to the main surface of the substrate multiple reflection can be prevented, and the generated light can be efficiently guided to the outside of the element.
• the present embodiment is an example of a semiconductor light emitting device in which separated crystal seeds are formed on a sapphire substrate, and a crystal layer having an S plane is formed as an inclined crystal plane inclined with respect to the main surface of the substrate.
• a crystal layer having an S plane is formed as an inclined crystal plane inclined with respect to the main surface of the substrate.
• a buffer layer of either A 1 N or GaN is formed at a low temperature of 500 ° C. Thereafter, the temperature is raised to 1000 ° C. to form a silicon-doped GaN layer 31.
• a mask layer using the S i ⁇ 2 or S i N as shown in the first 0 Figure, photolithography one and hydrofluoric acid Using a system etchant, etching is performed until the main surface of the sapphire substrate 30 is exposed as shown in FIG. 11 while leaving a circular mask portion 32 of about 10 m.
• a cylindrical silicon-doped GaN layer 31 is left reflecting the shape of the mask portion 32.
• the mask portion 32 is removed and crystal growth is performed again.
• the growth temperature is increased to about 100 ° C.
• the silicon doped GaN layer 33 Grow.
• the silicon-doped GaN layer 33 grows on the remaining silicon-doped GaN layer 31, but after growing for a while, a hexagonal pyramid whose periphery is surrounded by the S-plane inclined with respect to the main surface of the substrate It becomes a shape.
• the hexagonal pyramid-shaped silicon-doped GaN layer 33 grows large as the growth takes time, but even if it grows sufficiently, the GaN layers 33 do not interfere with each other, and there is a margin for isolation between elements.
• the pitch of the G a N layer 3 1. must be sufficiently separated so as to secure
• the hexagonal pyramid has a width of about 15 to 20 m (each side is about 7.5 to 15 m) as in Example 1, the height is 1.6 times that of a hexagonal pyramid. About 10 to 16 im.
• the size of the hexagonal pyramid is about 15 to 20 m in width, for example.
• the size of the hexagonal pyramid can be about 10 jLtm or less.
• a silicon-doped GaN layer is further grown, and then the growth temperature is reduced to reduce the Grow layer 34. Thereafter, the growth temperature is increased, and a magnesium-doped GaN layer 35 is grown as shown in FIG.
• the thickness of the InGaN layer 34 is about 0.5 nm to 3 nm.
• the active layer may be a (A 1) GaN / InGaN quantum well layer or a multiple quantum well layer, etc., and a multiple structure using GaN or InGaN functioning as a guide layer. Sometimes it is. At this time, it is desirable to grow an A 1 G aN layer on the layer immediately above the In G aN.
• the active layers InGaN layers 34 and! A portion of the magnesium-doped GaN layer 35 which is the) type cladding layer is removed on the side close to the substrate to expose a portion of the GaN layer 33 of the silicon oxide. Further, a TiZA1 / PtZAu electrode is deposited on a portion close to the removed substrate. This is n-electrode 36. The outermost layer grown on the hexagonal pyramid is Ni ZP t ZAu. Or Ni (Pd) ZPtZAu is deposited. This deposition completes the p-electrode 37 (Fig. 14). In the case of these vapor depositions, it is necessary to perform the vapor deposition with high accuracy in order to prevent a short circuit between the electrodes as in the first embodiment.
• the light emitting devices are separated for each device by RIE (reactive ion etching) or dicer as shown in FIG. Thus, the light emitting device according to the present embodiment is completed.
• RIE reactive ion etching
• the light emitting device of this example manufactured by such a manufacturing process has the device structure shown in FIG.
• the main configuration thereof has a GaN layer 33 of silicon doped as a crystal layer on a sapphire substrate 30 having a C + plane as a main surface of the substrate.
• the GaN layer 33 of the silicon dopant has an S-plane inclined with respect to the main surface of the substrate, and the active layer of the GaN layer 34 extends parallel to the S-plane. Is formed, and a magnesium-doped GaN layer 35 is formed as a cladding layer on the InGaN layer 34.
• the p-electrode 37 is formed on the upper surface of the magnesium-doped GaN layer 35, and the n-electrode 36 is formed on the S-plane of the hexagonal pyramid in an area opened near the substrate. It is directly connected to the doped GaN layer 33.
• the semiconductor light emitting device of this embodiment having such a structure uses the S-plane inclined with respect to the main surface of the substrate similarly to the light emitting device of Embodiment 1, the semiconductor light emitting device converts the nitrogen atoms into the gallium atoms. As the number of pounds increases, the effective V / III ratio can be increased, and the performance of the semiconductor light emitting device formed can be improved.
• the main surface of the substrate is a C + surface and the S surface is a surface different from the main surface of the substrate, dislocations extending upward from the substrate may bend and defects can be reduced. Furthermore, by using an S-plane inclined with respect to the main surface of the substrate, multiple reflections can be prevented, and the generated light can be efficiently guided to the outside of the element.
• the silicon-doped GaN layer was first etched to expose the sapphire substrate 30.However, if there is a sufficient step, a step is formed in the GaN of the silicon oxide. Should be etched. A hexagonal pyramid can be easily obtained by growing the crystal seed layer on the GaN layer of silicon doped silicon.
• FIG. 17 shows the structure of an element manufactured by such a manufacturing method. A step 39 is formed in the silicon-based GaN layer 38 formed on the sapphire substrate 30, and a silicon-doped GaN that is a hexagonal pyramid-shaped crystal layer is formed by crystal growth from the convex portion.
• An active layer composed of an InGaN layer 34, a p-type cladding layer composed of a magnesium-doped G to aN layer 35, an electrode 37, and an n electrode are formed. a The light of the required wavelength is extracted from the N layer 34.
• This embodiment is an example of a semiconductor light emitting device in which a hexagonal pyramid-shaped crystal layer having an S plane as an inclined crystal plane inclined with respect to a main surface of a substrate is formed in a selective mask, that is, in a window region.
• a hexagonal pyramid-shaped crystal layer having an S plane as an inclined crystal plane inclined with respect to a main surface of a substrate is formed in a selective mask, that is, in a window region.
• a buffer layer of either A1N or GaN is formed at a low temperature of 500.degree. C. on a sapphire substrate 40 whose main surface is a C + surface. Thereafter, the temperature is raised to 100 ° C. to form a silicon-doped GaN layer 41. After that, formed by S i 0 2 or S i N thickness 1 0 0 ⁇ 5 0 0 nm range a mask layer 4 2 over the entire surface with, as shown in the first FIG. 8, the Photo lithography Using a hydrofluoric acid-based etchant, a window region 43 having a circular opening of about 10 m is formed. The size of this opening varies depending on the characteristics of the element to be manufactured.
• crystal growth of the silicon-doped GaN layer 44 is performed again at a growth temperature of 1000 ° C.
• the silicon-doped GaN layer 4 4 It grows from 3, but when it grows for a while, the surroundings show a hexagonal pyramid shape consisting of S-plane (1-101).
• a hexagonal pyramid trapezoidal shape is formed, but by controlling the growth conditions, the silicon-doped GaN layer 44 is formed, in which the hexagonal pyramid covered by the S-plane is almost full within the frame of the selection mask. You.
• the growth temperature is reduced and the InGaN layer 45 serving as an active layer is grown. Thereafter, as shown in FIG.
• the growth temperature is raised again, and a magnesium-doped GaN layer 46 as a p-type cladding layer is grown.
• the thickness of the InGaN layer 45 is about 0.5 nm to 3 nm.
• the active layer may be a (AT) GaN / In GaN quantum well layer or a multiple quantum well layer, or the like.
• a multiplex structure may be formed using InGaN.
• the window region 43 of the selective mask includes the lateral direction of all the crystal layers. With this method, it is easy to make the size of each light emitting element uniform.
• the mask layer is opened to expose the GaN layer 41, and a Pt / Au electrode is deposited on the removed portion 47. This becomes the n-electrode 48. Further, Ni or Ni (Pd) ZPtZAu is deposited on the outermost layer grown on the hexagonal pyramid. This deposition completes the p-electrode 49 (Fig. 21). At the time of these depositions, it is necessary that the electrode 49 and the n-electrode 48 are each deposited with high accuracy. Then, as shown in FIG. 22, the light emitting device is separated by RIE (reactive ion etching) or a dicer. Thus, the light emitting device according to this embodiment is completed.
• RIE reactive ion etching
• the light emitting device of this example manufactured by such a manufacturing process is shown in FIG. It has the element structure shown. Its main structure is a silicon-doped G a as a crystal layer grown on a sapphire substrate 40 having a C + plane as a main substrate through a silicon-doped G a N layer 41 serving as a crystal seed layer. It has an N layer 44. This silicon-doped GaN layer 44 has a peripheral surface covered with an S-plane inclined with respect to the main surface of the substrate. A certain InGaN layer 45 is formed, and a magnesium doped GaN layer 46 is formed on the InGaN layer 45 as a cladding layer.
• the p-electrode 49 is formed on the upper surface of the magnesium layer GaN layer 46, and the n-electrode 48 is formed in an area 47 opened at the side of the hexagonal pyramid. It is connected to the GaN layer 44 of the silicon dope via the GaN layer 41 of the silicon dope.
• the semiconductor light emitting device of this embodiment having such a structure uses the S-plane inclined with respect to the main surface of the substrate as in the first and second embodiments described above, the semiconductor light-emitting device converts nitrogen atoms into gallium atoms. As the number of pounds increases, the effective VZIII ratio can be increased, and the performance of the formed semiconductor light emitting device can be improved.
• the main surface of the substrate is a C + surface and the S surface is different from the main surface of the substrate, dislocations extending upward from the substrate may bend, and defects can be reduced.
• the selective growth stays within the window region 43, it is easy to uniformly control the size of each element. By using an inclined crystal plane inclined with respect to the main surface of the substrate, multiple reflection can be prevented, and the generated light can be efficiently guided to the outside of the element.
• the present embodiment is an example of a semiconductor light emitting device formed by growing a hexagonal pyramid-shaped crystal layer with a size larger than the selection mask, that is, the window region, and FIG. Discusses the device structure along with the manufacturing process I will tell.
• a low-temperature buffer layer is formed on a sapphire substrate 50 whose main surface is a C + plane, as in each of the above-described embodiments, and then the temperature is raised to 1000 ° C. and a silicon layer as a first growth layer is formed. GaN layer 51 is formed. Thereafter, a mask layer 52 using SiO 2 or Si N is formed on the entire surface to a thickness of 100 to 500 nm, and as shown in FIG. 24, photolithography and hydrofluoric acid are performed. A window region 53 having a circular opening of about 10 m is formed in the mask layer 52 using a system etchant. At this time, the direction of one side is perpendicular to the 1-100 direction. The size of the opening varies depending on the characteristics of the element to be manufactured.
• ⁇ layer 54 of the silicon dopant is performed again at a growth temperature of 1000.
• the GaN layer 54 of the silicon dopant grows from the circular window region 53, but as it grows for a while, the periphery exposes the shape of a hexagonal pyramid composed of S-planes (111). If the growth time is not enough, the shape becomes a truncated hexagonal pyramid, but the hexagonal pyramid grows for a while after forming the silicon-doped GaN layer 54, and the size of the hexagonal pyramid is about 20 m in width (one side is 1 m). (About 0 ⁇ m), the height is about 1.6 times one side of a hexagonal pyramid. As a result, as shown in FIG.
• a GaN layer 54 of silicon doped with a bottom surface wider than the window region 53 of about 16 m is formed.
• the size of the hexagonal pyramid is about 20 im in width, for example.
• the size of the hexagonal pyramid can be about 10 m in width.
• the active layer is (A 1) GaN / InGa It may be an N quantum well layer, a multiple quantum well layer, or the like, and may have a multiple structure using GaN or InGaN that functions as a guide layer. At this time, it is desirable to grow an A 1 G aN layer on the layer immediately above the In G aN.
• the InGaN layer 15 and the magnesium-doped GaN layer 56 are located above the mask layer 52 around the window region 53, and the silicon-doped second growth layer is formed. Since the entire GaN layer 54 is covered and the ends of the active layer InGaN layer 55 and the magnesium layer GaN layer 56 are not formed, the active layer is deteriorated beforehand. Can be prevented. Thereafter, a part of the mask layer is opened to expose the “GaN layer 51”, and a TinoA 1 ZPtZAu electrode is deposited on the removed portion 57. This becomes the n-electrode 58.
• NiZPtZAu or Ni (Pd) / PtZAu is deposited on the outermost layer grown on the hexagonal pyramid, thereby completing the p-electrode 59 (Fig. 27). In this case, it is necessary to deposit each of the electrodes 59 and n electrodes 58 with high precision. Thus, the light emitting device according to this embodiment is completed.
• the semiconductor light emitting device of this example manufactured by such a manufacturing process has an element structure shown in FIG. Its main structure is a silicon-doped GaN as a second growth layer grown on a sapphire substrate 50 having a C + plane as a main surface of the substrate via a silicon-doped GaN layer 51 serving as a crystal seed layer. It has a layer 54.
• the silicon-doped GaN layer 54 has a peripheral surface covered by an S-plane inclined with respect to the main surface of the substrate, and is formed to have a bottom surface larger than the area of the window region 53. Have been.
• an active layer 1110 & additional layer 55 is formed in a shape extending in parallel with the S-plane, and further formed on the InGaN layer 55.
• a magnesium layer GaN layer 56 is formed as a lad layer.
• the p-electrode 59 is formed on the upper surface of the magnesium layer GaN layer 56, and the n-electrode 58 is formed in a region 57 opened at the side of the hexagonal pyramid. It is connected to a silicon-doped GaN layer 54 via a silicon-doped GaN layer 51.
• the semiconductor light emitting device of this embodiment having such a structure has a structure in which all or one of the GaN layer 54, the InGaN layer 55, and the GaN layer 56, The portion extends over the mask layer 52 around the window region 53. Since the structure where the if mask is not removed is used, the lower portion of the laterally grown portion does not lose its support, and if the mask layer 52 is left, the step of the selective growth structure is reduced, Even when the substrate is peeled off by laser irradiation or the like, the n-electrode 58 and the p-electrode 59 can be reliably separated while the mask layer 52 functions as a support layer of the first growth layer 51, thereby preventing a short circuit.
• the entire structure of the silicon-doped GaN layer 54 is covered by the InGaN layer 55 and the magnesium-doped GaN layer 56, and each of the layers 55, 56
• the structure can be such that the end directly contacts the mask layer. Therefore, since each end is directly in contact with the mask layer 52 to cover the active layer and the like, deterioration such as oxidation of the active layer is prevented beforehand, and the effect of increasing the light emitting area is improved. Is also obtained.
• the S-plane inclined with respect to the main surface of the substrate since the S-plane inclined with respect to the main surface of the substrate is used, the number of pounds from the nitrogen atoms to the gallium atoms increases, and the effective V / III ratio can be increased. Yes, the performance of the semiconductor light emitting device to be formed can be improved.
• the main surface of the substrate is a C + surface and the S surface is different from the main surface of the substrate, dislocations extending upward from the substrate may bend, thereby reducing defects. Tilt to main surface of substrate By using the inclined crystal plane, multiple reflection can be prevented, and the generated light can be efficiently guided to the outside of the element.
• the current since the current is injected into the active layer having a large area, the current can be made uniform, the current concentration can be avoided, and the current density can be reduced.
• This embodiment is an example of a semiconductor light emitting device in which a P electrode is not formed at the apex of a hexagonal pyramid-shaped crystal layer composed of an S-plane formed larger than a selection mask. The structure will be described with reference to the drawings.
• a low-temperature buffer layer is formed on a sapphire substrate 50 having a main surface of the substrate as a C + surface, as in the above-described embodiments, and then the temperature is increased.
• a GaN layer 51 of silicon doped as a first growth layer is formed.
• S i 0 2 or S i N is formed to a thickness of 1 0 0 to 5 0 0 nm range mask layer 5 '2 on the entire surface using a photolithography - 1 0 using a hydrofluoric acid-based Etchiyanto
• a window region having a circular opening of about m is formed in the mask layer 52. At this time, the direction of one side is perpendicular to the direction of 110. The size of the opening varies depending on the characteristics of the element to be manufactured.
• the crystal growth of the silicon-doped GaN layer 54 is performed again at a growth temperature of 1000 ° C.
• the silicon-doped GaN layer 54 grows from the circular window region 53, but after a while it grows, the periphery exposes the shape of a hexagonal pyramid consisting of S-plane (1-101) . If the growth time is not enough, the shape becomes a truncated hexagonal pyramid. (Approximately 10 m), the height is about 1.6 times one side of a hexagonal pyramid.
• a silicon-doped GaN layer 54 having a bottom surface wider than the window region 53 of about 16 m is formed.
• the size of the hexagon is about 20 m in width. Is merely an example.
• the size of a hexagonal pyramid can be about 10 m in width.
• a silicon-doped GaN is grown, and then the growth temperature is reduced to grow an InGaN layer 55 serving as an active layer. Thereafter, the growth temperature is raised again, and the GaN layer 56 of magnesium doped as the p-type cladding layer is grown.
• the In GaN layer 55 and the magnesium doped GaN layer 56 are the same as in the fourth embodiment.
• the InGaN layer 55 and the magnesium layer GaN layer 56 are extended to the top of the mask layer 52 around the window region 53, and the silicon layer as the second growth layer is formed. Since the entire GaN layer 54 is covered, and the end portions of the active layer InGaN layer 55 and the magnesium layer GaN layer 56 are not formed, the active layer is deteriorated beforehand. Can be prevented.
• a TiZA1ZPtZAu electrode is vapor-deposited on a part of the GaN layer 51 of the silicon dopant on the substrate 50, which is partially removed. This is the n-electrode 61.
• a step where sufficient steps were observed was searched, and only that part was used as an electrode for Ni / Vt / Au or Ni.
• Pd Deposit ZPt / Au. This completes the P electrode 62 (Fig. 30).
• the shape near the apex of a hexagonal pyramid has relatively poor crystallinity due to the shape of the steps and the like seen in AFM.
• the ⁇ electrode 62 is provided except for the top portion. At the time of these depositions, if the electrodes 62 and n-electrodes 61 are trapped both in the GaN layer 54 of the silicon-doped crystal layer and the GaN layer 51 of the silicon-doped layer formed under the mask. Since short-circuits occur, it is necessary to deposit each with high precision. Then, this device is separated by RIE or dicer (Fig. 31). Thus, the light emitting device according to the present invention is completed.
• FIG. 32 shows a cross section of the element.
• a semiconductor light-emitting device having such a structure, all or part of the silicon-doped GaN layer 54, the InGaN layer 55, and the magnesium-doped GaN layer 56 are formed in the window region 53. Extending over the mask layer 52 around the substrate. Since the structure is such that the mask is not removed, there is no loss of support at the lower part of the laterally grown portion. As a result, the n-electrode 61 and the p-electrode 62 can be reliably separated to prevent a short circuit.
• the entire structure of the silicon-doped GaN layer 54 is covered by the InGaN layer 55 and the magnesium-doped GaN layer 56, and each of the layers 55, 56
• the structure can be such that the end directly contacts the mask layer. Therefore, since each end is directly in contact with the mask layer 52 to cover the active layer and the like, deterioration such as oxidation of the active layer is prevented beforehand, and the effect of increasing the light emitting area is improved. Is also obtained.
• the current injection into the active layer becomes lower in density near the vertex than in the surrounding side, so that a portion having poor crystallinity can be removed from the light emitting region, thereby improving the overall light emitting efficiency.
• This embodiment is an example of a semiconductor light emitting device in which an n-electrode is formed on the back surface of a substrate, and the structure will be described with reference to FIGS. 33 to 39.
• a low-temperature buffer layer was formed on a sapphire substrate 50 having a substrate main surface as a C + surface, as in each of the above-described embodiments, and then the temperature was raised to 100 ° C.
• a silicon-doped GaN layer 51 is formed as a first growth layer.
• Ita mask layer 5 2 is formed with a thickness 1 0 0 to 5 0 0 nm range on the entire surface, photolithography one and hydrofluoric acid Etsuchanto 1
• a window region having a circular opening of about 0 m is formed in the mask layer 52. At this time, the direction of one side is perpendicular to the direction To be straight.
• the size of the opening varies depending on the characteristics of the element to be formed. Then again at the growth temperature of 100.
• the crystal growth of the silicon-doped GaN layer 54 is performed with C. Initially, the silicon-doped GaN layer 54 grows from a circular opening. However, as it grows for a while, the periphery of the GaN layer 54 reveals a hexagonal pyramid consisting of an S-plane (1-101). If the growth time is not enough, the shape becomes a truncated hexagonal pyramid, but the hexagonal pyramid continued to grow for a while after forming the silicon-doped GaN layer 54, and the bottom surface became wider than the window area of about 16 m.
• a GaN layer 54 of silicon oxide is formed.
• GaN of silicon dopant is grown, and then the growth temperature is reduced to grow an InGaN layer 55 serving as an active layer. Thereafter, the growth temperature is raised again to grow the magnesium-doped GaN layer 56 as a p-type cladding layer.
• the InGaN layer 55 and the magnesium-doped GaN layer 56 are the same as in the fourth embodiment.
• the InGaN layer 55 and the magnesium layer GaN layer 56 are extended over the mask layer 52 around the window region, and the silicon layer G, which is the second growth layer, is formed. Since the entire aN layer 54 is covered, and the end portions of the InGaN layer 55 as the active layer and the GaN layer 56 of magnesium doping are not formed, deterioration of the active layer is prevented beforehand. be able to.
• a p-electrode 71 is formed on the S-plane portion of the outermost layer of the GaN layer 56 of magnesium dope.
• the isolation groove 72 is formed and separated to the main surface of the sapphire substrate 50 by means of RI ⁇ ⁇ or dicer, etc., and is separated for each element on the sapphire substrate 50 (No. 34).
• a region to be an element portion is removed from the sapphire substrate 50, and the remaining Ga and the like are removed by etching, and finally Ti 1 / Pt ZA u electrode is deposited. As shown in Fig. 35, this electrode is placed on the back of the device. It functions as the n-electrode 73.
• FIG. 36 shows another method of forming an n-electrode on the back surface.
• a sapphire substrate is prepared as a second substrate 77, and the element in the state shown in FIG. 33 is placed in a resin layer 79 formed thereon with an adhesive layer 78 interposed therebetween. Embed. Thereafter, as shown in FIG. 36A, the sapphire substrate 50 is removed by laser ablation.
• the laser for irradiation is, for example, an excimer laser (wavelength: 248 nm).
• a mask M such as a Ni mask was formed on the surface from which the sapphire substrate 50 was peeled off, as shown in FIG.
• the elements are separated by RIE.
• an electrode 76 made of TiZPtZAu or Ti / Au is formed on the back surface of the element side.
• FIG. 37 shows a cross section of the completed semiconductor light emitting device. It is preferable that the n-electrode 73 is disposed at a corner portion so as not to block light.
• FIG. 38 shows a back surface of an example of a completed semiconductor light emitting device.
• the n-electrode 74 has a hexagonal opening 75 corresponding to the hexagonal bottom surface of the silicon-doped GaN layer 54 as the second growth layer. With such a structure, the emitted light can be effectively guided to the outside.
• FIG. 39 shows a region where an element portion is separated from the substrate by using an excimer laser or the like, and a transparent electrode 76 is formed on the back surface side of the element.
• the element portion was grown in a hexagonal pyramid shape from the window region of the mask layer 52 left on the GaN layer 51 of the silicon oxide, similarly to the structure shown in FIG. 37.
• a silicon-doped GaN layer 54, an InGaN layer 55, and a magnesium-doped GaN layer 56 are formed in the crystal part, and a p-electrode 71 is formed on the outermost part.
• Transparent electrodes 7 6 peeled off substrate This is a material layer such as ITO (Indium Tin Oxide) formed by lift-off or the like on the back surface of the GaN layer 51 of the obtained silicon dopant.
• ITO Indium Tin Oxide
• FIG. 40 is a cross-sectional view showing a completed semiconductor light emitting device having the transparent electrode 76.
• the transparent electrode 76 With such a structure, light generated from the InGaN layer 55 as an active layer sandwiched between the silicon-doped GaN layer 54 and the magnesium-doped GaN layer 56 Emits light through the transparent electrode 76.
• the mask layer 52 remains on the structure, so that the lower portion of the laterally grown portion does not lose its support, and the step of the selective growth structure is reduced. Even when the substrate is peeled off by laser irradiation or the like, no problem such as a short circuit between the p-electrode 71 and the transparent electrode 76 occurs.
• the transparent electrode 76 since the light generated from the active layer passes through the transparent electrode 76 and is emitted, it is not necessary to form the electrode so as to avoid the optical path, and the electrode can be easily formed in manufacturing. By extracting light from the back surface of the aN layer 51, light reflected on the inclined crystal plane is also output, and the light extraction efficiency is improved. Also, since the p-electrode 71 is disposed on the vertex side of the hexagonal pyramid, the transparent electrode 76 can be formed on the back surface of the silicon-doped GaN layer 51 with a relatively large area. For this reason, the contact resistance of the transparent electrode 76 can be reduced, and at the same time, the processing of the mask layer for extracting the n-electrode is unnecessary, so that the element can be easily manufactured.
• the present embodiment is an example of a semiconductor light emitting device in which a band-shaped window region is formed and selectively grown, and the structure thereof will be described with reference to FIGS. 41 to 44.
• a buffer layer of either A1N or GaN is formed at a low temperature of 500 ° C on a sapphire substrate 80 whose main surface is a C + surface. . After that, the temperature was raised to 100 ° C and the silicon The layer 81 is formed. Then, by using the S I_ ⁇ 2 or S i N is formed to a thickness of 1 0 0 ⁇ 5 0 0 nm range mask layer 8 2 on the entire surface with, the Photo lithography one and hydrofluoric acid Etchiyanto 1 A window region 83 having a rectangular opening of about 0 m ⁇ 50 m is formed. At this time, the direction of the long side is set to the direction of 110.
• the temperature is raised to about 1000 ° C. to form a silicon-doped GaN layer 84.
• the GaN layer 84 of the silicon nitride grows in the window region 83 of the mask.
• the hexagonal pyramid surface of the ridge should be covered with the S-plane and the 11-22 plane.
• an additional silicon-doped GaN layer is formed.
• the growth temperature is reduced, and an InGaN layer 85 serving as an active layer is grown.
• the growth temperature is raised again to grow a magnesium-doped GaN layer 86 as a p-type cladding layer.
• the thickness of the InGaN layer 85 is about 0.5 nm to 3 nm.
• the active layer may be a quantum well layer or a multiple quantum well layer of (Al) GaNZInGaN, and the Ga layer functioning as a guide layer may be used.
• a multiplex structure may be formed using N or InGaN. At this time, it is preferable to grow an A1GaN layer immediately above InGaN, as in the first and second embodiments.
• Electrode 88 is completed (Fig. 43). At the time of these vapor depositions, it is necessary that the 0 electrode 88 and the n electrode 87 are each vapor-deposited with high precision. Then, the luminous element The light emitting device according to the present embodiment is completed by separating the elements by RIE (reactive ion etching) or dicer.
• the light emitting device of this example manufactured by such a manufacturing process has the device structure shown in FIG. 44, and has a silicon substrate formed not only on the S surface but also on the 11-2 surface. GaN layer 84. With such a structure, it is possible to form the active region in a wide area, so that the current can be made uniform, the current concentration can be avoided, and the current density can be reduced.
• the present embodiment is an example of a semiconductor light emitting device formed by growing a crystal layer of a selection mask, that is, a hexagonal pyramid trapezoid with a size larger than the window region, and referring to FIGS. 45 to 50, The device structure will be described together with the manufacturing process.
• a low-temperature buffer layer is formed on a sapphire substrate 90 whose main surface is a C + surface, as in the above-described embodiments, and then the temperature is raised to 100 ° C. and the silicon-doped GaN layer Form 9 1 Then, formed by S i 0 2 or S i N range mask layer 9 2 had use of thickness 1 0 0 ⁇ 5 0 0 nm on the entire surface, as shown in the fourth 5 FIG photolithography one and hydrofluoric A window region 93 having a circular opening of about 10 m is formed in the mask layer 92 using an acid-based etchant. The size of the opening is changed depending on the characteristics of the element to be formed.
• the crystal growth of the 0 & 1 ⁇ layer 94 of the silicon dopant is performed again at the growth temperature of 100.
• the silicon-doped GaN layer 94 grows from the circular window region 93, but as it grows for a while, the periphery is composed of S-planes (111) and the top surface is parallel to the main surface of the substrate. It reveals the shape of a truncated hexagonal pyramid with a C-plane.
• the crystal grows for a sufficient time, and the C-plane on the top
• the shape of the silicon-doped GaN layer 94 is controlled to a bent shape (Fig. 46).
• the shape of the hexagonal truncated pyramid having a flat upper surface can be formed in a shorter time than that of the above-mentioned hexagonal pyramid.
• GaN of silicon dopant is grown, and then the growth temperature is reduced to grow an InGaN layer 95 serving as an active layer. Thereafter, as shown in FIG. 47, the growth temperature is raised again, and a GaN layer 96 of magnesium doping as a P-type cladding layer is grown. At this time, the thickness of the InGaN layer 95 is about 0.5 nm to 3 nm, and a quantum well layer or a multiple quantum well layer may be formed. The point that a guide layer and the like can be formed is the same as in each of the above-described embodiments.
• a portion of the mask layer is opened to expose the GaN layer 91, and a TiZA1ZPtZAu electrode is deposited on the removed portion 97. This becomes the n-electrode 98.
• NiZPtZAu or Ni (Pd) / Pt / Au is deposited on the outermost layer grown on the hexagonal pyramid. This deposition completes the p-electrode 99 (Fig. 48). At the time of these depositions, it is necessary that the p-electrode 99 and the n-electrode 98 are each deposited with high accuracy.
• the light emitting device is separated by RIE (reactive ion etching) or a dicer. Thus, the light emitting device according to this embodiment is completed.
• the light emitting device of this example manufactured by such a manufacturing process has an element structure shown in FIG.
• the main configuration is that the GaN layer 94 of silicon doped formed on the sapphire substrate 90 having the C + plane as the main surface of the substrate has a flat hexagonal pyramid shape with a flat upper surface, and has a poor crystalline state.
• the structure is such that no apex is formed from the beginning. Therefore, it is possible to prevent a loss in light emission characteristics beforehand, and since the truncated hexagonal shape can be formed in a relatively short time, the process is advantageous.
• all or a part of the silicon layer GaN layer 94, the InGaN layer 95, and the magnesium layer GaN layer 96 may be a mask layer 92 around the window region 93.
• the step of the selective growth structure is reduced, and the n-electrode 98 and the ⁇ -electrode 99 can be reliably separated to prevent a short circuit.
• a structure can be employed in which the ends of the InGaN layer 35 and the magnesium layer 36 of magnesium doping are directly in contact with the mask layer 92. Therefore, since each end is directly in contact with the mask layer 32 to cover the active layer and the like, deterioration such as oxidation of the active layer is prevented beforehand, and the effect of increasing the light emitting area is obtained.
• FIGS. 51 and 52 show other examples of the structure of the semiconductor light emitting device having a truncated hexagonal pyramid structure.
• FIG. 51 is a diagram showing an electrode forming step of the device.
• the semiconductor light emitting device shown in FIGS. 51 and 52 is a modification of the semiconductor light emitting device shown in FIG. 50, in which the sapphire substrate 90 is removed by irradiation with an excimer laser or the like, and the silicon doped G is removed. This is an example in which an n-electrode 98 b is formed on the back surface of the a-N layer 91.
• the n-electrode 98 b is formed on the back surface of the GaN layer 91 of the silicon dopant in the window region of the mask layer 92 serving as a light extraction portion. It is formed while removing immediately below. With such a structure, the size of the semiconductor light emitting element can be reduced, and there is no need to form a contact region by opening the mask layer 92. It is suitable for. In this semiconductor light emitting device having a truncated hexagonal pyramid structure, a transparent electrode made of an ITO film or the like can be formed instead of the n-electrode 98b, and the contact area can be increased. Therefore, manufacturing is further facilitated.
• This embodiment is an example of a semiconductor light emitting device in which a P electrode is formed so as to occupy a large area on the surface of a substrate. The structure will be described with reference to FIG.
• the n-electrode 100 is formed by evaporating a TiZA1ZPtZAu electrode in a region where the mask layer 52 on the side of the sapphire substrate 50 is opened.
• the n-electrode 100 is capable of supplying a current to a region composed of a plurality of hexagonal pyramids.
• a NiZPtZAu or Ni (Pd) / Pt / Au electrode is deposited to form a p-electrode 101.
• this p-electrode 101 also covers a wide range, an element which can obtain high output with one element can be obtained. By applying the same potential to each of these elements, the elements can be used as a lighting device.
• the p-electrodes 101 can be individually formed to supply independent signals to be used as an image display device. By making each element correspond to three primary colors, a multi-color or full-color image display device can be constructed.
• Each semiconductor light emitting element can be configured by arranging the same semiconductor light emitting element. However, even if each semiconductor light emitting element prepared by another method is partially mixed, an image display device or a lighting device is configured. good.
• All or part of the silicon-doped GaN layer 54, 111 && ⁇ layer 55 and the magnesium-doped GaN layer 56 extends over the mask layer 52 around the window region 53. Since the structure does not remove the mask, the step in the selective growth structure is reduced, and the n-electrode 100 and the p-electrode 101 can be reliably separated to prevent a short circuit. In addition, the InGaN layer 55 and magnesium oxide The end of the GaN layer 56 of the mask can be in direct contact with the mask layer 52. Therefore, since each end is directly in contact with the mask layer 52 to cover the active layer and the like, deterioration such as oxidation of the active layer is prevented beforehand, and when the light emitting area is further increased. The effect is also obtained.
• an image display device or a lighting device is configured by arranging and wiring the semiconductor light emitting elements obtained in the above-described embodiment so as to be a simple matrix system.
• FIG. 54 shows an embodiment of such an image display device or an illuminating device.
• Each semiconductor light emitting element has a red light emitting region, a blue light emitting region, and a green light emitting region on a substrate 120.
• the mask layer 125 is left unremoved on the substrate 120, and the structure is formed to alleviate the step with the GaN layer 121 of the silicon dopant under the mask layer 125.
• the image display device or the lighting device has a structure in which first to third emission wavelength regions functioning as a red light emission region, a blue light emission region, and a green light emission region are respectively formed in an active layer. By providing independent signals to each wiring 1 26 R, 126 G, and 126 B, it is possible to display a two-dimensional image as an image display device. By giving the same signal to 26G and 126B, it can be used as a lighting device.
• a low-temperature buffer layer is formed on a sapphire substrate, a GaN layer is grown, and then a selection mask is formed.
• the method of performing the lengthening has been described, the present invention is not limited thereto. It is also possible to grow GaN after growing 5 nm of A1N at 1000 ° C., or to form a selection mask using a GaN substrate.
• the semiconductor light emitting device of this embodiment is, for example, as follows.
• a mask layer 133 is formed as a growth inhibiting film made of a nitride film or a tungsten film.
• a window region 134 which is a hexagonal opening is formed in the mask layer 133, and a crystal growth layer 135 having a triangular cross section formed by selective growth is formed from the window region 134.
• the crystal growth layer 135 is composed of, for example, an n-type GaN layer or an A1 GaN layer, and its cross section is substantially equilateral triangular, but is hexagonal when viewed from above, and is generally hexagonal. It has the shape of a pyramid.
• the crystal surface of the crystal growth layer 135 that is inclined with respect to the main surface of the substrate has an S plane or a plane equivalent to the S plane, and is formed by adjusting the outermost concentration of the crystal growth layer 135.
• an active layer 136 and a second conductive layer 137 functioning as a p-type clad layer are laminated on the n-type clad layer thus formed.
• the active layer 1336 and the second conductive layer 1337 functioning as a p-type cladding layer are formed so as to cover the S-plane of the crystal growth layer 135, and the active layer 1336 is formed by selective growth.
• the crystal growth layer 135 extends along the S plane of the crystal growth layer 135 not parallel to the main surface of the growth substrate 131.
• the second conductive layer 137 is made of, for example, a p-type GaN layer or an A1 GaN layer. The so-called A 1 on the active layer 1 3 6 A GaN layer may be formed.
• a second electrode 1339 functioning as a p-electrode is formed of a multilayer metal film such as NiZPt_Au or Ni (Pd) ZPtZAu.
• the first electrode 138 functioning as an n-electrode is formed in a portion where the mask layer 133 is opened by a multilayer metal film such as Ti / A1 / Pt / Au.
• the first electrode 138 and the second electrode 139 are formed using a technique such as vapor deposition and lift-off.
• the current density injected into the active layer 136 can be reduced because the area of the active layer 136 is large. Since the active layer 136 extends along the S-plane of 135 and is not parallel to the main surface of the growth substrate 131, the area S of the active layer 136 is formed to have a sufficiently wide T.
• the area S of the active layer 6 is the largest, as shown in FIG. 55, the area S of the active layer 136 is changed to the area S 2 of the first electrode 13 8 and the crystal growth layer 13 5 Has a larger area than the sum of the mapped areas S 1 (S 1 + S 2) obtained by mapping the area onto the main surface of the substrate.
• the region where the first electrode and the underlying conductive layer as the first conductive layer are in contact is 20 m ⁇ 5 m Approximately (about 100 m), the mapping area S 1 where the active layer is arranged is at most about 20 111 angles (about 400 m).
• the active layer is formed.
• Figures 56 and 57 show the area of the active layer 1 36 for the purpose of alleviating luminance saturation.
• the active layer 13 6 extends along the S-plane of the crystal growth layer 13 5 instead of being parallel to the main surface of the growth substrate 13 1 as described above.
• the area S of the active layer 1336 is larger than the area W1 and the mapping area W2, and is formed with a sufficient spread. Therefore, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• the S-plane that is inclined with respect to the main surface of the substrate is used.
• the effective V / III ratio can be increased, and the performance of the semiconductor light emitting device to be formed can be improved.
• dislocations extending upward from the substrate may bend, so that defects can be reduced.
• an inclined crystal plane inclined with respect to the main surface of the substrate multiple reflection can be prevented, and the generated light can be efficiently guided to the outside of the element.
• the active layer 136 since the active layer 136 has a structure in which the active layer 136 is separated in an island shape, it is not necessary to etch the active layer 136. Therefore, there is no unnecessary damage to the active layer. Also, there is an advantage that the effective area of the active layer 136 is not reduced by the electrodes.
• a stripe-shaped crystal growth layer 154 is formed on a growth substrate 150, and as shown in FIG. A strip-shaped crystal growth layer 154 is formed from the window region of the mask layer 15 2 on 51. An active layer 15 5 is also formed on the side surface 15 6 of the striped crystal growth layer 15 4 Because of the extension, the area of the active layer 155 is larger than the image area of the crystal growth layer 154. Therefore, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• This embodiment is an example in which a rectangular trapezoidal crystal growth layer 164 is formed on a growth substrate 160, and as shown in FIG. 59, an underlayer formed on the growth substrate 160 is formed.
• a strip-shaped and trapezoidal crystal growth layer 164 is formed from the window region of the mask layer 162 on the growth layer 161.
• the side face 1663S of the crystal growth layer 1664 having a trapezoidal trapezoid shape is defined as an S plane, and the face 164 at the end in the longitudinal direction is defined as a (11-2) plane.
• the upper surface 16 3 C of the crystal growth layer 16 4 is the same C plane as the main surface of the substrate.
• the active layer is not shown, it is also extended to the inclined side surface 16 3 S, surface 16 4, and upper surface 16 3 C, and the area of the active layer is larger than the mapping area of the crystal growth layer 16 4. Is also large. Therefore, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• a square trapezoidal crystal growth layer 174 is formed on the growth substrate 170, and the underlying growth layer formed on the growth substrate 170
• a crystal growth layer 173 having a truncated quadrangular pyramid shape is formed in a pattern arranged in a matrix from the window region of the mask layer 172 on the mask 171.
• the crystal growth layer 1 7 3 in the shape of a truncated quadrangular pyramid has one inclined side 17 3 S as the S plane, and the other inclined side 17 4 as the (1 1 1 2 2) plane.
• the upper surface 17 3 C of the crystal growth layer 17 3 is the same C plane as the main surface of the substrate.
• Example 15 Although the active layer is not shown, it is also extended to the inclined side surface 17 3 S, the surface 17 4, and the upper surface 17 3 C, and the area of the active layer is larger than the mapping area of the crystal growth layer 17 3. Is also large. Therefore, luminance saturation can be effectively alleviated, and the reliability of the element can be improved.
• Example 15
• a hexagonal pyramid-shaped crystal growth layer 18 3 is formed on a growth substrate 180, and a base growth layer formed on the growth substrate 180 is formed.
• a hexagonal pyramid-shaped crystal growth layer 183 is formed in a pattern arranged in a matrix from a window region of the mask layer 182 on the mask 18.
• each inclined side surface is an S-plane, and the active layer is not shown in the drawing, but the cross section is as shown in FIG.
• the active layer has a size larger than the mapping area of the crystal growth layer 183. Accordingly, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• a hexagonal truncated pyramid-shaped crystal growth layer 193 is formed on a growth substrate 190, and an undergrowth layer formed on the growth substrate 190 is formed.
• a hexagonal pyramid-shaped crystal growth layer 193 is formed in a pattern arranged in a matrix from the window region of the mask layer 192 on the layer 191.
• the hexagonal pyramid-shaped crystal growth layer 1993 has an inclined side surface 1993S as an S-plane, and an upper surface 1993C as a C-plane which is the same as the main surface of the substrate. Further, an M-plane (1-100) plane is also formed at a low height on the bottom side of the hexagonal pyramid-shaped crystal growth layer 1993.
• the active layer is not shown, but its cross section is as shown in Fig. 54, extending along each of the inclined S and C planes, and the area of the active layer is The size is larger than the mapping area. Therefore, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• This embodiment is a method for manufacturing the semiconductor light emitting device shown in FIG. 55, and the manufacturing method will be described in the order of steps with reference to FIGS. 63 to 68.
• an n-type GaN layer 201 is formed as a base growth layer on a growth substrate 200 such as a sapphire substrate by, for example, a MOC VD method.
• the n-type GaN layer 201 does not need to be n-type from the beginning, and it is sufficient if the top surface is n-type.
• an n-type GaN layer 201 can be formed by doping silicon.
• the mask layer 202 as a growth inhibition film made of a silicon oxide film, a silicon nitride film, a tungsten film, or the like is formed on the n-type GaN layer 201 by CVD or the like.
• a plurality of hexagonal window regions 203 are formed by forming the entire surface and removing the mask layer 202 corresponding to the regions where the elements are to be formed.
• n-type (Al) GaN layer 204 as a crystal growth layer is formed from the window region 203 by crystal growth.
• the n-type (Al) GaN layer 204 also functions as a cladding layer and has a substantially hexagonal pyramid shape. The sloped side is the S-plane.
• An InGaN layer 205 serving as an active layer and a p-type (Al) GaN layer 206 are further laminated on the inclined side surface as shown in FIG.
• the InGaN layer 205 serving as an active layer is a crystal growth layer and extends along the S-plane of the (Al) GaN layer 204 without being parallel to the main surface of the growth substrate 200.
• the area S of the active layer is larger than the area of the window region 203 and the mapped area of the crystal growth layer, and is formed with a sufficient spread.
• An A1Gan layer may be formed on the InGaN layer 205.
• the internal basic structures may or may not be independently driven.
• the basic structure of the present invention can be made a single semiconductor light emitting element by separating the first growth film (first conductive film) by etching before or after the abrasion.
• the S-plane is easily formed by selective growth, and the active layer is formed on the crystal growth layer having the S-plane as a side surface, so that a large area can be obtained. An active layer can be obtained.
• FIG. 69 shows the structure of the semiconductor light emitting device of Example 18.
• a second growth layer 211 is formed partially on the growth substrate 210, and the first conductive layer 211, the active layer 211, and the second conductive layer 211 cover the second growth layer 211.
• a conductive layer 219 is formed.
• the mask layer and the window region are not provided in this example, the area of the active layer 21 3 is larger than the mapping area of the crystal growth layer by selective growth. Therefore, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• the same stable surface can be formed by crystal growth by fine processing such as forming irregularities on a growth substrate or a crystal film once grown by etching or the like.
• the same effect can be obtained.
• a stable surface is eventually self-formed. It doesn't matter.
• the wurtzite-type crystal has stable surfaces such as (11-22) and (1-100) planes in addition to the (1-101) plane. The invention can be applied.
• A1GaInP compounds commonly used as red LED materials at present are zinc-type crystals, but the (0 1 1) and (1 1 1) planes with respect to the (0 1 1) substrate There is a stable surface such as a (1 ⁇ -1) plane, and it is possible to form the stable surface and the active layer on it by growing under appropriate conditions.
• the semiconductor light emitting device of this embodiment is, for example, as shown in FIG.
• a growth substrate 22 1 such as a (001) plane sapphire substrate
• a base growth layer 222 made of an n-type GaN layer is grown by MOC VD (MOVP E) method.
• a mask layer 223 is formed as a growth inhibition film made of a silicon oxide film, a silicon nitride film, a tungsten film, or the like.
• a window region 224 that is a hexagonal opening is formed in the mask layer 223, and a crystal growth layer 225 having a triangular cross section formed by selective growth is formed from the window region 224.
• This crystal growth layer 2.25 is composed of, for example, an n-type GaN layer or an A1 GaN layer, and its cross section is substantially equilateral triangular, but is hexagonal when viewed from above, and as a whole, It has the shape of a hexagonal pyramid.
• the crystal surface of the crystal growth layer 225 inclined with respect to the main surface of the substrate has an S-plane or a plane equivalent to the S-plane, and is formed by adjusting the outermost concentration of the crystal growth layer 225, etc.
• Active layer 226 and p-type cladding A second conductive layer 227 functioning as a pad layer is laminated.
• the active layer 226 and the second conductive layer 227 functioning as a p-type cladding layer are formed so as to cover the S-plane of the crystal growth layer 225, and the active layer 226 is formed by selective growth.
• the crystal growth layer 222 extends along the S-plane of the formed crystal growth layer 222 not parallel to the main surface of the growth substrate 222.
• the second conductive layer 227 includes, for example, a p-type GaN layer or an A1 GaN layer.
• a so-called A 1 GaN cap layer may be formed on the active layer 226.
• the surface of the second conductive layer 227 serves as an interface with the second electrode to be formed next, and this interface serves as a reflection surface 240 of light generated in the active layers 22 to 6. .
• the second electrode functioning as a p-electrode is formed of a multi-layer metal film such as Ni / PtZAu on the second conductive layer 227. Then, a first electrode functioning as an n-electrode is formed in a portion where the mask layer is opened by a multilayer metal film such as Ti / A1 / PtAu.
• the first electrode and the second electrode are formed using, for example, a technique such as vapor deposition and lift-off.
• a part of the light taken out as an output is reflected by a reflecting surface 240 extending in parallel with the inclined crystal plane formed by the selective growth. Since the extraction efficiency is improved, the luminance of the semiconductor light emitting device can be increased. In addition, since the inclined crystal plane serving as the basis of the reflection surface 240 is easily formed in the process using selective growth, it can be obtained without any additional steps such as etching in a self-forming manner.
• FIG. 71 is a sectional view showing a main part of the semiconductor light emitting device.
• the growth substrate 222 is detached by excimer laser irradiation from the back surface or the like, and the bottom surface of the base growth layer 222 functions as a light extraction window 222.
• the underlying growth layer 222 is made of silicon or the like. Is connected to the n-electrode (not shown). As shown in FIG. 70, the light output from the active layer 226 to the second conductive layer 227 is reflected by the reflection surface 240 and exits from the light extraction window 228.
• the light path is reflected at the opposite reflection surface 240. Is converted by the relationship of the reflection angle with respect to the incident angle, and when the light again enters the light extraction window 228 and does not exceed the critical angle, the light exits from the light extraction window 228.
• the total reflection condition is as follows.
• the total reflection condition is not satisfied in the area of the extraction window 2 28, so that the light is extracted to the outside, so that the extraction efficiency is improved and the luminance is increased.
• the light extraction efficiency is definitely improved, Brightness can be improved.
• FIGS. 72 to 76 are views showing simulations of the effect of the reflecting surface
• FIG. 72 is a perspective view showing a model of a crystal growth layer on which the calculation is based.
• 7 3 shows a model for calculating the angle dependence.
• FIG. 74 is a diagram showing the angle dependency of the light extraction efficiency
• FIG. 75 is a diagram showing a model for calculating the height dependency
• FIG. It is a figure which shows the height dependence of extraction efficiency.
• the results are as shown in Fig. 76, and it can be seen that the light extraction efficiency is improved as the height d increases. In other words, based on the simulation results shown in FIGS.
• the light extraction efficiency tends to be improved as the light extraction efficiency increases.
• the semiconductor light emitting device of this embodiment a part of the light extracted as an output is reflected by the reflecting surface 240 extending in parallel with the inclined crystal plane, and reflected by the reflecting surface 240.
• the light extraction efficiency is improved, so that the semiconductor light emitting device can have higher luminance.
• the inclined crystal plane serving as the basis of the reflecting surface 240 is easily formed in the process using selective growth, it can be obtained without any additional steps such as etching in a self-forming manner. .
• the semiconductor light-emitting device having the device structure shown in FIG. 70 in addition to the effect of enlarging the area of the active layer, since the S-plane inclined with respect to the main surface of the substrate is used, the pounds from nitrogen atoms to gallium atoms are used. As a result, the effective VZIII ratio can be increased, and the performance of the semiconductor light emitting device to be formed can be improved. In addition, dislocations extending upward from the substrate may bend, so that defects can be reduced. Furthermore, by using an inclined crystal plane inclined with respect to the main surface of the substrate, multiple reflection can be prevented, and the generated light can be efficiently guided to the outside of the element.
• the active layer 226 has a structure in which the active layer 226 is separated in an island shape, it is not necessary to etch the active layer 226. Therefore, there is no unnecessary damage to the active layer. Further, there is an advantage that the effective area of the active layer 226 is not reduced by the electrodes.
• This embodiment is an example in which a strip-shaped crystal growth layer 255 is formed on a growth substrate 250, and as shown in FIG.
• a stripe-shaped crystal growth layer 254 is formed from the window region of the mask layer 252 on the layer 251.
• the side face 256 of the stripe-shaped crystal growth layer 255 is an S-plane, and the active layer 255 also extends to the inclined side face 256.
• Light extracted from the semiconductor light emitting device is parallel to the S plane Since the light is reflected by the reflecting surface extending to the surface, the light extraction efficiency is improved by the reflection on the reflecting surface, so that the brightness of the semiconductor light emitting device can be increased, and the reflection surface
• the underlying inclined crystal plane is easily formed in the process by using selective growth. In addition, luminance saturation can be effectively reduced, and the reliability of the device can be improved.
• This embodiment is an example in which a rectangular trapezoidal crystal growth layer 264 is formed on a growth substrate 260, and as shown in FIG. 78, an underlayer formed on the growth substrate 260 is formed.
• a striped and trapezoidal crystal growth layer 264 is formed from the window region of the mask layer 262 on the growth layer 261.
• the side face 2663S of the crystal growth layer 2664 having a trapezoidal rectangular shape is defined as an S-plane, and the face 2664 at the end in the longitudinal direction is defined as a (111-222) plane.
• the upper surface 26 3 C of the crystal growth layer 26 4 is the same C plane as the main surface of the substrate.
• the active layer is not shown, the active layer also extends to the inclined side surface 2663S, the surface 264, and the upper surface 263C, and light extracted from the semiconductor light emitting device extends parallel to the S surface. It will be reflected by the existing reflecting surface.
• the light extraction efficiency is improved by the reflection on the reflecting surface of the semiconductor light emitting device, the brightness of the semiconductor light emitting device can be increased, and the inclined crystal plane serving as the basis of the reflecting surface can be achieved. Is easily formed in the process using selective growth. In addition, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• a square trapezoidal crystal growth layer 274 is formed on a growth substrate 270, and an underlying growth layer formed on the growth substrate 270 is formed.
• a truncated quadrangular pyramid-shaped crystal growth layer 273 is formed in a pattern arranged in a matrix from the window region of the mask layer 272 on the mask 271.
• the crystal growth layer 2 7 3 in the shape of a truncated quadrangular pyramid has one inclined side 2 7 3 And the other sloping side 274 is the (1 1 1 2 2) plane.
• the upper surface 2753C of the crystal growth layer 2731 is the same C-plane as the main surface of the substrate.
• the active layer is not shown, the active layer also extends to the inclined side surface 273S, the surface 274, and the upper surface 273C, and light extracted from the semiconductor light emitting device is parallel to the S surface.
• the light is reflected on the extended reflecting surface, and the light extraction efficiency is improved by the reflection on the reflecting surface. Therefore, the brightness of the semiconductor light emitting device can be increased, and the inclined crystal plane serving as the basis of the reflection surface can be easily formed in the process by utilizing selective growth.
• luminance saturation can be effectively reduced, and the reliability of the device can be improved.
• a hexagonal pyramid-shaped crystal growth layer 283 is formed on a growth substrate 280, and a base growth layer formed on the growth substrate 280 is formed.
• a hexagonal pyramid-shaped crystal growth layer 283 is formed in a pattern arranged in a matrix from the window region of the mask layer 282 on the mask 281.
• the hexagonal pyramid-shaped crystal growth layer 2 83 has its S-plane on each inclined side surface, and the active layer is not shown in the figure, but its cross section is as shown in FIG.
• the light that extends along the surface and is extracted from the semiconductor light-emitting element is reflected by a reflection surface that extends parallel to the S surface, and the reflection on the reflection surface improves light extraction efficiency.
• the luminance of the semiconductor light emitting device can be increased.
• the inclined crystal plane which is the basis of the reflection plane, is easily formed in the process using selective growth.
• luminance saturation can be effectively reduced, and the reliability of the device can be improved.
• a hexagonal pyramid-shaped crystal growth layer 293 is formed on a growth substrate 290, and an undergrowth formed on the growth substrate 290 is performed.
• a crystal growth layer 293 having a truncated hexagonal pyramid shape is formed in an arrayed pattern.
• the crystal growth layer 293 having a truncated hexagonal pyramid shape has three inclined side surfaces 293 3, and the upper surface 293 C is the same C plane as the main surface of the substrate.
• an M-plane (1-100) plane is also formed at a low height on the bottom side of the hexagonal pyramid-shaped crystal growth layer 293.
• the cross section is as shown in Fig. 69, which extends along each of the inclined S-plane and C-plane, and the light extracted from the semiconductor light-emitting device is the S-plane.
• the light is reflected by a reflection surface extending in parallel with the light reflection surface, and the light extraction efficiency is improved by the reflection on the reflection surface, so that the semiconductor light-emitting element can have higher luminance.
• the inclined crystal plane which is the basis of the reflection plane, is easily formed in the process by using selective growth. In addition, luminance saturation can be effectively reduced, and the reliability of the device can be improved.
• a hexagonal pyramid-shaped crystal growth layer 298 and a trapezoidal-shaped crystal growth layer 299 are formed on a growth substrate 295.
• the crystal growth layers 298 are formed so that their shapes are alternately arranged in a line.
• the crystal growth layer 29 9 in the shape of a truncated quadrangular pyramid has an inclined side surface 29 9 S as an S-plane, and the other inclined side surface 29 9 Z as a (11- 22) plane.
• the upper surface 29 9 C of the crystal growth layer 29 9 is the same C plane as the main surface of the substrate.
• each inclined side surface 298S is an S-plane.
• the active layer is not shown, the cross section is as shown in FIG. 69, extending along each of the inclined S-plane and C-plane, and the light extracted from the semiconductor light emitting device is defined as the S-plane.
• the light will be reflected by the reflecting surface that extends in parallel, Since the light extraction efficiency is improved, the luminance of the semiconductor light emitting device can be increased.
• the inclined crystal plane which is the basis of the reflection plane, is easily formed in the process by using selective growth. In addition, luminance saturation can be effectively reduced, and the reliability of the device can be improved.
• the present embodiment is a method for manufacturing the above-described semiconductor light emitting device.
• the manufacturing method will be described in the order of steps with reference to FIG. 83 or FIG.
• an n-type GaN layer 301 is formed as a base growth layer by, for example, a MOCVD method. At this time, the n-type GaN layer 301 does not need to be n-type from the beginning, and it is sufficient if the top surface is n-type. As an example, an n-type GaN layer 301 can be formed by doping silicon.
• a mask layer 302 as a growth inhibition film made of a silicon oxide film, a silicon nitride film, a tungsten film, or the like is formed on the entire surface of the n-type GaN layer 301 by CVD or the like. Then, the mask layer 302 is removed corresponding to the region where the element is to be formed, and a plurality of hexagonal window regions 303 are formed.
• n-type (Al) GaN layer 304 as a crystal growth layer is formed from the window region 303 by crystal growth.
• the n-type (A 1) GaN layer 304 also functions as a cladding layer and has a substantially hexagonal pyramid shape. The sloped side is the S-plane.
• an InGaN layer 305 serving as an active layer and a p-type (A 1) GaN layer 303 are further laminated as shown in FIG. 86.
• the InGaN layer 304 serving as an active layer is a crystal growth layer and extends not parallel to the main surface of the growth substrate 300 along the S-plane of the (Al) GaN layer 304.
• the area S of the active layer is larger than the area of the window region 303 and the mapped area of the crystal growth layer. It is formed with sufficient spread.
• An A1Gan cap layer may be formed on the InGaN layer 305.
• the inclined crystal surface of the p-type (Al) GaN layer 303 becomes the reflection surface.
• the p-electrode 309 is formed on the p-type (A 1) GaN layer 306 functioning as a reflection surface, the p-electrode 309 itself also functions as a reflection film or a light shielding film. Become.
• the basic structure of the present invention can be made a single semiconductor light emitting element by separating the first growth film (first conductive film) by etching before or after the abrasion.
• the S plane is easily formed by selective growth, and the active layer and the reflection surface are formed on the crystal growth layer having the S plane as a side surface.
• the reflecting surface can be formed in a self-forming manner. Part of the light extracted as output is the inclined crystal plane formed by selective growth. The light is reflected by a reflecting surface extending in parallel with the light emitting device, and the light extraction efficiency is improved by the reflection, so that the brightness of the semiconductor light emitting element can be increased.
• FIG. 89 shows the structure of the semiconductor light emitting device of Example 27.
• a second growth layer 311 is partially formed on the growth substrate 310, and a first conductive layer 311, an active layer 313, and a second conductive layer 319 are formed so as to cover the second growth layer 311. Is done.
• the area of the active layer 313 becomes larger than the mapping area of the crystal growth layer by selective growth. Therefore, luminance saturation can be effectively alleviated, and the reliability of the device can be improved.
• a hexagonal opening is most preferable to form a hexagonal pyramid as the window region.
• a stable surface is finally formed by itself, so that the opening shape and the direction of the boundary are arbitrary. It doesn't matter.
• there are stable planes such as a (1 1-22) plane and a (1-100) plane in addition to the (1-101) plane.
• the present invention can also be applied to the present invention.
• A1GaInP compounds commonly used as red LED materials at present are zinc-type crystals, but the (011) and (111) planes of the (001) substrate, etc. It is possible to form the stable surface and the active layer on it by growing under appropriate conditions.
• the effective III ratio is increased by using the inclined crystal plane inclined with respect to the main surface of the substrate. Incorporation of atoms constituting the mixed crystal can be increased, and uneven emission can be reduced. Further, dissociation of nitrogen atoms can be suppressed, and further, crystallinity can be improved and the point defect concentration can be reduced. Thereby, the saturation phenomenon of luminance when a strong current flows through the light emitting element can be suppressed. Further, by using an inclined crystal plane inclined with respect to the main surface of the substrate, multiple reflection can be prevented, and the generated light can be efficiently guided to the outside of the element.
• the semiconductor light emitting device of the present invention a part of the light taken out as an output is reflected on the reflecting surface extending in parallel with the inclined crystal plane formed by the selective growth. As a result, the light extraction efficiency is improved, so that the brightness of the semiconductor light emitting device can be increased.
• the inclined crystal plane serving as the base of the reflection surface is easily formed in the process by using selective growth, it can be obtained without any additional steps such as etching in a self-forming manner.
• the effective area of the active layer can be increased, and a reduction in resistance, a decrease in heat generation, and an improvement in reliability can be expected. Since the load per area can be reduced, high brightness and high reliability can be expected.
• the area of the conductive layer and the connection with the electrode are simultaneously formed with the active layer.
• the light extraction efficiency can be improved because the crystal area of the crystal layer can be increased by increasing the crystal area.
• All or a part of the first conductivity type cladding layer, the active layer, and the second conductivity type cladding layer extend to the mask layer around the opening. In this way, the mask is not removed, so that there is no loss of support at the lower part of the laterally grown portion, and if the entire mask layer is left, the step in the selective growth structure is reduced. Even when the substrate is peeled off by laser irradiation or the like, the n-electrode and the p-electrode can be reliably separated while the mask layer functions as a support layer of the first growth layer, thereby preventing a short circuit.
• the first conductive type clad layer, the active layer, and the second conductive type clad layer have a structure in which the entire second growth layer is covered.
• the structure can be such that each end of the active layer and the second conductive clad layer is directly in contact with the mask layer. Therefore, deterioration such as oxidation of the active layer is prevented beforehand, and a further effect can be obtained when the light emitting area is further increased.
• a fine device is formed in a small range by using selective growth and the like and using a crystal layer having an inclined crystal plane, so that the density can be easily increased. Separation of each element such as dicing is easy.
• a part of the stable surface for selective growth is flat on the atomic scale, and there is no unevenness in brightness. By using this part, light emission with a narrow half width can be obtained. Therefore, not only a semiconductor light emitting diode but also a semiconductor laser using this surface can be manufactured.
• the effective area of the active layer can be increased, and a reduction in resistance, a decrease in heat generation, and an improvement in reliability can be expected, and a load per unit area on the active layer can be reduced. High brightness, high Reliability can be expected. This is particularly effective when the element size is reduced. Further, in the semiconductor light emitting device of the present invention, the area of the conductive layer and the contact area with the electrode can be increased simultaneously with the active layer, and the crystal plane of the crystal layer has a slope, so that the light extraction efficiency can be improved. It is possible.

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