JP6336658B2 - 半導体ウェーハをプラズマ・ダイシングする方法及び装置 - Google Patents
半導体ウェーハをプラズマ・ダイシングする方法及び装置 Download PDFInfo
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- JP6336658B2 JP6336658B2 JP2017104134A JP2017104134A JP6336658B2 JP 6336658 B2 JP6336658 B2 JP 6336658B2 JP 2017104134 A JP2017104134 A JP 2017104134A JP 2017104134 A JP2017104134 A JP 2017104134A JP 6336658 B2 JP6336658 B2 JP 6336658B2
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- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S414/00—Material or article handling
- Y10S414/135—Associated with semiconductor wafer handling
- Y10S414/139—Associated with semiconductor wafer handling including wafer charging or discharging means for vacuum chamber
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Drying Of Semiconductors (AREA)
- Dicing (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Plasma Technology (AREA)
Description
1)破損及び欠けが低減される。
2)20ミクロンを十分に下回るまで、ひき目寸法を低減させることができる。
3)ダイの数が増大しても、処理時間はあまり増大しない。
4)ウェーハが薄ければ薄いほど、処理時間が低減される。
5)ダイのトポロジは直線の形式に制限されない。
Claims (5)
- 基板をプラズマ・ダイシングする方法であって、
移動アームを供給するステップと、
壁を有する処理チャンバを供給するステップと、
前記処理チャンバの前記壁に隣接してプラズマ源を供給するステップと、
前記処理チャンバ内に加工物支持部を供給するステップと、
前記加工物支持部内にリフト機構を供給するステップと、
上面と底面を有する前記基板を供給するステップであって、前記上面は複数のデバイス構造とストリート領域を有しているステップと、
加工物を形成するために前記基板の前記底面をフレーム上の支持フィルム上に配置するステップと、
前記移動アームを用いて前記加工物の前記フレームの下側を支持するステップと、
前記移動アームを用いて前記支持された加工物を前記処理チャンバ内の前記リフト機構上に移動するステップであって、前記リフト機構は前記加工物の前記フレームに下側から接触し、前記加工物の前記処理チャンバ内への移動が真空中で行われるステップと、
前記プラズマ源によってプラズマを生成するステップと、
前記生成されたプラズマによって、前記処理チャンバ内にある前記加工物の前記基板の前記上面の保護されていない前記ストリート領域をエッチングするステップと
を含む方法。 - 位置合わせ用具を用いて、前記移動アームの中の前記加工物を位置合わせするステップをさらに含む、請求項1に記載の方法。
- 前記リフト機構が前記加工物の前記基板に接触しないことをさらに含む、請求項1に記載の方法。
- 前記移動アームが前記加工物の前記基板に接触しないことをさらに含む、請求項3に記載の方法。
- 前記移動アームが、前記移動するステップの間、前記フレームを前記基板に対して共平面に維持することをさらに含む、請求項4に記載の方法。
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US201161452450P | 2011-03-14 | 2011-03-14 | |
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US13/412,119 US8802545B2 (en) | 2011-03-14 | 2012-03-05 | Method and apparatus for plasma dicing a semi-conductor wafer |
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