CN206505893U - 半导体设备 - Google Patents
半导体设备 Download PDFInfo
- Publication number
- CN206505893U CN206505893U CN201621186363.XU CN201621186363U CN206505893U CN 206505893 U CN206505893 U CN 206505893U CN 201621186363 U CN201621186363 U CN 201621186363U CN 206505893 U CN206505893 U CN 206505893U
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- Prior art keywords
- layer
- conductive
- light transmissive
- dielectric layer
- semiconductor
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Classifications
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- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
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Abstract
半导体设备。一种设备,其包括:光透射的载体结构;在所述光透射的载体结构上的第一重分布结构;以及包括光学组件的半导体晶粒,其是附接且电耦接至所述第一重分布结构,使得所述半导体晶粒的底表面是面对所述第一重分布结构以及所述光透射的载体结构。
Description
技术领域
本实用新型有关于半导体设备。
背景技术
现有用于形成半导体封装的半导体封装及方法是不足的,其例如是导致过多的成本、降低的可靠度、或是过大的封装尺寸。习知及传统的方式的进一步限制及缺点对于具有此项技术的技能者而言,通过此种方式与如同在本申请案的其余部分中参考图式所阐述的本揭露内容的比较将会变成是明显的。
实用新型内容
此揭露内容的各种特点是提供一种用于制造一半导体装置的方法以及一种藉此所产生的半导体装置。例如且非限制性的,此揭露内容的各种特点是提供一种用于制造一半导体装置的方法、以及一种藉此所产生的半导体装置,其包括一透明的、半透明的、非不透明的、或者是光透射的外表面。
一种设备,其包括:光透射的载体结构;在所述光透射的载体结构上的第一重分布结构;以及包括光学组件的半导体晶粒,其是附接且电耦接至所述第一重分布结构,使得所述半导体晶粒的底表面是面对所述第一重分布结构以及所述光透射的载体结构。如所述设备,其进一步包括在所述半导体晶粒的所述底表面与所述第一重分布结构之间的光透射的底胶填充材料。如所述设备,其进一步包括:在所述半导体晶粒的顶表面之上的第二重分布结构;以及导电的互连结构,其是附接至所述第二重分布结构的导电层以形成所述半导体封装的外部的连接器。如所述设备,其进一步包括一或多个导电贯孔,其是将所述第二重分布结构电耦接至所述第一重分布结构。如所述设备,其进一步包括另一半导体晶粒,其是附接且电耦接至所述第一重分布结构,使得所述另一半导体晶粒的另一光学组件是面对所述第一重分布结构以及所述光透射的载体结构。如所述设备,其进一步包括在所述半导体晶粒的底表面与所述第一重分布结构之间的光透射的底胶填充材料。如所述设备,其中所述光透射的载体是包括透镜,其被配置以导引光至所述光学组件、或是从所述光学组件导引光。如所述设备,其中所述光透射的层是提供光抗反射的性质。如所述设备,其中所述光透射的层是提供滤光的性质。如所述设备,其中所述光透射的层是提供光极化的性质。
附图说明
图1A至1J是展示描绘根据本揭露内容的各种特点的一种制造一半导体装置的方法的横截面图。
图2是展示描绘根据本揭露内容的各种特点的一种半导体装置的横截面图。
图3A至3J是展示描绘根据本揭露内容的各种特点的一种制造一半导体装置的方法的横截面图。
图4A至4F是展示描绘根据本揭露内容的各种特点的一种制造一半导体装置的方法的横截面图。
图5是展示描绘根据本揭露内容的各种特点的一种半导体装置的横截面图。
具体实施方式
以下的讨论是藉由提供本揭露内容的例子来呈现本揭露内容的各种特点。此种例子并非限制性的,并且因此本揭露内容的各种特点的范畴不应该是必然受限于所提供的例子的任何特定的特征。在以下的讨论中,措辞"例如"、"譬如" 以及"范例的"是并非限制性的,并且大致与"举例且非限制性的"、"例如且非限制性的"、及类似者为同义的。
如同在此所利用的,"及/或"是表示在表列中藉由"及/或"所加入的项目中的任一个或多个。举例而言,"x及/或y"是表示三个元素的集合{(x)、(y)、(x,y)} 中的任一元素。换言之,"x及/或y"是表示"x及y中的一或两者"。作为另一例子的是,"x、y及/或z"是表示七个元素的集合{(x)、(y)、(z)、(x,y)、(x,z)、(y,z)、 (x,y,z)}中的任一元素。换言之,"x、y及/或z"是表示"x、y及z中的一或多个"。
在此所用的术语只是为了描述特定例子之目的而已,因而并不欲限制本揭露内容。如同在此所用的,除非上下文另有清楚相反的指出,否则单数形是欲亦包含复数形。进一步将会理解到的是,当术语"包括"、"包含"、"具有"、与类似者用在此说明书时,其指明所述特点、整数、步骤、操作、组件及/或构件的存在,但是并不排除一或多个其它特点、整数、步骤、操作、组件、构件及/或其群组的存在或是添加。
将会了解到的是,尽管术语第一、第二、等等可被使用在此以描述各种的组件,但是这些组件不应该受限于这些术语。这些术语只是被用来区别一组件与另一组件而已。因此,例如在以下论述的一第一组件、一第一构件或是一第一区段可被称为一第二组件、一第二构件或是一第二区段,而不脱离本揭露内容的教示。类似地,各种例如是"上方"、"下方"、"侧边"与类似者的空间的术语可以用一种相对的方式而被用在区别一组件与另一组件。然而,应该了解的是构件可以用不同的方式加以定向,例如一半导体装置可被转向侧边,因而其"顶" 表面是水平朝向的,并且其"侧"表面是垂直朝向的,而不脱离本揭露内容的教示。此外,术语"在…上"在文件中将会被利用来表示"在…上"以及"在…正上方"(例如,其中没有介于中间的层)。
本揭露内容的各种特点是提供一种半导体装置,其包括一透明的、半透明的、非不透明的、或者是光透射的外部的载体、晶圆或层、以及其之一种制造方法。如同在此所利用的,术语"光透射的"是指一种材料的一特征,其容许光通过所述材料。再者,除非另有限定,否则术语"光"是被用来指称在可见光谱,亦即400-790太赫兹(THz)中的电磁辐射、以及在近红外线光谱,亦即120-400THz、以及近紫外线光谱,亦即790-1000THz中的电磁辐射。
在图式中,各种的尺寸(例如,层厚度、宽度、等等)可能会为了举例说明的清楚起见而被夸大。此外,相同的组件符号是在各种例子的讨论中指称相似的组件。
现在讨论将会是参照所提供的各种范例的图标,以强化本揭露内容的各种特点的理解。应了解的是,此揭露内容的范畴并不限于在此所提供及论述的例子的特定特征。
描绘根据本揭露内容的各种特点的一种制造一半导体装置100的方法的横截面图是被展示在图1A至1J中。所述范例的制造方法例如可以包括提供一具有一第一介电层111的载体110、形成一第一导电层121、形成一第二导电层123 以及一凸块下金属125、附接一第一晶圆支撑系统(WSS)1、移除所述载体110、在所述第一介电层111中形成一开口111a、在所述开口111a形成一垫或是微凸块垫126(在以下称为垫126)、附接一半导体晶粒130并且利用一模制材料140(例如,一树脂、密封剂、模制化合物、等等)来模制、分开所述第一WSS1、附接一光透射的层170(例如,一晶圆、一面板、一晶圆或面板的一经单粒化的构件、等等)以及一第二晶圆支撑系统(WSS)2、附接一导电的互连结构160、以及分开所述第二WSS 2。
如同在图1A中所示,一具有一第一介电层111的载体110是被形成或是提供。尤其,所述载体110可以提供一平面的顶表面以及一平面的底表面。所述载体110(或是任何在此论述的载体)可包括各种不同类型的载体材料的任一种。所述载体110例如可以包括一种半导体材料(例如,硅、GaAs、等等)、玻璃、陶瓷(例如,多孔的陶瓷、等等)、金属、等等。所述载体110亦可包括各种不同类型的配置的任一种。例如,所述载体110可以是具有一种块形式(例如,一晶圆形式、一矩形面板形式、等等)。同样例如的是,所述载体110可以是具有一种单独的形式(例如,从一晶圆或面板被单粒化、原先就是以一种单独的形式形成的、等等)。所述载体110例如可以与任何在此论述的载体共享任一个或是所有的特征。
一例如是一无机介电层(例如,一硅氧化物层、一硅氮化物层、氧化层、氮化层、等等)的第一介电层111可以是(或者可以已经是)被形成在所述载体110 的表面上。例如,所述第一介电层111可以是已经(或者可以是)通过一种氧化制程而被形成。例如,具有一预设厚度的一硅氧化物层及/或硅氮化物层可以藉由在一约900℃或更高的温度下供应氧气及/或氮化物气体至一硅晶圆(例如,一热氧化制程、等等)来加以形成。所述第一介电层111或是其之一部分亦可包括一在无制程协助下自然被形成在所述载体110上的原生氧化层。所述第一介电层111在此亦可以被称为一保护层。所述第一介电层111例如可以是从0.01到0.8微米厚的。
相较于是一种有机材料的一聚合物层,一无机材料层(例如,一硅氧化物层、一硅氮化物层、等等)可以容许(或是有助于)一光蚀刻制程能够更精确地加以执行,因而具有一相对较细的线/间隔/厚度(例如,线路宽度、在相邻的线路之间的间隔、及/或线路厚度)的一导电层可被形成在所述无机材料层上。例如,具有一约2/2/2微米(μm)至约10/10/10μm的线/间隔/厚度的一导电层可被形成在一无机材料层上(例如,在一硅氧化物(或是二氧化硅)层、硅氮化物层、氧化层、氮化层、等等上)。本揭露内容的范畴并不限于无机介电材料。例如,在各种的范例实施方式中,所述介电层111可包括一种有机材料。此外,所述载体110并不需要被设置有所述介电层111。
如同在图1B中所示,一第一导电层121(其在此亦可被称为一重分布层)可被形成在所述第一介电层111上。在一范例的实施方式中,一第一晶种层(未显示)可被形成在所述第一介电层111上,并且所述第一导电层121可被形成在所述第一晶种层上。所述第一导电层121接着可以被覆盖一第二介电层122,其在此亦可以被称为一钝化(passivation)层。
所述第一晶种层及/或任何在此论述的晶种层都可以是由各种材料的任一种所形成的,其包含但不限于钨、钛、其等同物、其组合、其合金、等等。所述第一晶种层可以利用各种制程的任一种来加以形成。例如,所述第一晶种层可以利用一无电的电镀制程、一电解的电镀制程、一溅镀制程、等等中的一或多种来加以形成。例如,所述第一晶种层可以是由TiW以及一Cu靶材所形成的。所述第一晶种层及/或任何在此论述的晶种层亦可被称为一导电层。再者,任何在此论述的晶种层都可以利用相同或类似的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。此外,所述第一晶种层及/ 或任何在此论述的晶种层都可包括多个层。举例而言,所述第一晶种层可包括一第一TiW层以及一第二Cu层。
所述第一导电层121可以是由各种材料的任一种所形成的。例如,所述第一导电层121可以是由铜、铝、金、银、钯、其等同物、其组合、其合金、其它导电材料、等等所形成的。所述第一导电层121例如可以利用各种制程的任一种来加以形成。例如,所述第一导电层121可以利用一无电的电镀制程、一电解的电镀制程、一溅镀制程、等等中的一或多种而被形成。所述第一导电层 121的图案化或绕线例如可以是利用各种制程的任一种来加以达成。例如,所述第一导电层121可以利用一种使用一光阻、等等的光蚀刻制程而被图案化或绕线。例如,光阻可以被旋转涂覆(或是以其它方式来施加,例如一干膜、等等) 在一晶种层上。所述光阻接着例如可以利用一屏蔽及照明制程而被硬化。接着所述光阻的部分可被蚀去,残留的光阻可以在一去残渣制程中加以移除,并且干燥(例如,旋转清洗干燥)可加以执行以形成一样版的光阻。在形成所述第一导电层121之后,所述样版可被剥除(例如,以化学方式被剥除、等等),并且从所述第一导电层121露出的第一晶种层可加以蚀刻。
所述第一导电层121及/或任何在此论述的导电层亦可被称为一重分布层。再者,任何在此论述的导电层都可以利用相同或类似的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。此外,所述第一导电层121、及/或其之形成可以与在此揭露的任何其它导电层及/或其之形成共享任一个或是所有的特征。
所述第二介电层122可以是由各种材料的任一种所形成的。例如,所述第二介电层122可以是由一种有机材料(例如,例如是聚酰亚胺的聚合物、苯环丁烯(BCB)、聚苯并恶唑(PBO)、其等同物、其组合、等等)所形成的。同样例如的是,所述第二介电层122可以是由一种无机材料所形成的。所述第二介电层122 可以利用各种制程的任一种来加以形成。例如,所述第二介电层122可以利用旋转涂覆、喷雾涂覆、浸渍涂覆、棒涂覆、其等同物、其组合、等等中的一或多种来加以形成。所述第二介电层122及/或任何在此论述的介电层亦可被称为一钝化层。再者,任何在此论述的介电层都可以利用相同或类似的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。此外,所述第二介电层121、及/或其之形成可以与在此揭露的任何其它介电层及/或其之形成共享任一个或是所有的特征。
如同在此论述的,在一范例的实施方式中,由于所述第一导电层121不论具有或是不具有一下面的晶种层,其都可被形成在所述无机第一介电层111上 (例如,直接被形成在所述无机第一介电层111上),因此相较于其它可被形成在有机介电层上的导电层,其可被形成、或是更轻易地被形成以具有一更细的线/ 间隔/厚度。
不论具有或是不具有一晶种层的第一导电层121以及所述第二介电层122 的形成都可以利用相同的材料及/或制程、或是不同的个别的材料及/或制程来加以重复任意次数。在图1B-1J中的范例图标是展示此种层的两次形成。就此而论,所述层在图式中是被提供类似的组件符号(例如,重复所述第一导电层121以及第二介电层122)。
一开口或孔122a可被形成在所述第二介电层122中,并且所述第一导电层 121的一特定的区域可以通过所述开口122a而被露出至外部。所述开口122a可以用各种方式的任一种来加以形成(例如,机械式及/或雷射剥蚀、化学蚀刻、微影、等等)。所述第二介电层122(或是任何在此论述的介电层)亦可以是例如藉由屏蔽、或是其它选择性的介电层形成制程,而原先就被形成具有开口122a。
如同在图1C中所示,至少一层的一第二导电层123以及一凸块下金属125 可被形成在所述第一导电层121上及/或在所述第二介电层122上。在一范例的实施方式中,一第二晶种层(未显示)可被形成在所述开口122a的内部,例如是在被形成于所述第二介电层122中的开口122a的侧壁上及/或在藉由所述开口 122a所露出的第一导电层121上。额外或替代的是,所述第二晶种层可被形成在所述开口122a的外部,例如是在所述第二介电层122的顶表面上。如同在此论述的,所述第二晶种层可以利用和被用来形成所述第一晶种层相同的材料及/ 或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。所述第二晶种层或是任何在此论述的晶种层在此亦可以被称为一导电层。
继续所述范例的实施方式,所述第二导电层123可被形成在所述第二晶种层上。例如,所述第二导电层123可被形成以填入在所述第二介电层122中的开口122a、或是至少覆盖所述开口122a的侧表面。所述第二导电层123可以利用和所述第一导电层121相同的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。所述第二导电层123在此亦可以被称为一重分布层。
所述第二导电层123接着可以被所述第三介电层124所覆盖。所述第三介电层124可以是由各种材料的任一种所形成的,且/或利用各种形成介电质的制程的任一种。例如,所述第三介电层124可以利用和被利用以形成所述第二介电层122相同的材料及/或制程来加以形成。
一开口或孔124a可被形成在所述第三介电层124中,并且所述第二导电层 123的一特定的区域可以通过所述开口124a而被露出至外部。所述开口124a可以用各种方式的任一种来加以形成,例如是机械式及/或雷射剥蚀、化学蚀刻、等等。或者是,所述第三介电层124可以是原先就被形成具有于其中的开口124a。
一凸块下晶种层(未显示)可被形成在所述开口124a的内部,例如是在被形成于所述第三介电层124中的开口124a的侧壁上及/或在藉由所述开口124a所露出的第二导电层123上。替代或是额外地,所述凸块下晶种层可被形成在所述开口124a的外部,例如是在所述开口124a的周围及/或环绕开口124a的第三介电层124的顶表面上。如同在此论述的,所述凸块下晶种层可以利用和被用来形成所述第一晶种层及/或所述第二晶种层相同的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。所述凸块下晶种层或是任何在此论述的晶种层在此亦可以被称为一导电层。
一凸块下金属125可被形成在所述凸块下晶种层上。所述凸块下金属125 可以是由各种材料的任一种所形成的,其非限制性的例子是在此加以呈现。例如,所述凸块下金属125可以由铬、镍、钯、金、银、其合金、其组合、其等同物、等等中的至少一个来加以形成。所述凸块下金属125例如可以包括Ni及 Au。于是,凸块下金属125例如也可以包括Cu、Ni及Au。所述凸块下金属125 亦可以利用各种制程的任一种而被形成,其非限制性的例子是在此加以呈现。例如,所述凸块下金属125可以利用一无电的电镀制程、电镀制程、溅镀制程、等等中的一或多种来加以形成。所述凸块下金属125例如可以避免或禁止一金属间化合物在所述导电的互连结构160与所述第二导电层123之间的接口处的形成,藉此改进连接至所述导电的互连结构160的可靠度。所述凸块下金属125 在此亦可以被称为一导电层。所述凸块下金属125可包括多个层。例如,所述凸块下金属125可包括一第一层的Ni以及一第二层的Au。
尽管未描绘在图1A-1J中,在所述凸块下金属125的形成之后,一边缘修整(或是切削)制程可加以执行,例如其中正被处理的晶圆的一边缘是被修整(或是被切削)。此种修整可以用各种方式来加以执行,例如是藉由研磨。此种边缘修整例如可以在后续的处理期间保护所述晶圆免于碎屑及削片。
为了在此讨论的目的,所述第一导电层121、第二介电层122、第二导电层 123、以及第三介电层124可被视为是一中介体120的构件。再者,在此所述的凸块下金属125以及垫126亦可被视为是所述中介体120的构件。所述术语"中介体"在此是被用来指称一种一般的重分布结构(例如,一种介电质及导体的分层式结构),其被插置在其它结构之间,并且此揭露内容的范畴不应该被有关中介体组成物的任意概念所限制或是界定。
如同在图1D中所示,所述第一WSS 1可以附接至所述第三介电层124以及凸块下金属125。在此时点,被展示在图1C的底部的载体110是被重新设置到图1D的顶端(例如,所述图是被颠倒或旋转)。所述第一WSS 1可以用各种方式的任一种来附接至所述第三介电层124及/或附接至所述凸块下金属125,其非限制性的例子是在此加以提供。例如,所述第一WSS 1(或是任何在此论述的WSS)可以利用一种暂时的黏着剂来附接至所述第三介电层124及/或附接至所述凸块下金属125,所述暂时的黏着剂是在曝露到热能或光能时、在曝露到特定的化学品时、等等失去其黏性。一或多个额外的释放层亦可被利用以使得所述第一WSS1的后续的释放变得容易。所述附接制程例如可以包括烘烤所述组件(例如,在250下30分钟、等等)。所述第一WSS 1可以由各种材料的任一种来加以形成。例如,所述第一WSS 1(或是任何在此论述的WSS)可以由一硅晶圆、一玻璃晶圆、一陶瓷晶圆、一金属晶圆、等等中的一或多个来加以形成。尽管所述第一WSS 1在此大致是以一晶圆的形式而被呈现,但是此揭露内容的范畴并不限于此种形状。
如同在图1E中所示,在所述结构的相对所述第一WSS 1的一侧边上的载体110(例如,所述第一介电层111先前被形成在其上的一硅晶圆)可被移除。在一范例的实施方式中,大部分的载体110可以通过一机械式研磨制程而被移除,并且接着其余的载体110可以通过一化学蚀刻制程而被移除。例如,一硅载体可以被研磨到10-30m的厚度,并且接着剩余的部分可以藉由一种除了研磨以外的制程(例如,藉由化学蚀刻、等等)来加以移除。在另一其中所述第一WSS 1 是包括一玻璃晶圆或板的范例情节中,此种玻璃晶圆或板被移除。因此,以此种方式,只有被形成在所述载体110的表面上的第一介电层111(例如,一硅氧化物层及/或一硅氮化物层)会留下。例如,如同在图1E中所绘的,只有具有一预设的厚度的第一介电层111维持在所述第一导电层121以及第二介电层122 上。所述载体移除制程亦可以移除所述第一介电层111的一部分(或是全部);例如,相较于原先被形成在所述载体110上时,所述第一介电层111在所述载体 110的移除之后可以是较薄的。在一范例的实施方式中,所述第一介电层111可以是由一种无机材料所形成的,并且所述第二及第三介电层122及124可以是由一种有机材料所形成的。然而,本揭露内容的范畴并不限于此种范例类型的材料。
如同在图1F中所示,复数个开口111a(或孔)可以选择性地被形成在所述第一介电层111中。所述开口111a可以用各种方式的任一种来加以形成(例如,机械式及/或雷射剥蚀、化学蚀刻、微影蚀刻制程、微影屏蔽及蚀刻制程、等等)。所述开口111a的每一个例如可以对应于所述第一导电层121的一藉由所述开口 111a而被露出至外部的个别的特定的区域。在一范例的实施方式中,一开口111a 是通过所述无机第一介电层111来将所述第一导电层121的一个别的特定的区域露出至外部。在一其中所述第一导电层121已被形成在一第一晶种层上的范例的实施方式中,所述第一导电层121已被形成在其上的所述第一晶种层的一特定的区域可以通过所述无机第一介电层111而被露出至外部。在一种其中一介电层或钝化层屏蔽是在一蚀刻所述开口111a的制程期间被利用的范例情节中,所述介电层可以在此种蚀刻之后被剥除,但是在某些实施例中亦可以保留作为一钝化层。
如同在图1G中所示,微凸块垫、其它垫、连接垫(land)、附接结构、或是晶粒附接结构126可被形成在所述开口111a中,因而每一个垫126是电连接至所述第一导电层121(例如是直接连接、经由一晶种层来连接、等等)。在一范例的实施方式中,一微凸块晶种层(未显示)可被形成在所述开口111a的内部,例如是在被形成于所述第一介电层111中的开口111a的侧壁上、及/或在所述第一导电层121上。替代或是额外地,所述微凸块晶种层可被形成在所述开口111a 的外部,例如是在所述第一介电层111的围绕所述开口111a的顶表面上。所述微凸块晶种层可以利用和在此关于其它晶种层或导电层所论述的相同的材料及/ 或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。所述微凸块晶种层及/或垫126在此亦可以被称为一导电层。
所述垫126接着可被形成在所述微凸块晶种层上。在一范例的实施方式中,所述第一导电层121形成在其上的第一晶种层、以及所述垫126形成在其上的微凸块晶种层可被插置在所述第一导电层121与所述垫126之间。例如,所述第一晶种层以及微凸块晶种层可以直接连接至彼此、或是彼此相互面对的。在各种的范例实施方式中,所述微凸块晶种层的形成可被跳过,并且所述垫126 可被形成在通过所述开口111a而被露出的第一晶种层上。
所述垫126可包括各种材料的任一种,其非限制性的例子是在此加以提供。例如,所述垫126可包括铜、铝、金、银、钯、一般的导电材料、导电材料、其等同物、其组合、其合金、任何在此论述的导电材料、等等。在一范例的实施方式中,所述垫126可包括Ni及Au。在另一范例的实施方式中,所述垫126 可包括Ni、Au及Cu。所述垫126可以利用各种制程的任一种来加以形成,其非限制性的例子是在此加以提供。例如,所述垫126可以利用一无电的电镀制程、一电解的电镀制程、一溅镀制程、等等中的一或多种来加以形成。
所述垫126是在图1G中被展示延伸超出(或是突出)所述第一介电层111的顶表面,但是此揭露内容的范畴并不限于此。例如,所述垫126可包括一顶表面是与所述第一介电层111的顶表面共平面的、或是可包括一顶表面是低于所述第一介电层111的顶表面。尽管大致被展示为包括一圆柱形的形状,但是所述垫126可包括各种几何配置的任一种,其之各种非限制性的例子是在此加以提供。
所述垫126可以替代地在接近图1A-1J中所示的整体制程的开始时,就被形成在所述第一介电层111中的一孔内。例如,介于图1A及1B之间,一孔可被形成在所述第一介电层111(若此种层存在的话)中,并且所述垫126可以在所述第一导电层121于载体110上的形成之前,就被形成在此种孔中的载体110 上。
如同在图1H中所示,所述半导体晶粒130可以电连接至所述垫126,并且可以利用所述模制材料140来加以模制。例如,所述半导体晶粒130的导电的凸块131(或是其它导电的附接结构,例如是导电柱、等等)是通过所述焊料132 来电连接至所述垫126。在某些实施例中,所述术语"凸块"可以整体地指称一导电的凸块或柱131、以及在所述柱131上的焊料132。所述半导体晶粒130的导电的凸块131可以用各种方式的任一种来附接至所述垫126,其非限制性的例子是在此加以呈现。例如,所述导电的凸块131可以利用各种焊料附接制程(例如,一质量回焊制程、一热压缩制程、一雷射焊接制程、等等)的任一种来焊接至所述垫126。同样例如的是,所述导电的凸块131可以利用一导电的黏着剂、膏、等等来耦接至所述垫126。同样例如的是,所述导电的凸块131可以利用一种直接的金属到金属的(例如,无焊料的)接合来耦接至所述垫126。在一范例情节中,一焊料膏可以利用一模版及刮浆板而被施加至所述垫126,所述半导体晶粒130 的导电的凸块131可被设置在所述焊料膏上或是之中(例如是利用一种拾放的制程),并且所述焊料膏接着可加以回焊。在所述半导体晶粒130的附接之后,所述组件可加以清洗(例如,利用热的DI水、等等)、遭受到一助焊剂清洗及烘烤制程、遭受到一电浆处理制程、等等。
在一范例的实施方式中,一底胶填充150可被形成在所述半导体晶粒130 与所述第一介电层111之间,例如是围绕所述导电的凸块131以及垫126的曝露到所述底胶填充150(并且因此被其封入)的部分。所述底胶填充150可包括各种底胶填充材料的任一种。此外,所述底胶填充150可以利用各种制程的任一种(例如,一毛细管底胶填充制程、利用一预先施加的底胶填充材料、等等)来加以形成。在所述半导体晶粒130与所述中介体120(如同在图1H中成组说明的各种层)之间的底胶填充150例如可以避免或是降低例如由于在所述半导体晶粒 130与所述中介体120之间的热膨胀系数的差异所造成的翘曲。
在所述模制(或封入)制程中,所述半导体晶粒130及/或中介体120可以利用一模制材料140(例如,一模制树脂或是其它的模制材料或密封剂)而被封入,所述模制材料140接着可加以固化。在一范例的实施方式中,所述模制材料140 可以覆盖所述半导体晶粒130的侧表面及顶表面。在另一范例的实施方式中,所述模制材料140可以只覆盖所述半导体晶粒130的侧表面(或是只有其之个别的部分),因此让所述半导体晶粒130的顶表面从所述模制材料140露出。所述模制材料140可以用各种方式的任一种(例如,压缩模制、转移模制、溢流(flood) 模制、等等)来加以形成。所述模制材料140可包括各种类型的模制材料的任一种。例如,所述模制材料140可包括一树脂、一环氧树脂、一热固的环氧树脂模制化合物、一室温固化类型、等等。
当所述模制材料140的一填充物(例如,具有无机填充物或是其它粒子构件) 的尺寸是小于(或是显著小于)在所述中介体120与所述半导体晶粒130之间的一空间或是一间隙的尺寸时,所述底胶填充150可以不被使用,并且所述模制材料140可以替代地填入在所述中介体120与所述半导体晶粒130之间的一空间或是间隙。在此种范例情节中,所述底胶填充的制程以及所述模制的制程可以利用一模制的底胶填充而被结合成为单一模制的制程。
所述半导体晶粒130例如可包括各种类型的半导体晶粒的任一种,其非限制性的例子是在此加以提供。例如,所述半导体晶粒130可包括一数字信号处理器(DSP)、一微控制器、一微处理器、一网络处理器、一电源管理处理器、一音频处理器、一视讯处理器、一RF电路、一无线基频系统单芯片(SoC)处理器、一传感器、一特殊应用集成电路、等等。一或多个被动的电性构件亦可被安装,以作为所述半导体晶粒130的替代及/或额外的。
如同在图1I中所示,一光透射的层170可以附接至所述半导体晶粒130及 /或模制材料140,并且一第二WSS 2可以附接至所述光透射的层170。所述光透射的层170可包含用以指引、导引、或聚焦光的透镜;提供光抗反射性质的抗反射层或涂层;提供光极化性质的极化层或涂层;提供彩色滤光性质的彩色滤光片层或涂层;及/或具有不同折射率的材料层,以便于提供所述半导体晶粒 130的一上表面或顶表面133所要的光学性质。例如,所述半导体晶粒130可包括光学传感器、光学接收器、光学发送器、或是其它发送、接收、侦测、及/或感测光的光学组件。所述光透射的层170可以帮助导引、或单纯是可以允许光的通过往返于所述半导体130的此种光学组件。
如同进一步在图1I中所示的,一第二WSS 2可以附接至所述光透射的层 170。例如,所述第二WSS 2可以与所述第一WSS 1共享任一个或是所有的特征。所述第二WSS 2例如可以是用一种类似所述第一WSS 1的方式(例如,利用一暂时的黏着剂、真空、机械式附接机构、等等)来加以附接。
在所述第二WSS 2的附接之后,所述第一WSS 1可以从所述第三介电层 124及/或凸块下金属125加以分开。如同在此论述的,所述第一WSS 1可以是已经利用一种暂时的黏着剂来附接至所述第三介电层124及/或附接至所述凸块下金属125,所述暂时的黏着剂是在曝露到热能、雷射(或光)能量、化学试剂、等等时失去其黏性(或是其之一大部分的黏性)。所述第一WSS 1从第三介电层 124及/或凸块下金属125的分开例如可以藉由将所述暂时的黏着剂曝露到使得所述黏着剂松脱的能量及/或化学品来加以执行。在一种其中一释放层被利用以附接一玻璃WSS 1的范例情节中,所述释放层(例如,介于所述黏着剂与所述第一WSS 1之间)可以通过所述玻璃WSS 1而遭受到雷射(或光)照射,以达成或协助所述第一WSS 1从所述黏着剂的释放。其它形式的晶圆支撑系统的附接/分离亦可被利用(例如,真空附接、机械式附接、等等)。若必要的话,被利用以附接所述第一WSS 1的黏着剂例如可以利用一溶剂来加以移除。
所述导电的互连结构160(或是复数个导电的互连结构160)可以电连接至所述露出的凸块下金属125(例如,在所述第一WSS 1的移除之后被露出)。在此时点,例如尽管所述光透射的层2被附接至所述半导体晶粒130以及模制材料140,但是所述导电的互连结构160仍然可以电连接至所述凸块下金属125。
所述导电的互连结构160可包括各种特征的任一种,其非限制性的例子是在此加以呈现。例如,所述导电的互连结构160可以是由一共晶焊料(Sn37Pb)、一高铅的焊料(Sn95Pb)、一无铅的焊料(SnAg、SnAu、SnCu、SnZn、SnZnBi、SnAgCu、以及SnAgBi)、其组合、其等同物、等等中之一所形成的。所述导电的互连结构160(及/或任何在此论述的导电的互连结构)例如可以包括一导电球体(例如,一焊料球体、一铜核心的焊料球体、等等)、一导电的凸块、一导电柱或柱体(例如,一铜柱、一焊料封顶的铜柱、一导线、等等)、等等。
所述导电的互连结构160例如可以利用各种回焊及/或电镀制程的任一种来连接至所述凸块下金属125。例如,挥发性助焊剂可加以沉积(例如,打点、印刷、等等)在所述凸块下金属125上,所述导电的互连结构160可加以沉积(例如,滴落、等等)在所述挥发性助焊剂上,并且接着一约150℃到约250℃的回焊温度可加以提供。在此时点,所述挥发性助焊剂例如可以被挥发并且完全地被移除。
如同在以上所提及的,所述导电的互连结构160可被称为一导电的凸块、一导电球体、一导电柱、一导电柱体、一导电的导线、等等,并且例如可被安装在一刚性印刷电路板、一挠性印刷电路板、一导线架、等等之上。例如,包含所述中介体120的半导体晶粒130接着可以电连接(例如,具有一覆晶的形式、或是类似于一覆晶的形式、等等)至各种基板(例如,主板基板、封装基板、导线架基板、等等)的任一种。
如同在图1J中所示,所述第二WSS 2可以从所述光透射的层170分开。例如,在完成的半导体装置100中,所述光透射的层170的顶表面153可被露出至外部。再者,所述半导体晶粒130的顶表面133以及所述模制材料140的顶表面143可以通过所述光透射的层170而光学地被露出至外部。以此种方式,所述光透射的层170可以经由透镜、抗反射涂层、极化涂层、滤光片、及/或构成所述光透射的层170的材料的折射率来改善所述半导体晶粒130的光学特征。
所述中介体120(或是封装或装置100)例如可以用一种大量的配置(例如,用一晶圆、面板、条带、矩阵、等等)来加以形成、或是以单一单元来加以形成。在一个其中所述中介体120(或是封装或装置100)是用一种大量的配置来加以形成的情节中,在所述第二WSS 2的分开之后(或是在此种分开之前),所述中介体120、模制材料140、及/或光透射的层170可被单粒化或切割(例如,藉由一钻石刀片或雷射射束来加以锯开、折断分开、拉动分开、等等)。在此种情节中,所述中介体120、模制材料140、及/或光透射的层170的侧表面可以藉由此种单粒化制程而被做成是共平面的。在一范例情节中,复数个所述封装或装置100 可被置放(例如,模具侧向下)在一锯开带上,并且接着加以锯开。所述锯例如可以切割穿过所述封装或装置100,并且部分地穿过所述锯开带。在锯开之后,所述封装或装置100可加以烘烤。在单粒化之后,所述个别的封装或装置100可以个别地被插入托盘中(例如是利用一拾放制程)。
根据在图1A-1J中所描绘并且在此所论述的例子,本揭露内容是提供一种半导体装置100(以及其之制造方法),其包括例如是在无直通硅晶穿孔下的中介体120。例如是在不利用复杂且昂贵的直通硅晶穿孔的制造程序下,此种半导体装置100例如可以利用一般的凸块接合设备来加以制造。例如,根据本揭露内容的各种特点,具有一相对细微的线/间隔/厚度的一导电层可以先被形成在所述载体110(例如,一硅晶圆)上,并且接着此种载体110可被移除。
参照图2,根据本揭露内容的各种特点的半导体装置201的横截面图被展示。为了举例说明的清楚起见,只有一导电的互连结构260被展示。如同在图2 中所示,所述范例的半导体装置201可包括一中介体220、一半导体晶粒230、一模制材料240、一底胶填充250、一导电的互连结构260、以及一光透射的层 270。所述半导体装置201例如可以与在此所提出的任何或是所有的其它半导体装置(例如,在图1A-1J中所示的范例的半导体装置100、等等)共享任一个或是所有的特征。
所述中介体220或是一般成组的层例如可以包括:在例如是一硅氧化物层及/或一硅氮化物层的一第一介电层211之下的一第一晶种层221a;一在所述第一晶种层221a之下的第一导电层221;一覆盖所述第一导电层221或是其部分的第二介电层222;一在所述第一导电层221之下的第二晶种层223a;一在所述第二晶种层223a之下的第二导电层223;以及一覆盖所述第二导电层223或是其部分的第三介电层224。所述第一导电层221的线/间隔/厚度可以是小于所述第二导电层223的线/间隔/厚度。
所述中介体220可包括延伸到所述第一介电层211中且/或通过所述第一介电层211(例如是通过一被形成于其中的开口211a)并且在所述第一晶种层221a 上的微凸块晶种层、一在所述微凸块晶种层226a上的垫或微凸块垫226(在以下称为垫226)、一在所述第二导电层223之下的凸块下晶种层225a、以及一在所述凸块下晶种层225a之下的凸块下金属225。在一范例的实施方式中,所述第一晶种层以及微凸块晶种层是直接而且电连接至彼此。
如同所论述的,所述术语"中介体"在此可以为了讨论而被利用来便利地分组各种的层。然而,一中介体或是中介体结构可包括在此论述的各种层的任一种,而且不限于任何特定组的层。
所述导电的凸块231可以是在所述半导体晶粒230上,并且所述导电的凸块231可以通过所述焊料232来电连接至所述垫226。所述底胶填充250可以是位于例如在所述半导体晶粒230与所述中介体220之间的第一介电层211上,并且所述模制材料240可以围绕所述半导体晶粒230以及底胶填充250的侧表面。在所举例说明的例子中,由于所述模制材料240只围绕所述半导体晶粒230 的侧表面,但是并不围绕或覆盖所述顶表面233,因此所述半导体晶粒230的顶表面233可以经由所述光透射的层270而光学地被露出至外部。再者,所述半导体晶粒230的顶表面以及所述模制材料240的顶表面243可以是共平面的。
所述导电的互连结构260例如可以是连接至所述凸块下金属226,并且亦可被安装在一如同在此论述的基板之上。
在图2中所示的标签(1)、(2)及(3)例如可以展示一迭层及/或形成的顺序。例如,相关于所述半导体装置200,根据本揭露内容的各种特点,所述中介体 220可以在所述方向(1)上加以形成,其是从所述第一介电层211来建构的。接着,所述半导体晶粒230可以在所述方向(2)上连接至所述中介体220,其是从所述中介体220来建构的。所述导电的互连结构260接着可以在所述方向(3)上附接至所述中介体220,其是从所述中介体220来建构的。
再者,相较于相关图1A-1J所论述的半导体装置100,所述范例的半导体装置200是包括一垫226,所述垫226是在一将和所述半导体晶粒230的一导电的凸块231连接的顶端处比在一延伸穿过所述第一介电层211的底端处较宽的。例如,并不是如同在图1G-1J中的垫126所示地被圆柱形地成形,而是所述垫 226可以是具有倾斜的柄侧壁或是垂直的柄侧壁的杯状或蕈状。所述垫226亦可被形成具有垂直的盖侧壁。
参照图3A-3J,描绘根据本揭露内容的各种特点的一种制造一半导体装置 300的方法的横截面图被展示。在图3A-3J中所描绘的范例的半导体装置及/或方法可以与其它在此所提出的范例半导体装置及/或方法的任一个或是全部共享任一个或所有的特征。
制造所述半导体装置300的范例的方法例如可以包括提供一载体310、形成一凸块下金属321、形成一第一导电层323、形成一第二导电层325、形成一附接一半导体晶粒330的垫或微凸块垫327(在以下称为垫327)、利用一模制材料 340来模制、附接一光透射的层370(例如,一晶圆、一面板、一晶圆或面板的一单粒化的构件、等等)、附接一第一WSS 1、移除所述载体310、连接一导电的互连结构360、以及分开所述第一WSS 1。
如同在图3A中所示,一载体310可加以提供,其包括一具有一平面的顶表面以及一平面的底表面的硅(或是半导体)晶圆。如同在图3B中所示,至少一层的一凸块下金属321可以直接被形成在所述载体310上。在一范例的实施方式中,所述凸块下金属321可以是由各种材料的任一种所形成的,其非限制性的例子是在此加以呈现。例如,所述凸块下金属321可以是由铬、镍、钯、金、银、其合金、其组合、其等同物、等等中的至少一种所形成的。所述凸块下金属321例如可以包括Ni及Au。所述凸块下金属321例如也可以包括Cu、Ni及 Au。所述凸块下金属321亦可以利用各种制程的任一种来加以形成,其非限制性的例子是在此加以呈现。例如,所述凸块下金属321可以利用一无电的电镀制程、电镀制程、溅镀制程、等等中的一或多种来加以形成在所述载体310上。所述凸块下金属321例如可以避免或禁止一金属间化合物在所述导电的互连结构360与所述第一导电层323之间的接口处的形成,藉此改进连接至所述导电的互连结构360的可靠度。所述凸块下金属321可包括在所述载体310上的多个层。例如,所述凸块下金属321可包括一第一层的Ni以及一第二层的Au。
如同在图3C中所示,所述凸块下金属321接着可以被覆盖一第一介电层 322,所述第一介电层322例如是一有机层(例如,像是聚酰亚胺的聚合物、苯环丁烯(BCB)、聚苯并恶唑(PBO)、其等同物、其组合、等等),其亦可被称为一钝化层。例如,所述第一介电层322可被形成在所述凸块下金属321以及所述载体310的顶表面上。所述第一介电层322可以利用旋转涂覆、喷雾涂覆、浸渍涂覆、棒涂覆、其等同物、其组合、等等中的一或多种来加以形成,但是本揭露内容的范畴并不限于此。举例而言,所述第一介电层322可以藉由迭层一干膜来加以形成。
一开口322a(或孔)例如可以被形成在所述第一介电层322中,并且所述凸块下金属321的一特定的区域(例如,整个顶表面、所述顶表面的一部分、所述顶表面的一中心区域、等等)可以通过所述开口322a而被露出至外部。所述开口 322a可以用各种方式的任一种(例如,机械式及/或雷射剥蚀、化学蚀刻、微影、等等)来加以形成。所述第一介电层322(或是任何在此论述的介电层)亦可以例如是藉由屏蔽、或是其它选择性的介电层形成制程而原先就被形成具有开口322a。
如同在图3D中所示,所述第一导电层323可被形成在所述凸块下金属321 以及所述第一介电层322上。例如,所述第一导电层323可以耦接至所述凸块下金属321。在一范例的实施方式中,一类似于图2的一晶种层的第一晶种层可被形成在所述凸块下金属321以及第一介电层322上。所述第一导电层323接着可被形成在所述第一晶种层上。所述第一导电层323及/或其之形成例如可以与在此论述的任何其它导电层及/或其之形成共享任一个或是所有的特征。
所述第一导电层323接着可以被一第二介电层324所覆盖。所述第二介电层324亦可被称为一钝化层。所述第二介电层324及/或其之形成例如可以与在此论述的任何其它介电层及/或其之形成共享任一个或是所有的特征。
一开口或孔324a例如可被形成在所述第二介电层324中,并且所述第一导电层323的一特定的区域可以通过所述开口324a而被露出至外部。所述开口 324a及/或其之形成例如可以与在此论述的任何其它介电层开口及/或其之形成共享任一个或是所有的特征。
在图3A-3J所描绘的例子中,由于所述导电的互连结构360是稍后经由所述凸块下金属321来连接至所述第一导电层323,因此相较于在以下所论述的第二导电层325的线/间隔/厚度,所述第一导电层323的线/间隔/厚度例如可以被形成为较大的。然而,此揭露内容的范畴并不限于此种相对的尺寸。
如同图3E所展示的,一第二导电层325可被形成在所述第一导电层323及 /或所述第二介电层324上。在一范例的实施方式中,一类似于图2的一晶种层的第二晶种层可被形成在所述第二介电层324的一顶表面上及/或在其之一开口或孔324a中(例如,在所述开口324a的侧壁上),所述开口324a是穿过所述第二介电层324而延伸至所述第一导电层323。所述第二晶种层及/或其之形成例如可以与在此论述的任何晶种层及/或其之形成共享任一个或是所有的特征。所述第二导电层325接着可被形成在所述第二晶种层上。所述第二导电层325及/ 或其之形成例如可以与在此论述的任何导电层及/或其之形成共享任一个或是所有的特征。所述第二导电层325接着可以被覆盖一第三介电层326,所述第三介电层326亦可被称为一钝化层。所述第三介电层326及/或其之形成例如可以与在此论述的任何介电层及/或其之形成共享任一个或是所有的特征。再者,一开口326a可被形成在所述第三介电层326中,使得所述第二导电层325的一对应于所述开口326a的特定的区域被露出至外部。所述开口326a及/或其之形成例如可以与在此论述的任何其它介电层开口及/或其之形成共享任一个或是所有的特征。
再者,所述第二导电层325(例如,不论具有或是不具有一晶种层)以及所述第三介电层326的形成可以被重复任意次数(例如,其利用相同的材料及/或制程、或是不同的个别的材料及/或制程)。在图3E中的范例图标是展示此种层的两次形成。就此而论,所述层是在图式中被提供类似的标签(例如,重复所述第二导电层325以及第三介电层326)。
如同在图3F中所示,一微凸块垫、其它垫、连接垫、附接结构、或是晶粒附接结构327可被形成在开口326a中,因而每一个垫327是电连接至所述第二导电层325。再者,导电贯孔328可被形成在沿着所述装置300的周边的开口 326a之上。在一范例的实施方式中,一类似于图2的一晶种层的晶种层可被形成在所述开口326a的内部(例如,在藉由所述开口326a而被露出的第二导电层 325上及/或在所述开口326a的侧壁上)、及/或在所述开口326a的外部(例如,沿着所述第三介电层326的顶表面)。所述晶种层及/或其之形成可以与在此论述的任何其它晶种层(例如,微凸块晶种层、等等)及/或其之形成共享任一个或是所有的特征。
所述垫327以及导电贯孔328接着可被形成在所述晶种层上。如图所示,所述导电贯孔328在某些实施例中可包括导电柱。然而,所述导电贯孔328在某些实施例中可以是穿模贯孔(TMV),其可包含焊料、导线及/或柱、或是由焊料、导线及/或柱所做成的。再者,此种柱可加以电镀。所述晶种层可以被插置在所述第二导电层325与所述导电贯孔328之间。每一个垫327及/或其之形成可以与在此论述的任何其它垫或是微凸块垫及/或其之形成共享任一个或是所有的特征。类似地,每一个导电贯孔328及/或其之形成可以与在此论述的任何其它导电贯孔及/或其之形成共享任一个或是所有的特征。所述晶种层、垫327、及/或导电贯孔328在此亦可以被称为一导电层。
为了在此讨论的目的,所述凸块下金属321、第一介电层322、第一导电层 323、第二介电层324、第二导电层325、第三介电层326、以及垫327可被视为是一中介体320的构件。
如同在图3G中所示,所述半导体晶粒330可以电连接至所述垫327,并且可以利用一模制材料340来加以模制。例如,所述半导体晶粒330的导电的凸块331(或是其它导电的附接结构)可以通过所述焊料332来电连接至所述垫327。所述半导体晶粒330的导电的凸块331可以用各种方式的任一种来附接至所述垫327,其非限制性的例子是在此加以呈现。例如,所述导电的凸块331可以利用各种焊料附接制程(例如,一质量回焊制程、一热压缩制程、等等)的任一种而被焊接至所述垫327。同样例如的是,所述导电的凸块331可以利用一导电的黏着剂、膏、等等来耦接至所述垫327。此外例如的是,所述导电的凸块331可以利用一直接的金属到金属的(例如,无焊料的)接合来耦接至所述垫327。所述导电的凸块331及/或其之形成例如可以与在此论述的任何导电的凸块及/或其之形成共享任一个或是所有的特征。
在一范例的实施方式中,一底胶填充350可被形成在所述半导体晶粒330 与所述中介体320(例如,所述第三介电层326)之间,其例如是围绕所述导电的凸块331以及垫327的被曝露到所述底胶填充350(并且因此被封入)的部分。所述底胶填充350及/或其之形成例如可以与在此论述的任何底胶填充及/或其之形成共享任一个或是所有的特征。
在所述模制或封入制程中,所述半导体晶粒330及/或中介体320可以利用一模制材料340(例如,一模制树脂或是其它的模制材料或密封剂)而被封入,所述模制材料340接着可加以固化。在一范例的实施方式中,所述模制材料340 只覆盖所述贯孔328以及半导体晶粒330的侧表面(或是只覆盖其之个别的部分),因此让所述贯孔328以及半导体晶粒330的顶表面从所述模制材料340加以露出。在另一范例的实施方式中,所述模制材料340是覆盖所述半导体晶粒 330的侧表面及顶表面。所述模制材料340及/或其之形成例如可以与在此论述的任何模制材料及/或其之形成共享任一个或是所有的特征。
如同在图3H中所示,一光透射的层370可以附接至所述半导体晶粒330 及/或模制材料340,并且一第一WSS 301可以附接至所述光透射的层370。所述光透射的层370可包含透镜、抗反射涂层、彩色滤光片、极化层、及/或具有不同折射率的材料层,以便于提供所述半导体晶粒330的一上表面或顶表面333 所要的光学性质。例如,所述半导体晶粒330可包括影像传感器、接收器、发送器、或是其它发送或接收光的装置。所述光透射的层370可以协助导引光往返于所述半导体晶粒330的此种装置。
如同进一步在图3H中所示的,所述第一WSS 301可以附接至所述光透射的层370。所述WSS 301可以用各种方式的任一种来附接至所述光透射的晶圆 370,其非限制性的例子是在此加以提供。例如,所述WSS 301或是任何在此论述的WSS都可以利用一暂时的黏着剂来附接至所述光透射的层370,所述暂时的黏着剂是在曝露到热能或光能时、在曝露到特定的化学品时、等等失去其黏性。一或多个额外的释放层亦可被利用以使得所述WSS 301的后续的释放变得容易。所述附接制程例如可以包括烘烤所述组件(例如,在250下30分钟、等等)。所述WSS 301可以由各种材料的任一种,例如是玻璃的光透射的材料来加以形成。尽管所述WSS 301在此大致是以一晶圆的形式而被呈现,但是此揭露内容的范畴并不限于此种形状。
如同在图3I中所示,所述载体310可以从所述凸块下金属321以及第一介电层322加以移除。例如,大部分或全部的载体310都可以通过一机械式研磨制程来加以移除。任何剩余的载体310都可以通过一化学蚀刻制程来加以移除。所述载体310的移除例如可以与在此论述的任何载体的移除共享任一个或是所有的特征。在一范例的实施方式中,在所述载体310的移除之后,所述凸块下金属321可以通过所述第一介电层322而被露出至外部。所述凸块下金属321 的底表面可以是与所述第一介电层322的底表面共平面的。
如同进一步在图3I中所示,所述导电的互连结构360(或是复数个导电的互连结构360)是连接至所述凸块下金属321。例如,所述导电的互连结构360是经由所述凸块下金属321来电连接至所述第一导电层323。所述导电的互连结构 360及/或其之形成例如可以与在此论述的任何其它互连结构及/或其之形成共享任一个或是所有的特征。
如同在图3J中所示,所述WSS 301可以从所述光透射的层370加以分开。所述WSS301的分开例如可以与在此论述的任何晶圆支撑系统的分开共享任一个或是所有的特征。
在完成的范例半导体装置300中,所述半导体晶粒330的顶表面333可以是与所述模制材料340的顶表面343共平面的。再者,所述半导体晶粒330的顶表面333以及所述模制材料340的顶表面343可以通过所述光透射的层370 而光学地被露出至外部。以此种方式,所述光透射的层370可以经由构成所述光透射的层370的透镜、抗反射涂层、滤光片、及/或所述材料的折射率,来改善所述半导体晶粒330的光学特征。
如上所述,根据本揭露内容的各种特点的范例的半导体装置300可以藉由用一种堆积或堆栈的方式以在一载体上形成所述中介体、将所述半导体晶粒电连接至所述中介体、利用模制材料来模制所述半导体晶粒、移除所述载体、以及在所述中介体上形成所述导电的互连结构来加以完成。因此,在所述半导体装置300中,在所述第一导电层与所述凸块下金属之间的失准是被降低或消除。此外,在所述范例的半导体装置300中,所述凸块下金属是首先被形成,并且所述导电层、介电层、以及微凸块是接着被形成,藉此简化所述半导体装置300 的整体制程。
参照图4A-4F,描绘根据本揭露内容的各种特点的一种制造一半导体装置 400的方法的横截面图被展示。在图4A-4F所描绘的范例的半导体装置及/或方法例如可以与其它在此所提出的范例半导体装置及/或方法的任一个或是全部共享任一个或是所有的特征。
制造所述半导体装置400的范例的方法例如可以包括提供一载体410、在所述载体410上形成一第一导电层423、形成一垫、微凸块垫、或是凸块下金属 425(在以下称为垫425)、附接一半导体晶粒430、利用一模制材料440来模制、形成一凸块下金属465、以及连接一导电的互连结构460。
如同在图4A中所示,一具有一平面的顶表面以及一平面的底表面的光透射的载体410是被提供。在一范例实施例中,所述载体410是由一玻璃晶圆所提供的;然而,其它例如是聚合物、氧化物、以及金属的光透射的材料亦可被使用。所述载体410以及其之提供或形成例如可以与在此论述的任何载体共享任一个或是所有的特征。
如同在图4B中所示,一第一导电层423可被形成在所述载体410上。所述第一导电层423及/或其之形成例如可以与在此论述的任何其它导电层及/或其之形成共享任一个或是所有的特征。在一范例的实施方式中,一类似于图2的一晶种层的第一晶种层可被形成在所述光透射的载体410上,并且所述第一导电层423可被形成在所述第一晶种层上。所述第一导电层423接着可以被一第一介电层424所覆盖,所述第一介电层424可以是透明的、半透明的、或者是光透射的。一开口424a可被形成在所述第一介电层424中,使得所述第一导电层423的一对应于所述开口424a的特定的区域被露出至外部。再者,一开口424b 可被形成在所述第一介电层424的一中央部分内,使得所述载体410的一中央区域被露出。所述第一导电层423、第一介电层424、及/或于其中的开口或孔 424a、及/或其之形成可以与在此论述的其它导电层、介电层及开口、及/或其之形成共享任一个或是所有的特征。不论具有或是不具有一晶种层的第一导电层 423以及所述第一介电层424的形成可以例如利用相同的材料及/或制程、或是不同的个别的材料及/或制程而被重复任意次数。在图4B-4F中的范例图标是展示此种层的单次形成。
如同在图4C中所示,微凸块垫、其它垫、连接垫、附接结构、或是晶粒附接结构425可被形成在所述开口424a中,因而每一个垫425是电连接至所述第二导电层423。再者,导电贯孔428可被形成在沿着所述装置400的周边的开口 426a之上。在一范例的实施方式中,一类似于图2的一晶种层的晶种层可被形成在所述开口424a的内部(例如,在藉由所述开口424a所露出的第二导电层423 上及/或在所述开口424a的侧壁上)、及/或所述开口424a的外部(例如,在所述第二介电层424的顶表面上)。所述晶种层可以利用和在此关于其它晶种层所论述的相同的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。
所述垫425以及导电贯孔428接着可被形成在所述晶种层上。如图所示,所述导电贯孔428在某些实施例中可包括导电柱。然而,所述导电贯孔428在某些实施例中可以是穿模贯孔(TMV),其可包含焊料、导线及/或柱、或是由焊料、导线及/或柱所做成的。再者,此种柱可加以电镀。在一范例的实施方式中,所述晶种层可以被插置在所述第二导电层423以及每一个垫425之间。类似地,所述晶种层可以被插置在所述第二导电层423以及每一个导电贯孔428之间。每一个垫425及/或其之形成可以与在此论述的任何其它垫或微凸块垫及/或其之形成共享任一个或是所有的特征。类似地,每一个导电贯孔428及/或其之形成可以与在此论述的任何其它导电贯孔及/或其之形成共享任一个或是所有的特征。所述晶种层、垫425、及/或导电贯孔428在此亦可以被称为一导电层。
尽管未描绘在图4A-4F中,在所述垫425的形成之后,一边缘修整或是切削的制程可加以执行,例如其中正被处理的晶圆的一边缘是被修整或是切削。此种修整可以用各种方式来加以执行,例如是藉由研磨。此种边缘修整例如可以在后续的处理期间保护所述晶圆免于碎屑及削片。
如同在图4D中所示,一半导体晶粒430可以电连接至所述垫425,并且可以利用一模制材料440来加以模制。所述半导体晶粒430及/或其之附接可以与在此论述的其它半导体晶粒及/或其之附接共享任一个或是所有的特征。例如,在一范例情节中,一焊料膏可以利用一模版及刮浆板而被施加至每一个垫425,所述半导体晶粒430的每一个导电的凸块431可被设置在所述焊料膏上或是之中(例如是利用一种拾放的制程),并且所述焊料膏接着可加以回焊。在所述半导体晶粒430的附接之后,所述组件可加以清洗(例如,利用热的DI水、等等)、遭受到一助焊剂清洗及烘烤制程、遭受到一电浆处理制程、等等。
例如,所述半导体晶粒430的每一个导电的凸块431或是其它导电的附接结构都可以通过所述焊料432来电连接至一个别的垫425。所述半导体晶粒430 的每一个导电的凸块431都可以用各种方式的任一种来附接至一个别的垫425 或是其它的垫或连接垫结构,其非限制性的例子是在此加以呈现。例如,每一个导电的凸块431可以利用各种焊料附接制程(例如,一质量回焊制程、一热压缩制程、等等)、等等的任一种而被焊接至所述垫425。同样例如的是,所述导电的凸块431可以利用一导电的黏着剂、膏、等等来耦接至所述垫425。此外例如的是,每一个导电的凸块431可以利用一直接的金属到金属的(例如,无焊料的)接合来耦接至一个别的垫425。
在一范例的实施方式中,一光透射的底胶填充450可被形成在所述半导体晶粒430与所述第二介电层424及/或载体410之间,其围绕所述导电的凸块431 以及垫425的被露出至所述底胶填充450的部分。如图所示,所述底胶填充450 可以填入所述开口424b,所述开口424b是将一下表面433露出至所述载体410。除了所述底胶填充450是光透射的,以允许光通过在所述半导体晶粒430的一下表面433与所述光透射的载体410之间以外,所述底胶填充450或是其之形成可以与在此论述的其它底胶填充共享任一个或是所有的特征。在某些实施例中,所述底胶填充450可包括一种光透射的聚硅氧烷材料。
在所述模制制程中,所述半导体晶粒430及/或中介体420可以利用例如是一模制树脂或是其它的模制材料或密封剂的一模制材料440而被封入,所述模制材料440接着可加以固化。所述模制材料440及/或其之形成可以与在此论述的其它模制材料及/或其之形成共享任一个或是所有的特征。在一范例的实施方式中,所述模制材料440是覆盖所述半导体晶粒430的侧表面及顶表面。在另一范例的实施方式中,所述模制材料440只覆盖所述半导体晶粒430的侧表面(或是只覆盖其之个别的部分),因此让所述半导体晶粒430的顶表面从所述模制材料440被露出。若所述模制材料440是光透射的,则如同在此论述的,所述模制材料440亦可被利用以形成一模制底胶填充,例如以取代所述底胶填充450。
如图所示的,所述模制材料440、半导体晶粒430、以及导电贯孔428可加以研磨,使得所述模制材料440的一顶表面是与所述半导体晶粒430的顶表面 435以及所述导电贯孔428的顶表面共平面的。在某些实施例中,所述模制材料 440可以覆盖所述顶表面435。在此情形中,所述模制材料440以及导电贯孔428 可加以研磨,使得所述模制材料440的一顶表面是与所述导电贯孔428的顶表面共平面的。在又一实施例中,所述模制材料440的一顶表面可以不是与所述半导体晶粒430的一顶表面435共平面的。在此种实施例中,所述模制材料440 以及半导体晶粒430可以被例如是如同在图4F中所示的一第三介电层454的一钝化层所覆盖,所述钝化层可以提供一在其上形成所述装置400的另外的层的平面的表面。
如同在图4E中所示,所述模制材料440、半导体晶粒430、及/或导电贯孔 428的一上表面可以被一第二介电层454所覆盖。再者,一开口454a可被形成在所述第二介电层454中以露出导电贯孔428。一第二导电层463可被形成在所述导电贯孔428及/或所述第二介电层454上。在一范例的实施方式中,一第二晶种层(未显示)可被形成在所述开口454a的内部,例如是在被形成于所述第二介电层454中的开口454a的侧壁上及/或在藉由所述开口454a而被露出的导电贯孔428上。额外或替代的是,所述第二晶种层可被形成在所述开口454a的外部,例如是在所述第二介电层454的顶表面上。如同在此论述的,所述第二晶种层可以利用和被用来形成所述第一晶种层相同的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。所述第二晶种层或是任何在此论述的晶种层在此亦可以被称为一导电层。
继续所述范例的实施方式,所述第二导电层463可被形成在所述第二晶种层上。例如,所述第二导电层463可被形成以填入在所述第二介电层454中的开口454a、或至少是覆盖所述开口454a的侧表面。所述第二导电层463可以利用和所述第一导电层421相同的材料及/或制程来加以形成、或是可以利用不同的个别的材料及/或制程来加以形成。所述第二导电层463在此亦可以被称为一重分布层。
所述第二导电层463接着可以被一第四介电层464所覆盖。所述第四介电层464及/或其之形成可以与在此论述的其它介电层及/或其之形成共享任一个或是所有的特征。一开口或孔464a可被形成在所述第四介电层464中,并且所述第二导电层463的一特定的区域可以通过所述开口464a而被露出至外部。所述开口464a可以用例如是机械式及/或雷射剥蚀、化学蚀刻、等等的各种方式的任一种来加以形成。或者是,所述第四介电层464例如可以原先就被形成具有于其中的开口464a。
一凸块下晶种层可被形成在所述开口464a的内部及/或所述开口464a的外部。所述凸块下晶种层及/或其之形成可以与在此论述的任何其它凸块下晶种层及/或其之形成共享任一个或是所有的特征。一凸块下金属465可被形成在所述凸块下晶种层上。所述凸块下金属465及/或其之形成例如可以与任何凸块下金属及/或其之形成共享任一个或是所有的特征。
如同在图4F中所示,一导电的互连结构460可以附接至所述凸块下金属 465。所述导电的互连结构460及/或其之附接可以与在此论述的其它导电的互连结构及/或其之附接共享任一个或是所有的特征。如图所示,所述凸块下金属465 可被形成在所述第四介电层464的开口464a上,并且所述导电的互连结构460 可以连接至所述凸块下金属465。再者,所述第二导电层463可以将所述凸块下金属465电连接至所述导电贯孔428,其可以同样地电连接至所述第一导电层 421及/或所述第二导电层423。就此而论,所述导电的互连结构460可以经由所述导电层421、423、463及/或所述导电贯孔428中的一或多个来电连接至半导体晶粒430。
为了在此讨论的目的,所述第一导电层421、第一介电层422、第二导电层 423以及第二介电层424可被视为是一第一中介体420的构件。再者,上述的垫 425亦可被视为是所述第一中介体420的构件。类似地,为了在此讨论的目的,所述凸块下金属465以及第四介电层464可被视为是一第二中介体470的构件。
在完成的范例半导体装置400中,所述半导体晶粒430的底表面433可以通过所述光透射的底胶填充450、光透射的载体410、以及光透射的介电层422 及424而光学地被露出至外部。就此而论,所述光透射的载体410可以经由透镜、抗反射涂层、滤光片、及/或构成所述光透射的载体410的材料的折射率来改善所述半导体晶粒430的光学特征。
如同在此论述的例子的任一个或是全部,所述中介体420或封装400可以用一种大量的配置或是以单一单元来加以形成。如同在此论述的,在一种其中所述中介体420或封装400是用一种大量的配置而被形成的范例情节中,一单粒化制程可加以执行。
参照图5,根据本揭露内容的各种特点的一种半导体装置500的横截面图被展示。如同在图5中所示,所述半导体装置500可以用一种类似于图4A-4F的半导体装置400的方式来加以建构。然而,所述半导体装置500是包含复数个半导体晶粒530,所述复数个半导体晶粒530是藉由模制材料540来与彼此光学隔离的。除了所述复数个半导体晶粒530之外,所述半导体装置500是类似于所述半导体装置400而可包括一中介体520、一模制材料540、一光透射的底胶填充550、一导电的互连结构560、以及一光透射的层570。所述半导体装置500例如可以与在此所提出的任一个或是所有的其它半导体装置共享任一个或是所有的特征。
每一个半导体晶粒530可包含光学传感器、光学接收器、光学发送器、或是其它发送、接收、侦测、及/或感测光的光学组件。在某些实施例中,一半导体晶粒530a可包含一或多个光学发送器,其被配置以通过所述光透射的底胶填充550以及光透射的层570来发送或发射光。为此目的,垫或是微凸块垫525(在以下称为垫525)可以朝向所述半导体晶粒530a的一周边并且在所述光学发送器发送光所通过的光透射的层570的一发送区域或窗口576之外来加以设置。再者,另一半导体晶粒530b可包含一或多个光学接收器,其被配置以通过所述光透射的底胶填充550以及光透射的层570来接收光。为此目的,所述垫525可以朝向所述半导体晶粒530b的一周边并且在所述光学接收器接收光所通过的光透射的层570的一接收区域或窗口578之外来加以设置。
总之,此揭露内容的各种特点是提供一种用于制造一半导体装置的方法,其中所述方法是包括提供一不具有直通硅晶穿孔的中介体及/或一光透射的载体、晶圆、或是层。此揭露内容的各种特点亦提供一种半导体装置,其包括一不具有直通硅晶穿孔的中介体及/或一光透射的载体、晶圆、或是层。尽管先前的内容已经参考某些特点及例子来加以叙述,但是将会被熟习此项技术者理解到可以做成各种的改变,并且等同物可加以取代,而不脱离本揭露内容的范畴。此外,可以做成许多修改以将一特定的情况或材料调适至本揭露内容的教示,而不脱离其范畴。因此,所欲的是本揭露内容不受限于所揭露之特定的例子,而是本揭露内容将会包含落入所附的权利要求书的范畴内之所有的例子。
Claims (10)
1.一种设备,其特征在于,包括:
光透射的载体结构;
在所述光透射的载体结构上的第一重分布结构;以及
包括光学组件的半导体晶粒,其是附接且电耦接至所述第一重分布结构,使得所述半导体晶粒的底表面是面对所述第一重分布结构以及所述光透射的载体结构。
2.如权利要求1所述的设备,其特征在于,进一步包括在所述半导体晶粒的所述底表面与所述第一重分布结构之间的光透射的底胶填充材料。
3.如权利要求1所述的设备,其特征在于,进一步包括:
在所述半导体晶粒的顶表面之上的第二重分布结构;以及
导电的互连结构,其是附接至所述第二重分布结构的导电层以形成所述半导体封装的外部的连接器。
4.如权利要求3所述的设备,其特征在于,进一步包括一或多个导电贯孔,其是将所述第二重分布结构电耦接至所述第一重分布结构。
5.如权利要求1所述的设备,其特征在于,进一步包括另一半导体晶粒,其是附接且电耦接至所述第一重分布结构,使得所述另一半导体晶粒的另一光学组件是面对所述第一重分布结构以及所述光透射的载体结构。
6.如权利要求5所述的设备,其特征在于,进一步包括在所述半导体晶粒的底表面与所述第一重分布结构之间的光透射的底胶填充材料。
7.如权利要求1所述的设备,其特征在于,所述光透射的载体是包括透镜,其被配置以导引光至所述光学组件、或是从所述光学组件导引光。
8.如权利要求1所述的设备,其特征在于,所述光透射的层是提供光抗反射的性质。
9.如权利要求1所述的设备,其特征在于,所述光透射的层是提供滤光的性质。
10.如权利要求1所述的设备,其特征在于,所述光透射的层是提供光极化的性质。
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CN109637940A (zh) * | 2017-10-05 | 2019-04-16 | 艾马克科技公司 | 制造电子装置的方法 |
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US20210020813A1 (en) | 2021-01-21 |
US10784422B2 (en) | 2020-09-22 |
TWI685130B (zh) | 2020-02-11 |
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