TWI442448B - 使用選擇性沉積製程製備mosfet元件的方法 - Google Patents
使用選擇性沉積製程製備mosfet元件的方法 Download PDFInfo
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- TWI442448B TWI442448B TW094115281A TW94115281A TWI442448B TW I442448 B TWI442448 B TW I442448B TW 094115281 A TW094115281 A TW 094115281A TW 94115281 A TW94115281 A TW 94115281A TW I442448 B TWI442448 B TW I442448B
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- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
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- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
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- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
- H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
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- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/608—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having non-planar bodies, e.g. having recessed gate electrodes
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- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
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- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
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- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
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- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01324—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T or inverted-T
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- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
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- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
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- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
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Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Chemical Vapour Deposition (AREA)
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/845,984 US7132338B2 (en) | 2003-10-10 | 2004-05-14 | Methods to fabricate MOSFET devices using selective deposition process |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200537592A TW200537592A (en) | 2005-11-16 |
| TWI442448B true TWI442448B (zh) | 2014-06-21 |
Family
ID=35428740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW094115281A TWI442448B (zh) | 2004-05-14 | 2005-05-11 | 使用選擇性沉積製程製備mosfet元件的方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US7132338B2 (https=) |
| EP (1) | EP1745503A2 (https=) |
| JP (1) | JP2007537601A (https=) |
| CN (2) | CN101593680B (https=) |
| TW (1) | TWI442448B (https=) |
| WO (1) | WO2005112577A2 (https=) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI914362B (zh) | 2020-06-16 | 2026-02-11 | 荷蘭商Asm Ip私人控股有限公司 | 沉積含硼之矽鍺層的方法 |
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2005
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- 2005-05-10 EP EP05746857A patent/EP1745503A2/en not_active Withdrawn
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- 2005-05-10 CN CN2009101438065A patent/CN101593680B/zh not_active Expired - Lifetime
- 2005-05-10 CN CNB2005800061362A patent/CN100511587C/zh not_active Expired - Lifetime
- 2005-05-11 TW TW094115281A patent/TWI442448B/zh not_active IP Right Cessation
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI914362B (zh) | 2020-06-16 | 2026-02-11 | 荷蘭商Asm Ip私人控股有限公司 | 沉積含硼之矽鍺層的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US7132338B2 (en) | 2006-11-07 |
| TW200537592A (en) | 2005-11-16 |
| WO2005112577A3 (en) | 2006-05-26 |
| EP1745503A2 (en) | 2007-01-24 |
| WO2005112577A2 (en) | 2005-12-01 |
| CN101593680B (zh) | 2011-02-23 |
| US7439142B2 (en) | 2008-10-21 |
| US20070082451A1 (en) | 2007-04-12 |
| US20050079692A1 (en) | 2005-04-14 |
| CN101593680A (zh) | 2009-12-02 |
| JP2007537601A (ja) | 2007-12-20 |
| CN100511587C (zh) | 2009-07-08 |
| CN1926664A (zh) | 2007-03-07 |
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