TWI442448B - 使用選擇性沉積製程製備mosfet元件的方法 - Google Patents
使用選擇性沉積製程製備mosfet元件的方法 Download PDFInfo
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- TWI442448B TWI442448B TW094115281A TW94115281A TWI442448B TW I442448 B TWI442448 B TW I442448B TW 094115281 A TW094115281 A TW 094115281A TW 94115281 A TW94115281 A TW 94115281A TW I442448 B TWI442448 B TW I442448B
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- Prior art keywords
- substrate
- germanium
- ruthenium
- sccm
- containing layer
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
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Description
本發明實施例大致係關於半導體製造方法及半導體元件的領域,詳言之,係關於沉積含矽材料及膜層以形成半導體元件的方法。
隨著製造小型電晶體的需求增加,製造超淺源極/汲極接合區的技術也受到挑戰。依據國際半導體技術圖(International Technology Roadmap for Semiconductors,ITRS),對100奈米以下的CMOS(互補式金氧半導體)元件來說,接合區的深度需要少於30奈米。近來,選擇性磊晶已成為在生成升高的源極/汲極及源極/汲極延伸特徵(source/drain extension features)時,用來沉積矽-鍺材料一種非常有用的製程。藉由蝕刻矽以製造出一凹陷(recessed)的源極/汲極特徵,再接續以選擇性生長矽-鍺表層來填充該蝕刻表面的方式可製造出該源極/汲極延伸特徵。選擇性磊晶製程容許具原位摻雜之幾近完全摻雜活化,因而可除去或至少降低需要進行後-退火製程的需求。可使用選擇性磊晶製程及矽蝕刻製程來精確地定義接合區深度。另一方面,超淺源極/汲極接合區無可避免地會導致串聯電阻上升。此外,在碳化矽生成期間接合區的消耗,會進一步造成串聯電阻上升。為了補償所消耗調的接合區,可磊晶生成一升高的源極/汲極並選擇性的生長在接合區上。
選擇性磊晶沉積可提供在矽上生長的表層,表層不會在介電區域上生長。可使用選擇性磊晶來沉積矽或矽-鍺材料於諸如,升高的源極/汲極、源極/汲極延伸、接觸插孔(contact plugs)及沉積雙極元件底層之類的半導體元件上。一般來說,選擇性磊晶製程涉及兩種互相競爭的化學反應、沉積反應及蝕刻反應。該沉積及蝕刻反應可以不同的反應速率在單晶矽表面及介電性表面同時發生。一選擇性製程視窗可藉由調整一蝕刻物(例如,HCl)的濃度來使材料沉積於暴露的矽表面而不會沉積到暴露的介電性表面上。
雖然用以沉積矽-鍺材料的磊晶製程適合小尺寸元件,但因為摻雜物會與氯化氫反應,因此要以該製程來生成摻雜的矽-鍺並不容易。高濃度硼摻雜(例如,硼原子濃度超過5x1019
cm-3
)之選擇性矽-鍺磊晶材料製程的研發是一項非常複雜的工作,因為摻雜硼使得該選擇性沉積製程視窗變窄之故。一般來說,當一沉積氣體所含硼(例如,B2
H6
)濃度升高時,因為沉積材料在介電區域生長的速率變快,因此需要使用更高濃度的氯化氫方能達到選擇性蝕刻的目的。所增加的氯化氫濃度會降低硼原子被併入至表層的機率,推測是因為B-Cl鍵的強度要比Ge-Cl鍵或Si-Cl鍵的強度來得強之故。
目前,選擇性矽磊晶製程在生成含矽MOSFET(金氧半導體場效電晶體)元件之接合區上有兩種主要用途。其一是藉由選擇性磊晶製程來沉積升高的源極/汲極(S/D)。典
型的情況是,該磊晶層是無摻雜物的矽層。另一項用途是以含有磊晶矽的材料,通常是含有鍺、碳或一摻雜物,來填充凹陷的接合區區域。
MOSFET元件可包含一PMOS或一NMOS組件,該PMOS具有一p型通道,亦即,用於通道傳導的電洞;且該NMOS具有一n型通道,亦即,用於通道傳導的電子。對PMOS來說,在凹陷區域中的膜層通常含有矽-鍺。對NMOS來說,在凹陷區域中的膜層通常含有矽-碳。將矽-鍺材料用於PMOS應用中係基於許多因素。較單獨的矽來說,一矽-鍺材料可併入更多的硼原子,因此可降低接合區的電阻。此外,較矽/碳化矽介面來說,在基材表面之該矽-鍺/碳化矽層介面具有一較低的Schottky阻障層。此外,因矽-鍺層的晶格常數較矽層來得高,因此在一矽層表面磊晶生長的矽-鍺層其膜層內具有壓縮應力。該壓縮應力會被轉移到水平方向而使PMOS通道中產生壓縮應力,並增加電洞的遷移能力。對NMOS應用來說,因矽-碳層的晶格常數小於矽,因此可將一矽-碳材料用於該凹陷區域以於通道中創造出拉伸應力。該拉伸應力被轉移到通道中,進而提升了電子的遷移能力。
因此,亟需一種可選擇性地及磊晶成長地沉積具有一豐富摻雜物濃度之矽及含矽材料的方法。此外,該方法需可多方變化以形成具有多變的元素濃度之含矽材料。
在一實施例中,提供一種在一基材上形成一以矽為主之材料的方法,包括將一基材暴露在一內含二氯矽烷、一鍺源、一第一蝕刻劑及一載氣流的第一處理氣體下,以於基材上沉積出一第一含矽層;及將該基材暴露在一內含矽烷及一第二蝕刻劑的第二處理氣體以於該基材上沉積出一第二含矽層。在一實例中,該第一處理氣體係組合流速介於約50標準立方公分/分鐘(sccm)至約200sccm間之二氯矽烷、流速介於約0.5sccm至約5sccm間之鍺烷、流速介於約30sccm至約500sccm間之氯化氫及流速介於約10slm至約30slm(標準公升/分鐘)間之氫氣而成。在另一實施例中,本發明方法提供一第二處理氣體,該處理氣體係組合流速介於約50sccm至約200sccm間之矽烷、流速介於約30sccm至約500sccm間之氯化氫而成。該方法更包含提供以一選擇性沉積製程來生成該第一含矽層及該第二含矽層。在一實例中,該第一及第二含矽層的硼原子濃度介於約5x1019
原子/cm3
至約2x1020
原子/cm3
間。
在另一實施例中,提供一種在一製程室之一基材上生成一以矽為主之材料的方法,包括將一基材暴露在一內含二氯矽烷、甲基矽烷、氯化氫及氫氣的處理氣體下,以於基材上沉積出一含矽層。在一實例中,該處理氣體係組合流速介於約20sccm至約400sccm間之二氯矽烷、流速介於約0.3sccm至約5sccm間之甲基矽烷、流速介於約30sccm至約500sccm間之氯化氫及流速介於約10slm至約30slm(標準公升/分鐘)間之氫氣而成。
在另一實施例中,提供一種在一製程室之一基材上生成一以矽為主之材料的方法,包括將一基材暴露在一內含矽烷、甲基矽烷、氯化氫及氫氣的處理氣體下,以於基材上沉積出一含矽層。在一實例中,該處理氣體係組合流速介於約20sccm至約400sccm間之矽烷、流速介於約0.3sccm至約5sccm間之甲基矽烷、流速介於約30sccm至約500sccm間之氯化氫及流速介於約10slm至約30slm(標準公升/分鐘)間之氫氣而成。
在一實施例中,提供一種在一製程室之一基材上形成一以矽為主之材料的方法,包括將一基材暴露在一內含矽烷、鍺烷、甲基矽烷、氯化氫及氫氣的一處理氣體下,以於基材上沉積出一含矽層。在一實例中,該處理氣體係組合流速介於約50sccm至約200sccm間之矽烷、流速介於約0.5sccm至約5sccm間之鍺烷、流速介於約0.3sccm至約5sccm間之甲基矽烷、流速介於約30sccm至約500sccm間之氯化氫及流速介於約10slm至約30slm(標準公升/分鐘)間之氫氣而成。該含矽層可以含有至少約50原子%(at%)之矽、約2at%或更少之碳、約15at%至約30at%的鍺之組合物所沉積而成。
在另一實施例中,本發明方法提供一種在一製程室基材上形成一以矽為主之材料的方法,包括將一基材暴露在一處理氣體下及在基材上沉積一含矽層,使得該第一含矽層在一結晶晶格中具有間隙位置(insterstitial sites)且在該位置含有約3原子%或更少的碳。該方法更提供將含矽
層退火以併入至少一部分位在該晶格取代位置處(substitutional sites)的碳。在一實例中,該處理氣體係組合流速介於約20sccm至約400sccm間之二氯矽烷、流速介於約0.3sccm至約5sccm間之甲基矽烷、流速介於約30sccm至約500sccm間之氯化氫及流速介於約10slm至約30slm(標準公升/分鐘)間之氫氣而成。
在另一實施例中,提供一種在一基材上形成一以矽為主之材料的方法,包括沉積一第一含矽層在基材上,沉積一第二含矽層在該第一含矽層上及沉積一第三含矽層在該第二含矽層上。在一實例中,該第一含矽層包含約25原子%或更少的鍺,該第二含矽層包含約25原子%或更多的鍺,該第三含矽層包含約5原子%或更少的鍺。在一實例中,該第一處理氣體係組合流速介於約50sccm至約200sccm間之二氯矽烷、流速介於約0.5sccm至約5sccm間之鍺烷、流速介於約30sccm至約500sccm間之氯化氫、流速介於約0.2sccm至約3sccm間之一摻雜物先驅物及流速介於約10slm至約30slm間之氫氣而成。在另一實施例中,該第二處理氣體係組合流速介於約50sccm至約400sccm間之二氯矽烷、流速介於約0.5sccm至約20sccm間之鍺烷、流速介於約30sccm至約700sccm間之氯化氫、流速介於約0.2sccm至約6sccm間之一摻雜物先驅物及流速介於約10slm至約30slm間之氫氣而成。該第三處理氣體係組合流速介於約50sccm至約200sccm間之矽烷及流速介於約30sccm至約500sccm間之氯化氫而
成。在一實例中,該第一含矽層包含約15原子%至約25原子%的鍺,該第二含矽層包含約25原子%至約35原子%的鍺,該第三含矽層包含高達約5原子%的鍺。
在另一實施例中,提供一種用以沉積一含矽材料於一基材上的方法,該方法包含沉積一包含約15原子%或更多之一第一鍺濃度的第一含矽層於基材上,及沉積一包含約15原子%或更少之一第二鍺濃度的第二含矽層於該第一含矽層上。該方法更提供暴露該基材至空氣中以生成一天然的氧化物層,除去該天然的氧化物層以暴露出第二含矽層及沉積一第三含矽層在該第二含矽層上。
在另一實施例中,提供一種用以沉積一含矽材料於一基材上的方法,該方法包含磊晶沉積一包含一第一晶格應力的第一含矽層於基材上,及磊晶沉積一包含一第二晶格應力的第二含矽層於該第一含矽層上,使得該第二晶格應力係遠高於該第一晶格應力。該方法更包括提供該第一及第二含矽層可各自包含矽化鍺、矽化碳、矽化鍺碳、摻雜物、上述之之衍生物或上述之組合。
本發明實施例提供在元件結構製造期間用以沉積含矽材料的方法。該沉積製程可選擇、磊晶式地生長含矽材料於一含有特徵之基材表面上的矽結晶表面上。因存在蝕刻劑(例如,氯化氫)而使特徵保持裸露的同時,可達成選擇性、磊晶生長該結晶矽表面。所沉積的含矽材料或膜層可
包括矽、矽-鍺或矽-碳材料。此外,該含矽層可因硼、磷或鉮摻雜物而高度濃縮。
在一實例中,一含矽層的硼濃度可介於5x1019
原子/cm3
至約2x1020
原子/cm3
間。
在某些實施例中,該製程於沉積含矽材料的期間係使用矽甲烷(SiH4
)之矽前驅物。在其他實施例中,該製程於沉積含矽材料的期間係使用二氯矽甲烷(SiCl2
H2
)之矽前驅物。在另一實施例中,在沉積以矽為主之元件所需的含矽材料時,一逐步製程是在一步驟中使用二氯矽甲烷(SiCl2
H2
)且在另一步驟中使用矽甲烷,來有效的使磊晶層中的缺陷降至最低。
在此,「含矽(silicon-containing)」材料、化合物、膜層或層可解釋成包括一至少含有矽且可包括鍺、碳、硼、鉮和或磷在內的組合物。併入在含矽材料、膜層或層中的其他元素,例如金屬、鹵素或氫,則通常是雜質。含矽材料可以一諸如可代表矽的Si、可代表矽-鍺的SiGe、可代表矽-碳的SiC及可代表矽-鍺-碳的SiGeC之類的縮寫來表示。該等縮寫並不代表具有化學計量關係的化學式,也不代表該含矽材料之任一特定的還原/氧化狀態。
該沉積製程對於在例如第1A-1C圖所繪示之MOSFET及雙極性電晶體中沉積含矽層而言,是相當有用的製程。在此,含矽材料是在此製程中磊晶生長而成的沉積層或膜層且包括矽、矽-鍺、矽-碳、矽-鍺-碳、上述之摻雜物或上述之組合。該含矽材料包括膜層中拉緊的或未拉緊的層。
第1A-1B圖繪示出以所述沉積製程在源極/汲極特徵上沉積而成之內含磊晶生長之含矽材料的MOSFET元件。一從底層晶格上生長而成的含矽材料可保持該底層的晶格構造。在一實施例中,第1A圖示出沉積作為一凹陷的源極/汲極之含矽材料;至於在另一實施例中,第1B圖示出沉積作為一凹陷的源極/汲極及一升高的源極/汲極(elevated source/drain,ESD)之含矽材料。
可藉由將下層10暴露在一離子佈植製程中來形成源極/汲極層12。一般來說,下層10係有摻雜的n-型,至於源極/汲極層12則是有摻雜的p-型。藉由所述沉積製程將含矽層13選擇地、磊晶沉積於源極/汲極層12或直接沉積於下層10上;且藉由所述沉積製程將含矽層14選擇地、磊晶沉積於含矽層13上。閘極氧化層18可橋接分段的含矽層13且通常含有二氧化矽、氧氮化矽或氧化鉿。間隔層16可部分圍繞閘極氧化層18,該間隔層16通常包含諸如氮化物/氧化物積層之類的絕緣材料(即,Si3
N4
/SiO2
/Si3
N4
)。閘極層22(即,多晶矽)可延著多個垂直邊緣具有保護層,例如,二氧化矽,如第1A圖所示。或者,閘極層22可具有間隔層16及防止偏移層20(off-set layers 20)(即,Si3
N4
)沉積在其各側邊上。
在另一實施例中,第1C圖繪示出沉積在下層30之n-型收集層32上之雙極電晶體的底層34。底層34含有以所述製程磊晶生長於底層34上的含矽材料。該元件更包含絕緣層33(即,SiO2
或Si3
N4
)、接觸層36(即,重摻雜的聚-
矽)、防止偏移層38(即,Si3
N4
)及一第二絕緣層40(即,SiO2
或Si3
N4
)。
在一實施例中,如第2A-2F圖所繪示,在一MOSFET中形成一源極/汲極延伸物,其中該含矽層是選擇性地、磊晶沉積在該基材表面。第2A圖示出藉由佈植離子進入基材130表面來生成源極/汲極層132。該分段的源極/汲極層132可藉由形成在閘極氧化層135上的閘極136加以橋接起來,之後再續沉積以防止偏移層134。一部分的該源極/汲極層係被蝕刻並濕式潔淨,以產生凹陷138,如第2B圖所示。也可將一部分的閘極136加以蝕刻,或者在蝕刻前先沉積一硬遮罩以避免閘極材料不慎被移除。
第2C圖顯示以所述沉積製程技術選擇地沉積在源極/汲極層132上的含矽層140(亦即,磊晶或單晶材料),及以所述沉積製程技術選擇地沉積在閘極136上之含矽層142(亦即,多晶或非晶型材料)。在一實例中,在沉積製程之前係先沉積一硬遮罩在閘極136上方,使得在該硬遮罩被移除後,閘極136仍保持被暴露的情況。在另一實例中,含矽層140及142係被同時沉積而不沉積在偏移層134上。在一實施例中,含矽層140及142為含矽-鍺層,其中鍺濃度介於約1原子%(原子%)至約50原子%間較佳係約25%或更少。可將多層含不同元素量的含矽-鍺層堆疊起來形成具有一元素梯度濃度的含矽層140。舉例來說,一第一矽-鍺層可沉積具有一介於約15原子%至約25原子%的鍺濃度,且一第二矽-鍺層可沉積具有一介於約25原子%
至約35原子%的鍺濃度。在另一實例中,一第一矽-鍺層可沉積具有一介於約15原子%至約25原子%的鍺濃度,一第二矽-鍺層可沉積具有一介於約25原子%至約35原子%的鍺濃度,且一第三矽-鍺層可沉積具有一高達約5原子%的鍺濃度。
在另一實施例中,含矽層140及142為含矽-碳層,其中碳濃度介於約200ppm至約5原子%間,較佳是約3%或更少,更佳是介於約1原子%至約2原子%間,例如,約1.5原子%。在另一實施例中,含矽層140及142可為含矽-鍺-碳層,其中鍺濃度介於約1原子%(原子%)至約50原子%間,較佳係約25%或更少;且其中碳濃度介於約200ppm至約5原子%間,較佳是約3%或更少,更佳是介於約1原子%至約2原子%間,例如,約1.5原子%。
可將多層含矽層、矽-鍺層、矽-碳層或矽-鍺-碳層以不同順序沉積,以生成具有元素濃度梯度的含矽層140。該含矽層大致係摻雜有一濃度介於1x1019
原子/cm3
至約2.5x1021
原子/cm3
間的摻質(例如,B、As或P),較佳是含有介於5x1019
原子/cm3
至約2x1020
原子/cm3
間的摻質。摻質係被添加在形成梯度摻質層的每一個別含矽材料中。舉例來說,含矽層140係藉由沉積一具有濃度介於約5x1019
原子/cm3
至約1x1020
原子/cm3
間的摻質(例如,硼)的第一含矽-鍺層及沉積一具有濃度介於約1x1020
原子/cm3
至約2x1020
原子/cm3
間的摻質(例如,硼)的第二含矽-鍺層所製備而成。
緊接在含矽層沉積後被併入至含矽-碳層及含矽-鍺-碳層的碳,大致係位於晶格中的間隙位置處。此間隙位置處的碳含量約10原子%或更少,較佳是低於約5原子%,更佳是介於約1原子%至約3原子%間,例如約2原子%。可將該含矽層退火以將至少一部分(如果不是全部的話)位於間隙位置處的碳併入至晶格中的取代位置處(substitutional sites)。該退火步驟可包括在一諸如氧氣、氮氣、氫氣、氬氣、氦氣或上述氣體之組合之類的氣體環境下,所進行之一快速退火(a spike anneal),例如快速熱製程(rapid thermal process,RTP)、雷射退火或熱退火製程。該退火製程可在介於約800℃至約1,200℃,較佳是在介於約1,050℃至約1,100℃的溫度下進行。該退火製程可在含矽層之後立即施行,或是在基材經過多種其他處理步驟後才實施。
在下一步驟期間,第2D圖示出一間隔子144,該間隔子大致為一沉積在該偏移層134之上的氮化物間隔子(即,Si3
N4
)。間隔子144通常在與用來沉積該含矽層140不同的製程室中沉積,而在兩製程室間傳輸時,基材係暴露在諸如室溫下內含氧及水的大氣環境下。一旦間隔子144的沉積完成之後,或是已執行另一製程(亦即,退火、沉積或佈植)之後,即可在沉積含矽層146與148之前,將基材再次暴露在周圍環境下。在一實施例中,在將基材暴露至周圍環境之前,先在層140頂部沉積一不含鍺的磊晶表層或僅含最低濃度之鍺(例如,低於約5原子%)的磊晶
表層。相較於具有鍺濃度大於約5原子%的磊晶層來說,此因為暴露在周圍環境下所自然形成的氧化物層可更輕易地自內含最低濃度鍺的磊晶層中除去。
第2E圖繪示出從含矽材料中選擇、磊晶成長的升高的層148。升高的層148係沉積在層140(即,有摻質的SiGe)之上方,同時,多晶矽則係沉積在含矽層142上方以生成多晶矽層146。視含矽層142及沉積於含矽層142上之多晶矽層中的元素濃度而定,多晶矽層146中的元素濃度自然地將含有這些元素濃度,包括當兩層為不同層時的梯度濃度。
在一較佳實施例中,升高的層148為含有極少或不含鍺或碳的含矽層。但是,在另一實施例中,該升高的層148則含有低濃度的鍺或碳。舉例來說,升高的層148中可含有約5原子%或更少的鍺。在另一實施例中,升高的層148中可含有約2原子%或更少的碳。該升高的層148也可含有諸如硼、鉮、或磷之類的摻質。
在第2F圖所示的下一步驟中,一金屬層154係沉積在特徵之上且該元件係被暴露在一退火製程中。該金屬層154可包括鈷、鎳或鉭等等金屬。在退火製程期間,可將多晶矽層146及升高的層148分別轉變成矽化金屬層150及152。舉例來說,可將鈷沉積成為金屬層154,並可在退火製程中將其轉變成含有矽化鈷的矽化金屬層150及152。
可以原位摻質(in situ
dopant)來重度摻雜該含矽材料。因此,可省略掉前技的退火步驟並縮短總產出時間。
可添加最佳量的鍺和/或碳於含矽材料層中來達成提高沿著通道的載子遷移力及後續驅動電流的目的。選擇性磊晶成長含矽材料於閘極氧化物層上方可補償矽化期間損失的接合面,以彌補因超淺接合面所致之高串聯電阻的憂慮。這兩種應用可合併施行,或單獨施行於CMOS元件製程中。
由所述沉積製程所生成的含矽材料可用來沉積雙極(例如,基極、發射、集極、發射接觸)、BiCMOS(例如,基極、發射、集極、發射接觸)及CMOS(例如,通道、源極/汲極、源極/汲極延伸、升高的源極/汲極、基材、拉緊的矽、絕緣層上覆矽層、及接觸栓插)元件所使用的含矽層。該含矽膜層的其他用途還包括閘極、基極接觸層、集極接觸孔、發射接觸孔或升高的源極/汲極。
在一實施例中,一含矽膜層係被磊晶生長成一矽層。將內含一半導體特徵的基材(例如,直徑300毫米)置放在一製程室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在每分鐘約5標準立方公分(sccm)至約500sccm間,較佳是約50sccm至約200sccm間。載體氣流的流速在每分鐘約10標準公升(slm)至約30slm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約20torr間,較佳是約1torr至約50torr間。基材被加熱到約500℃至約1,000℃間,較佳是約600℃至約900℃間,更佳是約650℃至約750℃
間,例如約720℃。試劑混合物被熱驅動反應以磊晶沉積矽結晶。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶矽或多晶矽。執行此製程以生成厚度約10Å至約3,000Å的含矽層,例如約40Å至約100Å的含矽層。在另一實例中,所沉積的含矽層厚度介於約200Å至約600Å間。在一實施例中,該含矽層的厚度大於約500Å,例如約1,000Å。
以蝕刻劑來提供基材表面特徵上一選定面積,不會留有所沉積的含矽材料。該蝕刻劑可以用比從結晶表面移除矽結晶更快的速率,來移除形成在特徵上的非晶矽或多晶矽,藉以達到選擇性磊晶生長或沉積。對所述沉積製程有用的蝕刻劑包括HCl、HF、HBr、Si2
Cl6
、SiCl4
、Cl2
SiH2
、CCl4
、Cl2
、上述之衍生物或上述之組合。
除了矽烷和二氯矽烷之外,其他對沉積含矽層有用的矽前驅物包括較高碳數的矽烷、鹵化矽烷及有機矽烷。較高碳數的矽烷包括化學式為Six
H(2x+2)
的化合物,例如,二矽烷(Si2
H6
)、三矽烷(Si3
H8
)及四矽烷(Si4
H10
)等等。鹵化矽烷包括化學式為X’y
Six
H(2x+2-y)
的化合物,其中,X’=F、Cl、Br或I,例如,六氯矽烷(Si2
Cl6
)、四氯矽烷(SiCl4
)、二氯矽烷(Cl2
SiH2
)及三氯矽烷(Cl3
SiH)。有機矽烷包括化學式為Ry
Six
H(2x+2-y)
的化合物,其中,R=甲基、乙基、丙基或丁基,例如甲基矽烷((CH3
)SiH3
)、二甲基矽烷((CH3
)2
SiH2
)、乙基矽烷((C2
H5
)SiH3
)、甲基二矽烷((CH3
)Si2
H5
)、二甲基二矽烷((CH3
)2
Si2
H4
)及六甲基二矽烷
((CH3
)6
Si2
)。已發現有機矽烷是本發明實施例較佳的矽源及碳源,以便能在沉積含矽材料期間一便併入碳於含矽材料中。
可用於整個製程中的載體氣流包括氫氣、氬氣、氮氣、氦氣、生成氣體(N2
/H2
)及上述之組合等。在一實例中,係以氫氣作為載體氣流。在另一實例中,則係以氮氣作為載體氣流。在一實施例中,在一磊晶沉積期間一載體氣流並非以氫氣,也非以氫原子來實行。但是,係以一鈍氣(例如,氮氣、氬氣、氦氣或上述氣體之組合)作為一載體氣流。在本發明某些實施例中,可以各種比例來組合該等載體氣流。舉例來說,可以一包含氮氣或氬氣的載體氣流來維持該含矽材料層上可用的位置。當以氫氣作為一載體氣流時,含矽材料層表面氫氣的有無,也會限制可供矽或矽鍺於含矽材料層上生長之位置(例如,被動層)的數目。因此,一被動(或鈍化)表面會限制一特定溫度下的生長速率,特別是一低溫(<650℃)下的生長速率。因此,可在一低溫下使用包含氮和/或氬氣的載體氣流,以於不犧牲生長速率的情況下來降低熱預算。
在另一實施例中,磊晶生長一含矽層作為一矽-鍺層。將含有一半導體特徵的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一鍺源(例如,GeH4
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在約5sccm至約500sccm間,較佳是約50sccm
至約200sccm間。載體氣流的流速在約10slm至約30slm間。鍺源的流速在約0.1sccm至約10sccm間,較佳是約0.5sccm至約5sccm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約20torr間,較佳是約1torr至約5torr間,例如約3torr。基材被加熱到約500℃至約1,000℃間,較佳是約700℃至約900℃間。試劑混合物被熱驅動反應以磊晶沉積含矽材料層,特別是矽鍺層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶矽鍺化合物。
執行此製程以生成厚度約10Å至約3,000Å的沉積矽鍺層,例如約40Å至約100Å的含矽層。在另一實例中,所沉積的含矽層厚度介於約200Å至約600Å間。在一實施例中,該含矽層的厚度大於約500Å,例如約1,000Å。矽鍺層中的鍺濃度可以有梯度變化,較佳是該矽鍺層一較低部位所含鍺濃度較該矽鍺層上方部位的鍺濃度來得高。該矽鍺層中的鍺濃度介於約1原子%至約30原子%間,例如約20原子%。
除了鍺之外,其他對沉積含矽材料有用的鍺源或前驅物包括較高碳數的鍺烷及有機鍺烷。較高碳數的鍺烷包括化學式為Gex
H(2x+2)
的化合物,例如,二鍺烷(Ge2
H6
)、三鍺烷(Ge3
H8
)及四鍺烷(Ge4
H10
)等等。有機鍺烷包括化學式為Ry
Gex
H(2x+2-y)
的化合物,其中,R=甲基、乙基、丙基或丁基,例如甲基鍺烷((CH3
)GeH3
)、二甲基鍺烷
((CH3
)2
GeH2
)、乙基鍺烷((C2
H5
)GeH3
)、甲基二鍺烷((CH3
)Ge2
H5
)、二甲基二鍺烷((CH3
)2
Ge2
H4
)及六甲基二鍺烷((CH3
)6
Ge2
)。已發現鍺烷及有機鍺烷是本發明實施例較佳的鍺源及碳源,以便能在沉積含矽材料(主要是矽鍺及矽鍺碳材料)期間一便併入鍺及碳於含矽材料中。鍺源通常與載體氣流(例如,氫氣)一同混合,以將鍺源稀釋及更易於控制該鍺源濃度。與例來說,一流速介於0.5sccm至約5sccm的鍺源相當於在流速約50sccm至約500sccm間的載體氣流中流入約1%的鍺一樣。在此份說明書中,鍺源的流速均忽略了載體氣流的流速。
在另一實施例中,一含矽層係被磊晶生長成為一有摻質的矽層。將含有一半導體特徵的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一摻質(例如,B2
H6
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在約5sccm至約500sccm間,較佳是約50sccm至約200sccm間。載體氣流的流速在約10slm至約30slm間。摻質前驅物的流速在約0.01sccm至約10sccm間,較佳是約0.2sccm至約2sccm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約20torr間,較佳是約1torr至約5torr間,例如約3torr。基材被加熱到約500℃至約1,000℃間,較佳是約700℃至約900℃間。試劑混合物被熱驅動反應以磊晶沉積含摻質的矽
材料層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶矽或多晶矽化合物。
執行此製程以生成厚度約10Å至約3,000Å之含有摻質的矽層,例如約40Å至約100Å的含矽層。在另一實例中,所沉積的含矽層厚度介於約200Å至約600Å間。在一實施例中,該含矽層的厚度大於約500Å,例如約1,000Å。矽層中的摻質濃度可以有梯度變化,較佳是該矽層一較低部位所含摻質濃度較該矽層上方部位的摻質濃度來得高。
摻質可提供所沉積的矽層各種導電特性,例如,電子元件所需要的使介電電子能在一控制的欲求通道中流動。含矽材料膜層中被摻入特定濃度的摻質,以達到欲求的導電特徵。在一實施例中,該含矽材料是摻入p-型摻質,例如以二硼烷來摻入濃度在1015
原子/cm3
至約1021
原子/cm3
的硼。在一實施例中,該p-型摻質的濃度至少為5 x 1019
原子/cm3
。在另一實施例中,該p-型摻質的濃度為約1x1020
原子/cm3
至約2.5 x 1021
原子/cm3
。在另一實施例中,該含矽材料是摻入n-型摻質,例如摻入濃度在1015
原子/cm3
至約1021
原子/cm3
的磷和/或鉮。
可用於所述沉積製程中的含硼摻質或摻質前驅物包括硼烷及烷基硼烷。硼烷可包括硼烷、二硼烷、三硼烷、四硼烷、五硼烷、及上述之衍生物、錯化物與上述之組合。烷基硼烷包括化學式為Rx
BH(3-x)
的化合物,其中,R=甲基、乙基、丙基或丁基,且x=0、1、2或3。烷基硼烷包括三甲基硼烷((CH3
)3
B)、二甲基硼烷((CH3
)2
BH)、三乙基
硼烷((C2
H5
)3
B)、二乙基硼烷((C2
H5
)2
BH)、及上述之衍生物、錯化物與上述之組合。摻質前驅物也包括胂(AsH3
)、膦(PH3
)及烷基膦(alkylphosphine),例如化學式為Rx
PH(3-x)
的化合物,其中,R=甲基、乙基、丙基或丁基,且x=0、1、2或3。烷基膦(alkylphosphine)包括三甲基膦((CH3
)3
P)、二甲基膦((CH3
)2
PH)、三乙基膦((C2
H5
)3
P)及二乙基膦((C2
H5
)2
PH)、及上述物質之衍生物、錯化物與上述物質之組合。摻質通常與載體氣流(例如,氫氣)混合,以便能稀稀釋及更易於控制該摻質濃度。與例來說,一流速介於0.2sccm至約2sccm的摻質相當於在流速約20sccm至約200sccm間的載體氣流中流入約1%的摻質一樣。在此份說明書中,摻質前驅物的流速均忽略了載體氣流的流速。
在另一實施例中,一含矽層係被磊晶生長成為一有摻質的矽鍺層。將含有一半導體特徵的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一摻質(例如,B2
H6
)、一鍺源(例如,GeH4
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在約5sccm至約500sccm間,較佳是約50sccm至約200sccm間。載體氣流的流速在約10slm至約30slm間。鍺源的流速在約0.1sccm至約10sccm間,較佳是約0.5sccm至約5sccm間。摻質前驅物的流速在約0.01sccm至約10sccm間,較佳是約0.2sccm至約3sccm間。蝕刻劑的流速在約5
sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約20torr間,較佳是約1torr至約5torr間,例如約3torr。基材被加熱到約500℃至約1,000℃間,較佳是約700℃至約900℃間。試劑混合物被熱驅動反應以磊晶沉積含摻質的矽材料層,主要是一矽鍺層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶矽鍺層化合物。執行此製程以生成厚度約10Å至約3,000Å之含有摻質的矽鍺層,例如約40Å至約100Å的矽鍺層。在另一實例中,所沉積的含矽層厚度介於約200Å至約600Å間。在一實施例中,該矽鍺層的厚度大於約500Å,例如約1,000Å。有摻質的矽鍺層中的鍺濃度及摻質濃度可以有梯度變化,較佳是該有摻質的矽鍺層一較低部位所含鍺濃度和/或摻質濃度較該有摻質的矽鍺層上方部位的鍺濃度和/或摻質濃度來得高。該矽鍺層中的鍺濃度介於約1原子%至約50原子%間,較佳是在15原子%至約35原子%間。所摻入至該矽鍺層中的硼濃度在1019
原子/cm3
至約2.5 x 1021
原子/cm3
間,例如,約1 x 1020
原子/cm3
的硼。
在另一實施例中,一含矽層係被磊晶生長成為一矽-碳層。將含有一半導體特徵的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一碳源(例如,CH3
SiH3
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在約5sccm至約500sccm間,較佳是約
50sccm至約200sccm間。載體氣流的流速在約10slm至約30slm間。碳源的流速在約0.1sccm至約15sccm間,較佳是約0.3sccm至約5sccm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約200torr間,較佳是約1torr至約5torr間,例如約3torr。基材被加熱到約500℃至約1,000℃間,較佳是約700℃至約900℃間。試劑混合物被熱驅動反應以磊晶沉積含矽材料層,特別是矽碳層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶矽碳材料。
執行此製程以生成厚度約10Å至約3,000Å的矽碳層,例如約40Å至約100Å的含矽層。在另一實例中,所沉積的含矽層厚度介於約200Å至約600Å間。在一實施例中,該含矽層的厚度大於約500Å,例如約1,000Å。矽碳層中的碳濃度可以有梯度變化,較佳是該矽碳層一較低部位所含碳濃度較該矽碳層上方部位的碳濃度來得高。該矽碳層中的碳濃度介於約200ppm至約5原子%間,較佳是介於約1原子%至約3原子%間,例如約1.5原子%。
對沉積矽碳層有用的碳源包括乙基、丙基或丁基之有機矽烷、烷類、烯類及炔類。這類碳源包括甲基矽烷((CH3
)SiH3
)、二甲基矽烷((CH3
)2
SiH2
)、乙基矽烷((C2
H5
)SiH3
)、甲烷(CH4
)、乙烯(C2
H4
)、乙炔(C2
H2
)、丙烷(C3
H8
)、丙烯(C3
H6
)、丁炔(C4
H6
)等等。碳源通常與載體氣流(例如,一氫氣)一同混合,以將碳源稀釋及更易於控制該碳源濃
度。舉例來說,一流速介於0.3sccm至約5sccm的碳源相當於在流速約30sccm至約500sccm間的載體氣流中流入約1%的碳一樣。在此份說明書中,碳源的流速均忽略了載體氣流的流速。
在另一實施例中,一含矽層係被磊晶生長成為一有摻質的矽碳層。將含有一半導體特徵的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一碳源(例如,CH3
SiH3
)、一摻質(例如,B2
H6
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在約5sccm至約500sccm間,較佳是約50sccm至約200sccm間。載體氣流的流速在約10slm至約30slm間。碳源的流速在約0.1sccm至約15sccm間,較佳是約0.3sccm至約5sccm間。摻質前驅物的流速在約0.01sccm至約10sccm間,較佳是約0.2sccm至約3sccm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約200torr間,較佳是約1torr至約5torr間,例如約3torr。基材被加熱到約500℃至約1,000℃間,較佳是約700℃至約900℃間。試劑混合物被熱驅動反應以磊晶沉積含摻質的矽碳材料層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶矽碳材料。
執行此製程以生成厚度約10Å至約3,000Å之含有摻質的矽碳層,例如約40Å至約100Å的矽碳層。在另一實
例中,所沉積的矽碳層厚度介於約200Å至約600Å間。在一實施例中,該矽碳層的厚度大於約500Å,例如約1,000Å。該含有摻質之矽碳層中的碳濃度和/或摻質濃度可以有梯度變化,較佳是該有摻質之矽碳層一較低部位所含碳濃度和/或摻質濃度較該有摻質之矽碳層上方部位的含碳濃度和/或摻質濃度來得高。該含有摻質之矽碳層中的碳濃度介於約200ppm至約5原子%間,較佳是介於約1原子%至約3原子%間,例如約1.5原子%。所摻入至該矽鍺層中的硼濃度在1019
原子/cm3
至約2.5 x 1021
原子/cm3
間,例如,約1 x 1020
原子/cm3
的硼。
在另一實施例中,一含矽層係被磊晶生長成為一矽-鍺-碳層。將含有一半導體特徵的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一鍺源(例如,GeH4
)、一碳源(例如,CH3
SiH3
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在約5sccm至約500sccm間,較佳是約50sccm至約200sccm間。載體氣流的流速在約10slm至約30slm間。鍺源的流速在約0.1sccm至約10sccm間,較佳是約0.5sccm至約5sccm間。碳源的流速在約0.1sccm至約15sccm間,較佳是約0.3sccm至約5sccm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約200torr間,較佳是約1torr至約5torr間,例如約3torr。基材被加熱到約500℃至約
1,000℃間,較佳是約500℃至約700℃間。試劑混合物被熱驅動反應以磊晶沉積含矽材料層,即矽鍺碳層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶或多晶矽鍺碳化合物。
執行此製程以生成厚度約10Å至約3,000Å的沉積矽鍺碳化合物,例如約40Å至約100Å的矽鍺碳化合物。在另一實例中,所沉積的含矽層厚度介於約200Å至約600Å間。在一實施例中,該含矽層的厚度大於約500Å,例如約1,000Å。矽鍺碳層中的鍺濃度和/或碳濃度可以有梯度變化,較佳是該矽鍺碳層一較低部位所含鍺濃度和/或碳濃度較該矽鍺碳層上方部位的鍺濃度和/或碳濃度來得高。該矽鍺碳層中的鍺濃度介於約1原子%至約50原子%間,較佳是在15原子%至約35原子%間。該矽鍺碳層中的碳濃度介於約200ppm至約5原子%間,較佳是介於約1原子%至約3原子%間。
在另一實施例中,一含矽層係被磊晶生長成為一有摻質的矽鍺碳層。將含有一半導體特徵的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和/或氮氣)、一鍺源(例如,GeH4
)、一碳源(例如,CH3
SiH3
)、一摻質(例如,B2
H6
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,矽烷或二氯矽烷)同時流入一製程室中。矽前驅物的流速在約5sccm至約500sccm間,較佳是約50sccm至約200sccm間。載體氣流的流速在約10slm至約30slm間。鍺源的流速在約0.1sccm至約10sccm間,較佳是約
0.5sccm至約5sccm間。碳源的流速在約0.1sccm至約15sccm間,較佳是約0.3sccm至約5sccm間。摻質前驅物的流速在約0.01sccm至約10sccm間,較佳是約0.2sccm至約3sccm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約200torr間,較佳是約1torr至約5torr間,例如約3torr。基材被加熱到約500℃至約1,000℃間,較佳是約500℃至約700℃間。試劑混合物被熱驅動反應以磊晶沉積含摻質的矽鍺碳材料層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶或多晶矽鍺碳材料。
執行此製程以生成厚度約10Å至約3,000Å之含有摻質的矽鍺碳層,例如約40Å至約100Å的矽碳層。在另一實例中,所沉積的含矽層厚度介於約200Å至約600Å間。在一實施例中,該含矽層的厚度大於約500Å,例如約1,000Å。該含有摻質之矽鍺碳層中的鍺濃度、碳濃度和/或摻質濃度可以有梯度變化,較佳是該含有摻質之矽鍺碳層一較低部位所含鍺濃度、碳濃度和/或摻質濃度較該含有摻質之矽鍺碳層上方部位的含鍺濃度、碳濃度和/或摻質濃度來得高。該含有摻質之矽鍺碳層中的鍺濃度介於約1原子%至約50原子%間,較佳是在15原子%至約35原子%間。該含有摻質之矽鍺碳層中的碳濃度介於約0.1原子%至約5原子%間,較佳是介於約1原子%至約3原子%間。所摻入至該矽鍺碳層中的硼濃度在1019
原子/cm3
至約2.5
x 1021
原子/cm3
間,例如,約1 x 1020
原子/cm3
的硼。
在另一實施例中,在沉積任一上述含矽層材料之後,接續以二氯矽烷磊晶生長一第二含矽層。將含有上述化合物的基材(直徑300毫米)放入一處理室中。在沉積期間,將一載體氣流(例如,氫氣和或氮氣)、一鍺源(例如,GeH4
)、一蝕刻劑(例如,HCl)與一矽前驅物(例如,Cl2
SiH2
)同時流入一製程室中。該二氯矽烷的流速在約5sccm至約500sccm間,較佳是約50sccm至約200sccm間。載體氣流的流速在約10slm至約30slm間。鍺源的流速在約0.1sccm至約10sccm間,較佳是約0.5sccm至約5sccm間。蝕刻劑的流速在約5sccm至約1,000sccm間,較佳是約30sccm至約500sccm間。製程室壓力維持在約0.1torr至約200torr間,較佳是低於約5torr間,例如約3torr。基材被加熱到約500℃至約1,000℃間,較佳是約700℃至約900℃間。試劑混合物被熱驅動反應以磊晶沉積一第二含矽層,即一矽鍺層。蝕刻劑可從基材表面介電特徵上移除任何沉積的非晶或多晶矽鍺材料。執行此製程以約10Å/分鐘至約100Å/分鐘的速率,較佳是約50Å/分鐘的速率,生成厚度約10Å至約3,000Å之沉積矽鍺層。該矽鍺層中的鍺濃度介於約1原子%至約30原子%間,較佳是約20原子%間。在一實施例中,一沉積製程係使用矽烷來沉積出一矽鍺層。在其他實施例中,則以二氯矽烷來取代前述任一實施例中的矽烷,來沉積出一第二含矽層。在另一實施例中,可以上述任一矽烷為主的製程來沉積一第三含矽
層。
因此,在一實施例中,可藉由交互使用矽烷與二氯矽烷作為不同的矽前驅物,來依序沉積含矽材料而形成一含矽積層(a silicon-containing laminate)。在一實施例中,藉由沉積4層含矽層(每一層約500Å)而來形成一層約2000Å厚的含矽積層,其中第一層與第三層係使用二氯矽烷作為矽前驅物,而第二層與第四層則是使用矽烷作為矽前驅物所沉積而成的。矽積層的另一態樣是以矽烷來沉積該第一、三層,而以二氯矽烷來沉積第二、四層。每一層厚度係與其他層不同,一積層中可含有不同厚度的含矽層。
在一實施例中,當前一層含有表面島(例如,污染物或不規則表面)時,以二氯矽烷來沉積該含矽層。一併入有二氯矽烷的製程對表面島較不敏感,因此可沉積含矽材料於前一層。相較於使用矽烷作為矽前驅物來沉積含矽材料的製程來說,使用二氯矽烷作為矽前驅物來沉積含矽材料時,具有較高或較快的水平或平面生長速率。在一實施例中,該表面島係被一具有同形、平滑且一致的表面(該表面係由含二氯矽烷的沉積製程所生成)的含矽材料所覆蓋。
另一實施例,於製程步驟間,可將基材表面暴露在周圍環境中,例如來自空氣中的氧氣或水氣。暴露在周圍環境中的步驟一般是在元件製造期間將基材傳送至不同製程室間所產生的。在基材表面沉積第一含矽層,將基材表面暴露在周圍環境,之後,在基材表面沉積第二含矽層。在一態樣中,在將基材暴露在周圍環境之前,先在該第一含
矽層表面沉積一帽蓋層。該層帽蓋層可以是一種諸如矽之類的介電材料。舉例來說,在基材表面沉積一矽-鍺層,之後在該矽-鍺層上沉積一帽蓋層,將基材暴露至周圍環境中,接著在該矽帽蓋層上沉積一第二含矽層,例如一矽層或一矽-碳層。
本發明實施例提供在許多基材及表面上沉積含矽層的方法。對本發明實施例有用的基材包括(但不限於)半導體晶圓,例如結晶矽(如,矽<100>及矽<111>)、二氧化矽、矽鍺、有或無摻質的晶圓及有或無圖案化的晶圓。基板可有許多不同的形狀(例如圓形、方形及矩形)及大小(例如,直徑200毫米或300毫米)。上述的基材或表面可包括具有介電性、導電性與阻障特性且包括聚矽、SOI、拉緊及未拉緊晶格之晶圓、膜層、層及材料。表面前處理製程可包括一研磨製程、一蝕刻製程、一還原製程、一氧化製程、一羥基化製程、一退火製程及一烘烤製程。在一實施例中,將晶圓浸入1% HF溶液,在含有氫氣之800℃的環境下乾燥並加熱。
在一實施例中,含矽材料包括濃度介於約0原子%至約95原子%間的鍺。在另一實施例中,含矽材料包括濃度介於約1原子%至約30原子%間的鍺,較佳是介於約15原子%至約30原子%間的鍺,例如約20原子%。含矽化合物也包括濃度介於約0原子%至約5原子%間的碳。在其他態樣中,碳濃度介於約200ppm至約3原子%間,較佳是約1.5原子%。
以本發明方法製備而成的鍺和/或碳的含矽材料層可具有一致、隨意或梯度的元素濃度。梯度矽鍺層揭示於同時受讓與本案申請人之美國專利第6,770,134號及美國專利申請公開案第20020174827號中,上述專利全部內容在此並入作為參考。在一實施例中,以一矽源及一鍺源(例如,GeH4
)來沉積矽鍺層。在此實施例中,可變化該矽源及鍺源的流速以在生長梯度層時控制沉積層中的元素濃度,如矽和鍺濃度。在另一實施例中,以一矽源及一碳源(例如,CH3
SiH3
)來沉積矽碳層。在此實施例中,可變化該矽源及碳源的流速以於均勻或梯度層生長期間來控制沉積層中的元素濃度。在另一實施例中,以一矽源、一鍺源(例如,GeH4
)及一碳源(例如,CH3
SiH3
)來沉積矽鍺碳層。在此實施例中,可獨立變化該矽源、鍺源及碳源的流速以於均勻或梯度層生長期間來控制沉積層中的元素濃度。
由所述製程產生的MOSFET元件可含有一PMOS組件及一NMOS組件。該PMOS組件具有一p-型通道,該p-型通道具有負責通道導電性的電洞;至於該NMOS組件具有一n-型通道,且具有負責通道導電性的電子。因此,可沉積諸如矽鍺之類的含矽材料於凹陷區域中,以形成一PMOS組件。在另一實施例中,可沉積諸如矽碳之類的含矽材料於凹陷區域中,以形成一NMOS組件。矽鍺因為若干原因用於PMOS應用。一併入的碳數遠高於矽數的矽鍺材料,可降低接合面間的電阻。此外,基材表面該矽鍺/矽化物層介面也比矽/矽化物層介面具有較低的Schottky
阻障性質。
此外,磊晶生長於一矽層頂部的矽鍺層,因為矽鍺的晶格常數大於矽,因此該矽鍺膜層內部有壓縮應力。該壓縮應力會被轉移到水平方向上以於該PMOS通道中創造出壓縮力而提高電洞的遷移力。對NMOS應用來說,可在凹陷區域使用矽碳來提高通道的拉伸應力,因為矽碳的晶格常數低於矽之故。該拉伸應力被轉移到通道內而提高了電子的遷移力。因此,在一實施例中,形成具有一第一拉緊晶格值(a first lattice strain value)的第一含矽層與具有一第二拉緊晶格值的第二含矽層。舉例來說,一厚度介於約50Å至約200Å的矽碳層被沉積在一基材表面上,接著,在該矽碳層上沉積一厚度介於約150Å至約1,000Å的矽鍺層。該矽碳層可以是磊晶生長且比磊晶生長在矽碳層上的矽鍺層具有較少的拉緊應力。
在本發明製程中,以CVD製程來製備含矽材料層,其中該CVD製程可以是原子層沉積(ALD)製程和/或原子層磊晶(ALE)製程。化學沉積製程會使用到多種技術,例如電漿輔助CVD(PA-CVD)、原子層CVD(ALCVD)、有機金屬或金屬有機CVD(OMCVD或MOCVD)、雷射輔助CVD(LA-CVD)、深紫外光CVD(UV-CVD)、熱線CVD(HWCVD)、減壓CVD(RP-CVD)、超高真空CVD(UHV-CVD)等等。在一實施例中,本發明較佳製程是使用熱式CVD來磊晶生長或沉積該含矽材料,該等含矽材料包括矽、矽鍺、矽碳、矽鍺碳、上述物質之含有摻質的變化物或上述物質
之組合。
可在習知ALE、CVD、及ALD技藝中的設備內執行本發明製程。該等設備可令來源物與一加熱基材接觸,使含矽材料層於基材上生長。該製程可在約0.1torr至約200torr的壓力間操作,較佳是在約0.5torr至約50torr的壓力間操作,更佳是在約1torr至約10torr的壓力間操作。可用來沉積含矽膜層的硬體包括美商應用材料公司(加州,聖塔卡拉市)出品的Epi Centura®系統及Poly Gen®系統。對沉積此所述含矽層有用的ALD設備揭示在2001年12月21日提申之美國公開專利第20030079686號中,標題為「Gas Delivery Apparatus and Methods for ALD」,該專利全部內容在此並入作為參考。其他設備還包括習知的批處理高溫烤箱。
實施例1:SiGe/Si積層
以一矽<100>基材(直徑300毫米)來探討由CVD製程所生成的選擇性、單晶膜層。在該晶圓表面上有一介電特徵。該晶圓係藉由將基材浸泡在1% HF中約45秒所製備而成的。將晶圓載入至沉積室中(Epi Centura®室)並在800℃氫氣環境下烘烤約60秒以去除原本存在的氧化物。將氫氣的載氣流導引朝向基材,並加入來源化合物於載氣流中。在3torr、725℃下加入二氯矽烷(100sccm)及鍺烷(1% GeH4
在氫氣中,280sccm);此外,還傳送氯化氫(190sccm)及二硼烷(1%在氫氣中,150sccm)至處理室中。將基材維持在725℃,執行約5分鐘的
沉積製程,以生成500Å的矽鍺層,其中鍺濃度約2原子%且硼濃度約1.0 x 1020
/cm3
。將基材從沉積室中移出,並暴露在周圍環境中。再次將基材載入至一第二沉積室中(Epi Centura®室)並加熱至800℃。將基材暴露在一含有矽烷(100sccm)及氯化氫(250sccm)的處理氣體中約10分鐘,以選擇性地沉積一矽層在該矽鍺層上。
實施例2:梯度SiGe/Si積層
以一矽<100>基材(直徑300毫米)來探討由CVD製程所生成的選擇性、單晶膜層。在該晶圓表面上有一介電特徵。該晶圓係藉由將基材浸泡在1% HF中約45秒所製備而成的。將晶圓載入至沉積室中(Epi Centura®室)並在800℃氫氣環境下烘烤約60秒以去除原本存在的氧化物。將氫氣的載氣流導引朝向基材,並加入來源化合物於載氣流中以沉積出第一矽鍺層。在3torr、725℃下加入二氯矽烷(100sccm)及鍺烷(1% GeH4
在氫氣中,190sccm);此外,還傳送氯化氫(160sccm)及二硼烷(1%在氫氣中,150sccm)至處理室中。將基材維持在725℃,執行約2分鐘的沉積製程,以生成100Å的矽鍺層,其中鍺濃度約15原子%且硼濃度約5.0 x 1019
/cm3
。在該第一矽鍺層上沉積一第二矽鍺層以生成一具有梯度的矽鍺層。在3torr、725℃下加入二氯矽烷(100sccm)及鍺烷(1% GeH4
在氫氣中,350sccm);此外,還傳送氯化氫(250sccm)及二硼烷(1%在氫氣中,125sccm)至處理室中。將基材維持在725℃,執行約5分鐘的沉積製程,以生成500Å的矽鍺層,其中鍺濃度約30原子%且硼濃度約1.8 x
1020
/cm3
。將基材從沉積室中移出,並暴露在周圍環境中。再次將基材載入至一第二沉積室中(Epi Centura®室)並加熱至800℃。將基材暴露在一含有矽烷(100sccm)及氯化氫(250sccm)的處理器體中約10分鐘,以選擇性地沉積一矽層在該矽鍺層上。
實施例3:SiC/Si積層
以一矽<100>基材(直徑300毫米)來探討由CVD製程所生成的選擇性、單晶膜層。在該晶圓表面上有一介電特徵。該晶圓係藉由將基材浸泡在1% HF中約45秒所製備而成的。將晶圓載入至沉積室中(Epi Centura®室)並在800℃氫氣環境下烘烤約60秒以去除原本存在的氧化物。將氫氣的載氣流導引朝向基材,並加入來源化合物於載氣流中。在3torr、725℃下加入二氯矽烷(100sccm)及甲基矽烷(1% CH3
SiH3
在氫氣中,100sccm);此外,還傳送氯化氫(160sccm)及二硼烷(1%在氫氣中,150sccm)至處理室中。將基材維持在725℃,執行約5分鐘的沉積製程,以生成500Å的矽碳層,其中碳濃度約1.25原子%且硼濃度約1.0 x 1020
/cm3
。將基材從處理室中移出,並暴露在周圍環境中。再次將基材載入至一第二沉積室中(Epi Centura®室)並加熱至800℃。將基材暴露在一含有矽烷(100sccm)及氯化氫(250sccm)的處理氣體中約10分鐘,以選擇性地沉積一矽層在該矽碳層上。
實施例4:梯度SiC/Si積層
以一矽<100>基材(直徑300毫米)來探討由CVD製程所生成的選擇性、單晶膜層。在該晶圓表面上有一介電特徵。該晶圓係藉由將基材浸泡
在1% HF中約45秒所製備而成的。將晶圓載入至沉積室中(Epi Centura®室)並在800℃氫氣環境下烘烤約60秒以去除原本存在的氧化物。將氫氣的載氣流導引朝向基材,並加入來源化合物於載氣流中以沉積出第一矽碳層。在3torr、725℃下加入二氯矽烷(100sccm)及甲基矽烷(1% CH3
SiH3
在氫氣中,80sccm);此外,還傳送氯化氫(160sccm)及二硼烷(1%在氫氣中,100sccm)至處理室中。將基材維持在725℃,執行約2分鐘的沉積製程,以生成100Å的矽鍺層,其中碳濃度約1.25原子%且硼濃度約5.0 x 1019
/cm3
。在該第一矽碳層上沉積一第二矽碳層以生成一具有梯度的矽碳層。在3torr、725℃下加入二氯矽烷(100sccm)及甲基矽烷(1% CH3
SiH3
在氫氣中,359sccm);此外,還傳送氯化氫(250sccm)及二硼烷(1%在氫氣中,150sccm)至處理室中。將基材維持在725℃,執行約5分鐘的沉積製程,以生成500Å的矽碳層,其中碳濃度約1.75原子%且硼濃度約1.8 x 1020
/cm3
。將基材從沉積室中移出,並暴露在周圍環境中。再次將基材載入至一第二沉積室中(Epi Centura®室)並加熱至800℃。將基材暴露在一含有矽烷(100sccm)及氯化氫(250sccm)的處理氣體中約10分鐘,以選擇性地沉積一矽層在該矽碳層上。
實施例5:SiGeC/Si積層
以一矽<100>基材(直徑300毫米)來探討由CVD製程所生成的選擇性、單晶膜層。在該晶圓表面上有一介電特徵。該晶圓係藉由將基材浸泡在1% HF中約45秒所製備而成的。將晶圓載入至沉積室中
(Epi Centura®室)並在800℃氫氣環境下烘烤約60秒以去除原本存在的氧化物。將氫氣的載氣流導引朝向基材,並加入來源化合物於載氣流中。在3torr、725℃下加入二氯矽烷(100sccm)、鍺烷(1% GeH4
在氫氣中,190sccm)及甲基矽烷(1% CH3
SiH3
在氫氣中,100sccm);此外,還傳送氯化氫(220sccm)及二硼烷(1%在氫氣中,150sccm)至處理室中。將基材維持在725℃,執行約5分鐘的沉積製程,以生成500Å的矽鍺碳層,其中鍺濃度約20原子%,碳濃度約1.5原子%且硼濃度約1.0 x 1020
/cm3
。將基材從處理室中移出,並暴露在周圍環境中。再次將基材載入至一第二沉積室中(Epi Centura®室)並加熱至800℃。將基材暴露在一含有矽烷(100sccm)及氯化氫(250sccm)的處理氣體中約10分鐘,以選擇性地沉積一矽層在該矽鍺碳層上。
雖然本發明已用本發明之實施例被明確地示出及說明,但熟習此技藝者將可瞭解的是上述在形式及細節上之其它形式與細節上的改變可在不偏離本發明的範圍及精神下被達成。因此,本發明並不侷限於所示及所說明的特定形式與細節,而是落在由以下的申請專利範圍所界定的範圍內。
10、30‧‧‧下層
12、132‧‧‧源極/汲極層
13、14、140、142、146、148‧‧‧含矽層
16‧‧‧間隔層
18、135‧‧‧閘極氧化層
19‧‧‧保護層
20、38、134‧‧‧防止偏移層
22、136‧‧‧閘極層
32‧‧‧n-型收集層
33、40‧‧‧絕緣層
34‧‧‧底層
36‧‧‧接觸層
130‧‧‧基材
144‧‧‧間隔子
146‧‧‧多晶矽層
148‧‧‧升高的層
150‧‧‧矽化金屬層
154‧‧‧金屬層
第1A-1C圖顯示數個具有磊晶沉積的含矽層於其上的元件;及第2A-2F圖示出在一MOSFET中製造突出的源極/汲
極元件的技術。
10‧‧‧下層
12‧‧‧源極/汲極層
13、14‧‧‧含矽層
16‧‧‧間隔層
18‧‧‧閘極氧化層
20‧‧‧防止偏移層
22‧‧‧閘極層
Claims (71)
- 一種在一製程室中於一基材上生成一以矽為主之材料的方法,該基材具有多種介電材料且在該基材上具有多個源極區域以及汲極區域,該方法至少包含以下步驟:將該基材暴露在一第一製程氣體下以於該基材上沉積一第一含矽層,該第一製程氣體包含二氯矽烷、一鍺源、一第一蝕刻劑及一載體氣體,其中該第一含矽層選擇性地沉積在該基材的該等源極區域與汲極區域上,同時在該基材的該等介電材料的該表面上將該第一含矽層蝕刻移除;及之後將該基材暴露在一第二製程氣體下以選擇性沉積一第二含矽層覆於該基材上的該第一含矽層的該表面上,該第二製程氣體包含矽烷及一第二蝕刻劑。
- 如申請專利範圍第1項所述之方法,其中該第一製程氣體包含:流速在約50sccm至約200sccm的範圍內的該二氯矽烷;流速在約0.5sccm至約5sccm的範圍內的鍺烷;流速在約30sccm至約500sccm的範圍內的氯化氫;及流速在約10slm至約30slm的範圍內的氫氣。
- 如申請專利範圍第2項所述之方法,其中該製程室被加壓至一壓力,該壓力是在約1torr至約10torr的範圍內。
- 如申請專利範圍第1項所述之方法,其中該第一含矽層是一有凹陷的層(a recessed layer)且該第二含矽層是在源極/汲極特徵內之一升高的層(an elevated layer)。
- 如申請專利範圍第2項所述之方法,其中該第一含矽層包含一漸變(graded)的鍺濃度。
- 如申請專利範圍第2項所述方法,其中該第一及第二製程氣體之各者獨立地包含一摻質前驅物,該摻質前驅物選自由二硼烷、胂、膦、及前述物質之衍生物所組成的群組中。
- 如申請專利範圍第6項所述之方法,其中該第一及第二含矽層之各者獨立地具有一硼濃度,該硼濃度是在約5x1019 原子/cm3 至約2x1020 原子/cm3 的範圍內。
- 如申請專利範圍第6項所述之方法,其中該第一及第二含矽層之各者獨立地包含一漸變的摻質濃度。
- 如申請專利範圍第1項所述之方法,其中該第二製程氣體包含:流速在約50sccm至約200sccm之範圍內的該矽烷;及流速在約30sccm至約500sccm之範圍內的氯化氫。
- 如申請專利範圍第9項所述之方法,其中該第二製程氣體包含一第二鍺源。
- 如申請專利範圍第10項所述之方法,其中該第二含矽層的鍺濃度大於該第一含矽層的鍺濃度。
- 如申請專利範圍第6項所述之方法,其中該第二含矽層的摻質濃度大於該第一含矽層的摻質濃度。
- 一種在一製程室中於一基材上生成一以矽為主之材料的方法,該基材具有多種介電材料且在該基材上具有多個源極區域以及汲極區域,該方法至少包含以下步驟:將該基材暴露在一第一製程氣體下以於該基材上沉積一第一含矽層,該第一製程氣體包含二氯矽烷、一鍺源、一碳源、一第一蝕刻劑及一載體氣體,其中該第一含矽層選擇性地沉積在該基材的該等源極區域與汲極區域上,同時在該基材的該等介電材料的該表面上將該第一含矽層蝕 刻移除;及之後將該基材暴露在一第二製程氣體下以選擇性沉積一第二含矽層覆於該基材上的該第一含矽層的該表面上,該第二製程氣體包含矽烷及一第二蝕刻劑。
- 如申請專利範圍第13項所述之方法,其中該第一含矽層在一晶格中具有多個間隙位置(insterstitial sites)且在該等間隙位置內含有約3原子%或更少的碳。
- 如申請專利範圍第14項所述之方法,進一步包含以下步驟:將該第一含矽層退火以將至少一部分的該碳併入該晶格的多個取代位置內。
- 如申請專利範圍第15項所述之方法,其中該碳源是甲基矽烷。
- 如申請專利範圍第14項所述之方法,其中該第一含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第17項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 如申請專利範圍第14項所述之方法,其中該第二含 矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第19項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 一種在一製程室中於一基材上生成一以矽為主之材料的方法,該基材具有多種介電材料且在該基材上具有多個源極區域以及汲極區域,該方法至少包含以下步驟:將該基材暴露在一第一製程氣體下以沉積一第一含矽層,該第一製程氣體包含二氯矽烷、一鍺源、一碳源、一第一蝕刻劑及一載體氣體,該第一含矽層在一晶格中含有多個間隙位置且在該等間隙位置內含有約3原子%或更少的碳,其中該第一含矽層選擇性地沉積在該基材的該等源極區域與汲極區域上,同時在該基材的該等介電材料的該表面上將該第一含矽層蝕刻移除;將該基材暴露在一第二製程氣體下以選擇性沉積一第二含矽層覆於該基材上的該第一含矽層的該表面上,該第二製程氣體包含矽烷及一第二蝕刻劑;及之後將該第一含矽層退火以將至少一部分的該碳併入該晶格的多個取代位置內。
- 一種於一基材表面上生成一以矽為主材料的方法,其至少包含以下步驟: 將一基材暴露至一第一製程氣體,以於約0.5Torr至約50Torr的範圍內的一壓力下在該基材上選擇性且磊晶式地沉積一第一含矽層,該第一製程氣體包含矽烷、一鍺源、一碳源、包含HCl的一第一蝕刻劑、及一載體氣體;其中該第一含矽層包含一漸變的碳濃度,並且在一晶格中具有多個間隙位置且在該等間隙位置內包含約3原子%或更少的碳;將該基材暴露在一第二製程氣體下以選擇性且磊晶式地沉積一第二含矽層於該第一含矽層上,該第二製程氣體包含二氯矽烷及一第二蝕刻劑,該第二蝕刻劑包含HCl;以及將該基材退火以將至少一部分的該碳併入該第一含矽層內的該晶格的多個取代位置。
- 如申請專利範圍第22項所述之方法,其中該基材暴露至該第一製程氣體,該第一製程氣體包含:流速在約20sccm至約400sccm之範圍內的該矽烷;流速在約0.3sccm至約5sccm之範圍內的該碳源;流速在約30sccm至約500sccm之範圍內的該第一蝕刻劑;及流速在約10slm至約30slm之範圍內的該載體氣體。
- 如申請專利範圍第23項所述之方法,其中該第一含 矽層沉積在該基材上,該基材位於一製程室內,該製程室具有一內壓,該內壓在約1torr至約10torr的範圍內。
- 如申請專利範圍第22項所述方法,其中該第一製程氣體更包含一摻質前驅物。
- 如申請專利範圍第25項所述方法,其中摻質前驅物係選自由二硼烷、胂、膦、及前述物質之衍生物所組成的群組中。
- 如申請專利範圍第26項所述之方法,其中該第一含矽層包含一漸變的摻質濃度。
- 如申請專利範圍第22項所述之方法,其中該第一含矽層具有一硼濃度,該硼濃度在約5x1019 原子/cm3 至約1x1020 原子/cm3 的範圍內。
- 如申請專利範圍第22項所述之方法,其中該第一含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第29項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 如申請專利範圍第22項所述之方法,其中該第二含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第31項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 如申請專利範圍第22項所述之方法,其中該碳源包含甲基矽烷。
- 一種在一基材表面上生成一以矽為主之材料的方法,其至少包含以下步驟:將一基材暴露至一第一製程氣體,以於約0.5Torr至約50Torr的範圍內的一壓力下在該基材上選擇性且磊晶式地沉積一第一含矽層,該第一製程氣體包含矽烷、一碳源、一鍺源、包含HCl的一第一蝕刻劑、及一載體氣體,其中該第一含矽層在一晶格中具有多個間隙位置且在該等間隙位置內包含約3原子%或更少的碳;將該基材暴露在一第二製程氣體下以選擇性且磊晶式地沉積一第二含矽層於該第一含矽層上,該第二製程氣體包含二氯矽烷及一第二蝕刻劑,該第二蝕刻劑包含HCl;以及將該基材退火以將至少一部分的該碳併入該第一含矽層內的該晶格的多個取代位置。
- 如申請專利範圍第34項所述之方法,其中該碳源是甲基矽烷。
- 如申請專利範圍第34項所述之方法,其中該第一含矽層或該第二含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第36項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 一種在一製程室中於一基材上生成一以矽為主之材料的方法,該基材具有多種介電材料且在該基材上具有多個源極/汲極區域,該方法至少包含以下步驟:將該基材暴露在一第一製程氣體下以於該基材上沉積一第一含矽層,該第一製程氣體包含矽烷、甲基矽烷、一第一蝕刻劑及氫氣,其中該第一含矽層選擇性地沉積在該基材的該等源極/汲極區域上,同時在該基材的該等介電材料的該表面上將該第一含矽層蝕刻移除;及之後將該基材暴露在一第二製程氣體下以選擇性沉積一第二含矽層覆於該基材上的該第一含矽層的該表面上,該第二製程氣體包含二氯矽烷及一第二蝕刻劑。
- 如申請專利範圍第38項所述之方法,其中該第一製程氣體包含:流速在約20sccm至約400sccm的範圍內的該矽烷;流速在約0.3sccm至約5sccm的範圍內的該甲基矽烷;流速在約30sccm至約500sccm的範圍內的該第一蝕刻劑;及流速在約10slm至約30slm的範圍內的該氫氣。
- 如申請專利範圍第39項所述之方法,其中該製程室被加壓至一壓力,該壓力是在約1torr至約10torr的範圍內。
- 如申請專利範圍第39項所述之方法,其中該第一蝕刻劑包含氯化氫。
- 如申請專利範圍第38項所述之方法,其中該第一含矽層包含一漸變的碳濃度。
- 如申請專利範圍第38項所述之方法,其中該第一製程氣體進一步包含一摻質前驅物,該摻質前驅物具有約0.2sccm至約3sccm之範圍內的流速。
- 如申請專利範圍第43項所述方法,其中該摻質前驅物選自由二硼烷、胂、膦、及前述物質之衍生物所組成的群組中。
- 如申請專利範圍第44項所述之方法,其中該第一含矽層包含一漸變的摻質濃度。
- 如申請專利範圍第38項所述之方法,其中該第一含矽層具有一硼濃度,該硼濃度在約5x1019 原子/cm3 至約1x1020 原子/cm3 之範圍內。
- 如申請專利範圍第38項所述之方法,其中該第一含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第47項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 如申請專利範圍第38項所述之方法,其中該第二含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第49項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 一種在一製程室中於一基材上生成一以矽為主之材料的方法,該基材具有多種介電材料且在該基材上具有多個源極/汲極區域,該方法至少包含以下步驟:將該基材暴露在一第一製程氣體下以於該基材上沉積一第一含矽層,該第一製程氣體包含矽烷、一鍺源、一碳源、一第一蝕刻劑及一載體氣體,其中該第一含矽層選擇性地沉積在該基材的該等源極/汲極區域上,同時在該基材的該等介電材料的該表面上將該第一含矽層蝕刻移除;及之後將該基材暴露在一第二製程氣體下以選擇性沉積一第二含矽層覆於該基材上的該第一含矽層的該表面上,該第二製程氣體包含二氯矽烷及一第二蝕刻劑。
- 如申請專利範圍第51項所述之方法,其中該第一含矽層在一晶格中具有多個間隙位置且在該等間隙位置內含有約3原子%或更少的碳。
- 如申請專利範圍第52項所述之方法,進一步包含以下步驟:將該第一含矽層退火以將至少一部分的該碳併入該晶格的多個取代位置內。
- 如申請專利範圍第53項所述之方法,其中該碳源是甲基矽烷。
- 如申請專利範圍第52項所述之方法,其中該第一含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第55項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 如申請專利範圍第52項所述之方法,其中該第二含矽層具有一硼濃度,該硼濃度大於1x1020 原子/cm3 。
- 如申請專利範圍第57項所述之方法,其中該硼濃度大約為2x1020 原子/cm3 或更高。
- 一種在一製程室中於一基材上生成一以矽為主之材料的方法,該基材具有多種介電材料且在該基材上具有多個源極/汲極區域,該方法至少包含以下步驟:將該基材暴露在一第一製程氣體下以沉積一第一含矽層,該第一製程氣體包含矽烷、一鍺源、一碳源、一第一蝕刻劑及一載體氣體,該第一含矽層包含約3原子%或更少的碳以及一晶格的多個間隙位置,其中該第一含矽層選擇性地沉積在該基材的該等源極/汲極區域上,同時在該基材的該等介電材料的該表面上將該第一含矽層蝕刻移除;隨後, 將該基材暴露在一第二製程氣體下以選擇性沉積一第二含矽層覆於該基材上的該第一含矽層的該表面上,該第二製程氣體包含二氯矽烷及一第二蝕刻劑;以及將該基材退火以將至少一部分的該碳併入該晶格的多個取代位置。
- 一種在一製程室中於一基材上生成一以矽為主之材料的方法,該基材具有多種介電材料且在該基材上具有多個源極區域/汲極區域,該方法至少包含以下步驟:將該基材暴露在一第一製程氣體下以於該基材上沉積一第一含矽層,該第一製程氣體包含矽烷、一鍺源、一第一蝕刻劑及一載體氣體,其中該第一含矽層選擇性地沉積在該基材的該等源極/汲極區域上,同時在該基材的該等介電材料的該表面上將該第一含矽層蝕刻移除;及隨後將該基材暴露在一第二製程氣體下以選擇性沉積一第二含矽層覆於該基材上的該第一含矽層的該表面上,該第二製程氣體包含二氯矽烷及一第二蝕刻劑。
- 如申請專利範圍第60項所述之方法,其中該第一製程氣體包含:流速在約50sccm至約200sccm的範圍內的該矽烷;流速在約0.5sccm至約5sccm的範圍內的鍺烷;流速在約30sccm至約500sccm的範圍內的氯化氫; 及流速在約10slm至約30slm的範圍內的氫氣。
- 如申請專利範圍第61項所述之方法,其中該製程室被加壓至一壓力,該壓力是在約1torr至約10torr的範圍內。
- 如申請專利範圍第60項所述之方法,其中該第一含矽層是一有凹陷的層且該第二含矽層是在一源極/汲極特徵內之一升高的層。
- 如申請專利範圍第63項所述之方法,其中該第一含矽層包含一漸變的鍺濃度。
- 如申請專利範圍第60項所述方法,其中該第一及第二製程氣體之各者獨立地包含一摻質前驅物,該摻質前驅物選自由二硼烷、胂、膦、及前述物質之衍生物所組成的群組中。
- 如申請專利範圍第65項所述之方法,其中該第一及第二含矽層之各者獨立地包含一硼濃度,該硼濃度在約5x1019 原子/cm3 至約2x1020 原子/cm3 的範圍內。
- 如申請專利範圍第65項所述之方法,其中該第一及第二含矽層之各者獨立地包含一漸變的摻質濃度。
- 如申請專利範圍第60項所述之方法,其中該第二製程氣體包含:流速在約50sccm至約200sccm之範圍內的該二氯矽烷;及流速在約30sccm至約500sccm之範圍內的氯化氫。
- 如申請專利範圍第68項所述之方法,其中該第二製程氣體包含一第二鍺源。
- 如申請專利範圍第69項所述之方法,其中該第二含矽層的鍺濃度大於該第一含矽層的鍺濃度。
- 如申請專利範圍第65項所述之方法,其中該第二含矽層的摻質濃度大於該第一含矽層的摻質濃度。
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WO2005112577A2 (en) | 2005-12-01 |
TW200537592A (en) | 2005-11-16 |
CN100511587C (zh) | 2009-07-08 |
US20070082451A1 (en) | 2007-04-12 |
US7439142B2 (en) | 2008-10-21 |
CN1926664A (zh) | 2007-03-07 |
CN101593680A (zh) | 2009-12-02 |
EP1745503A2 (en) | 2007-01-24 |
US7132338B2 (en) | 2006-11-07 |
WO2005112577A3 (en) | 2006-05-26 |
US20050079692A1 (en) | 2005-04-14 |
JP2007537601A (ja) | 2007-12-20 |
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