KR100443224B1 - 반도체 장치 및 그의 제조 방법 - Google Patents

반도체 장치 및 그의 제조 방법 Download PDF

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Publication number
KR100443224B1
KR100443224B1 KR10-2001-0059261A KR20010059261A KR100443224B1 KR 100443224 B1 KR100443224 B1 KR 100443224B1 KR 20010059261 A KR20010059261 A KR 20010059261A KR 100443224 B1 KR100443224 B1 KR 100443224B1
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South Korea
Prior art keywords
electrode layer
region
layer
insulating film
electrode
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Expired - Lifetime
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KR10-2001-0059261A
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English (en)
Korean (ko)
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KR20020024796A (ko
Inventor
마쯔이미찌하루
모리세이이찌
시로따리이찌로
다께우찌유지
가미가이찌다께시
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가부시끼가이샤 도시바
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/10Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the top-view layout
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/41Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/43Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/687Floating-gate IGFETs having more than two programming levels
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR10-2001-0059261A 2000-09-26 2001-09-25 반도체 장치 및 그의 제조 방법 Expired - Lifetime KR100443224B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JPJP-P-2000-00291910 2000-09-26
JP2000291910 2000-09-26
JP2001272224A JP2002176114A (ja) 2000-09-26 2001-09-07 半導体装置及びその製造方法
JPJP-P-2001-00272224 2001-09-07

Publications (2)

Publication Number Publication Date
KR20020024796A KR20020024796A (ko) 2002-04-01
KR100443224B1 true KR100443224B1 (ko) 2004-08-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2001-0059261A Expired - Lifetime KR100443224B1 (ko) 2000-09-26 2001-09-25 반도체 장치 및 그의 제조 방법

Country Status (4)

Country Link
US (10) US6835978B2 (enExample)
JP (1) JP2002176114A (enExample)
KR (1) KR100443224B1 (enExample)
CN (1) CN1181552C (enExample)

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US7449745B2 (en) 2008-11-11
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US20110186921A1 (en) 2011-08-04
US20070164343A1 (en) 2007-07-19
US20050090052A1 (en) 2005-04-28
US20070057310A1 (en) 2007-03-15
US7573092B2 (en) 2009-08-11
US8405139B2 (en) 2013-03-26
US6927449B2 (en) 2005-08-09
US20050236661A1 (en) 2005-10-27
US7538380B2 (en) 2009-05-26
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US20060197226A1 (en) 2006-09-07
US20070057315A1 (en) 2007-03-15
US20090221128A1 (en) 2009-09-03
KR20020024796A (ko) 2002-04-01
US7352027B2 (en) 2008-04-01
CN1354521A (zh) 2002-06-19
US7348627B2 (en) 2008-03-25
US7049653B2 (en) 2006-05-23
US6835978B2 (en) 2004-12-28
US20020036317A1 (en) 2002-03-28
CN1181552C (zh) 2004-12-22

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