JP7072035B2 - 積層水平アクティブストリップに配置され、垂直制御ゲートを有するマルチゲートnorフラッシュ薄膜トランジスタストリング - Google Patents
積層水平アクティブストリップに配置され、垂直制御ゲートを有するマルチゲートnorフラッシュ薄膜トランジスタストリング Download PDFInfo
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Description
本願は、米国仮特許出願(仮特許出願)9月30日に出願された「積層水平アクティブストリップに配置され、垂直制御ゲートを有するマルチゲートNORフラッシュ薄膜トランジスタストリング」と題する米国特許出願第62/235,322号に関し優先権の利益を主張する。仮特許出願は、参照によってその全体が本明細書に組み込まれるものとする。
本発明は、高密度メモリ構造に関する。特に、本発明は、薄膜蓄積トランジスタなどの薄膜記憶素子が相互接続されることによって形成された高密度メモリ構造に関する。
(読み取り動作)
このような段階的電圧増加ステップは、TFTの電気的ストレスを低減し、目標閾値電圧のオーバーシュートを回避する。ブロック内の他の全てのグローバルワードラインは半選択10ボルトに設定される。ブロック内でアドレス指定されていないすべてのプレーンのすべてのアクティブストリップ、及びアドレス指定されたプレーン内の個別にアドレス指定されていないすべてのアクティブストリップも10ボルトに設定されているか、あるいは浮動でもよい。これらのアクティブストリップは、10ボルトのローカルワードラインに強く容量結合されており、従って10ボルトに近い浮動状態にある。段階的に高い電圧プログラミングパルスが読み出しサイクルに引き続いて印加され、アドレスされたTFTがその目標閾値電圧に達したかどうかを決定する。目標閾値電圧に達すると、アクティブストリップ電圧は10ボルトに上昇される(あるいは代替的にストリップが浮動し、ブロック内の1つのアドレスされたグローバルワードラインを除くすべてが10ボルトに上昇されたとき10ボルトに近くまで上げられる)、追加のプログラミングは禁じられる一方で、グローバルワードラインは、目標とする閾値電圧をまだ達成していない同一平面上の他のアドレス指定されたストリップをプログラミングし続ける。アドレス指定されたすべてのTFTが正しくプログラムされるようにリードベリファイされると、プログラミングシーケンスは終了する。MLCが使用されるとき、複数の閾値電圧状態のうちの正しい1つのプログラミングは、すべてのアドレス指定されたアクティブストリップのコンデンサCを最初にプリチャージすることによって、いくつかの電圧のうちの1つ(例えば、各TFTに2ビットの情報が記憶される場合には、0,1.5,3.0,又は4.5ボルト)へ加速することができる(例えば、接続270及びプリチャージワードライン208-chg、図3参照)。次いで、20ボルトのパルスがアドレス指定されたグローバルワードラインに印加され、TFTを異なる有効トンネリング電圧(すなわち、それぞれ20,18.5,17又は15.5ボルト)に暴露し、その結果、単一コースのプログラミングステップでプログラムされた4つの閾値のうちの正しい1つをもたらす電圧に落ち着く。その後、個々のTFTレベルで精細なプログラミングパルスを印加することができる。
Claims (15)
- 半導体基板の平坦な表面の上に形成されたNORストリングアレイであって、
第1のNORストリング及び第2のNORストリングを有し、
前記第1のNORストリング及び前記第2のNORストリングの各々は、前記平坦の表面に平行な第1の方向に沿って長手方向に延びるアクティブストリップに沿って形成された薄膜蓄積トランジスタを含み、
各NORストリングにおいて、前記薄膜蓄積トランジスタは、プリチャージデバイス、共通ドレイン端子、及び共通ソース端子を共有し、
前記共通ドレイン端子は、(i)半導体レイヤーと、(ii)前記半導体レイヤーと電気的に接触し、かつ長手方向に実質的に整列している金属レイヤーとを含み、
前記第1のNORストリング内の各薄膜蓄積トランジスタのゲート端子は、前記平坦な表面に実質的に垂直である第2の方向に沿って長手方向に延びる導体によって、前記第2のNORストリング内の対応する薄膜蓄積トランジスタのゲート端子に電気的に接続され、
前記プリチャージデバイスは、各NORストリングに対するプログラム動作、プログラム禁止動作、読み出し動作または消去動作の実施中にソース端子の寄生容量によって実質的に保持される電圧に共通ソース端子をプリチャージし、
前記NORストリングアレイはさらに、第3のNORストリングを有し、
前記第1のNORストリング及び前記第3のNORストリングは、前記平坦な表面に平行な平面上に形成され、
前記第3のNORストリング上の1つ以上の蓄積トランジスタは、基準閾値電圧を有するようにプログラムされ、前記基準閾値電圧は、プログラム動作または読み出し動作中に前記第1のNORストリング内の蓄積トランジスタの閾値電圧と比較されることを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
前記第1のNORストリングの前記アクティブストリップ及び前記第2のNORストリングの前記アクティブストリップの両方は、前記平坦な表面に平行な平面上に形成されることを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
前記第3のNORストリングは、前記第3のNORストリングの全ての前記蓄積トランジスタをオフ状態に設定することにより、前記第1のNORストリングまたは前記第2のNORストリングの漏れ電流を表す基準電流の電流源を提供することを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
複数の基準NORストリングをさらに含み、
前記第1のNORストリングの前記蓄積トランジスタが、マルチビットレベル方式のトランジスタとして使用されてプログラムされるとき、前記複数の基準NORストリングはそれぞれ、異なるマルチビットレベル方式の状態に対する基準を提供することを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
前記導体は、N+ドープされたポリシリコン、P+ドープされたポリシリコン、及び二酸化シリコンと比較して高い仕事関数の高融点金属のなかの1つを含むことを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
各アクティブストリップは、前記アクティブストリップの反対側に第1の側縁及び第2の側縁を有し、別個独立して制御されるNORストリングが前記第1の側縁及び前記第2の側縁の各々に沿って形成されることを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
前記導体と電気的に接触し、かつ前記第1の方向及び前記第2の方向の両方に実質的に垂直な第3の方向に沿って長手方向に延びる第1のグローバル配線をさらに含むことを特徴とするNORストリングアレイ。 - 請求項7に記載のNORストリングアレイであって、
メモリ動作のための支持回路は、前記半導体基板上または前記半導体基板内に形成され、前記第1のグローバル配線は、前記支持回路から導体に電気信号を伝えることを特徴とするNORストリングアレイ。 - 請求項8に記載のNORストリングアレイであって、
前記支持回路は、各蓄積トランジスタの端子のそれぞれに印加される電圧の複数の構成を提供するための電圧源を含み、前記蓄積トランジスタに記憶されたデータのプログラム充電、前記記憶されたデータの読み出しまたは消去を実行可能とすることを特徴とするNORストリングアレイ。 - 請求項7に記載のNORストリングアレイであって、
前記第1のグローバル配線は、前記半導体基板と前記第1のNORストリングのアクティブストリップの間に形成されることを特徴とするNORストリングアレイ。 - 請求項7に記載のNORストリングアレイであって、
前記第1のNORストリングのアクティブストリップの上方に形成された第2のグローバル配線をさらに含み、
前記第1のグローバル配線及び前記第2のグローバル配線はそれぞれ、前記第1のNORストリングの異なる蓄積トランジスタのゲート端子と電気的に接触していることを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
前記プリチャージデバイスは、前記共通ソース端子の電圧と前記共通ドレイン端子の電圧とを等しくすることを特徴とするNORストリングアレイ。 - 請求項11に記載のNORストリングアレイであって、
前記共通ドレイン端子は、前記プリチャージデバイスをオンにする前に、複数の所定の電圧のなかの1つの電圧に充電され、
前記所定の電圧は、前記蓄積トランジスタのプログラム、プログラム禁止、データの読み出し及び消去のうちの1つのために選択されることを特徴とするNORストリングアレイ。 - 請求項1に記載のNORストリングアレイであって、
前記共通ソース端子は、共有される仮想接地基準として機能し、前記共通ドレイン端子は各NORストリングの蓄積トランジスタの共通ビットラインとして機能することを特徴とするNORストリングアレイ。 - 半導体基板の平坦な表面の上に形成されたNORストリングアレイであって、
第1のNORストリング及び第2のNORストリングを有し、
前記第1のNORストリング及び前記第2のNORストリングの各々は、前記平坦の表面に平行な第1の方向に沿って長手方向に延びるアクティブストリップに沿って形成された薄膜蓄積トランジスタを含み、
各NORストリングにおいて、前記薄膜蓄積トランジスタは、プリチャージデバイス、共通ドレイン端子、及び共通ソース端子を共有し、
前記共通ドレイン端子は、(i)半導体レイヤーと、(ii)前記半導体レイヤーと電気的に接触し、かつ長手方向に実質的に整列している金属レイヤーとを含み、
前記第1のNORストリング内の各薄膜蓄積トランジスタのゲート端子は、前記平坦な表面に実質的に垂直である第2の方向に沿って長手方向に延びる導体によって、前記第2のNORストリング内の対応する薄膜蓄積トランジスタのゲート端子に電気的に接続され、
前記プリチャージデバイスは、各NORストリングに対するプログラム動作、プログラム禁止動作、読み出し動作または消去動作の実施中にソース端子の寄生容量によって実質的に保持される電圧に共通ソース端子をプリチャージし、
前記第1のNORストリング及び前記第2のNORストリングは、前記平坦な表面に平行な第1の平面及び第2の平面の上にそれぞれ形成され、
前記NORストリングアレイはさらに、1つ以上の基準NORストリングを前記第1の平面及び前記第2の平面の上に有し、
前記1つ以上の基準NORストリングの各々について、前記基準NORストリング上の1つ以上の蓄積トランジスタは、基準閾値電圧を有するようにプログラムされ、前記基準閾値電圧は、プログラム動作または読み出し動作中に、前記第1の平面及び前記第2の平面のうちの同じ平面に存在する対応するNORストリングにおける蓄積トランジスタの閾値電圧と比較されることを特徴とするNORストリングアレイ。
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Families Citing this family (184)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10910364B2 (en) | 2009-10-12 | 2021-02-02 | Monolitaic 3D Inc. | 3D semiconductor device |
US11374118B2 (en) | 2009-10-12 | 2022-06-28 | Monolithic 3D Inc. | Method to form a 3D integrated circuit |
US11018133B2 (en) | 2009-10-12 | 2021-05-25 | Monolithic 3D Inc. | 3D integrated circuit |
US11482440B2 (en) | 2010-12-16 | 2022-10-25 | Monolithic 3D Inc. | 3D semiconductor device and structure with a built-in test circuit for repairing faulty circuits |
US11227897B2 (en) | 2010-10-11 | 2022-01-18 | Monolithic 3D Inc. | Method for producing a 3D semiconductor memory device and structure |
US11024673B1 (en) | 2010-10-11 | 2021-06-01 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11257867B1 (en) | 2010-10-11 | 2022-02-22 | Monolithic 3D Inc. | 3D semiconductor device and structure with oxide bonds |
US10896931B1 (en) | 2010-10-11 | 2021-01-19 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11600667B1 (en) | 2010-10-11 | 2023-03-07 | Monolithic 3D Inc. | Method to produce 3D semiconductor devices and structures with memory |
US11469271B2 (en) | 2010-10-11 | 2022-10-11 | Monolithic 3D Inc. | Method to produce 3D semiconductor devices and structures with memory |
US11158674B2 (en) | 2010-10-11 | 2021-10-26 | Monolithic 3D Inc. | Method to produce a 3D semiconductor device and structure |
US11018191B1 (en) | 2010-10-11 | 2021-05-25 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11315980B1 (en) | 2010-10-11 | 2022-04-26 | Monolithic 3D Inc. | 3D semiconductor device and structure with transistors |
US11929372B2 (en) | 2010-10-13 | 2024-03-12 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US10943934B2 (en) | 2010-10-13 | 2021-03-09 | Monolithic 3D Inc. | Multilevel semiconductor device and structure |
US11043523B1 (en) | 2010-10-13 | 2021-06-22 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors |
US11855114B2 (en) | 2010-10-13 | 2023-12-26 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US11133344B2 (en) | 2010-10-13 | 2021-09-28 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors |
US10998374B1 (en) | 2010-10-13 | 2021-05-04 | Monolithic 3D Inc. | Multilevel semiconductor device and structure |
US11605663B2 (en) | 2010-10-13 | 2023-03-14 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US10978501B1 (en) | 2010-10-13 | 2021-04-13 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with waveguides |
US11327227B2 (en) | 2010-10-13 | 2022-05-10 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with electromagnetic modulators |
US11163112B2 (en) | 2010-10-13 | 2021-11-02 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with electromagnetic modulators |
US11164898B2 (en) | 2010-10-13 | 2021-11-02 | Monolithic 3D Inc. | Multilevel semiconductor device and structure |
US11404466B2 (en) | 2010-10-13 | 2022-08-02 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors |
US10833108B2 (en) | 2010-10-13 | 2020-11-10 | Monolithic 3D Inc. | 3D microdisplay device and structure |
US11437368B2 (en) | 2010-10-13 | 2022-09-06 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with oxide bonding |
US11869915B2 (en) | 2010-10-13 | 2024-01-09 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with image sensors and wafer bonding |
US11855100B2 (en) | 2010-10-13 | 2023-12-26 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with oxide bonding |
US11694922B2 (en) | 2010-10-13 | 2023-07-04 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with oxide bonding |
US11063071B1 (en) | 2010-10-13 | 2021-07-13 | Monolithic 3D Inc. | Multilevel semiconductor device and structure with waveguides |
US11443971B2 (en) | 2010-11-18 | 2022-09-13 | Monolithic 3D Inc. | 3D semiconductor device and structure with memory |
US11107721B2 (en) | 2010-11-18 | 2021-08-31 | Monolithic 3D Inc. | 3D semiconductor device and structure with NAND logic |
US11355381B2 (en) | 2010-11-18 | 2022-06-07 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11164770B1 (en) | 2010-11-18 | 2021-11-02 | Monolithic 3D Inc. | Method for producing a 3D semiconductor memory device and structure |
US11508605B2 (en) | 2010-11-18 | 2022-11-22 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11735462B2 (en) | 2010-11-18 | 2023-08-22 | Monolithic 3D Inc. | 3D semiconductor device and structure with single-crystal layers |
US11615977B2 (en) | 2010-11-18 | 2023-03-28 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11211279B2 (en) | 2010-11-18 | 2021-12-28 | Monolithic 3D Inc. | Method for processing a 3D integrated circuit and structure |
US11610802B2 (en) | 2010-11-18 | 2023-03-21 | Monolithic 3D Inc. | Method for producing a 3D semiconductor device and structure with single crystal transistors and metal gate electrodes |
US11355380B2 (en) | 2010-11-18 | 2022-06-07 | Monolithic 3D Inc. | Methods for producing 3D semiconductor memory device and structure utilizing alignment marks |
US11495484B2 (en) | 2010-11-18 | 2022-11-08 | Monolithic 3D Inc. | 3D semiconductor devices and structures with at least two single-crystal layers |
US11521888B2 (en) | 2010-11-18 | 2022-12-06 | Monolithic 3D Inc. | 3D semiconductor device and structure with high-k metal gate transistors |
US11862503B2 (en) | 2010-11-18 | 2024-01-02 | Monolithic 3D Inc. | Method for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
US11854857B1 (en) | 2010-11-18 | 2023-12-26 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
US11569117B2 (en) | 2010-11-18 | 2023-01-31 | Monolithic 3D Inc. | 3D semiconductor device and structure with single-crystal layers |
US11901210B2 (en) | 2010-11-18 | 2024-02-13 | Monolithic 3D Inc. | 3D semiconductor device and structure with memory |
US11482439B2 (en) | 2010-11-18 | 2022-10-25 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device comprising charge trap junction-less transistors |
US11004719B1 (en) | 2010-11-18 | 2021-05-11 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device and structure |
US11094576B1 (en) | 2010-11-18 | 2021-08-17 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device and structure |
US11018042B1 (en) | 2010-11-18 | 2021-05-25 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11482438B2 (en) | 2010-11-18 | 2022-10-25 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor memory device and structure |
US11031275B2 (en) | 2010-11-18 | 2021-06-08 | Monolithic 3D Inc. | 3D semiconductor device and structure with memory |
US11784082B2 (en) | 2010-11-18 | 2023-10-10 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US11923230B1 (en) | 2010-11-18 | 2024-03-05 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US11804396B2 (en) | 2010-11-18 | 2023-10-31 | Monolithic 3D Inc. | Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers |
US11594473B2 (en) | 2012-04-09 | 2023-02-28 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11164811B2 (en) | 2012-04-09 | 2021-11-02 | Monolithic 3D Inc. | 3D semiconductor device with isolation layers and oxide-to-oxide bonding |
US11694944B1 (en) | 2012-04-09 | 2023-07-04 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11616004B1 (en) | 2012-04-09 | 2023-03-28 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11410912B2 (en) | 2012-04-09 | 2022-08-09 | Monolithic 3D Inc. | 3D semiconductor device with vias and isolation layers |
US11476181B1 (en) | 2012-04-09 | 2022-10-18 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11735501B1 (en) | 2012-04-09 | 2023-08-22 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11881443B2 (en) | 2012-04-09 | 2024-01-23 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and a connective path |
US11088050B2 (en) | 2012-04-09 | 2021-08-10 | Monolithic 3D Inc. | 3D semiconductor device with isolation layers |
US11784169B2 (en) | 2012-12-22 | 2023-10-10 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11063024B1 (en) | 2012-12-22 | 2021-07-13 | Monlithic 3D Inc. | Method to form a 3D semiconductor device and structure |
US11967583B2 (en) | 2012-12-22 | 2024-04-23 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11018116B2 (en) | 2012-12-22 | 2021-05-25 | Monolithic 3D Inc. | Method to form a 3D semiconductor device and structure |
US11217565B2 (en) | 2012-12-22 | 2022-01-04 | Monolithic 3D Inc. | Method to form a 3D semiconductor device and structure |
US11961827B1 (en) | 2012-12-22 | 2024-04-16 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11309292B2 (en) | 2012-12-22 | 2022-04-19 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11916045B2 (en) | 2012-12-22 | 2024-02-27 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11004694B1 (en) | 2012-12-29 | 2021-05-11 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10903089B1 (en) | 2012-12-29 | 2021-01-26 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11087995B1 (en) | 2012-12-29 | 2021-08-10 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11430668B2 (en) | 2012-12-29 | 2022-08-30 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US11177140B2 (en) | 2012-12-29 | 2021-11-16 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11430667B2 (en) | 2012-12-29 | 2022-08-30 | Monolithic 3D Inc. | 3D semiconductor device and structure with bonding |
US8902663B1 (en) | 2013-03-11 | 2014-12-02 | Monolithic 3D Inc. | Method of maintaining a memory state |
US11935949B1 (en) | 2013-03-11 | 2024-03-19 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and memory cells |
US11869965B2 (en) | 2013-03-11 | 2024-01-09 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers and memory cells |
US11088130B2 (en) | 2014-01-28 | 2021-08-10 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11398569B2 (en) | 2013-03-12 | 2022-07-26 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10840239B2 (en) | 2014-08-26 | 2020-11-17 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11923374B2 (en) | 2013-03-12 | 2024-03-05 | Monolithic 3D Inc. | 3D semiconductor device and structure with metal layers |
US11487928B2 (en) | 2013-04-15 | 2022-11-01 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US11341309B1 (en) | 2013-04-15 | 2022-05-24 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US11720736B2 (en) | 2013-04-15 | 2023-08-08 | Monolithic 3D Inc. | Automation methods for 3D integrated circuits and devices |
US11574109B1 (en) | 2013-04-15 | 2023-02-07 | Monolithic 3D Inc | Automation methods for 3D integrated circuits and devices |
US11270055B1 (en) | 2013-04-15 | 2022-03-08 | Monolithic 3D Inc. | Automation for monolithic 3D devices |
US11107808B1 (en) | 2014-01-28 | 2021-08-31 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11031394B1 (en) | 2014-01-28 | 2021-06-08 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11011507B1 (en) | 2015-04-19 | 2021-05-18 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11056468B1 (en) | 2015-04-19 | 2021-07-06 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10825779B2 (en) | 2015-04-19 | 2020-11-03 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11956952B2 (en) | 2015-08-23 | 2024-04-09 | Monolithic 3D Inc. | Semiconductor memory device and structure |
US11978731B2 (en) | 2015-09-21 | 2024-05-07 | Monolithic 3D Inc. | Method to produce a multi-level semiconductor memory device and structure |
US10121553B2 (en) | 2015-09-30 | 2018-11-06 | Sunrise Memory Corporation | Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays |
US9842651B2 (en) | 2015-11-25 | 2017-12-12 | Sunrise Memory Corporation | Three-dimensional vertical NOR flash thin film transistor strings |
US11120884B2 (en) | 2015-09-30 | 2021-09-14 | Sunrise Memory Corporation | Implementing logic function and generating analog signals using NOR memory strings |
US9892800B2 (en) | 2015-09-30 | 2018-02-13 | Sunrise Memory Corporation | Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates |
US11296115B1 (en) | 2015-10-24 | 2022-04-05 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US10847540B2 (en) | 2015-10-24 | 2020-11-24 | Monolithic 3D Inc. | 3D semiconductor memory device and structure |
US11114464B2 (en) | 2015-10-24 | 2021-09-07 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US11114427B2 (en) | 2015-11-07 | 2021-09-07 | Monolithic 3D Inc. | 3D semiconductor processor and memory device and structure |
US11937422B2 (en) | 2015-11-07 | 2024-03-19 | Monolithic 3D Inc. | Semiconductor memory device and structure |
US11329059B1 (en) | 2016-10-10 | 2022-05-10 | Monolithic 3D Inc. | 3D memory devices and structures with thinned single crystal substrates |
US11251149B2 (en) | 2016-10-10 | 2022-02-15 | Monolithic 3D Inc. | 3D memory device and structure |
US11812620B2 (en) | 2016-10-10 | 2023-11-07 | Monolithic 3D Inc. | 3D DRAM memory devices and structures with control circuits |
US11930648B1 (en) | 2016-10-10 | 2024-03-12 | Monolithic 3D Inc. | 3D memory devices and structures with metal layers |
US11869591B2 (en) | 2016-10-10 | 2024-01-09 | Monolithic 3D Inc. | 3D memory devices and structures with control circuits |
US11711928B2 (en) | 2016-10-10 | 2023-07-25 | Monolithic 3D Inc. | 3D memory devices and structures with control circuits |
JP7203054B2 (ja) | 2017-06-20 | 2023-01-12 | サンライズ メモリー コーポレイション | 3次元nor型メモリアレイアーキテクチャ及びその製造方法 |
US11180861B2 (en) | 2017-06-20 | 2021-11-23 | Sunrise Memory Corporation | 3-dimensional NOR string arrays in segmented stacks |
US10692874B2 (en) | 2017-06-20 | 2020-06-23 | Sunrise Memory Corporation | 3-dimensional NOR string arrays in segmented stacks |
US10608008B2 (en) | 2017-06-20 | 2020-03-31 | Sunrise Memory Corporation | 3-dimensional nor strings with segmented shared source regions |
US10431596B2 (en) * | 2017-08-28 | 2019-10-01 | Sunrise Memory Corporation | Staggered word line architecture for reduced disturb in 3-dimensional NOR memory arrays |
US10777566B2 (en) | 2017-11-10 | 2020-09-15 | Macronix International Co., Ltd. | 3D array arranged for memory and in-memory sum-of-products operations |
US10896916B2 (en) | 2017-11-17 | 2021-01-19 | Sunrise Memory Corporation | Reverse memory cell |
JP7072658B2 (ja) * | 2017-12-28 | 2022-05-20 | サンライズ メモリー コーポレイション | 超微細ピッチを有する3次元nor型メモリアレイ:デバイスと方法 |
US10734399B2 (en) * | 2017-12-29 | 2020-08-04 | Micron Technology, Inc. | Multi-gate string drivers having shared pillar structure |
US10719296B2 (en) | 2018-01-17 | 2020-07-21 | Macronix International Co., Ltd. | Sum-of-products accelerator array |
US10957392B2 (en) | 2018-01-17 | 2021-03-23 | Macronix International Co., Ltd. | 2D and 3D sum-of-products array for neuromorphic computing system |
US10475812B2 (en) | 2018-02-02 | 2019-11-12 | Sunrise Memory Corporation | Three-dimensional vertical NOR flash thin-film transistor strings |
US10242737B1 (en) | 2018-02-13 | 2019-03-26 | Macronix International Co., Ltd. | Device structure for neuromorphic computing system |
US10635398B2 (en) | 2018-03-15 | 2020-04-28 | Macronix International Co., Ltd. | Voltage sensing type of matrix multiplication method for neuromorphic computing system |
CN112567516A (zh) | 2018-07-12 | 2021-03-26 | 日升存储公司 | 三维nor存储器阵列的制造方法 |
US11751391B2 (en) | 2018-07-12 | 2023-09-05 | Sunrise Memory Corporation | Methods for fabricating a 3-dimensional memory structure of nor memory strings |
US11069696B2 (en) | 2018-07-12 | 2021-07-20 | Sunrise Memory Corporation | Device structure for a 3-dimensional NOR memory array and methods for improved erase operations applied thereto |
US11138497B2 (en) | 2018-07-17 | 2021-10-05 | Macronix International Co., Ltd | In-memory computing devices for neural networks |
US10664746B2 (en) | 2018-07-17 | 2020-05-26 | Macronix International Co., Ltd. | Neural network system |
TWI713195B (zh) | 2018-09-24 | 2020-12-11 | 美商森恩萊斯記憶體公司 | 三維nor記憶電路製程中之晶圓接合及其形成之積體電路 |
US11636325B2 (en) | 2018-10-24 | 2023-04-25 | Macronix International Co., Ltd. | In-memory data pooling for machine learning |
US11562229B2 (en) | 2018-11-30 | 2023-01-24 | Macronix International Co., Ltd. | Convolution accelerator using in-memory computation |
TWI664715B (zh) * | 2018-11-30 | 2019-07-01 | 國立成功大學 | 具有多個控制閘極的快閃記憶體與快閃記憶體陣列裝置 |
US10672469B1 (en) | 2018-11-30 | 2020-06-02 | Macronix International Co., Ltd. | In-memory convolution for machine learning |
EP3891780A4 (en) | 2018-12-07 | 2022-12-21 | Sunrise Memory Corporation | METHODS OF FORMING NETWORKS OF MULTILAYER VERTICAL NOR TYPE MEMORY CHAINS |
US10818324B2 (en) | 2018-12-18 | 2020-10-27 | Micron Technology, Inc. | Memory array decoding and interconnects |
US11934480B2 (en) | 2018-12-18 | 2024-03-19 | Macronix International Co., Ltd. | NAND block architecture for in-memory multiply-and-accumulate operations |
US11670620B2 (en) | 2019-01-30 | 2023-06-06 | Sunrise Memory Corporation | Device with embedded high-bandwidth, high-capacity memory using wafer bonding |
CN113424319A (zh) | 2019-02-11 | 2021-09-21 | 日升存储公司 | 垂直薄膜晶体管以及作为用于三维存储器阵列的位线连接器的应用 |
US11610914B2 (en) | 2019-02-11 | 2023-03-21 | Sunrise Memory Corporation | Vertical thin-film transistor and application as bit-line connector for 3-dimensional memory arrays |
US11119674B2 (en) | 2019-02-19 | 2021-09-14 | Macronix International Co., Ltd. | Memory devices and methods for operating the same |
US10783963B1 (en) | 2019-03-08 | 2020-09-22 | Macronix International Co., Ltd. | In-memory computation device with inter-page and intra-page data circuits |
US11132176B2 (en) | 2019-03-20 | 2021-09-28 | Macronix International Co., Ltd. | Non-volatile computing method in flash memory |
US10892016B1 (en) | 2019-04-08 | 2021-01-12 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11158652B1 (en) | 2019-04-08 | 2021-10-26 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11296106B2 (en) | 2019-04-08 | 2022-04-05 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11763864B2 (en) | 2019-04-08 | 2023-09-19 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures with bit-line pillars |
US11018156B2 (en) | 2019-04-08 | 2021-05-25 | Monolithic 3D Inc. | 3D memory semiconductor devices and structures |
US11069704B2 (en) * | 2019-04-09 | 2021-07-20 | Macronix International Co., Ltd. | 3D NOR memory having vertical gate structures |
US10910393B2 (en) | 2019-04-25 | 2021-02-02 | Macronix International Co., Ltd. | 3D NOR memory having vertical source and drain structures |
US11515330B2 (en) | 2019-05-10 | 2022-11-29 | Yung-Tin Chen | Three-dimensional ferroelectric random-access memory (FeRAM) |
US10825834B1 (en) | 2019-05-10 | 2020-11-03 | Yung-Tin Chen | Three-dimensional ferroelectric random-access memory (FeRAM) |
TWI743784B (zh) | 2019-05-17 | 2021-10-21 | 美商森恩萊斯記憶體公司 | 形成三維水平nor記憶陣列之製程 |
TWI747369B (zh) | 2019-07-09 | 2021-11-21 | 美商森恩萊斯記憶體公司 | 水平反或閘記憶體串之三維陣列製程 |
US11917821B2 (en) | 2019-07-09 | 2024-02-27 | Sunrise Memory Corporation | Process for a 3-dimensional array of horizontal nor-type memory strings |
JP7125564B2 (ja) | 2019-10-23 | 2022-08-24 | 長江存儲科技有限責任公司 | 三次元メモリデバイスの読み出し方法および三次元メモリデバイス |
US11515309B2 (en) | 2019-12-19 | 2022-11-29 | Sunrise Memory Corporation | Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array |
CN115362436A (zh) | 2020-02-07 | 2022-11-18 | 日升存储公司 | 准易失性系统级存储器 |
US11675500B2 (en) | 2020-02-07 | 2023-06-13 | Sunrise Memory Corporation | High capacity memory circuit with low effective latency |
KR20210104348A (ko) * | 2020-02-17 | 2021-08-25 | 삼성전자주식회사 | 반도체 메모리 장치 및 이의 제조 방법 |
US11561911B2 (en) | 2020-02-24 | 2023-01-24 | Sunrise Memory Corporation | Channel controller for shared memory access |
WO2021173209A1 (en) | 2020-02-24 | 2021-09-02 | Sunrise Memory Corporation | High capacity memory module including wafer-section memory circuit |
US11507301B2 (en) | 2020-02-24 | 2022-11-22 | Sunrise Memory Corporation | Memory module implementing memory centric architecture |
JP2021150486A (ja) | 2020-03-19 | 2021-09-27 | キオクシア株式会社 | 半導体記憶装置 |
US11705496B2 (en) | 2020-04-08 | 2023-07-18 | Sunrise Memory Corporation | Charge-trapping layer with optimized number of charge-trapping sites for fast program and erase of a memory cell in a 3-dimensional NOR memory string array |
US11937424B2 (en) | 2020-08-31 | 2024-03-19 | Sunrise Memory Corporation | Thin-film storage transistors in a 3-dimensional array of nor memory strings and process for fabricating the same |
US11842777B2 (en) | 2020-11-17 | 2023-12-12 | Sunrise Memory Corporation | Methods for reducing disturb errors by refreshing data alongside programming or erase operations |
US11848056B2 (en) | 2020-12-08 | 2023-12-19 | Sunrise Memory Corporation | Quasi-volatile memory with enhanced sense amplifier operation |
CN112687700B (zh) * | 2020-12-24 | 2024-04-23 | 长江存储科技有限责任公司 | 三维存储器及其制备方法 |
US11737274B2 (en) | 2021-02-08 | 2023-08-22 | Macronix International Co., Ltd. | Curved channel 3D memory device |
CN117295339A (zh) * | 2021-03-08 | 2023-12-26 | 中国科学院微电子研究所 | Nor型存储器件及其制造方法及包括存储器件的电子设备 |
CN112909012B (zh) * | 2021-03-08 | 2023-09-22 | 中国科学院微电子研究所 | Nor型存储器件及其制造方法及包括存储器件的电子设备 |
US11482490B1 (en) * | 2021-04-12 | 2022-10-25 | Nanya Technology Corporation | Semiconductor device with branch type programmable structure and method for fabricating the same |
US11916011B2 (en) | 2021-04-14 | 2024-02-27 | Macronix International Co., Ltd. | 3D virtual ground memory and manufacturing methods for same |
CN114284285B (zh) * | 2021-06-02 | 2024-04-16 | 青岛昇瑞光电科技有限公司 | 一种nor型半导体存储器件及其制造方法 |
US11785869B2 (en) | 2021-06-11 | 2023-10-10 | Winbond Electronics Corp. | Memory device and method of manufacturing the same |
US11710519B2 (en) | 2021-07-06 | 2023-07-25 | Macronix International Co., Ltd. | High density memory with reference memory using grouped cells and corresponding operations |
TW202310429A (zh) | 2021-07-16 | 2023-03-01 | 美商日升存儲公司 | 薄膜鐵電電晶體的三維記憶體串陣列 |
TWI817536B (zh) * | 2022-06-01 | 2023-10-01 | 華邦電子股份有限公司 | 半導體結構 |
CN116209254B (zh) * | 2022-10-18 | 2024-03-29 | 北京超弦存储器研究院 | 一种3d存储阵列及其制备方法、电子设备 |
CN117545274B (zh) * | 2024-01-08 | 2024-05-03 | 长鑫新桥存储技术有限公司 | 一种半导体结构及其制造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010017798A1 (en) | 2000-01-18 | 2001-08-30 | Tomoyuki Ishii | Semiconductor integrated circuit device and data processor device |
JP2006099827A (ja) | 2004-09-28 | 2006-04-13 | Sharp Corp | 半導体記憶装置及び電子機器 |
Family Cites Families (224)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4213139A (en) | 1978-05-18 | 1980-07-15 | Texas Instruments Incorporated | Double level polysilicon series transistor cell |
US5496533A (en) | 1992-07-31 | 1996-03-05 | Australian Nuclear Science & Technology Organisation | Rhenium complexes |
US5583808A (en) * | 1994-09-16 | 1996-12-10 | National Semiconductor Corporation | EPROM array segmented for high performance and method for controlling same |
US5493533A (en) * | 1994-09-28 | 1996-02-20 | Atmel Corporation | Dual differential trans-impedance sense amplifier and method |
US5525529A (en) | 1994-11-16 | 1996-06-11 | Texas Instruments Incorporated | Method for reducing dopant diffusion |
US5646886A (en) | 1995-05-24 | 1997-07-08 | National Semiconductor Corporation | Flash memory having segmented array for improved operation |
JPH098290A (ja) | 1995-06-20 | 1997-01-10 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
US5789776A (en) | 1995-09-22 | 1998-08-04 | Nvx Corporation | Single poly memory cell and array |
US5768192A (en) | 1996-07-23 | 1998-06-16 | Saifun Semiconductors, Ltd. | Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping |
EP0833348B1 (en) | 1996-09-30 | 2003-07-09 | STMicroelectronics S.r.l. | Method and circuit for checking multilevel programming of floating-gate nonvolatile memory cells, particlarly flash cells |
US5915167A (en) | 1997-04-04 | 1999-06-22 | Elm Technology Corporation | Three dimensional structure memory |
KR100242723B1 (ko) | 1997-08-12 | 2000-02-01 | 윤종용 | 불휘발성 반도체 메모리 장치의 셀 어레이 구조 및 그 제조방법 |
US6350704B1 (en) | 1997-10-14 | 2002-02-26 | Micron Technology Inc. | Porous silicon oxycarbide integrated circuit insulator |
US6040605A (en) | 1998-01-28 | 2000-03-21 | Hitachi, Ltd. | Semiconductor memory device |
US6107133A (en) | 1998-05-28 | 2000-08-22 | International Business Machines Corporation | Method for making a five square vertical DRAM cell |
US6363389B1 (en) | 1998-09-24 | 2002-03-26 | International Business Machines Corporation | Technique for creating a unique quasi-random row identifier |
JP2000200842A (ja) | 1998-11-04 | 2000-07-18 | Sony Corp | 不揮発性半導体記憶装置、製造方法および書き込み方法 |
US6118171A (en) | 1998-12-21 | 2000-09-12 | Motorola, Inc. | Semiconductor device having a pedestal structure and method of making |
US6576926B1 (en) | 1999-02-23 | 2003-06-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and fabrication method thereof |
JP2000285016A (ja) | 1999-03-30 | 2000-10-13 | Sanyo Electric Co Ltd | メモリ制御回路 |
JP2000339978A (ja) | 1999-05-24 | 2000-12-08 | Sony Corp | 不揮発性半導体記憶装置およびその読み出し方法 |
JP4899241B2 (ja) | 1999-12-06 | 2012-03-21 | ソニー株式会社 | 不揮発性半導体記憶装置およびその動作方法 |
US6639835B2 (en) | 2000-02-29 | 2003-10-28 | Micron Technology, Inc. | Static NVRAM with ultra thin tunnel oxides |
US6362508B1 (en) | 2000-04-03 | 2002-03-26 | Tower Semiconductor Ltd. | Triple layer pre-metal dielectric structure for CMOS memory devices |
JP2001357682A (ja) | 2000-06-12 | 2001-12-26 | Sony Corp | メモリシステムおよびそのプログラム方法 |
US6580124B1 (en) | 2000-08-14 | 2003-06-17 | Matrix Semiconductor Inc. | Multigate semiconductor device with vertical channel current and method of fabrication |
EP2988331B1 (en) | 2000-08-14 | 2019-01-09 | SanDisk Technologies LLC | Semiconductor memory device |
US6621725B2 (en) | 2000-08-17 | 2003-09-16 | Kabushiki Kaisha Toshiba | Semiconductor memory device with floating storage bulk region and method of manufacturing the same |
US6587365B1 (en) | 2000-08-31 | 2003-07-01 | Micron Technology, Inc. | Array architecture for depletion mode ferroelectric memory devices |
US20020193484A1 (en) | 2001-02-02 | 2002-12-19 | The 54 Group, Ltd. | Polymeric resins impregnated with insect repellants |
US6531727B2 (en) | 2001-02-09 | 2003-03-11 | Micron Technology, Inc. | Open bit line DRAM with ultra thin body transistors |
DE10114280A1 (de) | 2001-03-23 | 2002-09-26 | Infineon Technologies Ag | Halbleiterspeicher mit Refresh |
US6744094B2 (en) | 2001-08-24 | 2004-06-01 | Micron Technology Inc. | Floating gate transistor with horizontal gate layers stacked next to vertical body |
US7012297B2 (en) | 2001-08-30 | 2006-03-14 | Micron Technology, Inc. | Scalable flash/NV structures and devices with extended endurance |
GB0123416D0 (en) | 2001-09-28 | 2001-11-21 | Memquest Ltd | Non-volatile memory control |
US6873004B1 (en) | 2002-02-04 | 2005-03-29 | Nexflash Technologies, Inc. | Virtual ground single transistor memory cell, memory array incorporating same, and method of operation thereof |
US7064018B2 (en) | 2002-07-08 | 2006-06-20 | Viciciv Technology | Methods for fabricating three dimensional integrated circuits |
US6774458B2 (en) | 2002-07-23 | 2004-08-10 | Hewlett Packard Development Company, L.P. | Vertical interconnection structure and methods |
US7505321B2 (en) | 2002-12-31 | 2009-03-17 | Sandisk 3D Llc | Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same |
US7005350B2 (en) | 2002-12-31 | 2006-02-28 | Matrix Semiconductor, Inc. | Method for fabricating programmable memory array structures incorporating series-connected transistor strings |
KR100881201B1 (ko) | 2003-01-09 | 2009-02-05 | 삼성전자주식회사 | 사이드 게이트를 구비하는 소노스 메모리 소자 및 그제조방법 |
US7307308B2 (en) | 2003-04-07 | 2007-12-11 | Silicon Storage Technology, Inc. | Buried bit line non-volatile floating gate memory cell with independent controllable control gate in a trench, and array thereof, and method of formation |
US6754105B1 (en) | 2003-05-06 | 2004-06-22 | Advanced Micro Devices, Inc. | Trench side wall charge trapping dielectric flash memory device |
JP4108537B2 (ja) | 2003-05-28 | 2008-06-25 | 富士雄 舛岡 | 半導体装置 |
KR100546331B1 (ko) | 2003-06-03 | 2006-01-26 | 삼성전자주식회사 | 스택 뱅크들 마다 독립적으로 동작하는 멀티 포트 메모리장치 |
US20040262772A1 (en) | 2003-06-30 | 2004-12-30 | Shriram Ramanathan | Methods for bonding wafers using a metal interlayer |
KR100535651B1 (ko) | 2003-06-30 | 2005-12-08 | 주식회사 하이닉스반도체 | 플래시 메모리 셀과, 낸드 및 노아 타입의 플래시 메모리장치의 독출방법 |
JP4545423B2 (ja) | 2003-12-09 | 2010-09-15 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7312505B2 (en) | 2004-03-31 | 2007-12-25 | Intel Corporation | Semiconductor substrate with interconnections and embedded circuit elements |
US7223653B2 (en) | 2004-06-15 | 2007-05-29 | International Business Machines Corporation | Process for forming a buried plate |
US7378702B2 (en) | 2004-06-21 | 2008-05-27 | Sang-Yun Lee | Vertical memory device structures |
US7412560B2 (en) | 2004-12-16 | 2008-08-12 | Sandisk Corporation | Non-volatile memory and method with multi-stream updating |
US7366826B2 (en) | 2004-12-16 | 2008-04-29 | Sandisk Corporation | Non-volatile memory and method with multi-stream update tracking |
US7450433B2 (en) | 2004-12-29 | 2008-11-11 | Sandisk Corporation | Word line compensation in non-volatile memory erase operations |
US7473589B2 (en) | 2005-12-09 | 2009-01-06 | Macronix International Co., Ltd. | Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same |
US8314024B2 (en) | 2008-12-19 | 2012-11-20 | Unity Semiconductor Corporation | Device fabrication |
KR100673105B1 (ko) | 2005-03-31 | 2007-01-22 | 주식회사 하이닉스반도체 | 반도체 소자의 수직형 트랜지스터 및 그의 형성 방법 |
GB2441726B (en) | 2005-06-24 | 2010-08-11 | Metaram Inc | An integrated memory core and memory interface circuit |
US7612411B2 (en) | 2005-08-03 | 2009-11-03 | Walker Andrew J | Dual-gate device and method |
US7429767B2 (en) | 2005-09-01 | 2008-09-30 | Micron Technology, Inc. | High performance multi-level non-volatile memory device |
EP1932158A4 (en) | 2005-09-30 | 2008-10-15 | Mosaid Technologies Inc | MEMORY WITH OUTPUT CONTROL |
JP4282699B2 (ja) | 2006-09-01 | 2009-06-24 | 株式会社東芝 | 半導体装置 |
KR100834396B1 (ko) | 2006-12-27 | 2008-06-04 | 주식회사 하이닉스반도체 | 반도체 소자의 패턴 형성 방법 |
JP2008182035A (ja) | 2007-01-24 | 2008-08-07 | Toshiba Corp | 半導体記憶装置およびその製造方法 |
US7857907B2 (en) | 2007-01-25 | 2010-12-28 | Au Optronics Corporation | Methods of forming silicon nanocrystals by laser annealing |
JP4320679B2 (ja) | 2007-02-19 | 2009-08-26 | セイコーエプソン株式会社 | 強誘電体メモリ装置の製造方法 |
JP2008251138A (ja) | 2007-03-30 | 2008-10-16 | Toshiba Corp | 不揮発性半導体メモリ、不揮発性半導体メモリの制御方法、不揮発性半導体メモリシステム、及びメモリカード |
ITMI20070777A1 (it) * | 2007-04-17 | 2008-10-18 | St Microelectronics Srl | Metodo e circuiteria di programmazione di una cella di memoria in paeticolare di tipo flash nor |
US7714377B2 (en) | 2007-04-19 | 2010-05-11 | Qimonda Ag | Integrated circuits and methods of manufacturing thereof |
US7512012B2 (en) | 2007-04-30 | 2009-03-31 | Macronix International Co., Ltd. | Non-volatile memory and manufacturing method and operating method thereof and circuit system including the non-volatile memory |
US20090179253A1 (en) | 2007-05-25 | 2009-07-16 | Cypress Semiconductor Corporation | Oxide-nitride-oxide stack having multiple oxynitride layers |
JP5130596B2 (ja) | 2007-05-30 | 2013-01-30 | 国立大学法人東北大学 | 半導体装置 |
US7719901B2 (en) | 2007-06-05 | 2010-05-18 | Micron Technology, Inc. | Solid state memory utilizing analog communication of data values |
DE102007035251B3 (de) | 2007-07-27 | 2008-08-28 | X-Fab Semiconductor Foundries Ag | Verfahren zur Herstellung von Isolationsgräben mit unterschiedlichen Seitenwanddotierungen |
US20100027355A1 (en) | 2007-07-31 | 2010-02-04 | Dao Thuy B | Planar double gate transistor storage cell |
JP2010097676A (ja) | 2008-10-20 | 2010-04-30 | Toshiba Corp | 不揮発性半導体記憶装置およびその閾値制御方法 |
US20090157946A1 (en) | 2007-12-12 | 2009-06-18 | Siamak Arya | Memory having improved read capability |
US7542348B1 (en) | 2007-12-19 | 2009-06-02 | Juhan Kim | NOR flash memory including bipolar segment read circuit |
JP2009206451A (ja) | 2008-02-29 | 2009-09-10 | Toshiba Corp | 不揮発性半導体記憶装置、及びその製造方法 |
KR101559868B1 (ko) | 2008-02-29 | 2015-10-14 | 삼성전자주식회사 | 수직형 반도체 소자 및 이의 제조 방법. |
US7898857B2 (en) * | 2008-03-20 | 2011-03-01 | Micron Technology, Inc. | Memory structure having volatile and non-volatile memory portions |
US8072811B2 (en) | 2008-05-07 | 2011-12-06 | Aplus Flash Technology, Inc, | NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR flash memory array, and a method of forming a NAND based NMOS NOR flash memory array |
WO2009154799A1 (en) | 2008-06-20 | 2009-12-23 | Aplus Flash Technology, Inc. | An apparatus and method for inhibiting excess leakage current in unselected nonvolatile memory cells in an array |
TWI376773B (en) | 2008-07-17 | 2012-11-11 | Au Optronics Corp | Method for manufacturing non-volatile memory and structure threrof |
US20100121994A1 (en) | 2008-11-10 | 2010-05-13 | International Business Machines Corporation | Stacked memory array |
JP2010118580A (ja) | 2008-11-14 | 2010-05-27 | Toshiba Corp | 不揮発性半導体記憶装置 |
US8148763B2 (en) | 2008-11-25 | 2012-04-03 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor devices |
EP2377129A4 (en) | 2008-12-09 | 2013-05-22 | Rambus Inc | NON-VOLATILE MEMORY DEVICE FOR SIMULTANEOUS AND OVERLAP MEMORY OPERATIONS |
KR101532366B1 (ko) | 2009-02-25 | 2015-07-01 | 삼성전자주식회사 | 반도체 기억 소자 |
JP4956598B2 (ja) | 2009-02-27 | 2012-06-20 | シャープ株式会社 | 不揮発性半導体記憶装置及びその製造方法 |
US8178396B2 (en) | 2009-03-11 | 2012-05-15 | Micron Technology, Inc. | Methods for forming three-dimensional memory devices, and related structures |
US8284601B2 (en) | 2009-04-01 | 2012-10-09 | Samsung Electronics Co., Ltd. | Semiconductor memory device comprising three-dimensional memory cell array |
JP2010251572A (ja) * | 2009-04-16 | 2010-11-04 | Toshiba Corp | 不揮発性半導体記憶装置 |
US8139418B2 (en) | 2009-04-27 | 2012-03-20 | Micron Technology, Inc. | Techniques for controlling a direct injection semiconductor memory device |
KR101635504B1 (ko) | 2009-06-19 | 2016-07-04 | 삼성전자주식회사 | 3차원 수직 채널 구조를 갖는 불 휘발성 메모리 장치의 프로그램 방법 |
JP2011028540A (ja) | 2009-07-27 | 2011-02-10 | Renesas Electronics Corp | 情報処理システム、キャッシュメモリの制御方法、プログラム及びコンパイラ |
KR20110018753A (ko) * | 2009-08-18 | 2011-02-24 | 삼성전자주식회사 | 불휘발성 메모리 장치, 그것의 프로그램 방법, 그리고 그것을 포함하는 메모리 시스템 |
KR101584113B1 (ko) | 2009-09-29 | 2016-01-13 | 삼성전자주식회사 | 3차원 반도체 메모리 장치 및 그 제조 방법 |
JP5031809B2 (ja) | 2009-11-13 | 2012-09-26 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体装置 |
EP2333830B1 (en) | 2009-12-07 | 2014-09-03 | STMicroelectronics (Research & Development) Limited | a package comprising a first and a second die coupled by a multiplexed bus |
US8247895B2 (en) | 2010-01-08 | 2012-08-21 | International Business Machines Corporation | 4D device process and structure |
JP2010108522A (ja) | 2010-02-02 | 2010-05-13 | Toshiba Corp | メモリシステムの制御方法 |
US8026521B1 (en) | 2010-10-11 | 2011-09-27 | Monolithic 3D Inc. | Semiconductor device and structure |
US8395942B2 (en) | 2010-05-17 | 2013-03-12 | Sandisk Technologies Inc. | Junctionless TFT NAND flash memory |
KR101137929B1 (ko) | 2010-05-31 | 2012-05-09 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 장치 및 그 제조 방법 |
KR101660432B1 (ko) | 2010-06-07 | 2016-09-27 | 삼성전자 주식회사 | 수직 구조의 반도체 메모리 소자 |
US8603890B2 (en) | 2010-06-19 | 2013-12-10 | Sandisk Technologies Inc. | Air gap isolation in non-volatile memory |
US8890233B2 (en) | 2010-07-06 | 2014-11-18 | Macronix International Co., Ltd. | 3D memory array with improved SSL and BL contact layout |
US10217667B2 (en) | 2011-06-28 | 2019-02-26 | Monolithic 3D Inc. | 3D semiconductor device, fabrication method and system |
US8325534B2 (en) | 2010-12-28 | 2012-12-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Concurrent operation of plural flash memories |
US8630114B2 (en) * | 2011-01-19 | 2014-01-14 | Macronix International Co., Ltd. | Memory architecture of 3D NOR array |
KR20120085591A (ko) * | 2011-01-24 | 2012-08-01 | 김진선 | 3차원 비휘발성 메모리 소자, 그 동작 방법 및 그 제조 방법 |
KR20120085603A (ko) * | 2011-01-24 | 2012-08-01 | 김진선 | 3차원 비휘발성 메모리 소자, 그 동작 방법 및 그 제조 방법 |
US8952418B2 (en) | 2011-03-01 | 2015-02-10 | Micron Technology, Inc. | Gated bipolar junction transistors |
JP2012204684A (ja) | 2011-03-25 | 2012-10-22 | Toshiba Corp | 不揮発性半導体記憶装置 |
US9559216B2 (en) | 2011-06-06 | 2017-01-31 | Micron Technology, Inc. | Semiconductor memory device and method for biasing same |
US20120327714A1 (en) | 2011-06-23 | 2012-12-27 | Macronix International Co., Ltd. | Memory Architecture of 3D Array With Diode in Memory String |
US8527695B2 (en) | 2011-07-29 | 2013-09-03 | The Boeing Company | System for updating an associative memory |
US8933502B2 (en) * | 2011-11-21 | 2015-01-13 | Sandisk Technologies Inc. | 3D non-volatile memory with metal silicide interconnect |
KR20130088348A (ko) | 2012-01-31 | 2013-08-08 | 에스케이하이닉스 주식회사 | 3차원 비휘발성 메모리 소자 |
US8878278B2 (en) | 2012-03-21 | 2014-11-04 | Sandisk Technologies Inc. | Compact three dimensional vertical NAND and method of making thereof |
US8902659B2 (en) | 2012-03-26 | 2014-12-02 | SanDisk Technologies, Inc. | Shared-bit-line bit line setup scheme |
JP2013214552A (ja) | 2012-03-30 | 2013-10-17 | Toshiba Corp | 半導体装置とその製造方法 |
KR101915719B1 (ko) | 2012-04-26 | 2019-01-08 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 동작 방법 |
US9645177B2 (en) | 2012-05-04 | 2017-05-09 | Seagate Technology Llc | Retention-drift-history-based non-volatile memory read threshold optimization |
US9054183B2 (en) | 2012-07-13 | 2015-06-09 | United Silicon Carbide, Inc. | Trenched and implanted accumulation mode metal-oxide-semiconductor field-effect transistor |
US9697147B2 (en) | 2012-08-06 | 2017-07-04 | Advanced Micro Devices, Inc. | Stacked memory device with metadata management |
US8922243B2 (en) | 2012-12-23 | 2014-12-30 | Advanced Micro Devices, Inc. | Die-stacked memory device with reconfigurable logic |
JP2014053568A (ja) | 2012-09-10 | 2014-03-20 | Toshiba Corp | 強誘電体メモリ及びその製造方法 |
KR101975534B1 (ko) | 2012-09-11 | 2019-05-07 | 삼성전자주식회사 | 연산기능을 갖는 반도체 메모리 장치 |
JP2014093319A (ja) | 2012-10-31 | 2014-05-19 | Toshiba Corp | 半導体装置およびその製造方法 |
KR101447547B1 (ko) | 2012-11-23 | 2014-10-06 | 삼성전자주식회사 | 자기 공명 영상 촬상 방법 및 장치 |
US10403766B2 (en) | 2012-12-04 | 2019-09-03 | Conversant Intellectual Property Management Inc. | NAND flash memory with vertical cell stack structure and method for manufacturing same |
US8877586B2 (en) | 2013-01-31 | 2014-11-04 | Sandisk 3D Llc | Process for forming resistive switching memory cells using nano-particles |
US8878271B2 (en) | 2013-03-01 | 2014-11-04 | Micron Technology, Inc. | Vertical access device and apparatuses having a body connection line, and related method of operating the same |
US9202694B2 (en) | 2013-03-04 | 2015-12-01 | Sandisk 3D Llc | Vertical bit line non-volatile memory systems and methods of fabrication |
US8902663B1 (en) | 2013-03-11 | 2014-12-02 | Monolithic 3D Inc. | Method of maintaining a memory state |
US10840239B2 (en) | 2014-08-26 | 2020-11-17 | Monolithic 3D Inc. | 3D semiconductor device and structure |
US9368625B2 (en) | 2013-05-01 | 2016-06-14 | Zeno Semiconductor, Inc. | NAND string utilizing floating body memory cell |
US9281044B2 (en) | 2013-05-17 | 2016-03-08 | Micron Technology, Inc. | Apparatuses having a ferroelectric field-effect transistor memory array and related method |
CN103366798B (zh) | 2013-07-10 | 2016-02-17 | 格科微电子(上海)有限公司 | 动态随机存取存储器及制造方法、半导体封装件及封装方法 |
US9337210B2 (en) | 2013-08-12 | 2016-05-10 | Micron Technology, Inc. | Vertical ferroelectric field effect transistor constructions, constructions comprising a pair of vertical ferroelectric field effect transistors, vertical strings of ferroelectric field effect transistors, and vertical strings of laterally opposing pairs of vertical ferroelectric field effect transistors |
US9368214B2 (en) | 2013-10-03 | 2016-06-14 | Apple Inc. | Programmable peak-current control in non-volatile memory devices |
KR102432754B1 (ko) | 2013-10-21 | 2022-08-16 | 에프엘씨 글로벌 리미티드 | 최종 레벨 캐시 시스템 및 이에 대응하는 방법 |
KR102128469B1 (ko) | 2013-11-08 | 2020-06-30 | 삼성전자주식회사 | 반도체 장치 |
US9190293B2 (en) | 2013-12-18 | 2015-11-17 | Applied Materials, Inc. | Even tungsten etch for high aspect ratio trenches |
KR102066743B1 (ko) | 2014-01-09 | 2020-01-15 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그 형성방법 |
KR102183713B1 (ko) | 2014-02-13 | 2020-11-26 | 삼성전자주식회사 | 3차원 반도체 장치의 계단형 연결 구조 및 이를 형성하는 방법 |
US9368601B2 (en) | 2014-02-28 | 2016-06-14 | Sandisk Technologies Inc. | Method for forming oxide below control gate in vertical channel thin film transistor |
US20150372099A1 (en) | 2014-06-19 | 2015-12-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contact silicide formation using a spike annealing process |
US20160013156A1 (en) | 2014-07-14 | 2016-01-14 | Apple Inc. | Package-on-package options with multiple layer 3-d stacking |
KR102140788B1 (ko) | 2014-07-18 | 2020-08-03 | 삼성전자주식회사 | 저항성 메모리 장치, 저항성 메모리 시스템 및 저항성 메모리 장치의 동작방법 |
US9685429B2 (en) | 2014-07-29 | 2017-06-20 | Dyi-chung Hu | Stacked package-on-package memory devices |
US10014317B2 (en) | 2014-09-23 | 2018-07-03 | Haibing Peng | Three-dimensional non-volatile NOR-type flash memory |
US10026771B1 (en) | 2014-09-30 | 2018-07-17 | Apple Inc. | Image sensor with a cross-wafer capacitor |
US9230985B1 (en) | 2014-10-15 | 2016-01-05 | Sandisk 3D Llc | Vertical TFT with tunnel barrier |
US9698152B2 (en) | 2014-11-13 | 2017-07-04 | Sandisk Technologies Llc | Three-dimensional memory structure with multi-component contact via structure and method of making thereof |
US9356105B1 (en) | 2014-12-29 | 2016-05-31 | Macronix International Co., Ltd. | Ring gate transistor design for flash memory |
US9595566B2 (en) | 2015-02-25 | 2017-03-14 | Sandisk Technologies Llc | Floating staircase word lines and process in a 3D non-volatile memory having vertical bit lines |
US10007573B2 (en) | 2015-04-27 | 2018-06-26 | Invensas Corporation | Preferred state encoding in non-volatile memories |
KR20160128127A (ko) | 2015-04-28 | 2016-11-07 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
CN106206447A (zh) | 2015-05-05 | 2016-12-07 | 中芯国际集成电路制造(上海)有限公司 | 3d nand器件的形成方法 |
US9620605B2 (en) | 2015-05-15 | 2017-04-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device structure and method |
US10254968B1 (en) | 2015-06-10 | 2019-04-09 | Firquest Llc | Hybrid memory device for lookup operations |
US11956952B2 (en) * | 2015-08-23 | 2024-04-09 | Monolithic 3D Inc. | Semiconductor memory device and structure |
US9589982B1 (en) * | 2015-09-15 | 2017-03-07 | Macronix International Co., Ltd. | Structure and method of operation for improved gate capacity for 3D NOR flash memory |
WO2017053329A1 (en) * | 2015-09-21 | 2017-03-30 | Monolithic 3D Inc | 3d semiconductor device and structure |
US20190148286A1 (en) | 2015-09-21 | 2019-05-16 | Monolithic 3D Inc. | Multi-level semiconductor device and structure with memory |
US9412752B1 (en) | 2015-09-22 | 2016-08-09 | Macronix International Co., Ltd. | Reference line and bit line structure for 3D memory |
US9892800B2 (en) | 2015-09-30 | 2018-02-13 | Sunrise Memory Corporation | Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates |
US9842651B2 (en) | 2015-11-25 | 2017-12-12 | Sunrise Memory Corporation | Three-dimensional vertical NOR flash thin film transistor strings |
US10121553B2 (en) * | 2015-09-30 | 2018-11-06 | Sunrise Memory Corporation | Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays |
US9831266B2 (en) | 2015-11-20 | 2017-11-28 | Sandisk Technologies Llc | Three-dimensional NAND device containing support pedestal structures for a buried source line and method of making the same |
US10886228B2 (en) | 2015-12-23 | 2021-01-05 | Intel Corporation | Improving size and efficiency of dies |
US9985046B2 (en) | 2016-06-13 | 2018-05-29 | Sandisk Technologies Llc | Method of forming a staircase in a semiconductor device using a linear alignment control feature |
US10417098B2 (en) | 2016-06-28 | 2019-09-17 | International Business Machines Corporation | File level access to block level incremental backups of a virtual disk |
US9995785B2 (en) | 2016-09-30 | 2018-06-12 | Intel Corporation | Stacked semiconductor package and method for performing bare die testing on a functional die in a stacked semiconductor package |
US10157780B2 (en) | 2016-11-29 | 2018-12-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming a device having a doping layer and device formed |
JP2018152419A (ja) | 2017-03-10 | 2018-09-27 | 東芝メモリ株式会社 | 半導体記憶装置 |
US10374013B2 (en) | 2017-03-30 | 2019-08-06 | Sandisk Technologies Llc | Methods and apparatus for three-dimensional nonvolatile memory |
US10475514B2 (en) | 2017-05-11 | 2019-11-12 | The Penn State Research Foundation | Nonvolatile digital computing with ferroelectric FET |
US10319635B2 (en) | 2017-05-25 | 2019-06-11 | Sandisk Technologies Llc | Interconnect structure containing a metal slilicide hydrogen diffusion barrier and method of making thereof |
JP7203054B2 (ja) | 2017-06-20 | 2023-01-12 | サンライズ メモリー コーポレイション | 3次元nor型メモリアレイアーキテクチャ及びその製造方法 |
US10692874B2 (en) | 2017-06-20 | 2020-06-23 | Sunrise Memory Corporation | 3-dimensional NOR string arrays in segmented stacks |
US10608008B2 (en) | 2017-06-20 | 2020-03-31 | Sunrise Memory Corporation | 3-dimensional nor strings with segmented shared source regions |
US10460817B2 (en) | 2017-07-13 | 2019-10-29 | Qualcomm Incorporated | Multiple (multi-) level cell (MLC) non-volatile (NV) memory (NVM) matrix circuits for performing matrix computations with multi-bit input vectors |
US10431596B2 (en) | 2017-08-28 | 2019-10-01 | Sunrise Memory Corporation | Staggered word line architecture for reduced disturb in 3-dimensional NOR memory arrays |
EP3676872A4 (en) | 2017-08-31 | 2020-11-25 | Micron Technology, Inc. | DEVICES HAVING MEMORY CELLS CONTAINING TWO TRANSISTORS AND ONE CAPACITOR, AND OF WHICH THE BODY REGIONS OF THE TRANSISTORS ARE COUPLED TO REFERENCE VOLTAGES |
US10630296B2 (en) | 2017-09-12 | 2020-04-21 | iCometrue Company Ltd. | Logic drive with brain-like elasticity and integrality based on standard commodity FPGA IC chips using non-volatile memory cells |
US10896916B2 (en) | 2017-11-17 | 2021-01-19 | Sunrise Memory Corporation | Reverse memory cell |
JP7072658B2 (ja) | 2017-12-28 | 2022-05-20 | サンライズ メモリー コーポレイション | 超微細ピッチを有する3次元nor型メモリアレイ:デバイスと方法 |
US10283493B1 (en) | 2018-01-17 | 2019-05-07 | Sandisk Technologies Llc | Three-dimensional memory device containing bonded memory die and peripheral logic die and method of making thereof |
US10381378B1 (en) | 2018-02-02 | 2019-08-13 | Sunrise Memory Corporation | Three-dimensional vertical NOR flash thin-film transistor strings |
US10475812B2 (en) | 2018-02-02 | 2019-11-12 | Sunrise Memory Corporation | Three-dimensional vertical NOR flash thin-film transistor strings |
US10461095B2 (en) | 2018-03-28 | 2019-10-29 | Sandisk Technologies Llc | Ferroelectric non-volatile memory |
KR102512754B1 (ko) | 2018-03-30 | 2023-03-23 | 삼성전자주식회사 | 관통 전극을 통해 전송되는 제어 신호를 이용하여 데이터를 샘플링하는 메모리 장치 |
US10431576B1 (en) | 2018-04-20 | 2019-10-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory cell array and method of manufacturing same |
US10748931B2 (en) | 2018-05-08 | 2020-08-18 | Micron Technology, Inc. | Integrated assemblies having ferroelectric transistors with body regions coupled to carrier reservoirs |
US10319696B1 (en) | 2018-05-10 | 2019-06-11 | Micron Technology, Inc. | Methods for fabricating 3D semiconductor device packages, resulting packages and systems incorporating such packages |
US10651153B2 (en) | 2018-06-18 | 2020-05-12 | Intel Corporation | Three-dimensional (3D) memory with shared control circuitry using wafer-to-wafer bonding |
US11751391B2 (en) | 2018-07-12 | 2023-09-05 | Sunrise Memory Corporation | Methods for fabricating a 3-dimensional memory structure of nor memory strings |
US11069696B2 (en) | 2018-07-12 | 2021-07-20 | Sunrise Memory Corporation | Device structure for a 3-dimensional NOR memory array and methods for improved erase operations applied thereto |
CN112567516A (zh) | 2018-07-12 | 2021-03-26 | 日升存储公司 | 三维nor存储器阵列的制造方法 |
US10692837B1 (en) | 2018-07-20 | 2020-06-23 | Xilinx, Inc. | Chip package assembly with modular core dice |
US11488830B2 (en) | 2018-08-23 | 2022-11-01 | Applied Materials, Inc. | Oxygen free deposition of platinum group metal films |
TWI757635B (zh) | 2018-09-20 | 2022-03-11 | 美商森恩萊斯記憶體公司 | 記憶體結構及其用於電性連接三維記憶裝置之多水平導電層之階梯結構的製作方法 |
TWI713195B (zh) | 2018-09-24 | 2020-12-11 | 美商森恩萊斯記憶體公司 | 三維nor記憶電路製程中之晶圓接合及其形成之積體電路 |
US10686050B2 (en) | 2018-09-26 | 2020-06-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing a semiconductor device and a semiconductor device |
EP3891801A4 (en) | 2018-12-04 | 2022-08-24 | Sunrise Memory Corporation | PROCESS FOR FABRICATION OF MULTILAYERY HORIZONTAL NOR THIN FILM MEMORY STRINGS |
CN113424319A (zh) | 2019-02-11 | 2021-09-21 | 日升存储公司 | 垂直薄膜晶体管以及作为用于三维存储器阵列的位线连接器的应用 |
US11062976B2 (en) | 2019-05-03 | 2021-07-13 | International Business Machines Corporation | Functional stiffener that enables land grid array interconnections and power decoupling |
US10825834B1 (en) | 2019-05-10 | 2020-11-03 | Yung-Tin Chen | Three-dimensional ferroelectric random-access memory (FeRAM) |
US11251199B2 (en) | 2019-12-09 | 2022-02-15 | Sandisk Technologies Llc | Three-dimensional NOR array including active region pillars and method of making the same |
US11729986B2 (en) | 2020-05-28 | 2023-08-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Ferroelectric memory device and method of forming the same |
DE102020130975A1 (de) | 2020-05-28 | 2021-12-02 | Taiwan Semiconductor Manufacturing Co., Ltd. | Ferroelektrische speichervorrichtung und verfahren zum bilden derselben |
CN111799263A (zh) | 2020-06-30 | 2020-10-20 | 湘潭大学 | 一种三维nand铁电存储器及其制备方法 |
TW202220191A (zh) | 2020-07-21 | 2022-05-16 | 美商日升存儲公司 | 用於製造nor記憶體串之3維記憶體結構之方法 |
US11387254B2 (en) | 2020-10-30 | 2022-07-12 | Ferroelectric Memory Gmbh | Memory cell and methods thereof |
US11910615B2 (en) | 2021-01-15 | 2024-02-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device and manufacturing method thereof |
US11955548B2 (en) | 2021-01-29 | 2024-04-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Two-dimensional (2D) material for oxide semiconductor (OS) ferroelectric field-effect transistor (FeFET) device |
US11810640B2 (en) | 2021-02-10 | 2023-11-07 | Sunrise Memory Corporation | Memory interface with configurable high-speed serial data lanes for high bandwidth memory |
KR20220149304A (ko) | 2021-04-30 | 2022-11-08 | 삼성전자주식회사 | 단순한 셀 구성을 갖는 불휘발성 연상기억장치 및 그 동작방법 |
US11923458B2 (en) | 2021-06-02 | 2024-03-05 | International Business Machines Corporation | FeFET with double gate structure |
KR20230025178A (ko) | 2021-08-13 | 2023-02-21 | 삼성전자주식회사 | 반도체 소자 |
-
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010017798A1 (en) | 2000-01-18 | 2001-08-30 | Tomoyuki Ishii | Semiconductor integrated circuit device and data processor device |
JP2009260364A (ja) | 2000-01-18 | 2009-11-05 | Renesas Technology Corp | 半導体記憶装置 |
JP2006099827A (ja) | 2004-09-28 | 2006-04-13 | Sharp Corp | 半導体記憶装置及び電子機器 |
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