CN104620363A - 差别氧化硅蚀刻 - Google Patents
差别氧化硅蚀刻 Download PDFInfo
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- CN104620363A CN104620363A CN201380047312.1A CN201380047312A CN104620363A CN 104620363 A CN104620363 A CN 104620363A CN 201380047312 A CN201380047312 A CN 201380047312A CN 104620363 A CN104620363 A CN 104620363A
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims abstract description 102
- 229910052814 silicon oxide Inorganic materials 0.000 title claims abstract description 34
- 239000000758 substrate Substances 0.000 claims abstract description 109
- 238000000034 method Methods 0.000 claims abstract description 84
- 238000012545 processing Methods 0.000 claims abstract description 72
- 239000002243 precursor Substances 0.000 claims abstract description 45
- 239000011737 fluorine Substances 0.000 claims abstract description 43
- 229910052731 fluorine Inorganic materials 0.000 claims abstract description 43
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims abstract description 38
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- QKCGXXHCELUCKW-UHFFFAOYSA-N n-[4-[4-(dinaphthalen-2-ylamino)phenyl]phenyl]-n-naphthalen-2-ylnaphthalen-2-amine Chemical compound C1=CC=CC2=CC(N(C=3C=CC(=CC=3)C=3C=CC(=CC=3)N(C=3C=C4C=CC=CC4=CC=3)C=3C=C4C=CC=CC4=CC=3)C3=CC4=CC=CC=C4C=C3)=CC=C21 QKCGXXHCELUCKW-UHFFFAOYSA-N 0.000 claims description 7
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- BLIQUJLAJXRXSG-UHFFFAOYSA-N 1-benzyl-3-(trifluoromethyl)pyrrolidin-1-ium-3-carboxylate Chemical compound C1C(C(=O)O)(C(F)(F)F)CCN1CC1=CC=CC=C1 BLIQUJLAJXRXSG-UHFFFAOYSA-N 0.000 claims description 2
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- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims description 2
- 150000002221 fluorine Chemical class 0.000 claims 3
- 239000000376 reactant Substances 0.000 abstract description 3
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- WYEMLYFITZORAB-UHFFFAOYSA-N boscalid Chemical compound C1=CC(Cl)=CC=C1C1=CC=CC=C1NC(=O)C1=CC=CN=C1Cl WYEMLYFITZORAB-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
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- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32357—Generation remote from the workpiece, e.g. down-stream
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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Abstract
兹描述蚀刻经图案化异质结构上的暴露的氧化硅的方法,且该方法包括自远端等离子体蚀刻所产生的气相蚀刻。远端等离子体激发含氟前体。将来自远端等离子体的等离子体流出物流入基板处理区,等离子体流出物在基板处理区与水蒸气结合。藉此产生的反应物蚀刻经图案化异质结构,以在不同的蚀刻速率下移除两个单独的相异氧化硅区。该方法可被用来在移除较少高密度氧化硅的同时移除低密度氧化硅。
Description
对相关申请案的交互参照
此申请案主张在2012年9月17日提出的发明名称为“DIFFERENTIALSILICON OXIDE ETCH”的美国临时专利申请案第61/701,964号的权益,该美国临时专利申请案的整体内容为所有目的在此以引用形式并入。
技术领域
本发明是关于差别氧化硅蚀刻。
背景技术
透过在基板表面上生产错综复杂图案化的材料层的工艺,可制作集成电路。在基板上生产图案化材料需要受控的方法以移除暴露的材料。化学蚀刻用于各种目的,包括将光阻中的图案转移进入下面的层中、薄化层或薄化已经存在于表面上的特征结构的侧向尺寸。通常,期望具有蚀刻一种材料比另一种快的蚀刻工艺,以助于例如图案转移工艺进行。此类蚀刻工艺可说是对第一材料有选择性。材料、电路与工艺多样化的结果是,蚀刻工艺已被开发成具有对多种材料的选择性。
湿式HF蚀刻优先移除氧化硅甚于其它介电质及半导体。然而,湿式工艺无法渗透某些受限的沟槽,且有时候会使余留的材料变形。在局部等离子体(基板处理区内的等离子体)中产生的干式蚀刻可渗透更为受限的沟槽,并对细微的余留结构显现较少变形。然而,局部等离子体可透过电弧的产生而在电弧放电时损坏基板。
SiconiTM蚀刻为远端等离子体辅助的干式蚀刻工艺,该工艺涉及同时将基板暴露于H2、NF3及NH3等离子体副产物。远端等离子体激发氢与氟物种容许无等离子体损坏的基板处理。SiconiTM蚀刻对氧化硅层有相当大程度的共形与选择性,但不易于蚀刻硅,无论该硅是非晶、结晶或多晶。氮化硅一般是以介于硅及氧化硅之间的速率受到蚀刻。
为了进行新式的制造流程,需要一些方法来更进一步地扩展选择性组合(suite)。
发明内容
兹描述蚀刻经图案化异质结构上的暴露的氧化硅的方法,且该方法包括自远端等离子体蚀刻所创造的气相蚀刻。远端等离子体激发含氟前体。来自远端等离子体的等离子体流出物流入基板处理区,等离子体流出物在基板处理区中与水蒸气结合。藉此产生的反应物蚀刻经图案化异质结构,以在不同的蚀刻速率下移除两个相异氧化硅的独立区域。所述方法可用以在移除较少高密度氧化硅的同时移除低密度氧化硅。
本发明的实施例包括在基板处理腔室的基板处理区中蚀刻经图案化基板的方法。经图案化基板具有暴露的氧化硅区。该方法包括下列步骤:将含氟前体流入远端等离子体区,同时在远端等离子体区中形成远端等离子体以产生等离子体流出物,远端等离子体区流通地耦接基板处理区。该方法进一步包括下列步骤:将水蒸气流入基板处理区而不先将水蒸气通过远端等离子体区。该方法进一步包括下列步骤:通过将等离子体流出物流入基板处理区,以蚀刻暴露的氧化硅区。暴露的氧化硅区包含具有第一密度的第一氧化硅区及具有第二密度的第二氧化硅区。第一密度小于第二密度。在第一蚀刻速率下蚀刻第一氧化硅区,且在第二蚀刻速率下蚀刻第二氧化硅区,第二蚀刻速率低于第一蚀刻速率。
部分额外实施例与特征在随后的说明书中提出,而对于本领域技术人员而言在详阅此说明书后可易于了解部分额外实施例与特征,或者此本领域技术人员可透过操作本文揭露的实施例而了解部分额外实施例与特征。透过在说明书中描述的设备、结合物与方法,可实现与获得本文揭露的实施例的特征与优点。
附图说明
透过参考说明书的其余部分及附图,可进一步了解本文揭露的实施例的本质与优点。
图1为根据本文揭露的实施例的氧化硅选择性蚀刻工艺的流程图。
图2A显示根据本发明的实施例的基板处理腔室。
图2B显示根据本发明的实施例的基板处理腔室的喷淋头。
图3显示根据本发明的实施例的基板处理系统。
在附图中,相似的部件及/或特征结构可具有相同的元件符号。进一步而言,同类的各部件可透过在元件符号后加上一破折号以及第二符号(该符号区别类似部件)加以区别。倘若在说明书中仅用第一元件符号,该叙述内容可应用至具有相同第一元件符号(无论第二元件符号为何)的类似部件的任一者。
具体实施方式
兹描述蚀刻经图案化异质结构上的暴露的氧化硅的方法,且该方法包括由远端等离子体蚀刻所产生的气相蚀刻。远端等离子体激发含氟前体。来自远端等离子体的等离子体流出物流入基板处理区,而等离子体流出物在基板处理区中与水蒸气结合。因此而产生的反应物可蚀刻经图案化异质结构,以在不同的蚀刻速率下移除相异氧化硅的两个各别区域。可使用所述方法在移除较少高密度氧化硅的同时移除低密度氧化硅。
选择性远端气相蚀刻工艺已使用氨(NH3)的氢源及三氟化氮(NF3)的氟源,所述氢源与氟源一起流经远端等离子体系统(RPS)并进入反应区。通常选择氨及三氟化氮的流速,使得氢的原子流速大致上是氟的原子流速的两倍,以为了有效地利用这两种处理气体成份。氢与氟的存在使得(NH4)2SiF6的固体副产物得以在相对低的基板温度下形成。通过将基板温度升高至升华温度之上而移除固体副产物。远端气相蚀刻工艺移除氧化物膜比移除例如硅快得多。然而,不同的氧化硅制品之间的蚀刻速率仅有非常小的差异。发明人已发现可通过以下方式强化低密度氧化硅相较于高密度氮化硅的选择性:在远端等离子体中激发含氟前体,并将等离子体流出物与尚未通过远端等离子体系统的水蒸气结合。
为了较佳地了解与认识本发明,现在请参考图1,图1为根据本文揭露的实施例的氧化硅选择性蚀刻工艺的流程图。在第一个操作之前,基板经图案化,并将高密度氧化硅沉积至经图案化基板上。接着将低密度氧化硅沉积于高密度氧化硅上,并作为暂时性牺牲支撑结构(例如,用于细微的垂直特征结构)。一但低密度氧化硅的结构性方面不再被需要,可以本文所述的蚀刻工艺将低密度氧化硅移除,同持保留高密度氧化硅。
接着传递经图案化基板进入处理区(操作110)。起始三氟化氮流进入等离子体区,等离子体区与处理区分离(操作120)。可使用氟的其它来源以增强或取代三氟化氮。一般而言,可使含氟前体流入等离子体区,且含氟前体包含选自由原子氟、二原子氟、三氟化氮、四氟化碳、氟化氢及二氟化氙所组成的群组中的至少一种前体。分离的等离子体区可指本文的远端等离子体区且可能位在与处理腔室有所区别的模块内,或位在处理腔室内的隔间中。接着使远端等离子体区中形成的等离子体流出物流入基板处理区(操作125)。使水蒸气同时流入基板处理区(操作130),以与等离子体流出物反应。由于水蒸气不通过远端等离子体区,因此水蒸气仅通过与等离子体流出物的交互作用而受到激发。在本发明的实施例中,水蒸气在进入基板处理区之前不通过任何远端等离子体区。
选择性蚀刻经图案化基板(操作135),使得低密度氧化硅在显著高于高密度氧化硅的速率下被移除。这样的能力能使用一个氧化硅区作为牺牲部分(低密度氧化硅),同时使用另一个氧化硅区被暴露(高密度氧化硅)。自基板处理区移除反应性化学物种,并接着自处理区移开基板(操作145)。
湿式蚀刻,如缓冲的氧化物蚀刻,也可用来相对于高密度氧化硅选择性地移除低密度氧化硅。发明人已发现选择性限于约6:1或7:1(低密度SiO蚀刻速率:高密度SiO蚀刻速率)。使用本文所述的气相干式蚀刻工艺,发明人已确认40:1甚至50:1(低密度SiO蚀刻速率:高密度SiO蚀刻速率)的选择性是可能的。在本发明的实施例中,低密度氧化硅蚀刻速率超过高密度氧化硅蚀刻速率达约8或更大、约10或更大、约15或更大或约25或更大的倍乘因子(multiplicative factor)。
可产生低密度氧化硅的范例沉积技术包括化学气相沉积(使用二氯硅烷作为沉积前体)、旋涂式玻璃(spin-on glass;SOG)或等离子体增强化学气相沉积。在本发明的实施例中,可以热氧化(在高温下将硅暴露于如O2)、二硅烷前体炉管氧化(furnace oxidation)或高密度等离子体化学气相沉积来沉积高密度氧化硅。
仅涉及氟(远端或局部)的气相蚀刻无法拥有在经图案化基板的其它部分(高密度氧化硅所制成)接近不受干扰的同时移除低密度氧化硅所需的选择性。本文所述的气相蚀刻所增加的益处在于所述气相蚀刻不会产生固体残留物。固体残留物的消除可避免干扰可能由牺牲低密度氧化硅所支撑的细微特征结构。固体残留物的消除也可通过移除升华步骤而简化工艺流,并减少处理成本。在本发明的实施例中,含氟前体可缺乏氢。当远端等离子体区中不包括氢前体时,等离子体流出物也可缺乏氢。此举确保经图案化基板上不可能产生固体副产物。
不希望将权利要求书的涵盖范围设限在可能完全正确或可能不完全正确的理论机制,可能的机制的一些讨论可证实有利。可通过传递含氟前体进入远端等离子体区来产生自由基-氟前体。申请人假设可产生并传递一定浓度的氟离子及原子进入基板处理区。水蒸气(H2O)可与氟反应,以产生较不具反应性的物种,如HF2-,此物种仍能自经图案化基板表面立即移除低密度氧化硅但不立即移除高密度氧化硅。与缺少固体残余副产物结合的选择性,可使这些蚀刻工艺恰好适于在余留的细微结构中引发少量变形的同时,自细微的非氧化硅材料移除模板及其它氧化硅支撑结构。
在揭露的实施例中,于蚀刻操作期间,基板处理区中的压力可高于或等于约0.1Torr且低于或等于约50Torr。在揭露的实施例中,基板处理区内的压力也可低于或等于约40Torr且高于或等于约5Torr或10Torr。任何上限可与任何下限结合以形成本发明的额外实施例。在揭露的实施例中,于蚀刻操作期间,经图案化基板的温度可为约0℃或更高且为约100℃或更低。在本发明的实施例中,于蚀刻操作期间,经图案化基板的温度可为约5℃或更高且为约40℃或更低。
在描述范例处理腔室及系统的过程中将揭示额外的水蒸气及远端激发的氟蚀刻工艺参数。
示范处理系统
可实施本发明的实施例的处理腔室可被纳入诸如可购自美国加州圣大克劳拉市的Applied Materials,Inc.的及系统的处理平台内。可与本发明的范例方法一并使用的基板处理腔室的范例可包括显示并描述于共同让渡给Lubomirsky等人的美国临时专利申请案第60/803,499号中的该等腔室,该案于2006年5月30日提出申请,且标题为“PROCESS CHAMBER FOR DIELECTRICGAPFILL”,该案全文在此为所有目的并入作为参考。额外的范例系统可包括显示并描述于美国专利第6,387,207号与第6,830,624号中的系统,该等专利的全文亦在此为所有目的并入作为参考。
图2A为根据本文揭露的实施例的基板处理腔室1001。远端等离子体系统(RPS1010)可处理含氟前体,含氟前体接着行进穿过气体入口组件1011。在气体入口组件1011内可见两个个别的气体供应通道。第一通道1012装载穿过远端等离子体系统(RPS)1010的气体,而第二通道1013绕过RPS 1010。在实施例中,任一通道皆可供含氟前体所用。另一方面,第一通道202可供处理气体所用,且第二通道1013可供处理气体(treatment gas)所用。图所示的盖体1021(如,导电的顶部分)及穿孔的隔件(喷淋头1053)之间有绝缘环1024,绝缘环1024使得AC电位得以相对于喷淋头1053施加到盖体1021。AC电位在腔室等离子体区1020中点燃等离子体。处理气体可行进穿过第一通道1012进入腔室等离子体区1020,且可单独受到腔室等离子体区1020中(或者与RPS 1010结合)的等离子体的激发。若处理气体(含氟前体)流经第二通道1013,则随后仅有腔室等离子体区1020用于激发。腔室等离子体区1020及/或RPS 1010的结合可称为本文中的远端等离子体系统。穿孔的隔件(又称为喷淋头)1053将腔室等离子体区1020与喷淋头1053下方的基板处理区1070分隔。喷淋头1053容许等离子体存在于腔室等离子体区1020中,以避免直接在基板处理区1070中激发气体,同时依然使受激发物种得以从腔室等离子体区1020行进至基板处理区1070内。
喷淋头1053位于腔室等离子体区1020与基板处理区1070之间,且喷淋头1053容许在RPS 1010及/或腔室等离子体区1020内产生的等离子体流出物(前体或其它气体的受激发衍生物)通过数个通孔1056,通孔1056横切板的厚度。喷淋头1053也具有一或多个中空容积1051,蒸气或气体形式的前体(如含硅前体)可填充中空容积1051,并通过小通孔1055进入基板处理区1070但不直接进入腔室等离子体区1020。在此揭露的实施例中,喷淋头1053比通孔1056的最小直径1050的长度还厚。为了维持从腔室等离子体区1020穿透至基板处理区1070的受激发物种的显著浓度,可透过形成通孔1056的较大的直径部分使该较大的直径部分穿过喷淋头1053达某一程度(part way),而限制通孔的最小直径1050的长度1026。在本文揭露的实施例中,通孔1056的最小直径1050的长度可与通孔1056的最小直径相同数量级,或者为较小的数量级。
在所显示的实施例中,喷淋头1053可(透过通孔1056)传递处理气体,处理气体可含有氧、氢及/或氮,及/或一旦处理气体在腔室等离子体区1020中受到等离子体激发,喷淋头1053可传递此类处理气体的等离子体流出物。在实施例中,经由第一通道1012导入RPS 1010及/或腔室等离子体区1020内的处理气体可含有氟(如,CF4、NF3或XeF2)。处理气体也可包括诸如氦、氩、氮(N2)等的载气。等离子体流出物可包括处理气体的离子化或中性的衍生物,且在此亦可指是自由基氟前体,该前体即为所导入的处理气体的原子的组分。
在实施例中,通孔1056的数目可介于约60个与约2000个之间。通孔1056可具有各种形状,但最容易被制成圆形。在本文揭露的实施例中,通孔1056的最小直径1050可介于约0.5mm与约20mm之间,或介于约1mm与约6mm之间。在选择通孔的截面形状上,亦有范围,截面可做成锥形、圆柱形或该二种形状的组合。在不同的实施例中,用于将气体导入基板处理区1070的小通孔1055的数目可介于约100与约5000之间,或介于约500与约2000之间。小通孔1055的直径可介于约0.1mm与约2mm之间。
图2B为根据本文所揭露实施例与处理腔室一起使用的喷淋头1053的底视图。喷淋头1053对应图2A所示的喷淋头。通孔1056被描绘成在喷淋头1053底部具有较大内径(ID),且在顶部具有较小ID。小通孔1055实质上平均分布在喷淋头的表面上,甚至分布在通孔1056之间,相较于本文所述的其它实施例,这种分布方式有助于提供更均匀的混合。在水蒸气通过双区块喷淋头1053中的分隔区块经由小通孔1055进入基板处理区的同时,含氟前体可流经双区块喷淋头1053中的通孔1056。分隔区块向基板处理区打开但不向远端等离子体区打开。
当经由喷淋头1053中的通孔1056抵达的含氟等离子体流出物与源自中空容积1051经由小通孔1055抵达的湿气结合时,范例经图案化基板可在基板处理区1070内由基座(未绘示)支撑。在本发明的实施例中,尽管可装配基板处理区1070以支援等离子体供诸如硬化等其它工艺所用,但在蚀刻经图案化基板期间无等离子体存在。
可在喷淋头1053上方的腔室等离子体区1020中,或在喷淋头1053下方的基板处理区1070中点燃等离子体。等离子体存在腔室等离子体区1020中,以自流入的含氟前体制造自由基-氟前体。典型处在无线射频(RF)范围中的AC电压可被施加在处理腔室的导电顶部分1021与喷淋头1053之间,以于沉积期间在腔室等离子体区1020中点燃等离子体。RF功率供应器可产生13.56MHz的高RF频率,但也可单独或结合13.56MHz频率产生其它频率。
当基板处理区1070中的底部等离子体启动以清洁形成基板处理区1070边界的内表面时,可使顶部等离子体处在低功率或无功率下。可通过在喷淋头1053与基座之间或在喷淋头1053与腔室的底部之间施加AC电压,来点燃基板处理区1070中的等离子体。可在等离子体存在的同时,引导清洁气体进入基板处理区1070。
基座可具有热交换通道,热交换流体流过热交换通道以控制基板的温度。此配置方式容许冷却或加热基板温度,以维持相对低的温度(从室温直到约120℃)。热交换流体可包含乙二醇与水。也可使用埋入式单回圈埋入式加热器元件,以电阻式加热基座的晶圆支撑浅盘(较佳为铝、陶瓷或前述材料的组合)来达到相对高的温度(自约120℃达约1100℃),该加热器元件经配置以造成平行的同心圆形式的两个完整回转。加热器元件的外部分可绕于邻接支撑浅盘的周边处,同时加热器元件的内部分绕于具有较小半径的同心圆的路径上。连接至加热器元件的配线穿过基座的主干。
可通过系统控制器控制基板处理系统。在示范实施例中,系统控制器包括硬盘驱动器、软盘驱动器及处理器。处理器含有单板电脑(SBC)、模拟和数字输入/输出板、界面板及步进马达控制板。CVD系统的各种部件符合Versa ModularEuropean(VME)标准,该标准定义板、卡片机架(card cage)以及连接器尺寸及类型。VME标准亦将总线结构定义为具有16位数据总线及24位地址总线。
系统控制器控制蚀刻腔室的所有活动。系统控制器执行系统控制软件,系统控制软件为储存在计算机可读介质中的计算机程序。较佳地,所述介质为硬盘驱动器,但所述介质也可为其它类型的存储器。计算机程序包括指令集,该等指令集指示时间、气体混合、腔室压力、腔室温度、RF功率电平、基座位置及其它特定工艺的参数。储存在其它存储器器件(包括如软盘或其它合适的驱动器)上的其他计算机程序也可被用来命令系统控制器。
可使用由系统控制器执行的计算机程序产品来实施用以差别地蚀刻基板上的低密度氧化硅及高密度氧化硅的工艺,或用以清洁腔室的工艺。计算机程序代码可以习知计算机可读的编程语言撰写,例如汇编语言、C、C++、Pascal、Fortran或其它编程语言。使用习知的文本编辑器将适合的程序代码输入单一文件或多个文件,并且储存于计算机可使用介质(如计算机的存储器系统)或由计算机可使用介质实施。倘若输入的代码文本是高级语言,则编译该代码,而所得的编译程序代码随后与预先编译的Microsoft库例程的目标代码连结。为了执行该连结、编译的目标代码,系统使用者调用该目标代码,使计算机系统载入存储器中的代码。CPU随后读取并且执行该代码,以进行程序中标识的任务。
使用者与控制器之间的界面可为透过平板接触感应监视器。在较佳实施例中可使用两个监视器,一个监视器安装在清洁室壁以供操作者使用,且另一个监视器在壁后以供维修技术人员使用。两个监视器可同步显示相同信息,在这样的实例中,一次仅有一个监视器可接受输入。为了选择特殊的屏幕或功能,操作者触碰接触感应监视器上的指定区域。被接触的区域改变该区域的突出显示色彩,或显示新的菜单或屏幕,确认操作者与接触感应监视器之间的通信。诸如键盘、鼠标等其它装置或其它指向或通信装置可被用来取代或附加于接触感应监视器,以容许使用者与系统控制器通信。
腔室等离子体区或RPS中的某区域可称作远端等离子体区。在实施例中,自由基前体(如,自由基-氟前体)在远端等离子体区中产生并行进至基板处理区内与水蒸气结合。在实施例中,水蒸气仅由自由基-氟前体(又称作等离子体流出物)所激发。在实施例中,基本上可仅将等离子体功率施加至腔室等离子体区,以确保自由基-氟前体对水蒸气提供主导性激发。
在利用腔室等离子体区的实施例中,被激发的等离子体流出物是在与沉积区分隔的基板处理区的区段中产生。所述沉积区(在本文亦称作基板处理区)是等离子体流出物与水蒸气混合并反应以蚀刻经图案化基板(如,半导体晶圆)之处。被激发的等离子体流出物也可伴随着惰性气体(在范例实例中,惰性气体为氩气)。在若干实施例中,水蒸气在进入基板等离子体区之前不通过等离子体。在经图案化基板的蚀刻操作期间,基板处理区可被描述为“无等离子体(plasma-free)”。“无等离子体”不必然意味着该区缺乏等离子体。在等离子体区内产生的离子化物种及自由电子会行进穿过隔间(喷淋头)中的孔洞(口孔),但水蒸气基本上不被施加至等离子体区的等离子体功率所激发。腔室等离子体区中等离子体的边界是难以界定的,且可能透过喷淋头中的口孔侵入基板处理区上。在电感耦合等离子体的实例中,可直接在基板处理区内执行少量的离子化。再者,可在基板处理区中生成低强度的等离子体,而不至于消灭形成的膜的期望特征。在被激发的等离子体流出物生成期间造成等离子体的强度离子密度远低于腔室等离子体区(就此而言,或者是远低于远端等离子体区)的所有原因不悖离本文所用的「无等离子体」的范畴。
在不同的实施例中,三氟化氮(或另一种含氟前体)可在介于约25sccm与约200sccm之间、介于约50sccm与约150sccm之间,或介于约75sccm与约125sccm之间的流率下流入腔室等离子体区1020。在不同的实施例中,水蒸气可在介于约25sccm与约200sccm之间、介于约50sccm与约150sccm之间,或介于约75sccm与约125sccm之间的流率下流入基板处理区1070。
水蒸气及含氟前体进入腔室的结合流率可占整体气体混合物的约0.05体积%至约20体积%;剩余物为载气。在若干实施例中,含氟前体被流入远端等离子体区,但等离子体流出物具有相同的体积流量比(volumetric flow ratio)。在含氟前体的实例中,在含氟气体进入远端等离子体区之前,可先启始净化气体或载气进入远端等离子体区,以稳定远端等离子体区内的压力。
等离子体功率可为各种频率或为多重频率的组合。在示范处理系统中,可通过传递至相对于喷淋头1053的盖体1021的RF功率来提供等离子体。在不同的实施例中,RF功率可介于约10瓦与约2000瓦之间、介于约100瓦与约2000瓦之间、介于约200瓦与约1500瓦之间,或介于约500瓦与约1000瓦之间。在不同的实施例中,示范处理系统中施加的RF频率可为低于200kHz的低RF频率、介于约10MHz与约15MHz之间的高RF频率,或大于或等于约1GHz的微波频率。等离子体功率可以电容耦合(capacitively-coupled;CCP)方式或电感耦合(inductively-coupled;ICP)方式进入远端等离子体区。
在水蒸气、任何载气及等离子体流出物流入基板处理区1070期间,基板处理区1070可被维持在各种压力下。在不同的实施例中,压力可被维持在介于约500mTorr与约30Torr之间、介于约1Torr与约20Torr之间,或介于约5Torr与约15Torr之间。
在一或多个实施例中,基板处理腔室1001可整合至各种多处理平台,包括可购自位于美国加州圣大克劳拉市的Applied Materials,Inc.的ProducerTM GT、CenturaTM AP及EnduraTM平台。此类处理平台能够进行数种处理操作而不破真空。可实施本发明实施例的处理腔室可包括介电蚀刻腔室或各种化学气相沉积腔室,还有其它类型的腔室。
沉积系统的实施例可并入较大型的生产集成电路晶片的制造系统。图3显示根据本文揭露的实施例的一个此类沉积、烘烤及硬化腔室的系统1101。于此图中,一对前开式晶圆盒(front opening unified pod,FOUP)1102供应基板(如,300mm直径的晶圆),基板由机器人手臂1104承接,并在置入基板处理腔室1108a至1108f之一者以前先置入低压保持区1106内。可使用第二机器人手臂1110自保持区1106传输基板晶圆至基板处理腔室1108a至1108f并往回传输。各基板处理腔室1108a至1108f,可被装备成进行多个基板处理操作,该等操作包括本文所述的干式蚀刻工艺,还可包括循环层沉积(CLD)、原子层沉积(ALD)、化学气相沉积(CVD)、物理气相沉积(PVD)、蚀刻、预清洁、脱气、定向及其它基板工艺等额外操作。
基板处理腔室1108a至1108f可包括一或多个系统部件,以在基板晶圆上沉积、退火处理、硬化及/或蚀刻可流动介电膜。在一个配置中,两对处理腔室(如,1108c至1108d及1108e至1108f)可用于沉积介电材料于基板上,而第三对处理腔室(如,1108a至1108b)可用于蚀刻沉积的介电质。在另一个配置中,所有三对腔室(如,1108a至1108f)可经配置以在基板上蚀刻介电膜。任一或多个所述的工艺可在与不同实施例中所示的制造系统分开的腔室上执行。
系统控制器1157可用于控制马达、阀、流量控制器、电源供应器以及其它执行本文所述工艺配方所需要的功能。气体操纵系统1155也可由系统控制器1157控制,以将气体引导至基板处理腔室1108a至1108f的其中一个或全部。系统控制器1157可仰赖来自光学感测器的反馈,以确定并且调整气体操纵系统1155及/或基板处理腔室1108a至1108f中的可移动的机械组件的位置。机械组件可包括机器人、节流阀及基座,前述部件在系统控制器1157的控制下通过马达移动。
在示范实施例中,系统控制器1157包括硬盘驱动器(存储器)、USB端口、软盘驱动器及处理器。系统控制器1157包括模拟和数字输入/输出板、界面板及步进马达控制板。含有处理腔室400的多腔室处理系统1101的各个部件受控于系统控制器1157。系统控制器执行系统控制软件,系统控制软件以计算机程序的形式储存在诸如硬盘、软盘或快闪存储器优盘等计算机可读介质上。也可使用其它形式的存储器。计算机程序包括指令集,该等指令集指示时间、气体混合、腔室压力、腔室温度、RF功率电平、基座位置及其它特定工艺的参数。
可使用由控制器执行的计算机程序产品来实施用于在基板上沉积或其它方式处理膜的工艺,或者实施用于清洁腔室的工艺。计算机程序代码可以习知计算机可读的编程语言撰写,例如68000汇编语言、C、C++、Pascal、Fortran或其它编程语言。使用习知的文本编辑器将适合的程序代码输入单一文件或多重文件,并且储存于计算机可使用介质(如计算机的存储器系统)或由计算机可使用介质实施。倘若输入的代码文字是高级语言,则编译代码,而所得的编译程序代码随后与预先编译的Microsoft库例程的目标代码连结。为了执行该连结、编译的目标代码,系统使用者援用该目标代码,使计算机系统载入存储器中的代码。CPU随后读取并且执行该代码,以进行程序中辨识的任务。
使用者与控制器之间的界面可为透过接触感应监视器,亦可包括鼠标及键盘。在使用两个监视器的一个实施例中,一个监视器安装在清洁室壁以供操作者使用,且另一个监视器在壁后以供维修技术人员使用。两个监视器可同步显示相同信息,在这样的实例中,一次仅有一个监视器被配置成接受输入。为了选择特殊的屏幕或功能,操作者以手指或鼠标接触显示屏幕上的指定的区域。被接触的区域改变该区域的强调色彩,或显示新的菜单或屏幕,确认操作者的选择。
本文使用的“基板(substrate)”可为在其上有或无层形成的支撑基板。经图案化基板可为有各种掺杂浓度及掺杂轮廓的绝缘体或半导体,可例如为用在集成电路制造上的类型的半导体基板。经图案化基板的暴露的“氧化硅(silicon oxide)”主要是SiO2,但也可包括少量浓度的其它基本组成分,如氮、氢、碳等等。在某些实施例中,使用本文揭示的方法所蚀刻的氧化硅膜基本上由硅及氧组成。术语“前体(precursor)”指的是参与反应从表面移除材料或沉积材料在表面上的任何处理气体。“等离子体流出物(plasma effluent)”描述自腔室等离子体区离开并且进入基板处理区的气体。等离子体流出物处于“激发态(excited state)”,其中至少有一些气体分子处于振动型式的激发、解离及/或离子化的状态。“自由基前体(radical precursor)”是用于描述参与反应从表面移除材料或沉积材料在表面上的等离子体流出物(离开等离子体、处于激发态的气体)。“自由基氟(radical-fluorine)前体”为含有氟的自由基前体,但也可含有其它基本组成分。“惰性气体(inert gas)”一词是指在蚀刻或被并入膜中时不形成化学键结的任何气体。范例惰性气体包括稀有气体,但可包括其他气体,只要当(一般而言)在膜中补捉到痕量的该气体时不形成化学键结即可。
术语“间隙(gap)”及“沟槽(trench)”被使用于本文各处,且并非暗示蚀刻的几何形貌具有高水平纵横比。自表面的上方观看,沟槽可呈现圆形、卵形、多边形、矩形或各种其他形状。沟槽的形状可如材料岛(如,实质上为柱状的TiN柱)的壕沟。术语“介层孔(via)”是指低纵横比沟槽(由上方观之),介层孔可或可不被金属填充而形成垂直的电连接。如本文所用,共形蚀刻工艺指的是以与表面相同的形状大体上均匀地移除表面上的材料,即蚀刻过的层的表面与蚀刻前的表面大体上平行。本领域普通技术人员将了解蚀刻过的界面可能不会100%共形,因此“大体上(generally)”的用语容许可接受的容忍度。
在已揭示若干实施例之后,本领域技术人员将认识到,在不偏离所揭示的实施例的精神的情况下可使用各种修改、替代构造及等效物。另外,为了避免不必要地混淆本发明,未描述若干已熟知的工艺及元件。因此,上文描述不应视为限制本发明的范畴。
在提供一范围的值的情况下,除非本文另有明确指定,应理解亦特定地揭示彼范围的上限与下限之间的每一中间值,精确度为至下限单位的十分位。将涵盖在陈述范围中的任一陈述值或中间值与在彼陈述范围中的任一其他陈述值或中间值之间的每一较小范围。此等较小范围的上限及下限可独立地包括于该范围中或排除于该范围之外,且在界限中任一者、没有任一界限或两界限皆包括于该等较小范围中的每一范围亦涵盖于本发明内,所述每一范围受所陈述范围中任何特定排除的界限管辖。在所陈述范围包括该等限制中一者或两者的情况下,亦包括排除彼等包括的限制中一者或两者的范围。
如本文及随附权利要求书中所使用,除非本文另有明确指定,否则单数形式“一(a)”、“一(an)”及“该(the)”包括数个指示物。因此,例如,参照“一工艺”包括数个该等工艺,且参照“该介电材料”包括参照一或多种介电材料及本领域技术人员熟知的该一或多种介电材料的等效物,等等。
又,当在本案说明书中及以上权利要求书中使用词汇“包含(comprise)”、“包含(comprising)”、“包括(include)”、“包括(including)”及“包括(includes)”时,意欲指定陈述的特征、整数、组件或步骤的存在,但该等词汇不排除一或多个其他特征、整数、组件、步骤、动作或群组的存在或添加。
Claims (17)
1.一种于基板处理腔室的基板处理区中蚀刻经图案化基板的方法,其中该经图案化基板具有多个暴露的氧化硅区,该方法包含下列步骤:
将含氟前体流入与该基板处理区流通地耦接的远端等离子体区,同时于该远端等离子体区中形成远端等离子体,以产生多个等离子体流出物;
将水蒸气流入该基板处理区而不先将该水蒸气通过该远端等离子体区;以及
通过将该等等离子体流出物流入该基板处理区,以蚀刻该等暴露的氧化硅区,其中该等暴露的氧化硅区包含具有第一密度的第一氧化硅区及具有第二密度的第二氧化硅区,且其中该第一密度小于该第二密度,且以第一蚀刻速率蚀刻该第一氧化硅区,并以第二蚀刻速率蚀刻该第二氧化硅区,该第二蚀刻速率低于该第一蚀刻速率。
2.如权利要求1所述的方法,其特征在于,使用二氯硅烷作为前体以沉积该第一氧化硅区。
3.如权利要求1所述的方法,其特征在于,使用等离子体增强化学气相沉积以沉积该第一氧化硅区。
4.如权利要求1所述的方法,其特征在于,使用高密度等离子体化学气相沉积以沉积该第二氧化硅区。
5.如权利要求1所述的方法,其特征在于,该第一蚀刻速率超过该第二蚀刻速率约8或更多倍。
6.如权利要求1所述的方法,其特征在于,该第一蚀刻速率超过该第二蚀刻速率约15或更多倍。
7.如权利要求1所述的方法,其特征在于,该第一蚀刻速率超过该第二蚀刻速率约25或更多倍。
8.如权利要求1所述的方法,其特征在于,该基板处理区为无等离子体。
9.如权利要求1所述的方法,其特征在于,该水蒸气不由任何形成在该基板处理区外的远端等离子体激发。
10.如权利要求1所述的方法,其特征在于,该含氟前体包含选自由原子氟、二原子氟、三氟化氮、四氟化碳、氟化氢及二氟化氙所组成的群组中的前体。
11.如权利要求1所述的方法,其特征在于,该含氟前体及该等等离子体流出物为基本上缺乏氢。
12.如权利要求1所述的方法,其特征在于,该含氟前体流经双区块喷淋头中的多个通孔,且该水蒸气通过该双区块喷淋头中的多个分隔区块,其中该等分隔区块通往该基板处理区但不通往该远端等离子体区。
13.如权利要求1所述的方法,其特征在于,在该蚀刻操作期间,该经图案化基板的温度为大于或等于约0℃且小于或等于约100℃。
14.如权利要求1所述的方法,其特征在于,在该蚀刻操作期间,该经图案化基板的温度为大于或等于约5℃且小于或等于约40℃。
15.如权利要求1所述的方法,其特征在于,在该蚀刻操作期间,该基板处理区内的压力为低于或等于约50Torr且高于或等于约0.1Torr。
16.如权利要求1所述的方法,其特征在于,于该远端等离子体区中形成等离子体以产生多个等离子体流出物的步骤包含下列步骤:施加介于约10瓦与约2000瓦之间的RF功率至该远端等离子体区。
17.如权利要求1所述的方法,其特征在于,该远端等离子体区中的等离子体为电容耦合等离子体。
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Also Published As
Publication number | Publication date |
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US20150249018A1 (en) | 2015-09-03 |
WO2014042843A1 (en) | 2014-03-20 |
JP6298059B2 (ja) | 2018-03-20 |
CN104620363B (zh) | 2018-06-15 |
TWI597775B (zh) | 2017-09-01 |
US9034770B2 (en) | 2015-05-19 |
KR102114000B1 (ko) | 2020-05-22 |
JP2015528647A (ja) | 2015-09-28 |
KR20150056607A (ko) | 2015-05-26 |
US9887096B2 (en) | 2018-02-06 |
US20140080309A1 (en) | 2014-03-20 |
TW201426855A (zh) | 2014-07-01 |
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