CN104335270B - 具有线路传播延迟补偿的显示系统 - Google Patents
具有线路传播延迟补偿的显示系统 Download PDFInfo
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Abstract
一种表征显示系统中的传播延迟效应的方法,其中该方法包括:在足以使电流安稳在稳定值并从而避免信号线或监视线的传播延迟效应的持续时间,测量通过驱动晶体管的第一电流;在针对显示器的信号线或监视线的时序预算而提供的持续时间,测量通过驱动晶体管的第二电流;以及比较第一电流和第二电流以提取对于信号线或监视线的传播延迟效应。
Description
技术领域
本公开一般涉及用于在显示器中使用的电路和对显示器(特别是诸如有源矩阵有机发光二极管显示器的显示器)进行驱动、校准和编程的方法。
背景技术
显示器可以由发光器件的阵列创建,每个发光器件由单个电路(即,像素电路)控制,该电路具有用于选择性地控制电路被利用显示信息编程并且根据显示信息发射光的晶体管。制造在基板上的薄膜晶体管(“TFT”)可以并入到这样的显示器中。随着显示器老化,TFT趋向于随着时间并在显示面板上表现出不均匀的行为。补偿技术可以应用于这样的显示器,以实现显示器上的图像均匀性并且考虑(account for)显示器中随着显示器老化的劣化。
用于向显示器提供补偿以考虑随着时间并在显示面板上的变化的一些方案利用监视系统来测量与像素电路的老化(即,劣化)相关联的时间相关参数。然后可以使用所测量的信息来通知像素电路的后续编程,以便确保通过对该编程进行的调整来考虑任何测量到的劣化。这样的被监视的像素电路可能需要使用另外的晶体管和/或线路来选择性地将像素电路耦合到监视系统并且提供读出信息。另外的晶体管和/或线路的并入可能不期望地减小像素间距(即,“像素密度”)。
发明内容
本公开的方面提供适合于在被配置对于像素老化提供补偿的被监视的显示器中使用的像素电路。本文中所公开的像素电路配置允许监视器经由监视开关晶体管访问像素电路的节点,使得监视器可以测量指示像素电路的劣化量的电流和/或电压。本公开的方面还提供允许与开关晶体管的电阻无关地对像素进行编程的像素电路配置。本文中所公开的像素电路配置包括用于使像素电路内的存储电容器与驱动晶体管隔离以使得存储电容器上的电荷不被编程操作期间通过驱动晶体管的电流影响的晶体管。
鉴于参照其简要说明被接下来提供的附图而进行的各实施例和/或方面的详细描述,本公开的前面的和另外的方面和实施例对于本领域的普通技术人员将是清楚的。
附图说明
当阅读以下详细描述并且参照附图时,本发明的前面的和其它的优点将变得清楚。
图1示出根据本公开的用于监视像素中的劣化并且因此提供补偿的系统的示例性配置。
图2是显示系统中的数据线和监视线的RC模型的电路图。
图3A是用于对像素进行编程的电压对时间的说明性绘图,该绘图示出对于图2中的第N行中的像素的安稳效应。
图3B是用于对像素进行编程的电压对时间的说明性绘图,该绘图示出对于图2中的第i行中的像素的安稳效应。
图3C是用于对像素进行编程的电压对时间的说明性绘图,该绘图示出对于图2中的第1行中的像素的安稳效应。
图4A是用于从利用被安稳效应影响的操作编程持续时间进行编程的像素读取电流的电流对时间的说明性绘图。
图4B是用于从利用不被安稳效应影响的延长的编程持续时间进行编程的像素读取电流的电流对时间的说明性绘图。
图5示出由于编程和读出期间的线路传播并且还由于来自像素劣化的误差而导致的误差的累积。
图6示出利用启动校准数据来表征监视线效应的操作序列。
图7示出利用实时测量来提供像素老化的校准的操作序列。
图8示出显示器的操作寿命的早期的编程路径中的初始误差的隔离。
图9提供基本上避免对于显示器中的每行的安稳效应所需的读出时间持续时间的示例性曲线图。
图10是用于提取监视线上的传播延迟效应的实施例的流程图。
图11是用于提取信号线上的传播延迟效应的实施例的流程图。
虽然本公开容易有各种修改和替代形式,但是在附图中以示例的方式示出了具体实施例,并且将在本文中对这些实施例进行详细描述。然而,应当理解,本公开并非意图限于所公开的特定形式。相反,本公开是要覆盖落在由所附权利要求书限定的本发明的精神和范围内的所有修改、等同和替代。
具体实施方式
图1是示例性显示系统50的示图。显示系统50包括地址驱动器8、数据驱动器4、控制器2、内存储存器6和显示面板20。显示面板20包括以行和列布置的像素10的阵列。每个像素10可单个地编程为发射具有可单个地编程的亮度值的光。控制器2接收指示将显示在显示面板20上的信息的数字数据。控制器2将信号32发送到数据驱动器4,并且将调度信号34发送到地址驱动器8,以驱动显示面板20中的像素10显示所指示的信息。与显示面板20相关联的多个像素10因此构成适于根据控制器2接收的输入数字数据动态地显示信息的显示阵列(“显示屏幕”)。显示屏幕可以显示例如来自控制器2接收的视频数据流的视频信息。供给电压14可以提供恒定的电源电压,或者可以是通过来自控制器2的信号控制的可调整电压供给。显示系统50还可以并入来自电流源或电流宿(未示出)的特征以向显示面板20中的像素10提供偏置电流,从而减小对于像素10的编程时间。
为了说明性的目的,图1中的显示系统50被示为在显示面板20中仅具有四个像素10。理解的是,显示系统50可以利用包括类似的像素(诸如像素10)的阵列的显示屏幕来实现,并且显示屏幕不限于特定行数和列数的像素。例如,显示系统50可以利用在移动设备、基于监视器的设备和/或投影设备的显示器中通常可用的具有若干行和列的像素的显示屏幕来实现。
像素10由驱动电路(“像素电路”)操作,该驱动电路一般包括驱动晶体管202(在图2中示出)和发光器件204。以下,像素10可以指的是像素电路。发光器件204可以可选地是有机发光二极管,但是本公开的实现适用于具有其它电致发光器件(包括电流驱动的发光器件)的像素电路。像素10中的驱动晶体管202可以可选地是n型或p型非晶硅薄膜晶体管,但是本公开的实现不限于具有特定极性的晶体管的像素电路或者不仅限于具有薄膜晶体管的像素电路。像素电路10还可以包括存储电容器200(在图2中示出),其用于存储编程信息,并且允许像素电路10在被寻址之后驱动发光器件204。因此,显示面板20可以是有源矩阵显示阵列。
如图1中所示,被示为显示面板20中的左上像素的像素10耦合到选择线24j、供给线26j、数据线22i和监视线28i。在实现中,供给电压14还可以向像素10提供第二供给线。例如,每个像素可以耦合到利用Vdd充电的第一供给线和与Vss耦合的第二供给线,并且像素电路10可以位于第一供给线与第二供给线之间以便于在像素电路的发射阶段期间驱动这两个供给线之间的电流。显示面板20中的左上像素10可以对应于显示面板中的显示面板20的“第j”行和第“i”列中的像素。类似地,显示面板20中的右上像素10代表“第j”行和“第m”列;左下像素10代表“第n”行和“第i”列;右下像素10代表“第n”行和“第i”列。每个像素10耦合到适合的选择线(例如,选择线24j和24n)、供给线(例如,供给线26j和26n)、数据线(例如,数据线22i和22m)以及监视线(例如,监视线28i和28m)。注意,本公开的方面适用于具有额外的连接(诸如与额外的选择线的连接)的像素以及适用于具有较少的连接的像素(诸如没有与监视线连接的像素)。
参照显示面板20中所示的左上像素10,选择线24j由地址驱动器8提供,并且可以用于使得例如能够通过激活开关或晶体管以允许数据线22i对像素10进行编程来实现像素10的编程操作。数据线22i将编程信息从数据驱动器4传送到像素10。例如,数据线22i可以用于将编程电压或编程电流施加到像素10,以便对像素10进行编程以发射期望的量的亮度。数据(或源)驱动器4经由数据线22i供给的编程电压(或编程电流)是适合于使像素10根据控制器2接收的数字数据发射具有期望的量的亮度的光的电压(或电流)。编程电压(或编程电流)可以在像素10的编程操作期间被施加到像素10,以便对像素10内的存储器件200(诸如存储电容器(图2))充电,从而使得像素10能够在编程操作之后的发射操作期间发射具有期望的量的亮度的光。例如,像素10中的存储器件200可以在编程操作期间被充电以在发射操作期间向驱动晶体管202的栅极或源极端子中的一个或多个施加电压,从而使驱动晶体管202根据存储在存储器件200上的电压传送通过发光器件204的驱动电流。
一般地,在像素10中,在像素10的发射操作期间由驱动晶体管202传送通过发光器件204的驱动电流是由第一供给线26j供给并且排放(drain)到第二供给线(未示出)的电流。第一供给线22j和第二供给线耦合到电压供给14。第一供给线26j可以提供正的供给电压(例如,在电路设计中通常被称为“Vdd”的电压),而第二供给线可以提供负的供给电压(例如,在电路设计中通常被称为“Vss”的电压)。在一些实施例中,供给线中的一个或另一个(例如,供给线26j)固定在接地电压或另一参考电压。
显示系统50还包括读出或监视系统12。再次参照显示面板20中的左上像素10,监视线28i将像素10连接到监视系统12。监视系统12可以与数据驱动器4集成,或者可以是单独的独立系统。特别地,监视系统12可以可选地通过在像素10的监视操作期间监视数据线22i的电流和/或电压来实现,并且监视线28i可以整个地略去。另外,显示系统50可以在没有监视系统12或监视线28i的情况下实现。监视线28i允许监视系统12测量与像素10相关联的电流或电压,并从而提取指示像素10的劣化的信息。例如,监视系统12可以经由监视线28i提取流过像素10内的驱动晶体管202的电流,并从而基于所测量的电流和基于在测量期间施加到驱动晶体管202的电压来确定驱动晶体管202的阈值电压或其漂移。一般地然后,测量通过驱动晶体管202的电流允许提取驱动晶体管202的电流-电压特性。例如,通过测量通过驱动晶体管202的电流(IDS),可以根据关系IDS=β(VGS–Vth)2来确定阈值电压Vth和/或参数β,其中,VGS是施加到驱动晶体管202的栅源极电压。
监视系统12可以另外地或可替代地提取发光器件204的操作电压(例如,在发光器件进行操作以发射光时发光器件上的电压降)。监视系统12然后可以将信号32传达到控制器2和/或存储器6以允许显示系统50将所提取的劣化信息存储在存储器6中。在像素10的后续编程和/或发射操作期间,劣化信息由控制器2经由存储器信号36从存储器6检索,并且控制器2然后通过将编程值增大或减小补偿值来在像素10的后续编程和/或发射操作中补偿所提取的劣化信息。例如,一旦劣化信息被提取,在像素10的随后的编程操作期间,就可以适当地调整经由数据线22i传送到像素10的编程信息,使得像素10发射具有与像素10的劣化无关的期望量的亮度的光。在示例中,可以通过适当地增大施加到像素10的编程电压来补偿像素10内的驱动晶体管202的阈值电压的增大。
此外,如本文中所讨论的,监视系统12可以另外地或可替代地提取指示由于数据线(例如,数据线22i、22m)中的传播延迟而导致的编程和/或监视读出中的电压偏移的信息(诸如使用图2中所示的读出电路210或监视系统12),所述数据线中的传播延迟源自编程和/或监视间隔期间线电阻和线电容的寄生效应。
根据本文中所公开的一些实施例,有源矩阵有机发光(AMOLED)显示器的最佳性能被OLED和背板器件(非晶、多晶硅或金属氧化物TFT)两者的不均匀性、老化和迟滞不利地影响。这些不利影响将时不变因素和时变因素两者引入了显示器的操作,其可以通过表征各种因素并且在编程处理期间提供调整来考虑。在需要全高清(FHD)和超高清(UHD)规范连同高刷新率(例如,120Hz和240Hz)的大面积应用中,操作AMOLED显示器的挑战甚至更大。例如,减小的编程持续时间增强了动态效应对编程和显示操作的影响。
另外,AMOLED像素通过其被访问和编程的非常长的金属(或以其它方式导电的)线(例如,图1中的线22i、28i、22m、28m)的有限电导,连同耦合到该线的分布式寄生电容,引入了对于驱动信号的阶跃函数可以多快地在面板上传播并且安稳(settle)到它们的稳定状态的基本限制。一般地,这样的线上的电压根据与1–exp(-t/RC)成比例的时间相关函数而改变,其中,R是电压改变的源与感兴趣点之间的总有效电阻,C是电压改变的源与感兴趣点之间的总有效电容。如果没有提供适当的补偿技术,则该基本限制阻止大面积面板以较高速率刷新。另一方面,虽然对于工厂校准可以使用较长的刷新时间来消除不完美安稳的效应,但是校准时间将显著地增加,导致更长的Takt时间或周期时间(即,低效的生产)。
本文中公开用于表征并且消除(或者至少抑制)AMOLED面板的数据线22和监视线28上的传播延迟效应的方法。可以利用类似的技术来取消控制一行像素的写和读切换的选择线(例如,图1中的线24j、24n)的不完全安稳效应。
图2是显示系统中的数据线和监视线的RC模型的电路图。为了简单,示出了显示面板的单个列。数据线(被标记为“Data Line”)可以等同于图1中的数据线22i、22m中的任何一个。监视线(被标记为“Monitor Line”)可以等同于图1中的监视线28i、28m中的任何一个。这里,面板具有整数N行,其中,N在FHD面板中为1080,或者在UHD面板中为2160,或者为与图1的显示面板20中的行数对应的另一个数。数据线和监视线利用N个级联的RC元件建模。如图2中所示,RC网络的每个节点连接到像素电路。在典型的设计中,RP和CP的集总总和(lumped sum)分别接近于10kΩ和500pF。用于这样的面板的10位精度(例如,诸如实现0.1%误差)所需的安稳时间可以接近于15μS,而以120Hz运行的FHD和UHD面板中的行时间(例如,对于在连续帧之间对单个行编程可用的时间间隔)分别大致为8μS和4μS。
如图2中所示,对于每行所需的安稳时间与其离数据或源驱动器4的物理距离成比例。换句话讲,像素10的物理位置离源驱动器4越远,驱动信号在像素100的相应行上传播和安稳所花费的时间越长。因此,行N具有最大的安稳时间常数,而行1(其在物理上最靠近源驱动器4)具有最快的安稳时间常数。该效应在图3A-3C中所绘制的示例中示出,接下来讨论这些示例。在对特定行的编程期间,该行中的写晶体管208(例如,图2中的其栅极连接到“WR”线的晶体管208)导通,以便将像素电路10的相应电容器200连接到数据线22。
图3A是用于对像素10进行编程的电压对时间的说明性绘图300,该绘图示出了对于图2中的第N行中的像素的安稳效应。图3B是用于对像素10进行编程的电压对时间的说明性绘图302,该绘图示出了对于图2中的第i行中的像素的安稳效应。图3C是用于对像素10进行编程的电压对时间的说明性绘图304,该绘图示出了对于图2中的第1行中的像素的安稳效应。在图3A-3C中的每一个中,编程电压VP施加在数据线22上,同时相应的像素电路10被选择用于编程(例如,通过激活用于第N、第i和第1行电路的相应的“WR”线),并且根据时间相关参数1–exp(-t/RC)而被充电,其中,RC是每个像素电路10处的总有效电阻和电容的乘积。由于数据线22上的不同点处的总有效电阻和电容的差异,第1行充电最快,而第N行充电最慢。因此,在编程持续时间(“tprog”)的结束,第N像素达到值VP–ΔVDATA(N),而第i行达到值VP–ΔVDATA(i),并且第1行达到值VP–ΔVDATA(1)。如图3A-3C中所示,ΔVDATA(1)一般是比ΔVDATA(N)小的值。图3A-3C还示出了安稳时间tsettle,其是实现处于或接近编程电压的存储电容器200上的电压的时间。
然而,每行的相应的时间常数(例如,RC值)不是行号的线性函数(行号是离源驱动器4的行距离的线性表示)。考虑到这个现象,随机地影响RP和CP的制造处理的变化,连同驱动TFT 202和OLED(例如,发光器件204)的不均匀性,使得实际上不可能预测数据线22和监视线28的准确行为。
因此,数据线22上的传播延迟对像素电路10中的存储器件200被编程的期望电压电平引入误差。然而,在监视线28上,对由读出电路210(例如,诸如在图1的监视系统12中)检测的OLED 204或TFT 202的电流电平引入误差。注意,读出电路210可以在面板50的源驱动器4侧的相同端或相对端上。
图4A是用于使用读出电路210从利用被安稳效应影响的操作编程持续时间(时序预算(timing budget))(例如,持续时间tprog)编程的像素10读取电流的电流对时间的说明性绘图400。IMON的值是经由监视线28测量(诸如经由电流比较器提取,所述电流比较器例如基于被监视电流与参考电流之间的比较来提取被监视电流)的电流。此外,在一些实施例中,监视线28被利用以测量来自像素电路10的电压,诸如OLED 204操作电压,在这种情况下,测量值可以是VMON,但是图4A和4B的功能形式扩展到电压而不是电流被测量的情形。图4A因此示出了,当像素电路10在具有持续时间tprog的间隔期间被编程并且在具有持续时间tmeas的间隔期间被测量时经由监视系统12提取的信息偏离理想的监视值。理想的监视值是在不存在线路寄生并且像素电路10不具有不均匀性、劣化效应、迟滞等时预测的值。偏移量在图4A中通过ΔIDATA(i)、ΔIpixel(i)和ΔIMON(i)指示。由于结合图3A-3C讨论的数据线22的寄生效应,ΔIDATA(i)的值对应于ΔVDATA(i)的值。ΔIMON(i)的值是由于有限的线路电容C和电阻R而导致的被监视电流的相应偏移,其使监视线28上的电流电平在安稳在稳定值之前随时间调整,诸如在持续时间tsettle之后发生。然而,由于增强清晰度显示器的时序预算,tmeas一般小于tsettle,并且因此寄生效应可能影响监视操作以及编程操作。另外,IMON(i)的值被由ΔIpixel(i)指示的第i行中的像素电路的劣化和/或不均匀性(例如,由于阈值电压或移动性变化、温度灵敏性、迟滞、制造效果等而导致)影响。因此,监视线上的传播延迟效应可以通过将时间tmeas之后的IMON(i)的值与时间tsettle之后的IMON(i)的值进行比较并从而确定ΔIMON(i)的值来提取。
图4B是用于从利用足以避免安稳效应的延长编程持续时间(比tmeas长)(诸如图3B中所示的时间tsettle)编程的像素10读取电流的电流对时间的说明性绘图402。在图4B中,在具有持续时间tsettle的间隔期间对像素进行编程,使得基本上从影响被监视电压IMON(i)的因素消除ΔIDATA(i)因素。将在利用持续时间tprog对像素进行编程(如图4A中那样)时IMON(i)的值与在利用持续时间tsettle对像素进行编程时IMON(i)的值进行比较因此允许确定值ΔIDATA(i)。因此,本公开的方面提供在考虑数据线22和/或监视线28中的寄生效应(该寄生效应否则干扰像素性质的测量)的同时提取显示器50中的像素10的不均匀性和/或劣化,诸如通过延长编程时序预算以避免传播延迟效应。
图5示出了由于编程和读出期间的线路传播并且还由于来自像素劣化的误差而导致的误差的累积。图5示出了沿着通过数据线22的编程与通过监视线28的像素10的读出之间的信号路径引入的误差的序列500。源驱动器向数据线22提供期望的信号电平以对像素10进行编程(502)。由于在编程信号路径512期间可用的行时间有限,所以来自数据线22的电压信号在像素端不完全安稳(504)。因此,在感兴趣像素10的存储器件200(CS)上采样的信号电平背离其标称值。由于像素器件202、204的老化和随机处理变化,像素10本身对信号路径514引入了误差(506)。当像素被访问以通过监视线28读出时,行时间内的监视线28的延迟也对所提取的数据引入了误差(508)。因此,图5中所示的误差的累积对应于图4A中所示的时间tmeas处的读出电平(510)。
如果被分配用于读出的时间延续或延长(例如,延续或延长到持续时间tsettle),则可以通过将读出信号电平(例如,从读出电路210提取)与在行时间的持续时间(例如,持续时间tprog)内检测的信号电平进行比较来检测误差的幅度。通过数据线22传播延迟引入的误差可以间接地通过以下方式来检测:延续或延长编程时序预算(例如,延续或延长到持续时间tsettle)并且使用读出电路210来观察读出信号电平中的效应(诸如,例如结合图4B讨论的方案)。
图6示出了利用启动校准数据来表征监视线28效应(602)的操作序列600。为了校准监视线28延迟效应,可以如下提取这样的延迟。利用长得足以避免以上论及的安稳问题的时间(例如,tsettle)来测量列中的不同位置处的几个(但不必是全部)像素10。然后,在所需的时序内测量(校准)这些像素10所汲取的电流。对于每个像素10的这两个值的比较为该行中的像素10提供与监视线28相关联的延迟要素(element)。通过使用所提取的延迟,对于列中的每个像素10计算延迟要素。显示器50中的其它列也可以类似地测量。
所提取的延迟本身显示为测量单元所检测的像素电流的增益。为了校正该效应,可以调节(scale)参考电流,或者可以相应地调节用于像素的所提取的校准值,以考虑增益因素。
在图6中,可以如下提取由监视线28引起的延迟。针对数据线误差和像素不均匀性,源驱动器4放置到数据线22上的编程数据被校准(602)。在像素10的编程期间,数据线22引入误差,例如,图4A中所示的ΔIDATA(604),并且以上所讨论的随机像素不均匀性也贡献误差,例如,图4A中所示的ΔIpixel(606)。当编程完成并且监视线28被激活以从像素电路10读取电流时,监视线28引入误差(例如,图4A中所示的ΔIMON)(608),并且这三种类型的误差(ΔIDATA、ΔIpixel和ΔIMON)的累积存在于来自读出电路210监视的像素电路10的信号中(610)。
图7示出了利用实时测量来提供像素老化的校准的操作序列。来自图6的监视线28误差被用作在对像素10进行编程之前调整老化和迟滞补偿的反馈。在图7中所示的系统700中,表征并且考虑由于数据线22和监视线28两者而导致的延迟。来自监视系统12的输出被补偿并且被传递到控制器2(或者控制器2在接收到该输出之后执行任何补偿),控制器2基于来自监视系统12的输出来动态地确定对用于视频或静态显示数据的传入源的编程电压的任何调整,以考虑所确定的显示器50的时间相关特性。显示数据的迟滞和老化被补偿(702),并且用于像素10的编程数据被校准以考虑数据22线误差和像素不均匀性两者(704)。在编程期间,数据线22引入如上所述的误差(例如,图4A中所示的ΔIDATA),并且像素老化、迟滞和不均匀性(例如,图4A中所示的ΔIpixel)进一步劣化像素电路10的电流测量读取(708)。监视线28引入误差(例如,图4A中所示的ΔIMON)(710),并且读出电路210在图4A中所示的时间tmeas读取具有误差的累积(由ΔIDATA、ΔIpixel和ΔIMON贡献)的所得信号(712)。作为补偿老化和迟滞的反馈,监视系统12补偿监视线28中的延迟(714)。
图8示出了用于隔离显示器的操作寿命早期的编程路径中的初始误差的操作序列800。为了表征数据线22和监视线28的传播延迟,如图8中所示那样隔离编程误差和读出误差。由数据线22的传播延迟所贡献的误差(ΔIDATA)和由面板的初始不均匀性所引入的误差(ΔIpixel)可以集总在一起,并且被认为是一个误差源。
集总的编程误差通过在面板寿命的开始(即,在面板50老化之前)运行初始(工厂)校准来表征。在面板的寿命的这个阶段,时间相关的像素劣化效应是最小的,但像素不均匀性(由于制造处理、面板布局特性等而导致)仍可以被表征为初始的集总编程误差的一部分。
在一些示例中,依赖于显示器的行,分配用于避免安稳效应的时序预算可以被设置为不同值。例如,对于第一行,与第N行相比,参照图3A-3C论及的作为提供基本上不被传播延迟效应影响的编程电压所需的持续时间的tsettle的值可以被设置为较小的持续时间,因为在从源驱动器起较高的行号处,安稳时间常数(例如,有效电阻和有效电容的乘积)一般较大。在另一个示例中,对于第一行,与第N行相比,参照图4A-4B论及的作为读出或测量基本上不被传播延迟效应影响的监视线28上的电流所需的持续时间的tsettle的值可以被设置为较小的持续时间,因为在从最靠近电流监视系统12的行起较高的行号处,安稳时间常数(例如,有效电阻和有效电容的乘积)一般较大。
图9提供了基本上避免对于具有1024个行的显示器中的每行的安稳效应所需的读出时间持续时间的示例性曲线图。在图9的示例性曲线图中,圆圈指示对于显示器中的行的子集的被测量和/或被模拟点(例如,行1,101,201,301,401,501,601,701,801,901和1001中的像素可以被采样以提供整个显示器50上的像素的代表性子集)。一旦避免对于代表性子集中的像素的安稳的时序预算被提取,就可以从用于该子集的值计算(例如,插值)其余行的时序预算。如图2中所示,监视(数据)线22、28的有效电阻(R)和有效电容(C)与从电流监视系统12(源驱动器4)起的行号大致线性相关,因为这些线路的电阻和电容可以大致被建模为一系列串联电阻器和并联电容器。因此,如果像素位于离电流监视系统12较远的行中,则与位于更靠近电流监视系统12的像素相比,可以分配更多的时间以用于读出测量(监视时序预算)来避免安稳效应。
如图9中所示,离电流监视系统12最近的行(例如,行1-100)相对地不被安稳效应影响,并因此需要比较低的读出或监视时序预算来基本上避免安稳效应。在中间行(例如,行200-400)处,所需的监视时序预算对于行号相对敏感,因为由于显示器的行上的有效电阻和电容而导致的安稳效应变得显著,并且相对变化(例如,从200到400)转化为安稳常数中的相对大的比较差异。相比之下,离电流监视系统12最远的行(例如,行900-1000)仍然需要更多的时间(即,较大的监视时序预算)来避免安稳效应,但是对于行号比较不敏感,因为有效电阻(R)和电容(C)由累积的电阻和电容支配,并且增量变化(例如,从800到1000)不转化为安稳常数中的大的比较差异。
因此,一些实施例利用对于每行特定的不同的或变化的时序预算,而不是提供例如将足以避免所有行处的安稳效应的3或4微秒的恒定的或固定的时序预算。通过以逐行为基础或以行的子集为基础提供不同的或可调整的时序预算,用于校准的总处理时间,不论是在初始像素不均匀性和/或信号线的初始工厂校准期间,还是在监视线效应的校准期间,显著地减小,从而提供更高的处理和或操作效率。
因此,一些实施例一般提供通过根据像素10在列中的位置(例如,根据它们的行号和/或离监视器和/或源驱动器4、12的物理距离)将读出或监视时序和/或编程时序预算分配给像素10来减小安稳时间效应。上述方案可以被利用以通过将典型的编程预算期间的测量与每行足以实现安稳的时序预算期间的测量进行比较来提取线路传播延迟安稳特性(并且可以根据像素位置来设置时序)。此外,根据线路安稳特性,可以对于每个像素10提取读出(或监视)时间。
图10是用于提取监视线28上的传播延迟效应的示例性实施例的流程图1000。对像素的代表性子集进行编程,并且经由监视线28监视通过这些像素的电流。在具有足以避免监视线28上的安稳效应的一个持续时间(或多个持续时间)(例如,tsettle)的时间段(固定的或变化的监视时序预算)期间进行测量(1002)。如结合图9概括地描述的那样,该时间段可以具有根据被测量的像素的行位置而设置的持续时间。像素的子集然后利用相同的值被编程,并且通过这些像素的电流经由监视线28监视,但是是利用通常对于反馈测量而给予的持续时间(时序预算),而不是足以避免安稳效应的持续时间(比如,tsettle)(1004)。这两个测量被比较以提取监视线28(列)上的传播延迟效应的影响(1006)。在一些示例中,可以确定这两个测量的比以提供用于在调节未来的电流测量中使用的增益因素。因为传播效应一般根据在每个像素读出位置处监视线28的有效电阻和电容(一般随着与监视器的行间隔增大而线性地累积)以可预测的方式在面板50上变化,所以从代表性子集计算(例如,插值)有效传播延迟。
图11是用于提取信号线(例如,包括数据线22、像素电路10和监视线28的路径或者信号线)上的传播延迟效应的实施例的流程图1100。利用足以避免安稳效应的时序预算或编程间隔对像素的代表性子集进行编程(1102),并且由读出电路210经由监视线28监视通过这些像素的子集的电流(1104)。编程间隔或时序预算可以分别根据编程像素的相应的行位置来设置,使得编程间隔根据像素10离读出电路210的物理距离而变化。在具有足以避免监视线28上的安稳效应的一个持续时间(或多个持续时间)的时间段(固定的或变化的监视时序预算)期间进行测量(1104)。如结合图9概括地描述的那样,该时间段或时序预算可以具有根据被测量的像素的行位置而设置的持续时间。与和所提供的编程值对应的预测的理想电流值的偏移(如果有的话)不是由于信号线或监视线中的传播延迟效应而导致的,并因此指示像素不均匀性效应(例如,诸如由于温度、机械应力等而导致的驱动晶体管不均匀性、阈值电压漂移、移动性变化等)。
像素的子集然后根据相同的编程值被编程,但是是在等于典型的编程时序预算的编程间隔期间(1106)。通过像素的子集的电流然后由读出电路210经由监视线28测量,再次是在足以避免安稳效应的持续时间(固定的或变化的监视时序预算)期间(1108)。这两个测量被比较以提取信号线上的传播延迟效应(1110)。在一些示例中,所提取的像素的子集的传播延迟效应被用于基于每个像素子集的相应的测量来计算每行处的像素的子集的传播延迟效应(1112)。在一些示例中,对于显示器中的每个像素重复测量方案1100以检测显示器50上的不均匀性。在一些示例中,可以在初始工厂校准期间执行信号线22、10、28上的传播延迟效应的提取,并且该信息可以被存储(在存储器6中,例如)以用于在显示器50的未来操作中使用。
在一些示例中,提取像素老化信息的读出操作例如可以在非活动帧时间期间被利用。例如,可以在插入在活动帧之间以增加运动知觉(通过减小模糊)的黑帧(例如,重置帧、消隐帧等)期间、在显示器不被驱动以显示图像时的显示器待机时间期间、在显示器的初始启动和/或关断序列期间等提供读出。
虽然图2中所示的驱动电路被示为具有n型晶体管(其可以是薄膜晶体管并且可以由非晶硅形成),但是图2中所示的驱动电路可以扩展到具有一个或多个p型晶体管并且具有除了薄膜晶体管之外的晶体管的互补电路。
本文中所公开的电路一般指的是彼此连接或耦合的电路组件。在许多情况下,经由直接连接(即,在连接点之间除了导电线路之外没有电路元件)来进行所论及的连接。尽管不总是明确地提及,但是可以通过显示面板的基板上限定的导电通道来进行这样的连接,诸如通过各个连接点之间沉积的导电透明氧化物。氧化铟锡是一种这样的导电透明氧化物。在一些情况下,耦合和/或连接的组件可以经由连接的点之间的电容耦合来耦合,使得这些连接的点通过电容元件串联连接。虽然不是直接连接,但是这样的电容耦合的连接仍然允许连接的点经由电压的变化来彼此影响,该电压的变化是在没有DC偏压的情况下并经由电容耦合效应在连接的另一点处被反映出来的。
此外,在一些情况下,本文中所描述的各种连接和耦合可以利用两个连接的点之间的另一个电路元件通过非直接连接来实现。一般地,设置在连接的点之间的一个或多个电路元件可以是二极管、电阻器、晶体管、开关等。在连接为非直接的情况下,两个连接的点之间的电压和/或电流经由连接电路元件充分相关,要相关以使得这两个连接的点可以彼此影响(经由电压变化、电流变化等),同时仍然基本上实现与本文中描述的功能相同的功能。在一些示例中,如电路设计领域的技术人员可以意识到的,可以调整电压和/或电流电平以考虑提供非直接连接的另外的电路元件。
两个或更多个计算系统或设备可以替代本文中所描述的控制器中的任何一个(例如,图1的控制器2)。因此,还可以根据需要实现分布式处理的原理和优点,诸如冗余、重复等,以提高本文中所描述的控制器的鲁棒性和性能。
本文中所描述的示例确定方法和处理的操作可以通过机器可读指令来执行。在这些示例中,机器可读指令包括供以下装置执行的算法:(a)处理器;(b)控制器,诸如控制器2;和/或(c)一个或多个其它合适的处理设备。该算法可以包含在存储在有形介质上的软件中,所述有形介质诸如例如闪存、CD-ROM、软盘、硬盘驱动、数字视频(多功能)盘(DVD)或其它存储器设备,但是本领域的普通技术人员将容易意识到,整个算法和/或其部分可以可替代地由除了处理器之外的设备执行和/或以众所周知的方式包含在固件或专用硬件中(例如,它可以通过专用集成电路(ASIC)、可编程逻辑器件(PLD)、现场可编程逻辑器件(FPLD)、现场可编程门阵列(FPGA)、离散逻辑等实现)。例如,基线数据确定方法的任一或全部组件可以通过软件、硬件和/或固件来实现。此外,所表示的机器可读指令的一些或全部可以手动实现。
虽然已经示出和描述了本公开的特定实施例和应用,但是要理解,本公开不限于本文中所公开的精确结构和组成,并且在不脱离所附权利要求书中所限定的本发明的精神和范围的情况下,各种修改、改变和变型可以从前面的描述显而易见。
Claims (12)
1.一种显示系统,包括:
像素电路,该像素电路包括发光器件和驱动晶体管,该驱动晶体管用于根据该驱动晶体管上的驱动电压来驱动通过发光器件的电流,该像素电路还包括被布置为选择性地将该像素电路连接到信号线和监视线的一个或多个开关晶体管;
驱动器,该驱动器用于经由信号线利用驱动电压对像素电路进行编程;
监视器,该监视器用于经由监视线测量通过驱动晶体管的电流;以及
控制器,该控制器用于操作驱动器和监视器,该控制器被配置为:
在足以使监视线上的电流安稳在稳定值并从而避免监视线的传播延迟效应的持续时间的时间段内,经由监视器测量通过驱动晶体管的第一电流;
在对于显示器的监视时序预算而提供的持续时间的时间段内,经由监视器测量通过驱动晶体管的第二电流;以及
将所测量的第一电流和第二电流进行比较以提取对于像素的监视线的传播延迟效应。
2.根据权利要求1所述的显示系统,其中,该控制器还被配置为:
基于所测量的第一电流值和第二电流值的比来确定与从像素电路测量的电流相关联的增益因素;和
根据所确定的增益因素来调节后续的电流测量,以便考虑监视线的传播延迟效应。
3.根据权利要求1所述的显示系统,其中,该显示系统包括以行和列布置的像素电路的阵列,并且其中,该控制器还被配置为:对于显示器中的像素的代表性子集重复所述测量和比较,以便表征对于离监视器的线路距离范围的监视线的传播延迟效应。
4.根据权利要求1所述的显示系统,其中,该控制器还被配置为:
在足以使施加的电压在信号线上安稳在稳定值并从而避免信号线的传播延迟效应的持续时间的时间段内,经由驱动器对像素电路进行编程;
经由监视器测量通过驱动晶体管的第三电流;
在针对显示器的编程时序预算而提供的持续时间的时间段内,经由驱动器对像素电路进行编程;
经由监视器测量通过驱动晶体管的第四电流;
比较第三电流值和第四电流值以提取对于像素的信号线的传播延迟效应。
5.根据权利要求4所述的显示系统,其中,该显示系统包括以行和列布置的像素电路的阵列,并且其中,该控制器还被配置为:对于显示器中的像素的代表性子集重复所述编程操作、测量操作和比较,以便表征在离驱动器的线路距离范围的信号线的传播延迟效应。
6.根据权利要求1所述的显示系统,其中,该控制器还被配置为:
在考虑监视线的传播延迟效应的同时,通过测量通过驱动晶体管的电流来确定该驱动晶体管的时间相关参数;和
根据所确定的时间相关参数来调整后续的编程值。
7.一种表征显示系统中的传播延迟效应的方法,该显示系统包括具有由驱动晶体管驱动的发光器件的像素电路,该像素电路与信号线和监视线连接,该信号线用于向像素电路提供编程电压以影响通过驱动晶体管的电流,该监视线用于测量通过驱动晶体管的电流电平,该方法包括:
在足以使所述电流安稳在稳定值并从而避免监视线的传播延迟效应的持续时间的时间段内,经由监视器测量通过驱动晶体管的第一电流;
在针对显示器的监视时序预算而提供的持续时间的时间段内,经由监视器测量通过驱动晶体管的第二电流;以及
比较第一电流和第二电流以提取对于像素电路的监视线的传播延迟效应。
8.根据权利要求7所述的方法,还包括:
接收指示要从发光器件发射的亮度量的数据输入;和
基于所确定的传播延迟效应来确定对于经由驱动器对显示器进行编程或所述测量中的至少一个的调整,使得显示系统与线路传播延迟效应无关地操作。
9.根据权利要求7所述的方法,其中,该显示系统还包括以行和列布置的多个像素电路,该方法还包括:
对于显示系统中的像素电路的子集重复所述测量和比较,以便表征对于离监视器的线路距离范围的监视线的传播延迟效应。
10.一种表征显示系统中的传播延迟效应的方法,该显示系统包括具有由驱动晶体管驱动的发光器件的像素电路,该像素电路与信号线和监视线连接,该信号线用于向像素电路提供编程电压以影响通过驱动晶体管的电流,该监视线用于测量通过驱动晶体管的电流电平,该方法包括:
在足以使施加的电压在信号线上安稳在稳定值并从而避免信号线的传播延迟效应的持续时间的时间段内,经由驱动器对像素电路进行编程;
响应于利用足以避免传播延迟效应的持续时间的编程,经由监视器测量通过驱动晶体管的第一电流;
在针对显示器的编程时序预算而提供的持续时间的时间段内,经由驱动器对像素电路进行编程;
响应于利用编程时序预算的编程,经由监视器测量通过驱动晶体管的第二电流;
比较第一电流和第二电流以提取对于像素电路的信号线的传播延迟效应。
11.根据权利要求10所述的方法,还包括:
接收指示要从发光器件发射的亮度量的数据输入;和
基于所确定的传播延迟效应来确定对于所述编程或测量中的至少一个的调整,使得显示系统与线路传播延迟效应无关地操作。
12.根据权利要求10所述的方法,其中,该显示系统还包括以行和列布置的多个像素电路,该方法还包括:
对于显示系统中的像素电路的子集重复所述编程、测量和比较,以便表征对于离驱动器的线路距离范围的信号线的传播延迟效应。
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