US20060007248A1

US20060007248A1 - Feedback control system and method for operating a high-performance stabilized active-matrix emissive display

Info

Publication number: US20060007248A1
Application number: US11/015,638
Authority: US
Inventors: Damoder Reddy; Walter Naugler
Original assignee: Individual
Current assignee: Leadis Technology Inc
Priority date: 2004-06-29
Filing date: 2004-12-17
Publication date: 2006-01-12
Also published as: US20050200293A1; CN101014991A; US20060007249A1; US20050285822A1; US7166966B2; US20060007205A1; US20060007204A1; US20060007206A1

Abstract

System, device, and method for operating active-matrix emissive pixel display device. Method includes storing calibration value for pixels and gray levels displayed by pixels in memory; storing transformation in memory for transforming first representations of gray level values to second representations; receiving first gray level representations of image pixel gray level values; transforming first representations to second representations for each pixel; generating image data and control signals for driving pixels during present display frame time; generating integrated photon flux signal for pixels in display indicative of integrated photon flux during portion of present display frame time; comparing plurality of integrated photon flux signals with calibration values on pixel-by-pixel basis and generating plurality of comparison results indicating difference; and identifying deviation for each pixel and directing change in stored transformation to be applied during subsequent time. System provides a gray level logic, calibration memory, a comparator, and pixel deviation logic.

Description

RELATED APPLICATIONS

This application claims the benefit of priority under 35 U.S.C. 119 and/or 35 U.S.C. 120 to U.S. Provisional Patent Application Ser. No. 60/583,744 (Atty. Docket. No. 186051/US [474125-20]) filed Jun. 29, 2004 naming as inventors Damoder Reddy and W. Edward Naugler, Jr., and entitled High-Impedance to Low-Impedance Conversion System for Active Matrix Emission Feedback Stabilized Flat Panel Display, which application is incorporated by reference in its entirety.
This application is also related to the following applications, each of which is hereby incorporated by reference: U.S. application Ser. No. ______, (Atty. Docket. No. 186051/US/4[474125-21]) filed 17 Dec. 2004 and entitled System And Method For A Long-Life Luminance Feedback Stabilized Display Panel; U.S. application Ser. No. ______, (Atty. Docket. No. 186051/US/2[474125-22]) filed 17 Dec. 2004 and entitled Feedback Control System and Method for Operating a High-Performance Stabilized Active-Matrix Emissive Display; U.S. application Ser. No. ______ (Atty. Docket. No. 186051/US/3[474125-23]) filed 17 Dec. 2004 and entitled Active-Matrix Display And Pixel Structure For Feedback Stabilized Flat Panel Display; U.S. application Ser. No. ______, (Atty. Docket. No. 186051/US/5 [474125-25]) filed 17 Dec. 2004 and entitled Method For Operating And Individually Controlling The Luminance Of Each Pixel In An Emissive Active-Matrix Display Device; U.S. application Ser. No. ______, (Atty. Docket. No. 186051/US/6[474125-26]) filed 17 Dec. 2004 and entitled Device And Method For Operating A Self-Calibrating Emissive Pixel, and U.S. application Ser. No. ______ (Atty. Docket. No. 186051/US/7[474125-27]) filed 17 Dec. 2004 and entitled High-Performance Emissive Display Device For Computers, Information Appliances, And Entertainment Systems; each of which applications is hereby incorporated by reference.

FIELD OF THE INVENTION

This application pertains generally to emissive flat panel displays and more particularly to systems, devices and methods for making, calibrating, and operating emissive pixel flat panel displays to provide uniform light emission level and color over the surface of the display initially and throughout its operational life and to extend the operational life of such displays.

BACKGROUND

Active matrix (AM) emissive displays and active matrix organic light emitting diode (AMOLED) displays in particular rely on current levels in the light emitting diode to produce luminance levels (light emission level) in a matrix of pixels (picture elements). Each pixel is a separate light emitting diode that is directly addressed and wherein each pixel has a sample and hold circuit so that a voltage can be applied to the Organic Light Emitting Diode (OLED) display driver continuously over the duration of the frame.
The function of a flat panel display is to produce an image in various shades of light and dark in correspondence to voltage levels representing the original image, or an image created by computer software. These light and dark shades may form or generate colors when they are rendered as different pixel types such as in red, blue, and green through the use of different colored emissive pixels or diodes or through the use of same colored or white pixels and filters. Sometimes the set of three pixels used together to render a color by additive combination of their respective photon flux are referred to as subpixels, but in the description to follow, little distinction is made between pixels and subpixels as the subpixels are pixels in their own right and sets of pixels that are controlled as a set are merely cooperative sets of subpixels. Operation of sets of pixels or emitters to generate color are known in the art and not described in greater detail. The translation of the voltage image data into current generated OLED photon emission (flux) levels presents several complex issues involving the manufacture of the display and the aging of the display during operation and use by a user or consumer in the field.
In the case of a typical conventional OLED display, an image or data voltage is placed on the gate of a power transistor (current source) in the display pixel, which feeds and controls the amount or magnitude of current to the OLED pixel. The higher the gate voltage is, the higher will be the current and therefore the brighter or more emissive will be the pixel. Typically voltages (the signal data) supplied to thin-film semiconductor transistors (TFTs) having source, drain, and gate terminals are used to control the current to the pixel emitter elements to render an appropriate gray level or pixel image luminance.
The circuits, methods of control, and even materials heretofore used in conventional implementations have significant limitations so that OLED display panel performance has suffered and has limited the application of such OLED technology for larger high-performance displays at consumer acceptable price.
A primary problem in such systems and devices is that it is conventionally extremely difficult if not impossible to produce uniform current from pixel-to-pixel in a display using voltage image data applied to TFTs in this manner. This problem becomes particularly acute as the displays become physically larger, have larger numbers of pixels, are driven to high current and luminance levels, and/or are operated either continuously or intermittently for longer periods of time (they age). This problem arises at least in part because the current delivered by a TFT at a particular gate voltage depends on many parameters, such as for example the TFT threshold voltage, the effective electron mobility, and current gain of the TFT device (which may vary from TFT device to TFT device as a result of manufacturing variations, environmental exposure during operation, and/or operational history. These three parameters (threshold voltage, effective electron mobility, and current gain) may in turn depend, for example, on inter-grain and intra-grain trap densities, semiconductor thickness, and semiconductor-to-gate dielectric trap densities. Other factors include: gate dielectric thickness, dielectric constant of the insulators, the TFT geometry, electron/hole mobilities, and other factors alone and in combination.
Among the problems at issue are how voltages (e.g. TFT voltages) to be applied are determined and how that voltage is placed on the power TFT to give the right current level to produce the correct gray level. Some studies have suggested a particular way or ways to use a particular luminance of a pixel to correct the voltage supplied to the pixel power TFT (See for example, U.S. Pat. No. 6,518,962 B2 by Kimura and assigned Seiko-Epson; U.S. Pat. Nos. 6,542,138B1 and 6,489,631B2 assigned to Philips, and the paper by Eko T. Lisuwandi at MIT (See “Feedback Circuit for Organic LED Active-Matrix Display Drivers, by Eko T. Lisuwandi submitted to the Department of Electrical and Computer Science in Partial Fulfillment of the Requirements for Degrees of Master of Engineering in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology, May 10, 2002). However, these conventional attempts to improve OLED (or indeed other active emission display technologies) have not been entirely effective and are in one way or another flawed.
For example, U.S. Pat. No. 6,542,138 B1 (assigned to Philips) describes a method that at most attempts to make pixels tend to be uniform to some extent over a frame duration but does not describe or suggest that exact emission levels corresponding to a series of gray levels can be controlled. This invention described in this patent for example, uses a light sensitive discharge device across the signal hold capacitor that maintains the gate voltage on the OLED current driving TFT during the frame time. The photon emission from the OLED causes the light sensitive discharge device to discharge the voltage on the holding capacitor thus turning off the current driving TFT and thus extinguishing the OLED. The rate of extinguishment is dependent on the level of photon emission; therefore if the pixel over-produces photon emission the OLED will be extinguished faster than were the pixel to under-produce photon emission. As a further refinement of such a system, the photosensitive discharge device is a photo-transistor, the gate of which is controlled by the current passing through the OLED. The circuit is designed so that at high current through the OLED the photo-transistor is in the off condition because the voltage to the gate of the photo-transistor is close to ground due to the high OLED current, but the photo-transistor while in the off condition acts like a reverse biased photo-diode and the charge on the holding capacitor is slowly leaked to ground, causing the current through the OLED to be reduced as the current is reduced. Due to the declining voltage on the storage capacitor the voltage rises on the gate of the photo-transistor. When the current decrease to a certain point the threshold voltage of the photo-transistor is exceeded causing the photo-transistor to turn on and dump the remaining charge in the storage capacitor and thus shut off the OLED. The rapidity, and thus, the perceived luminance of the OLED is determined by the luminance level of the OLED. The higher the luminance of the OLED the faster is the OLED shut off.
There are several objections to this approach. Firstly, the turning on of the photo-transistor to shut off the OLED depends on the threshold voltage of the photo-transistor. One of the problems that this approach is supposed to correct is the variable threshold voltages of the TFTs used in the pixel circuitry. This means that the time when the OLED is shut off will vary from pixel to pixel and thus actually contribute to the non-uniformity between different pixels of the display. Secondly, at low emission values the voltage applied to the gate of the photo-transistor will be close to the threshold voltage at the beginning of the frame time. Any variations in threshold voltage are therefore greatly magnified and the uncertainty of the actual luminance values is not well controlled at all. Thirdly, the actual brightness perceived by the viewer depends on the total photon emission during the frame. The total photon emission during the frame depends at least in part on the initial value of the data voltage supplied to the storage capacitor, the rate of discharge of the storage capacitor during the off time of the photo-transistor (which is dependent on the emission level of the OLED caused by the initial voltage), the threshold voltage of the current controlling TFT whose gate is controlled by the voltage stored on the storage capacitor, current gain of the current controlling TFT, the effective electron mobility of the current controlling TFT, the age point of the OLED materials, the color spectrum of the OLED materials and the threshold voltage of the photo-transistor. All these mentioned controlling parameters are not well controlled in the manufacturing process and therefore the pixel uniformity is not well controlled using the structures and methods of described or inferred by the U.S. Pat. No. 6,542,138 B1 (Philips) reference.
U.S. Pat. No. 6,518,962 B2 by Kimura (assigned to Seiko-Epson) describes circuits in which current levels are obtained by certain pixel associated sensors in the short address time allocated for making a measurement. These are essentially instantaneous measurements and the measurement time is too short to give a practically acceptable signal-to-noise ratio so that useful information for determining the voltage or current to be supplied to the TFT (or OLED pixel) can be extracted from the measurement. The signal extracted is expected to be on the order of a few nano-volts (10⁻⁹volts) and the noise is expected to be on the order of several volts due to the long conductor line terminated essentially by an open circuit for a signal-to-noise ration (SNR) of less than about 0.1 percent Furthermore, it is also expected that different noise characteristics may arise for different regions of a display owing to the different localized electromagnetic fields and to the same pixels at different times.
Another limitation of Kimura et al (U.S. Pat. No. 6,518,962 B2) is that the system and method as described appears to apply a predetermined signal to the signal data line and it then alters this signal by the voltage control unit to make the light level come close to the reference value. The predetermined data signal therefore appears to cause a luminance that is an incorrect luminance because it varies from the reference and is subsequently altered by the voltage-adjusting unit to produce luminance that is only “close” to the reference. Kimura therefore does not appear to actually match the reference or any other target luminance.
The work of Lisuwandi et al., which is generically and conceptually similar to US U.S. Pat. No. 6,518,962 B2 has too long a feedback settling time (greater than 150 ms) and thus, is not practical, especially for displays that have dynamic content that changes from frame to frame for normal computer screen, television, and similar applications.
Conventional systems and methods that have attempted to control pixel luminance, have by-and-large attempted to measure instantaneous light or luminance levels that have been too small and too noisy to accurately and precisely provide such control. They have therefore been ineffective and their limitations will be even more severe as the size and performance expectations of OLED displays increases.
These performance problems may likely be even more severe when amorphous silicon (a-Si) is used for the display electronics. Amorphous silicon is the semiconductor used by the LCD industry and has billions of dollars invested in the infrastructure. It is, therefore, desirable for the major display manufacturers to use amorphous silicon. Early development of OLED active-matrix displays has employed the use of poly-silicon due to its higher speed and better stability. There is very little investment in poly-silicon infrastructure and the costs are high as opposed to amorphous silicon.
Recall that there are three forms of silicon conventionally used in electrical integrated circuits. Crystalline silicon used in monolithic integrated circuits (ICs). This type of silicon has no grain boundaries since the material is a solid crystal. This type of silicon (x-Si) has only one area for electrical charge to accumulate, and that area is at the interface between the gate dielectric and the silicon surface contacted by the dielectric. The area of this interface is just the width and length of the gate dimensions.
Poly-silicon (p-Si) is made up of course grains of silicon having more or less intimate contact with each other. In order for electrons to go from grain to grain and thus, travel through a p-Si channel in a field effect transistor (FET), a certain amount of energy must be added. Also, the interface between grains can collect stray charges (both positive (holes) and negative (electrons) stray charges) just like the interface between the dielectric and the silicon crystal in the x-Si material, but now the area has greatly expanded. The intergranular area in the p-Si is inversely proportional to the grain size. Therefore, the smaller the grain size, the greater the interfacing area will be and the greater the chance for stray charges to build up.
In the case of amorphous silicon (a-Si) the grain boundary area is magnitudes greater than for p-Si. Trapped charge is normally the dominant characteristic that determines electron mobility and threshold voltage for a-Si devices and therefore any changes in the charge density at the inter-grain boundaries causes fluctuation in the electron mobility and threshold voltage with much greater effect in the amorphous silicon (a-Si) as compared to the poly-Silicon (p-Si) or crystalline silicon (x-Si).
As display size increases, there is great desirability to use amorphous silicon rather than poly-silicon or crystalline silicon. However, due to the differences and fluctuations in electron and hole mobility characteristics, stray electrical charge accumulation characteristics, and threshold voltage characteristics, it is increasingly difficult to maintain a desired and uniform display luminance characteristics over a large display surface at any single moment in time and as the display device is used with amorphous silicon.
Various attempts have been made to overcome the uniformity problem in emissive displays, including some that have involved circuit-based, some of which are still in use today. These attempts have not been entirely successful and do not meet the needs and application requirements of the current and next generation of emissive display applications, particularly OLED display applications.
One scheme attempts to control photon emission by using a so called “current mirror” at the pixel, rather than using image voltages to drive or control the current through the OLED and hence control the OLED pixel luminance. Image currents are used in an attempt to force a luminance level current through the power TFT that feeds the OLED.
Another scheme compensates for TFT threshold variation by providing a circuit that determines the power TFT threshold voltage and then adds the TFT threshold voltage to the image data voltage thus compensating for the threshold voltage so that variations or changes in the TFT threshold voltage do not result in variation of the current supplied to the OLED pixel luminance
These circuit based schemes are complex and expensive to produce and have not been entirely satisfactory in maintaining pixel luminance uniformity, because they do not compensate for the OLED material degradation, but only certain limited variations in the TFT.
It may be appreciated that for some devices in which OLED or other emissive pixels are employed, the cumulative pixel on-time may be relatively short as compared to the age of the device carrying the display, such as cell phones and personal data assistant (PDA) devices, because the display is normally on only when there is an active call or user interaction. By comparison, an OLED display for a flat panel television may be on and displaying a dynamically changing image for five to ten hours a day. The requirements for luminance and color uniformity are also greater for the television which must render accurate continuous tone images as compared to a small cell phone display which may acceptably provide luminance uniformity and color accuracy at considerably lower levels.
It is known in the art that OLED displays that use different materials for the red emitter, green emitter, blue emitter of a three color subpixel set, will age or degrade at different rates so that after a period of operation such pixels in the displays (without correction) will have an observable color offset or shift that may depend on pixel luminance value. It may also be appreciated that as the color and luminance change will be specific to the individual pixel (subpixel) and overall or global change to a particular color channel drive circuit will generally be ineffective unless the cumulative effect on each pixel is the same.
Other schemes attempt to achieve a measure of uniformity by making a correction based on a comparison of a measured pixel luminance to a reference luminance. One scheme of this type has already be discussed relative to U.S. Pat. No. 6,518,962 B2 by Kimura and assigned to Seiko-Epson. According to this scheme as described in the patent, the brightness of the pixel is measured and compared with the brightness of a reference pixel brightness to generate a difference signal or value. (It is noted that although the term “brightness” is commonly used, brightness is a subjective measure and may require the consideration of a human viewer to be interpreted, whereas luminance is an objective measure.) The difference signal or value is then used to alter the signal voltage that drives the TFT supplying current to the pixel with the intention of adjusting the pixel brightness in order that the final or “settled” brightness (really luminance) comes “close” to the reference value. This scheme has several problems and does not solve the uniformity problem. Three problems are paramount with this scheme: (i) pixel brightness (really luminance) variation or “ringing” before stabilizing at a settled value, (ii) inaccuracy due to a low signal-to-noise level and noise, and (iii) insufficient resolution as a result of lack of pixel isolation. These problems better understood by reviewing the structure of one of the Kimura pixel structures.
Kimura et al. (U.S. Pat. No. 6,518,962) shows (See Kimura FIG. 19) what is described as a block diagram showing an entire arrangement of a display apparatus according to a twelfth embodiment his invention and including a circuit diagram of a pixel. This Kimura pixel circuit structure 61 has been redrawn and relabeled as presented in FIG. 1A so that an appropriate comparison may subsequently be made with an embodiment of the pixel circuit structure 62 of the present invention. It is noted that the photodiode D1 of Kimura is connected to the voltage supply line for its voltage. This approach is problematic from at least the standpoint of pixel luminance stability and repeatability because the exact voltage on that voltage supply line depends on the current being used by the lines nearer the voltage supply for that voltage, because all the pixels attached to the line (in the column) are drawing current which drops the voltage on the line. This voltage drop depends on what pixels are turned on and to what level of current draw they are experiencing. In other words, the voltage that drives each of the Kimura pixels are dependent on the image data presented for display at other pixels of the display. It will also be noted that the Kimura pixel lacks any isolation of the thin film diode. This means that all the sensor photodiodes in the column are contributing current to the sensor read line at the same time.
Again, this photodiode configuration and the pixel structure that contains it is problematic because there is no information as to where the current (or charge, or voltage) originates from. Reference to the original FIG. 19 of Kimura suggests that all the sensor read lines go into a shift register, and each line appears to be read in series (rather than in parallel) with the next one. Performing a serial read operation for each line would have to done during the address time which implies an exceedingly fast read rate and would permit only a very short time to make the current measurement. Such short measurements are susceptible to imprecision and the effects of noise and may generally support only a very small signal to noise ratio.
Other conventional approaches also fail to overcome conventional limitations. A particular luminance level produces a photocurrent in the sensor, and the size or magnitude of the photocurrent is an indication (in some instances is proportional or directly proportional to) of the luminance (photon flux through the sensor). Either the current or a voltage created across a resistive element (such as a resistor) by the current that is measured to identify the luminance.
First, the pixel luminance will “ring” or oscillate for a time around the reference value before stabilizing and reaching a stable luminance point. This stabilization takes time, time is important, and more time than allowed by the short address time (t_A) which for most display applications (such as OLED displays having an array in the range of 640×480 pixels) is the display frame time (t_f) divided by the display number of lines (N_L). For a relatively small 160×120 pixel display such as may be used in a hand-held computer or information appliance, the address time is about 0.13 ms and for relatively larger 800×600 pixel display such as may be used in a Lap-top computer the address time is about 0.027 ms. By comparison, the time to stabilize (t_s) such a feedback system has been calculated by Eko T. Lisuwandi at MIT (See “Feedback Circuit for Organic LED Active-Matrix Display Drivers, by Eko T. Lisuwandi submitted to the Department of Electrical and Computer Science in Partial Fulfillment of the Requirements for Degrees of Master of Engineering in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology, May 10, 2002) to exceed 100 ms. This settling time is therefore unacceptably long for practical active-matrix type displays. The problems and limitations described here are typical of conventional closed-loop feedback systems and methods, where a parameter or value is measured, sensed, or read and the reading fed-back to a control means that changes the read parameter (or a parameter derived from it), and applies or otherwise uses the changed parameter for operation. In this particular display context, since for any display that displays changing display content, the frame rate must exceed 30 frames per second to prevent flickering. For most displays that display moving images the frame rate is 60 frames per second (fps). The frame duration (reciprocal of fps) will be less than about 20 ms, a closed-loop feedback control scheme such as described by Kimura cannot be realized for displays operating with display content that changes at rates faster than about 6 to 8 fps, as do normal video speeds for television, computer displays.
A second problem with this scheme is that the scheme relies on a direct reading from the light sensors in the pixels by a current measurement circuit physically located outside the display area (or off glass). The current measurement circuit conventionally needs to be physically located outside the display area because integrating high speed circuitry directly on the display glass has been to costly in yield loss and added expense to be practical at this time; so it has not been merely a design choice as to where it is located. These conventional devices have used a reverse biased PIN diode as the sensor. Due to the high impedance value of the sensor (typically between about 1000 MegOhms and 1 MegOhm), noise picked up by the wires or conductors attached to the sensor and subsequently to the measuring equipment off the glass will seriously obscure accurate reading of the pixel luminance. For example, the sensed signal may be a signal voltage in the range of a few millivolts (mv) and the noise on this signal when it reaches the measuring equipment may typically be in the range between about a few millivolts and about several volts. Since the pixel uniformity requirement for a 8-bit grayscale display may be 0.4 percent, any noise greater than that will prevent achieving the required uniformity. Since, the signal voltage is a few millivolts a noise level of millivolts to volts far exceeds the signal to noise ratio (which can be no worse that 1 to 1) required to make a measurement with any accuracy at all. Third, this scheme generally, and the particular approach described in U.S. Pat. No. 6,518,962 B2 (Kimura), does not describe and gives no consideration for isolating the sensors for individual rows thus, also failing to isolate the reading of the sensors since all sensor readings in display array column appear to be combined into one current that is conducted to the measurement circuit off the glass. All the pixels in a column are on in an active-matrix display (as opposed to a passive-matrix display where the rows are on only one at a time); therefore, since the sensor line travels vertically up the display all the sensors in a column are connected to the sensor line for that column and each pixel's sensor will contribute to the total current in the sensor line making it impossible to determine the current contributed by any one pixels.
Therefore there remains a need for system, device, method, and computer program and computer program products that solve the afore described problems and limitations in the prior art, including the problems of settling times for conventional closed-loop control, noise interference, and sensor isolation.

SUMMARY

Systems, devices and methods for making, calibrating, and operating flat panel displays to provide uniform pixel and display luminance emission levels (sometimes referred to as brightness) and colors over the surface of the display initially and throughout the operational life of a display and to extend the operational life of such displays.
A stabilized feedback display system and method for maintaining uniform pixel luminances in a display device. System includes a display device having a plurality of emissive picture elements (pixels) each formed from at least one electronic circuit device, a display driver circuit receiving a raw input image signal from an external image source and applying a corrected image signal to the display, a display luminance detector generating at least one display device luminance value, and a processing logic unit receiving the at least one display device luminance value and communicating information to the display driver circuit, the display driver circuit using this communicated information to generate a transformation for generating the corrected image signal from the raw input image signal.
System and method for controlling luminance of pixel in display. Method includes storing transformation between digital image gray level value and display drive signal that generates luminance from pixel corresponding to digital gray level value; identifying target gray level value for particular pixel; generating display drive signal corresponding to identified target gray level based on stored transformation and driving particular pixel with drive signal during first display frame; measuring parameter representative of actual measured luminance of particular pixel at a second time after the first time; determining difference between identified target luminance and actual measured luminance; modifying stored transformation for particular pixel based on determined difference; and storing and using modified transformation for generating display drive signal for particular pixel during frame time following first frame time. Control system and circuits for controlling the luminance of a picture element or pixel in a display device.
System, device, and method for operating active-matrix emissive pixel display device. Method includes storing calibration value for pixels and gray levels displayed by pixels in memory; storing transformation in memory for transforming first representations of gray level values to second representations; receiving first gray level representations of image pixel gray level values; transforming first representations to second representations for each pixel; generating image data and control signals for driving pixels during present display frame time; generating integrated photon flux signal for pixels in display indicative of integrated photon flux during portion of present display frame time; comparing plurality of integrated photon flux signals with calibration values on pixel-by-pixel basis and generating plurality of comparison results indicating difference; and identifying deviation for each pixel and directing change in stored transformation to be applied during subsequent time. System provides a gray level logic, calibration memory, a comparator, and pixel deviation logic.
An emissive pixel device having integrated luminance sensor and a method of operating an emissive pixel device having an integrated luminance or photon flux sensor. Device includes light or photon emitting device, drive circuit generating current to drive light emitting device to predetermined luminance corresponding to an image voltage and applying drive current to light emitting device during frame time, photo sensor that exhibits change in electrical characteristic in response to change in incident photon flux disposed near the light emitting device to intercept measurable photon flux when light emitting device is in emitting state, charge storage device coupled with sensor for accumulating or releasing charges and exhibiting capacitance charge and voltage proportional to the charge at a time; and control circuit controlling charging and discharging of charge storage device in response to changes in electrical characteristics of sensor during at least a portion of the frame time.
Self-calibrating emissive pixel circuit, device and method for operating pixel. Method for operating includes: establishing sensor capacitor at predetermined starting voltage, delivering current to photon emitting device to cause photons to be emitted at predetermined target photon emission level, exposing sensor having electrical properties that vary according to photon flux on sensor to the emitted photon emission during at least portion of display frame time, permitting sensor capacitor to either charge or discharge from predetermined starting state through the sensor so that portion of frame time and resistance of sensor during portion of frame time determine amount of charge on sensor capacitor, measuring voltage or charge remaining on sensor capacitor at end of portion of frame time as indication of integrated photon flux and pixel luminance, and modifying image voltage and/or current applied to pixel during any subsequent display frame time using measured voltage as feedback parameter.
Information appliance device and method for operating display associated with information appliance. Information appliance includes display device comprising plurality of active-matrix pixels arranged as two-dimensional array, each pixel including a photon emitter, emitter drive circuit receiving input image data for each pixel and generating pixel drive signal intended to produce a corresponding target pixel luminance during frame time, and emitter luminance sensor and measurement circuit that measures electrical parameter indicative of actual luminance of each pixel over portion of measurement display frame time; and display logic coupled to display and receiving pixel luminance related electrical parameter for each pixel and generating correction for application subsequent time period to input image data for each pixel based on difference between target pixel luminance and measured pixel luminance. Photon emitter may be OLED, electroluminescent, plasma or other emissive device in flat panel display. Information appliance may include a television monitor, a television receiver, a CD player, a DVD player, a computer monitor, a computer system, an automobile instrument panel, an aircraft instrument display panel, a video game, a cellular telephone, a personal data assistant (PDA), a telephone, a graphics system, a printing system, a scoreboard system, an entertainment system, a domestic or home appliance, a copy machine, a global positioning system navigation display, a dynamic art display device, and/or devices combining these devices and systems.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A and FIG. 1B are illustrations showing a comparison between an exemplary conventional pixel structure and a structure of a pixel according to an embodiment of the invention.
FIG. 2 is an illustration showing an embodiment of a Steadylight™ emissive pixel and display calibration and stabilization circuit.
FIG. 3 is an illustration showing a first embodiment of a feedback control system for operating an active matrix display device with individual pixel sensor integrated flux detection feedback FIG. 4 is an illustration showing an embodiment of a second embodiment of a feedback control system for operating an active matrix display device with individual pixel sensor integrated flux detection feedback and including a calibration memory and pixel deviation memory for modifying and controlling operation of a gray level logic unit.
FIG. 5 is an illustration showing an embodiment of a pixel sensor and integrated photon flux detection and measuring circuit using a voltage sensing amplifier.
FIG. 6 is an illustration showing an embodiment of a pixel sensor and integrated photon flux detection and measuring circuit using a charge amp-trans-impedance amplifier.
FIG. 7 is an illustration showing a first embodiment of an active matrix pixel including emitter, sensor, and photon-flux integrator elements.
FIG. 8 is an illustration showing a second embodiment of an active matrix pixel including emitter, sensor, and photon-flux integrator elements.
FIG. 9 is an illustration showing an embodiment of a first calibration procedure that may be executed to calibrate an active matrix display according to the invention during the display manufacturing process.
FIG. 10 is an illustration showing embodiment of a second calibration procedure that may be executed to calibrate an active matrix display according to the invention after the display has been manufactured such as during a first time boot-up or power-on.
FIG. 11 is an illustration showing an embodiment of a procedure for operating a display according to embodiments of the invention.
FIG. 12 is an illustration showing an embodiment of an active-matrix emissive pixel display device incorporating features of the invention.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

The present invention is directed to systems, devices and methods for making, calibrating, and operating flat panel displays to provide uniform luminance emission levels and colors over the surface of the display initially and throughout the operational life of a display and to extend the operational life of such displays.
U.S. patent application Ser. No. 10/872,268 (Atty. Docket. No. 34133/US/2[474125-8]) filed May 6, 2004 naming as inventors Damoder Reddy and W. Edward Naugler, Jr., and entitled Method and Apparatus for Controlling Pixel Emission (which application is incorporated by reference in its entirety) describes and teaches the value of sensor arrays to improve organic light emitting diode (OLED) or other emissive pixel image quality, increase display life, and lower manufacturing costs. The innovations described in this patent application generate emission measurements utilizing photo resistors and or photodiodes and phototransistors to send voltage or current signals to data processing circuits located off the display substrate.
In one of the circuits described therein and shown in FIG. 2, and referred to as the Steadylight™ calibration and stabilization circuit 40 (Steadylight is a trademark of Nuelight Corporation), a voltage ramp 55 is placed on the source of thin film transistor TFT T1 41. The voltage from output pin P3 42 of voltage comparator VC1 43 is high so that TFT T1 41 conducts the voltage ramp to the gate of TFT T2 46 and storage capacitor C1 47. This causes OLED D1 48 to emit light with increasing intensity, which causes the resistance 49 of optical sensor S1 50 to steadily decrease. As the resistance of sensor S1 50 decreases the voltage across ground resistor R1 51 steadily increases placing an increasing voltage on pin P1 44 of voltage comparator VC1 43. At the beginning of the addressing cycle a reference voltage 46 is placed on pin P2 47 of voltage comparator VC1. The reference voltage represents the desired emission value from OLED D1 48. When the voltage on pin P2 47 reaches the same voltage as the reference voltage on pin P2 the output voltage on pin P3 42 switches from a positive “on” voltage to a negative “off” voltage, thus turning off TFT T1 41 and freezing the voltage to the gate of TFT T2 46, and thus, freezing the emission from OLED D1 48 at the desired emission level. One difficulty is that the resistance of optical sensor S1 50 is in the gig-ohm range causing the voltage across ground resistor R1 51 to possibly fluctuate with any voltage noise near the circuit. One of the greatest source of voltage noise comes from the digital processing circuitry used to process the data from the optical sensor S1. The reason for this is that the currents required to produce significant voltage are typically very small in a high impedance circuit. Therefore, the impedance should advantageously be confined to the location of the pixel before a noise free measurement can be made.
The present invention now described provides device, system, method, and other means to overcome the limitations associated with conventional active matrix displays generally, with any emissive display type (including for example, electroluminescent devices, plasma emission devices, or any other controllable emissive device) more particularly, and with organic light emitting diode (OLED) displays in particular, by providing a means to measure and track the photon emission or luminance of a pixel (the integrated photon flux over a defined period of time) and to use that information to ensure that any degradation mechanisms, whether they be pixel driver circuitry degradation due to gate threshold drift as in the case of amorphous silicon, or degradation of the OLED materials themselves, is compensated.
It will also be appreciated in light of the description provided herein, that even when the emissive device is an organic light emitting diode (OLED) there are several types, including but not limited to small molecule OLEDs, polymer OLEDs (PLEDs), phosphorescent OLEDs (PHOLEDs), and/or any other organic light emitting diode constructed from any organic material in any combination of single or multiple layers of organic materials and electrodes.
Among the advantages of the invention, the invention provides a system and method for measuring the luminance or photon flux over time (the time duration of the frame) and storing that information to be used at a later time by the display to maintain uniformity, color balance and to extend life. The use of a photon flux integrator (sensor S1 coupled with a capacitor C2 in a particular circuit configuration) reduces noise found on feedback systems operating with instantaneous photo currents and with instantaneous feedback to the voltage drive system.
Among the advantages of the present invention, this invention recognizes that the instantaneous photocurrents generated by light emitted (actually the photon flux emitted) by the OLED material in a pixel are too small to be used for controlling the voltages on the pixel and thus, we devised an in-pixel photon flux integration circuit so that rather than trying to measure the instantaneous photon flux emitted by the pixel the invention provides a device that integrates that flux over the time length of a display frame. This causes the random instantaneous noise fluctuations in the photon flux to cancel out over the frame time. The invention also provides a system and display panel that utilizes this pixel device structure, and methods for calibrating, controlling, and operating the display. The invention therefore overcomes the problems associated with conventional systems and methods that have attempted to control pixel luminance using low-magnitude, noisy, and fluctuating measured instantaneous light or luminance measurements. The in-pixel nature of the integrated photon flux measurements also compensates for pixel device material and electrical characteristics, operating environment, and operating history.
In at least one embodiment of the invention, a particular luminance level produces a photocurrent in the sensor, and the size or magnitude of this photocurrent serves as an indication of the luminance (photon flux through the sensor). In at least one embodiment of the invention, the photocurrent is proportional (linearly or nonlinearly) to the luminance, and in at least one embodiment the photocurrent is directly proportional to the luminance, or linearly proportional within an acceptable non-linear error. In one embodiment, either the current or a voltage created across a resistive element (such as a resistor) by the current that is measured to identify the luminance. In other embodiments, voltage accumulated on charge storage devices, such as capacitors, are measured to identify the luminance.
Embodiments of the invention are capable of maintaining a pixel photon flux within one gray level (higher orders of accuracy can be obtained if the bit level is increased—this is a matter of cost) of an absolute photon flux reference level, and pixel-to-pixel photon flux uniformity to within the same accuracy, over the life of the display. The inventive system, device, and method are also capable of adjusting the integrated photon flux level of each and every pixel element (and hence also the pixel color and display color balance) so that the life-time of a display can be extended (and/or so that the aging or degradation can be controlled in a preplanned manner), in spite of the known degradation characteristics of OLED displays, over a relatively longer period of time than in conventional systems and methods.
One convention associated with defining the life time of a display is to use the time from an initial time (t₀) when the luminance is maximum to a half-life time (t_x) which is the time when the luminance has fallen to one-half of the initial luminance. Thus, if the display has a 10,000 hour life time (time t_x) it conventionally means that the display will be one-half as luminant (or have one-half the luminance) as it was in the beginning (at time t₀).
The inventive device, system, and method can actually extend the practical lifetime of a display and display system by extending the length of time to one-half of maximum luminance (by compensating for the degradation that leads to one-half luminance). For example, the inventive device, system, and method may extend the period of time to half-life by a factor of 2, 3, 4 or more (to 2t_x, 3t_x, 4t_x, or more). In one embodiment, this is accomplished by programming the display to permit a controlled degradation over time. Recall, that the inventive device, system, and method can actually compensate 100% (and of course for any lesser amount of degradation) for the degrading of the luminance, but the display will last longer if it is permitted to slowly degrade. Achieving a 100% compensation requires that additional voltage be available to apply to the gate of the OLED current driving TFT. The available voltage determines just how long degradation can be fully compensated. If, however, the aging is partially compensated the display will eventually reach half luminance, but is a longer time than an un-compensated display.
Uniformity as used here means that the normal or average viewer will not usually be able to visually detect an aberrant pixel luminance (where luminance or more loosely “brightness” is used to describe the characteristic in some conventional systems) or integrated photon flux (as a particular manner of characterizing luminance according to embodiments of invention described in specification) difference or color difference relative to other pixels in the display. In the context of the invention to be described, embodiments of the invention are able to maintain a calibration so that no pixel is more than one-half gray level from a reference level. In one embodiment, having 8-bit per pixel per color data (256 levels of gray), the uniformity is maintained to at or better than one gray level or ±0.4 percent. This is a pixel quantization level of the display calibration, wherein if the pixel is determined to have a luminance or integrated photon flux that is different from the reference luminance or integrated photon flux, the system and method drive the pixel to the gray level luminance or integrated photon flux nearest the reference. Other embodiments of the invention may quantize at a finer level of calibration, but normally the human visual system will not detect a variation even at the one-half gray level difference in a video display.
Recall that “brightness” is a subjective term. Luminance is an objective term that has physical meaning and actual physical units. The most common actual physical units used units today being cd/m2 (candelas per square meter), which is the so called ‘nit’. In the inventive device, system, and method, the sensor operates by intercepting photons and turning them into charge carriers (holes and electrons) making the material of the sensor a better conductor and thus having lower resistance. In an embodiment of the invention, the lower resistance of the sensor drains the charge on a capacitor (C2). The amount of drained charge is directly proportional to the number of photons that strike the sensor during the frame time. That is, the photons are counted (integrated) during the frame time. This integrated photon count is quantifiable.
A numerical example is now presented, without benefit of rigorous theory and by way of example to illustrate aspects of the operation of embodiments of the inventive device, system. The capacitance of the sensor capacitor (C2) is in the Pico farad (pf) or 1×10⁻¹²Farad range. If the capacitor has a capacitance of 1×10⁻¹²Farad, and if capacitor C2 drains from an initial voltage of 10 volts at the beginning of the frame to ending voltage or 4 volts at the end of the frame, then 6×10⁻¹²coulombs of charge has passed to ground through the sensor. (Actually the starting and ending voltages may be selected at any value, however, voltage magnitude values in the 1 to 10 volt range are typical.) The corresponding amount of charge is 6×10⁻¹²coulombs. This is equal to about 37,745,000 electrons. Since it only takes 0.25 electron volts to promote an electron into the conduction band and each light photon has an energy of about 2 to 3 electron volts (depending for example upon the photon wavelength or energy) it can be calculated that a red photon has the ability to put about 8 electrons into the conduction band and a blue photon has the ability to put about 12 electrons into the conduction band. This means that the 37,745,000 electrons would mean that about 4,681,000 red photons hit the sensor during a 16.7 ms frame time or that about 3,121,000 blue photons hit the sensor in the same frame time. The above values and numbers are provided as examples so that the principles may be understood and are not provided as exact values determined via rigorous calculation. The actual promotion of electrons into the conduction band depends on many factors. Among the most important is quantum efficiency, which is the amount of photon energy that promotes electrons into the conduction band versus the amount of photon energy converted into heating the semiconductor material.
It may therefore be appreciated that the invention operates as a photon flux integrator for the capacitor, sensor, and frame duration integration time. The photon flux is a flow of photons through a unit area (the area of the sensor) and the total photon count is the photon flux integrated over the sensor area and over the frame or other appropriate partial frame or other integration time. The invention also provides isolation so that the measurement of parameters from one pixel do not impact the measurement of parameters from another pixel.
The invention has several aspects that may be used separately or for optimum effect in combination to provide a greater synergistic effect. Some of these are listed below, while others will be apparent from the description of the embodiments of the invention and from the drawings.
In one aspect, the invention provides a Feedback Control System and Method for High-Performance Stabilized Active-Matrix Emissive Display. In another aspect, the invention provides an Active-Matrix Display and Pixel Architecture for Feedback Stabilized Flat Panel Display. In another aspect, the invention provides a Method for Calibration of an Active-Matrix Display and Pixel. These three aspects in particular, may advantageously be combined so that a display panel having the inventive pixel and sensor architecture and circuitry may be operated with off display glass (or other display substrate) circuitry such as an off-display integrated circuits (ICs) to provide a uniform and stable display system.
In still another aspect, the invention provides a High-Impedance To Low-Impedance Conversion System For Active Matrix Emission Feedback Stabilized Flat Panel Display.
In even still another aspect, the invention provides a High-Impedance to Low-Impedance Conversion Circuit for Active-Matrix Display Pixel and Sensor.
In another aspect, the invention provides a Structure for and Method of Design of a High-Stability Integrated Light Sensor for Use in Feedback Control System and Method For Making Same.
In even another aspect, the invention provides Long-Life and High-Stability Feedback-Stabilized Amorphous Silicon Photoconductor Based OLED Display.
In another aspect, the invention provides computer programs, computer program products, data structures and other computer constructs and machines that may be embodied in tangible media or memory devices and either executed within or stored on a computer or other processor or hardware, including a processor and processor coupled memory of either general purpose of special purpose computers.
These and other aspects and features of the invention will become clear in light of the description provided herein and the referenced drawings.
Attention is first directed toward a comparison of an embodiment of the inventive display pixel with a conventional pixel structure so that aspects of the inventive pixel may be appreciated prior to describing the manner in which its operation is controlled. Then aspects of the closed-loop feedback control system that may be used for the inventive display and pixel structure and architecture as well as for other display and pixel structures. Then several exemplary pixel structures, each having an emitter and a sensor, are described that may be utilized with the inventive control system. A method for calibrating the sensors to establish reference integrated photon flux levels is then described as well as some design methodology for designing sensors that have an appropriate capacitance and dark and illuminated resistance to provide the desired operation and support the inventive calibration and operational procedures and methods. Operation of the calibrated display and electronics so that stable and uniform operation is maintained is then described.
When the pixel is on and radiating it emits photons at a particular rate such that at any point in time there is an instantaneous luminance. In the prior art the “brightness” referred to that has been measured has been the instantaneous brightness. As suggested in the Background section, one problem associated with conventional systems and methods has been that the amount of photo power intercepted by a sensor in a pixel is that the photon power has been so small that random and/or non-random noise sources swamp out the instantaneous signal. This is particularly problematic when the read time for the pixel is small and such problems are compounded when the read signal from one pixel cannot be distinguished from other pixels. Note that power is the time rate of energy and power is an issue in the prior-art as compared to the instant invention. Photon flux and luminance are more-or-less interchangeable terms in that both of these terms are power terms.
With further reference to FIG. 1A, recall that the Kimura et al. pixel structure connects photodiode D1 to the voltage supply line for its voltage, and that this approach is problematic because the exact voltage on that voltage supply line depends on the current being drawn by all the other pixels attached to the line in the same column. There is a voltage drop that depends on the on-off state and gray level value of other pixels in the display column. Recall also that a Kimura pixel lacks any isolation of the photodiode TFTs for different pixels. This means that all the sensor photodiodes in the column are contributing current to the sensor read line at the same time and individual pixel sensor values cannot be determined. Finally, recall that the Kimura pixel and display configuration permits only a very short time to make a current measurement (the current measurement is essentially instantaneous) and that instantaneous measurements are imprecise due to low power, low signal strength, and high noise levels.
By comparison, the embodiment of the inventive pixel in FIG. 1B overcomes at least these problems. The inventive device, system, and method solve the problems associated with delivery of voltage to the emissive diode, the sensor isolation problems, and the noise and low power problem. The structure and operation of this pixel and others are described in detail elsewhere in this specification.
The photon flux integrator operates to store the energy (which is the integral of power) delivered by the OLED to the sensor in a capacitor. What this means is that a weak photon flux is integrated over time for a duration of the display frame time, for example the photon energy is integrated for 16.7 milliseconds (16.7 ms) or 16700 microseconds (16700 μs). In conventional devices and systems, the energy is measured over a portion of the row address time, which is typically about 5 microseconds (5 μs). This means that in the inventive device, system, and method, the power of the signal has been magnified by 16.7 ms divided by 5 μs microseconds for a gain factor of about 3,333 times. This represents a gain of about 35 db.
Furthermore, while the signal-to-noise ratio is greatly increased by the 35 db of gain, the random noise is effectively cancelled because on average during this lengthy integration time there may generally be expected to be substantially as many positive noise contributions as negative noise contributions of the same magnitude. By integrating the signal over time random noise is cancelled. These are significant advantages over conventional systems and methods which require and therefore attempt to obtain an accurate measurement of instantaneous luminance, however, they do not succeed in obtaining an accurate measurement because the signal to be detected is always plus or minus the random noise and the magnitude of the random noise is at least comparable to the magnitude of the signal to be measured. If, in addition, the photo-sensor employed in the pixel has an impedance in or on the order of the gig-ohm (10⁹ohm) or greater range, the voltage noise can be at the volt level, which would be a thousand times greater than the signal.
As described elsewhere in the detailed description, an additional difference between the inventive device, system, and method as compared to conventional schemes is that the invention no longer attempts to control the luminance of a pixel during the identical pixel write time or cycle. In fact, in embodiments of the invention, the integrated photon flux that is determined as an indication of the pixel luminance during one display frame time (or a portion of the display frame time) is used to control the integrated photon flux (and by extension the pixel luminance) during some subsequent display pixel frame time (or portion of such pixel display frame time). In one embodiment, the subsequent display time is the next frame time or a portion thereof, while in other embodiments it is any future display time, such as a time that is an integer multiple of frame times for that pixel, or a subsequent time that is triggered by an event such as by display power on. Therefore, although the control and adjustment may appear to be real-time and be indistinguishable to the display user (e.g. may lag by a frame time such as a 16.7 ms frame time) from a real-time feedback based measurement and control, some interpretations would suggest that it is not real time. On the other hand, the measurement in one frame write cycle and the use of the measurement to generate the pixel drive signal is in the next frame write cycle are sufficiently close in time such that other interpretations may consider such operation to be real-time or near-real time. Where many minutes, hours, or days were allowed to pass between the measurement of integrated photon flux and adjustment of the pixel drive signal to take the measurement into account, then the device, system, and method are less likely to be characterized as real-time.
It will be appreciated that as OLED pixels (and other active photon or luminance emitters) used in displays my typically change over tens or hundreds of hours from a previous operating characteristic, once a particular pixel has been adjusted, the need to update a pixel's drive characteristic every frame diminishes. Therefore, performing the measurement and adjustment every frame is not normally necessary.
1. Exemplary Control System and Method Description
An exemplary display system 200 is illustrated in a first embodiment of a feedback control system of FIG. 3 and includes two primary components, a display device 201 having a plurality of picture elements or pixels 202 and photon flux integrator circuits 203, and display driver and control electronics (optionally including software and/or firmware) 204 to drive and control the display device 201. The drive and control electronics are responsible for converting image data 205 into the appropriate pixel drive and control signals 206 to the pixels 202 so that their apparent gray level or integrated photon flux (and their color for a color display) within the image is correct or match a commanded integrated photon flux and color. It will be appreciated that where the basis set of OLED materials are appropriately chosen, maintaining the proper color basis set (for example Red, Green, and Blue) integrated photon flux will also maintain the color balance of the pixel. The display device 201 also includes sensors and sensors coupled with capacitors to form novel photon flux integrators (in one embodiment sensor S1 is coupled with capacitor C2) associated with each individual pixels for measuring a characteristic of the perception of luminance based on an integrated photon flux over an integration period T_PFI. The sensors 203 generate a sensor output signal 207 (and in one embodiment a plurality of sensors generate a plurality of sensor signals) that is (are) communicated to the display drive and control electronics 204 and used by the drive and control electronics 204 to modify the pixel drive and control signal(s) 206 as necessary to achieve and maintain individual pixel photon flux levels and achieve uniformity performance between and among the plurality of pixels in the display. In one embodiment there is a sensor 203 associated with and located within or adjacent to each pixel 202 so that the pixel integrated photon flux and uniformity is achieved on a pixel-by-pixel basis rather than globally for the entire display.
The inventive device, system, and method also advantageously provide for the measurement of the integrated photon flux for each pixel separately and such measurement is not limited to the measurement of a row of pixels, a column of pixels, or any other set of collection of pixels together. Embodiments of the invention also provide for separate pixel senor output signals so that it is not necessary to sense or measure a current, voltage, or other indication of photon flux, integrated photon flux, or luminance serially over a common sensor line.
This pixel-by-pixel approach is particularly advantageous as it permits adjustments and corrections to each and every pixel to account for operational history differences of each and every pixel so that in spite of these historical operational differences, the same or any desired pixel integrated photon flux can be achieved. For OLED display pixels or other display types where the integrated photon flux and other operational parameters at any point in time are highly dependent on past operational history at the individual pixel level, this solves the display aging, display and pixel “burn-in” problem, and other operating or age related problems.
Another embodiment of the invention incorporates at least some of the features of the FIG. 3 embodiment as well as additional features. In this embodiment, the image data 205 is received from or generated by an analog image source 208 that provides an analog signal, such as an RGB composite signal, separate component red (R), green (G), and blue (B) signals, a monochrome or black/white signal, or any other source or type of graphical, text, symbolic, image, picture, or other data. This data may be dynamic (that is changing over time) or static. Examples of such image data are television (TV) analog or digital signals, computer display signals (such as half-VGA, VGA, super-VGA, any of the digital display interfaces, and the like), cellular or mobile telephone display data, watches, appliances, automotive electronics display data (such as for example automotive instruments, navigation, and entertainment), aircraft avionics and in-flight entertainment, fixed and portable gaming devices, billboards and other large displays, and any other type of display and data.
When the image data is in the form of sequential or serial frames or segments of analog data (such as a conventional television signal), the data signal 205 (See FIG. 3) is processed by serial-to-parallel (S/P) and analog-to-digital (A/D) processor circuitry or logic 209 to generate digital red (R_D). digital green (G_D), and digital blue (B_D) signals. It may be appreciated that monochrome or black/white signals may be achieved for a color display by providing the same integrated photon flux levels from adjacent R, G, and B emitters or pixels (sometimes referred to as RGB subpixels). Alternatively, where only a monochrome display is provided, then only a single pixel signal representing the display image is required rather than three (RGB) signals. Furthermore, where the image data is already in parallel and/or digital form, either or both of the serial-to-parallel and analog-to-digital conversion or processing may be eliminated. For ease of description it will be assumed for purposes of this description that the display is a color display and uses Red 210-1, Green 210-2, and Blue 210-3 signals which will conveniently be referred to as the digital image input data 210; however, it will also be clear that the invention applies to monochrome displays with only one digital input data signal. The description will also user the more usual nomenclature of R, G, B, or simply RGB signals to describe the three signals or data sets typically associated with a color display or image. Whether such signals or data are analog or digital will be apparent from the context of the description. The RGB nomenclature will also stand for any set of color dyes, phosphors, filters, or materials the form a color or colors, or other basis sets (independent on number of color basis element) that may be used to produce a true, false, or pseudo-color display.
Normal display operation is carried out by the blocks in FIG. 4 namely, Analog Image Data 208, Image A/D converter 209, Gray level logic Z103 (modified to accept an inventive input), Display Controller Z104, Column Drivers 238, Row Select 240, and the Active matrix Emissive display 292, 293, 294. Optionally the Analog Image Data Block 208 and the Image A/D converter 209 may be replaced by the Digital Image Data Block 208 a. In either case, digital image data is fed into the Gray Level Logic block.
A top level description of each of the blocks in the FIG. 4 embodiment is provided, followed by additional detail where warranted. The Display controller Z104 controls all timing signals, converts image voltage data into display voltage data. Column drivers 238 down loads or otherwise communicates display voltages to the rows. Row Select logic 240 enables the rows one at a time to receive data from column drivers. Sample and Hold block Z101 samples and holds the sensor data from each row as it is addressed by the row select. Analog-to-Digital (A/D) converter 270 is responsible for converting the analog data at the Sample and Hold block Z101 to digital data. Multiplexer (MUX) 270 a coverts the parallel data at the A/D converter into a serial data stream. Calibration Memory 250 stores the original sense data that was taken when the display was first manufactured, by pixel and by gray level. Comparator 260 is responsible for performing a comparison (such as a magnitude or difference arithmetic comparison) between the pixel emission data and the calibrated data. The Digital or Pixel Deviation Memory Z102 stores the deviation from calibration for each pixel and gray level. Gray Level Logic Block Z103 may be responsible for (i) determining a gray level strategy (simple voltage, spatial and/or temporal dithering or the like for achieving a desired luminance), (ii) for determining when to send corrections to display driver controller, (iii) and for determining or identifying how to correct the display driver controller using the data stored in the digital deviation memory. Analog Image Data block 208 sources image data in an analog format when the data is provided in this form (becoming obsolete). Digital Image Data 208 a sources image data in a digital format (more and more prevalent today) Image A/D Converter 209 converts the analog image data to digital.
The Gray Level Logic block Z103 converts the digital image data into a form which can be used by the Active-Matrix emissive display to recreate an image faithfully corresponding to the image data. Although functional blocks having some of the features of the Gray Level Logic block of the invention are known in the art, they are not the same as used in the inventive system and method, at least in part because the inventive Gray Level Logic block Z103 includes an input for receiving values from Pixel Deviation Memory Z102 (described in greater detail below) and structural and methodological means for using both the output of image A/D converter 209 and outputs from the pixel deviation memory Z102 to provide novel inputs to Display controller Z104.
The Gray Level Pixel Logic function block Z103 may be any circuit, logic, digital function (optionally including software and/or firmware) or any other hardware, software, or hybrid hardware/software means that converts the digital gray level determined by the inputted image data to a voltage calculated to cause the pixel specified to emit luminance at the same gray level as required by the image.
It is understood in light of the description provided here that there are many ways to reformat the image data to be able to produce a display image with proper gray levels and colors. For example, the Gray Level Logic block may include a gamma function which transforms image voltage data into display voltage data that will produce the proper luminance changes from one gray level to another. Another function that may optionally be included in the Gray Level Logic block would be a system to effect gray levels by using temporal dithering; that is, by dividing each frame into two or more sub-frames. Operating on x number of gray levels using just one sub-frame (the other always remaining in the dark state) would allow the doubling of the levels by using both sub-frames in the on state. The Gray Level Logic block may also arrange to use spatial dithering for gray levels. This means that each pixel would have an array of sub-pixels, which would be turned on or off depending on the gray level. Some limited forms of this approach are already used color displays in order to use the three primary colors to reproduce all the colors in the visible spectrum. The Gray Level Logic block could also use a combination of temporal and spatial dithering to accomplish the gray level function. The data that emerges from the Gray Level Logic block is sent to the Display Controller Block. The Display Controller block literally runs the display. It provides all the timing signals that control sending the display voltage data to the column drivers, and it provides the timing of the row selection driver so that the proper row is selected for the particular line of data being down loaded to the display from the column drivers. The Gray Level Logic block Z103 determines what voltages will be down loaded, and the Display controller determines when the voltages will be down loaded. The Column Drivers receive the digital voltage level for the first row of the frame, converts the digital data to analog data, and downloads the data to the first row of pixels which has meanwhile been selected by the row select driver under the command of the Display Controller. Since this is an active-matrix display the data voltages are stored on a storage capacitor and to the gate of the current controlling TFT, thus turning on the OLED in the pixel. The display controller then sends the next row of data and selects the next row of the display and so on until all rows in the frame have been activated. There is then a retrace to the first row and the next frame commences to be down loaded by the Display Controller. These aspects of display operation are known in the art and no further detail provided here.
The functional blocks and structure relating separately and in combination to aspects of the invention are the Sample and Hold Z101, the A/D converter 270, the multiplexer or MUX 270 a, the Comparator 260, the Calibration Memory (Cal Mem) 250, and the Pixel Deviation Memory Z102. The Gray Level Logic block Z103 is also a modified version of conventional gray level logic because it includes structural and method components that permit it to accept and utilize the output of the pixel deviation memory which are themselves based on the results of comparator 260. In this embodiment of the invention there are two memory blocks the Calibration Memory 250 and the Pixel Deviation Memory Z102. In other embodiment there may be more memory block or less. In the interest of lower cost, the less memory the better. It is, however, easier to understand the principles of invention by referring to the two memory block in this embodiment. Other embodiments my readily use a single memory. In the invention a photo-sensor system called a photon flux integrator has been added to the pixel. When the pixel is activated by the data sent by the column drivers light is emitted in the form of a photon flux from the OLED. A portion of that photon flux is intercepted by the photo-sensitive material in the photon flux integrator, converted to electrons and collected by the capacitor in the photon flux integrator. The collection of photo-electrons continues for the full duration of the frame (at a 60 Hz frame rate this is a time duration of 16.7 ms). On the next frame, the charge or voltage on the photon flux integrator capacitor is read by the Sample and Hold Function out side the display area. In one embodiment the voltage on the capacitor is read and in another embodiment the charge on the capacitor is read. The charge and voltage on the capacitor is proportional and is some embodiments it is directly proportional to the luminance of the pixel during the frame time.
While there are many ways to read voltage and charge known in the art, FIG. 5 and FIG. 6 give examples of two embodiments. These circuits and variations of them are described relative to embodiments in FIG. 7 and FIG. 8. It will be appreciated that the circuits and methods for reading voltage and charge (or current) are known in the art and that the circuits and methods described here may be applied to a variety of different pixel circuits and structures, including to different pixel emitter circuits, pixel sensor circuits, and/or pixel photon flux integrator circuits.
The FIG. 5 embodiment is a voltage sensing circuit. Line L1 supplies voltage to both power transistor T2 and sensor S1. The dark resistance of sensor S1 is extremely high and sensor capacitor C2 receives very little charge through S1 when the pixel is off. During the frame time when OLED or other emissive device or diode D1 (such as an OLED) is in the on state and a photo flux is received by S1 the conductivity of S1 significantly increases and allows charge to flow into sensor capacitor C2 causing a voltage to appear across C2 with respect to ground. (Note that the combination of Sensor S1 and sensor capacitor C2 in the context of the rest of the circuit are operative to form a photon flux integrator device.) This voltage is proportional to the photon flux level emitted by D1. In order to read the voltage on C2, sensor TFT transistor T3 is turned on by applying a voltage to line L2 (this occurs when the row is enabled). The voltage of sensor capacitor C2 is subsequently applied to the plus terminal of an operational amplifier (op amp) OA1 or equivalent amplifier circuit. The negative terminal of the operational amplifier OA1 is coupled to a reference node such as ground G2. This voltage is amplified by the ratio of resistor R2 (in the voltage sensing amplifier to the line resistance of L4 which is coupled to the positive input of operational amplifier OA1. For example, if the line resistance of line L4 is 3 K ohms and the resistance of resistor R2 is 3 Mohms, the voltage on capacitor C2 is amplified by 30 dB (1000 times), which voltage appears at node P4. The amplified voltage is sent to a sample and hold circuit for further processing.
Another embodiment is shown by FIG. 6. In this embodiment, when a voltage, for example, 10 volts, is applied to the plus terminal of charge amplifier CA1, line L4 quickly also ramps up to 10 volts. A resistor R1 is coupled between the negative input terminal of the charge amplifier and its output at note P3, and capacitor C3 is connected in parallel across resistor R3. The voltage appearing at node P3 is an offset voltage determined by the characteristics of charge amplifier CA1 and any leakage current on L4. This leakage current typically may arise from the fact that in a multi-row display each row will have a transistor T3 attached to line L4 and although the T3 s is every row except the row that is enabled will be in the off state there still is an off state current leakage associated with each T3. Capacitor C2 is charged up to the voltage on the plus terminal of CA1 when T3 is turned on. Any charge flowing into C2 reduces by the same amount the charge across C3 and the voltage rises on node P3. Resistor R1 may usually be a large resistance that allows the reduced charge on C3 to be restored for the next reading. In practice a reading of P3 is advantageously made prior to turning on transistor T3 in order to measure the offset voltage. Then another reading is made after T3 is turned on and the first reading is subtracted from the second reading to give a value for the amount of charge that flowed into C2. Therefore, as in the embodiment of the circuit of FIG. 5, the photon flux from D1 causes charge to move from C2 to ground during the frame duration. When line L2 is again selected for the next frame, the charge on C2 is read by the charge amp circuit.
The column drive unit 238 works in conjunction with line buffer 236 and row select unit 240 too sequentially select and sends pixel signals to each subsequent row of the display. The operation of column drive unit 238 and row select unit 240 are generally known in the art and not described in further detail here.
A sensor 294 is positioned or disposed within or adjacent to pixel 292 so that it can receive at least a portion all of the light, photons, or other radiation that may emanate from pixel 292 when the pixel is driven by the column drive circuitry at a level what causes it to emanate. The sensor 294 may also be responsive to ambient light or radiation levels. Sensor 294 may be any type of sensor that undergoes a measurable change in physical or electrical characteristic in response to different levels of the incident light or radiation.
Sensor 294 therefore generates an electrical signal, in the form of a photo current that is a measure of, or otherwise indicative of, the incident photon flux on the sensor during the period of the frame time of the measurement. In one embodiment of the invention, the sensor measures the integrated photon flux over a defined period time. In at least one embodiment of the invention, the defined period of time is the frame period. It is noted that most displays operate at a frame rate of at least 60 Hz so that the content (such as a image) displayed does not appear to flicker to a human observer. A frame rate of 60 Hz corresponds to a frame time or period of substantially 16.7 ms. Other displays operate at higher frequencies to further reduce the possible flickering. A frame rate of 100 Hz corresponds to a frame time or period of substantially 10 ms.
The invention is not limited to any particular frame rate, and is applicable to non-interlaced and interlaced display types. Furthermore, while much of the description indicated that the photo flux is integrated for a period of exactly or substantially the display frame time, there is no reason why the photon flux integration need extend for the full frame time so long as the time is long enough to provide an integrated photon flux of sufficient magnitude in absolute terms and relative to the noise, and so the positive and negative contributions to random noise cancel within required margins. It is anticipated that photon flux integration times on the order of between at least one-quarter of a frame time and one frame time may readily be used, and that photon flux integration times as short as about one-tenth of a frame time (e.g. 1.67 ms) may also be used as this still provides a gain of 333 times as compared to the typical 5 μs instantaneous time for measurement in the prior-art as explained in the previous example. Even a photon flux integration time of between one one-hundredth and one-tenth of a frame time may provide satisfactory performance. Typically the integration time will be one frame time so that a single set of control and timing signals may be used for the pixel write operations and integrated photon flux sensor read operations. It is anticipated that even time frames as short as the row address times may be practical with the use of noise canceling circuitry.
It is noted that most displays operate at a frame rate of at least 60 Hz so that the content (such as a image) displayed does not appear to flicker to a human observer. A frame rate of 60 Hz corresponds to a frame time or period of substantially 16.7 ms. Other displays operate at higher frequencies to further reduce the possible flickering. A frame rate of 100 Hz corresponds to a frame time or period of substantially 10 ms. The invention is not limited to any particular frame rate, and is applicable to non-interlaced and interlaced display types.
If photon flux is measured in photons/second/meter-squared, then the sensor is integrating or counting the total number of photons intercepted over the sensor area during that time period so that sensor is acting as a photon counter and not as an instantaneous detector of photons, electrons, or other energy or particle. The integration over time permits the acquisition of a single magnitude sufficient to overcome instantaneous noise that may be present and of a signal that is relatively stable from frame to frame assuming that there are no changes in the display pixels or the electronics that drive the display pixels.
It will be appreciated that each pixel (really each subpixel when implemented in a tri-color RGB color display) within each display row has an associated separate sensor 294, and that each sensor 294 generates and communicates a sensor output signal 207 to off-display glass electronics. In one embodiment this sensor output signal is a voltage (Vs), but in other embodiments the sensor output signal is a current (Is). Additional signal processing structures or circuits may be provided either within the pixels or subpixels, display, or in off-display glass processing circuitry to convert from one signal type to another and/or to derive a different signal from the raw sensor signal. In order to simplify the discussion, this description is limited to the manner in which the sensor signal 207 from a single particular sensor is processed through the drive and control electronics 204 to achieve the desired operation and display uniformity. In reality each pixel (and sub-pixel) has a sensor that generates and communicates a sensor output signal 207 to off-display electronics so that a pix-by-pixel (and subpixel-by-subpixel) measurement and feedback based correction can be made. In a separate portion of this description, the calibration and operational procedures will described the manner in which pixel sensor data is used to correct display nonuniformity.
Sensor output signals 207 (one for each column in the display) are simultaneously captured by Sample and Hold Z101, processed by analog-to-digital (A/D) converter 270 and MUX 270 a to convert the normally parallel analog signals 207 into serial digital signals or value Vs 276. This digital sensor signal 276 is received by a signal comparison unit 260 that is responsible for comparing the measured pixel integrated photon flux (as indicated by the sensor output signal 276) with a reference pixel integrated photon flux value 251 that corresponds to the expected pixel gray level stored in calibration memory 250. It will be appreciated that signal levels may be scaled or otherwise processed so that the comparison unit 260 compares signals having the same scale or range so that precise and accurate differences can be computed. The difference between the reference value and the sensed value for that particular pixel is referred to as the difference or delta gray scale AGs amount and is sent to Pixel Deviation Memory Z102.
The reference voltage stored in calibration memory 250 may be generated in any number of different ways. In one embodiment the values placed in calibration memory 250 are generated at the manufacturing point where the active-matrix back plane has been completed before the OLED materials are deployed over the back plane. At this point the active-matrix is fully exposed to ambient luminance. Therefore, the display may be sequentially exposed to calibrated gray levels and each sensor scanned as though in normal operation with the measured sensor values being electronically stored and later introduced into calibration memory 250. Another embodiment uses a procedure in which display manufacture is completed, which includes adjusting the Gray Level Logic block Z103 to produce the desired color mixing and luminance uniformity using practices well known in the industry. When the display is first booted up or turned on it may enter a calibration mode where it is assumed that the first sensor values are correct since the display has no aging history. These first values are stored in the calibration memory and subsequently used to maintain the initial condition of the display.
The Pixel Deviation Memory Z102 contains the status of all pixels with reference to the initial conditions, or to initial calibration in manufacturing. It is the purpose of the Gray Level logic functional block Z103 to produce the correct digital voltages that will faithfully reproduce the image data on the display. Procedures for accomplishing this are well known in the display industry and therefore not described in further detail here.
In embodiments of the present invention the decisions made by the Gray level logic function are modified by the data stored in the Pixel Deviation Memory. In one embodiment, for example, if the data in the Pixel Deviation memory indicates that pixel has degraded by two gray levels, then the Gray level Logic function adds two levels of gray scale to the normal digital voltage level determined for the image data. Another embodiment would be to subtract two levels of gray from all the other pixels and thus maintain color balance, but decrease the dynamic range of the display. Another embodiment use an approach wherein the on time of the degraded pixel is increased in order to increase its perceived luminance by two gray levels. Other embodiments involve spatial and/or temporal dithering using techniques will known in the industry.
Embodiments of the invention provide for performing the calibration at any time either automatically according to some rule, policy or schedule, or manually by the user. Automatic calibration is preferred. Two particular schemes are to perform the calibration every frame, at some integral number of frames interval where that interval can be any number, a power-on, at power-down, at some elapsed time interval (e.g. every 1 hour) or according to any other scheme. It will be appreciated that the user is not aware that the calibration is occurring and there is no or substantially no loss or overhead associated with the calibration once the structures for performing the calibration are in place. Operations such as additional write operations to memory and/or additional switching or logic operations represent the only additional activity, but these are inconsequential compared to the other operations that occur.
These and the other circuits described herein may be implemented as integrated circuits either on the same substrate as the display (e.g. the display glass) or on separate substrates off the display. In general the control system elements may advantageously be provided off of the display substrate. In particular embodiments of the inventive control system and circuits provide the sample and hold circuits Z101, analog-to-digital converter circuits 270, multiplexer 270 a, comparator circuits 260, calibration memory 250 and pixel deviation logic Z102 a and pixel deviation memory Z102 b. The display controller Z104, gray level logic Z103, and image A/D converter 209 may also advantageously be implemented as one or more integrated circuits off of the display substrate. Embodiments of the pixel circuits described in detail hereinafter are implemented as structures for each pixel on the display glass or substrate.
2. Exemplary Pixel Device Structures and Circuits
One aspect of the invention provides a conversion from a high impedance to a low impedance. The conversion from high impedance to low impedance occurs at least in part because of the structure, configuration, and/or operation of the sensor capacitor. The sensor operation of charging or discharging the sensor capacitor C2 is a high impedance operation since the sensor has gig-ohms of resistance. During this charging or discharging time, the sensor line is isolated from the high impedance by sensor transistor T3. During the read time sensor transistor T3 is opened connecting the sensor capacitor C2 (which had been isolated from sensor line L4) to the sensor line L4.
Impedance between the sensor capacitor C2 and the sensor line L4 is only the resistance of the sensor line, which would normally be only about 3 Kohms for typical implementations. The impedance difference is therefore on the order of one million to one (10⁶:1). Interference from noise results in nano-amps of current flow which in a gig ohm impedance system amounts to noise that is on the order of volts, but in a kilo-ohm impedance system amounts to micro-volts. Since it is the long length of the sensor line L4 in a typical display implementation that picks up the noise interference, a measurement should preferably not be made when the sensor line is connected to a high impedance system. When the sensor S1 is isolated by sensor TFT T3 any noise affecting the sensor S1 has to be picked up by the extremely short lines of the pixel circuitry; therefore, very little if any noise affects the charging or discharging of the sensor capacitor. These switching and impedance characteristics contribute to the successful operation of the pixel and sensor circuits.
Two exemplary pixel with sensor circuits are now described that may be used with the inventive display, display control system and method, and sensor readout circuits and methods. Although particular pixel emitter, sensor, and circuit topologies are described relative to these two embodiments, it will be appreciated that the invention is not limited to only these particular circuits or device structures and that variations in the design and the particular electrical circuit devices may be modified, such as by changing the types of control devices to be other than particular transistors, TFT, diodes, or the like and substituting any two-terminal or three-terminal control or switching means. While the transistors are indicated as being TFT type transistors, the invention is not limited to only TFT type transistors. Furthermore, other alterations to pixel circuit topology, such as by adding additional circuitry may be made without departing from the spirit and scope of the invention. The type of emissive device may also be modified to be other than an OLED emitter and for example any active emitter may be used including but not limited to inorganic photon emitting devices or structures; and the characteristics of the sensor may be modified so that in addition to photoresistive or photoconductive devices, any sensor device that undergoes a change in response to incident photon flux may be substituted
One of the advantages of both of the circuits described relative to the embodiments in FIG. 7 and FIG. 8 are that they provide a high-impedance to low-impedance conversion system for an active matrix emission feedback stabilized flat panel display, such as an OLED display. The circuits of FIG. 7 and FIG. 8 provide this by isolating the off display glass or substrate circuitry (such as voltage comparator amplifier VC1 and switching transistor TFT T4) from the high impedance of sensor S1 in the pixel during the photon flux integration operation, which occurs during the frame time. The design of the circuits prevents noise on sensor line L4 that would result if sensor line L4 was connected to a high impedance source.
In this regard, it is well known that a conducting line connected to a high impedance will pick up electromagnetic interference from the environment. This is easily demonstrated by observing the behavior of a volt meter with the plus and minus leads open in the air. The voltage will continually range from plus a few volts to minus a few volts due to radio and TV interference. Since S1 has a resistance in the gig-ohm range and higher, it acts like an open circuit to sensor line L4 if L4 is connected directly to sensor S1 without benefit of sensor capacitor C2. During the photon flux integration time sensor TFT T3 is turned off. While power supply line L1 is not isolated from sensor S1 in this pixel circuit configuration, noise on power supply line L1 does not affect the operation of the pixel or the display since power TFT T2 is operating in the saturation mode and therefore changes of voltage (even on the order of volts) across power TFT T2 due to noise does not change the current through T2, and therefore the emission of photons from pixel diode emitters D1 for all pixels in the display remains stable.
Furthermore, any noise picked up by power supply line L1 fluctuates around zero volts (that is on average it has substantially equivalent positive and negative fluctuations about zero volts) during the frame time when sensor capacitor C2 is charging through sensor S1; therefore, the noise cancels out and the voltage on sensor capacitor C2 after the frame time is complete is due only to the discharge rate of sensor S1 when photons are intercepted. During the row address time when the voltage on line selection voltage line L2 goes high and turns on drive TFT T1 and sensor TFT T3, the voltage on sensor capacitor C2 is read by the voltage comparison amplifier VC1 at its sensor input on P1. This sensor input at P1 is compared with a reference voltage at P2 on its other input to generate a difference or error voltage at output P3. Noise does not interfere during the reading of the voltage present on sensor capacitor C2, because the current induced by noise is in the nanoampere range and at most may cause slight changes in the charge on capacitor C2, but since virtually no current goes though the high impedance no voltage results from the low level of noise interference.
One of the primary differences between the circuits of the embodiments of FIG. 7 and FIG. 8, is that in the FIG. 7 circuit embodiment, the voltage on sensor capacitor C2 at the beginning of the frame is zero volts and provided by turning on grounding TFT T4 at the end of the read time during the row address time. The voltage on the other side of sensor capacitor C2 is at the line L1 voltage which is the supply voltage to power transistor T2, which may for example be at +10 volts. As sensor S1 in combination with sensor capacitor C2 integrates the photon flux from OLED D1 over the frame time, the voltage at the point P5 between C2 and T3 rises toward the supply voltage on L1 (e.g. toward +10 volts). The more photons received by sensor S1 and integrated by the combination of sensor S1 and sensor capacitor C2, then the closer the voltage between sensor capacitor C2 and sensor transistor T3 comes to the supply voltage on line L1. While this circuit has many advantages over conventional circuits and methods, a possible drawback of this particular embodiment of the circuit in an actual implementation is that the supply voltage on line L2 may possibly fluctuate a small amount due to the number of pixels and the level of OLED emission from each pixel being supplied by L1. Since this can be any combination of pixels and emission levels the voltage reading on sensor capacitor C2 may theoretically have some slight ambiguity but this ambiguity may generally be small and performance still an improvement over conventional circuits and methods.
The circuit 380 described by FIG. 8 on the other hand is referenced to ground and to the voltage of Vcap 355 that is fed or communicated to sensor capacitor C2 327 through the sensor TFT T3 330 and TFT T4 340 transistors during the address time.
Although the two circuits have a somewhat different structure and operation, they have certain features in common. In each of the circuits, an emissive device (such as an OLED diode) coupled to ground is driven by a controlled current source (such as a TFT transistor T2). The pixel data value in the form of a voltage is applied to the control terminal (TFT gate) so that the pixel emission (number of photons) is related to its intended integrated photon flux. Recall that a sensor S1 324 and a capacitor C2 327 are coupled as a photon flux integrator device 339 (along with supporting circuitry) with the pixel emissive element (OLED diode) so that a representative and measurable number of the photons emitted from the emitter are incident on the sensor and the combination of the sensor and capacitor generates a photon count. The sensor S1 and capacitor C2 combination integrates or counts the total number of photons it has collected during a defined period (in one embodiment the display frame time of 16.7 milliseconds). This integrated photon flux is a useful measure because it provides greater repeatability and immunity from noise than any instantaneous measure, provides a larger signal amplitude, and the integrated nature of the photon flux may likely be more representative of the integrated photon flux perceived by a human observer owing to the relatively slow response and latency of the human visual system.
A reference integrated photon flux has been established, and the sensor signal is then communicated to the control system and used with the reference to adjust the data signal that is applied to the control device during the next calibration period (such as the next frame) so that the actual pixel integrated photon flux (effectively photons emitted by the OLED diode or other emitter) matches the desired integrated photon flux (number of photons identified during calibration).
Having now described some of common aspects of the pixel circuit structure and operation, attention is now directed to a more detailed description of the two embodiments illustrated in FIG. 7 and FIG. 8.
An embodiment of an active matrix display pixel with emitter, sensor, photon flux integration, and control components is now described relative to FIG. 7. A pixel diode drive transistor T1 310 is coupled to a image voltage line L3 301 at its drain (D_T1) terminal 311, to a first terminal 315 of storage capacitor C1 314 and to the gate terminal (G_T2) 323 of a power control transistor TFT T2 320 at its source (S_T1) terminal 312, and to a line selection voltage line L2 302 at its gate (G_T1) or control terminal 313. Power TFT transistor T2 320 is coupled to power supply voltage line L1 301 at its drain terminal 321, and this drain terminal is also coupled to a first terminal 325 of sensor S1 324 and to a first terminal 328 of sensor capacitor C2 327 at a common node. A second terminal 316 of storage capacitor C1 324 is coupled to the source terminal 322 of power TFT T2 320 and to the input terminal 337 of emitter (OLED diode) 336. The output terminal 337 of OLED emitter 336 is coupled to ground 305. A second terminal 326 of sensor S1 324 is coupled to the second terminal 329 of sensor capacitor C2 327. A calibration read voltage (Vcal) is measured or read at node P5 334 defined by the connection of sensor S1 output at 326 and the sensor capacitor terminal 329 as described hereinafter. This node P5 is also coupled to the source terminal 331 of sensor TFT T3 330. Sensor TFT T3 330 is also coupled at its source terminal 332 to sensor line L4 304 which provides an input signal at an input port P1 351 of voltage comparator VC1 350. Voltage comparator 350 receives a reference voltage at a second input port 352 and generates a difference or error signal P3 353 computed as the difference between the P1 351 and P2 352 inputs. In this embodiment, the sensor output that is applied as an input to the voltage comparator VC1 350 is also applied at a common node 351 as the drain terminal 341 input of grounding TFT T4 340. The source terminal 342 of TFT T4 340 is coupled to ground 306, and receives a control signal 344 at its gate terminal 343. These transistors provide switching to connect pixel elements at times and to isolate other pixel elements at the same or different times so that tight management, control, and or measurement of small voltages, currents, charges, and/or photon counts may be precisely and accurately accomplished. Note that the sense of source and drain terminals of the TFT may be reversed depending upon the n- or p-type of material used for the TFT transistors.
While certain elements of the circuit described cooperate and contribute to operation of the pixel emitter, the pixel photon flux integrator, and the measurement and calibration operation, some approximate categories may be developed to assist the reader in understanding aspects of the invention; however, these categorizations are should not be applied to limit the scope of the invention as elements of the circuit described contribute to more than one category at some times and not at all at other times as described in detail in this specification. With this in mind, drive TFT T1, storage capacitor C1, power control TFT T2 and diode D1 may contribute primarily to operation of the OLED diode emitter; sensor S1, sensor capacitor C2, and sensor TFT T3 contribute primarily to the operation of determining or generating an integrated photon flux measurement; and voltage comparator VC1 and grounding TFT T4 in this embodiment contribute primarily to reading the integrated photon flux measurement and determining a difference between that measurement and a reference so that a correction may be applied to adjust the pixel emitter luminance as indicated by the measured integrated photon flux.
Having described the general topology and connectivity of the circuit elements in FIG. 7, attention is now focused on its operation so that additional aspects and advantages of the invention will be better appreciated. A power source voltage (V_PS) typically in the range of 10 to 15 volts is applied to line L1 301, which serves as the power source for both OLED D1 336 and the charging source for sensor capacitor C2 327. The invention is not limited to any particular range and higher and lower voltages may be used consistent with device characteristics. At the same time, a line selection voltage (V_LS) is applied to line L2 302 causing data drive TFT T1 301 to turn on. Also at the same time an image voltage (V_IM) representing the image to be displayed and referred to as the image voltage is applied to line L3 303, and due to the fact that data drive TFT T1 301 is turned on (or conducting), this image voltage (V_IM) is delivered by TFT T1 to the gate G _T2 323 of power control TFT T2 320 and storage capacitor C1 314. This causes a device current (I_D1) to be delivered by TFT T2 320 to OLED D1 336 and a specific light emission level is emitted from OLED D1 336 that is calculated to be the proper light emission (E_CALC) required by the image. When the display is new and freshly adjusted by the manufacturer the image voltages will produce the correct pixel/OLED emission values. In one embodiment, sensor S1 324 is physically located in contact with the semiconductor anode side of the OLED D1 336 for optimum optical coupling so that sensor S1 collects or intercepts at least a portion of the light emitted by OLED during its emission, and preferably as much of the emitted photons as possible so as to improve integrated photon count and signal strength. In terms of luminance, in this embodiment sensor S1 receives the same or substantially the same luminance as the OLED pixel emits, because the flux density striking the pixel (the sensor portion of the pixel) is the same as the flux density emitted by the pixel (the emitter portion of the pixel) as a whole because the portions are preferably (but not necessarily) in contact. (Other embodiments provide the sensor S1 to be physically located near the OLED so that it collects or intercepts enough light to provide useful sensor signals but not in contact with the anode side of the OLED D1.) In one embodiment, the sensor S1 is a photoresistive (or photoconductive) sensor in which the resistance decreases (or conductivity increases) with increasing photon flux density emitted by the OLED emitter.
During the frame duration (T_FR), which at 60 frames per second (fps) is 16.7 ms, the light emitted from OLED D1 336 impinges on sensor S1 324 and causes a resistance (R_S1) 347 component of the sensor S1 324 to decrease in proportion to the intensity of the light (photon) emission. During the display frame time, sensor capacitor C2 327 is being discharged through sensor S1 324. The frame duration and the average resistance (R_ave) 348 of sensor S1 during the frame time determine the amount of charge discharged by sensor capacitor C2. The amount of charge discharged by sensor capacitor C2 is an important parameter because it controls or determines the voltage (V_CAL) on the node P5 connected between sensor capacitor C2 and sensor TFT T3. This read calibration voltage will be the read value sent to the circuit or other logic that determines the correction that is used to calibrate and maintain the uniformity and color balance of the display during normal operation. (Different embodiments of the invention provide different read circuits which are described elsewhere in this specification.) It is important to note that the higher the voltage measured at the node P5 between sensor capacitor C2 and sensor TFT T3, the greater amount of photon flux (pixel luminance) that was detected or intercepted by sensor S1. This happens because the lower the resistance of S1, the closer (or the smaller the difference) the voltage at the node P5 between sensor capacitor C2 and sensor TFT T3 comes to the supply voltage on L1.
With reference to FIG. 8, there is illustrated a second embodiment of the present invention. Like numbered elements in this specification have the same or similar operation unless such differences are described. There are many similarities between the two circuits and the entire topology and connectivity of elements is not repeated here. In this embodiment sensor capacitor C2 327 is first charged to a predetermined voltage as it was in the first embodiment of FIG. 7 using the power line, but in this embodiment sensor capacitor C2 327 is charged through the sensor line by TFT T4 340 and a capacitor charging voltage source (Vcap) 355, such as for example to +10 volts (or to any other voltage value). (Recall that the FIG. 7 embodiment does not utilize a capacitor charging voltage Vcap in this manner and note that the TFT T4 transistor is operable to interact between the P1 input of the voltage comparator 350 and Vcap 355 rather than between the P1 input and ground 306.)
During the frame time (for example, a frame time of about 16.7 ms for a 60 frame/sec (fps) system), light or photons from the OLED D1 causes the resistance of sensor S1 324 to decrease and accelerate the discharge of sensor capacitor C2 327 to ground. As compared with the FIG. 7 embodiment, in this FIG. 8 embodiment the voltage on sensor capacitor C2 336 moves towards the ground voltage at G1 305 (or other voltage) instead of moving towards the positive supply voltage as in the FIG. 7 embodiment. Therefore, the greater the photon flux emission from OLED D1, the lower the resistance of sensor S1, the greater the current during the frame time discharge, and the lower the voltage remaining on sensor capacitor C2 when sensor capacitor C2 is measured during the read time. This FIG. 8 embodiment therefore has advantages over the FIG. 7 embodiment, because the charge voltage may be better controlled on the sensor line L4 than it is on the supply voltage line L1, but both embodiments are useful and have significant advantages over conventional circuits and methods. In general for an actual implementation, the voltage on supply voltage line L1 varies according to the amount of current being delivered by line L1 and the row being measured. For many display architectures, the higher the row number the further away the row will be from the line L1 power supply and more current times resistance (I*R) voltage drop in the line to that row. By comparison, because the sensor line L4 in this embodiment only delivers current when a reading or measurement is being made, or when sensor capacitor C2 is being re-charged, the voltage is highly stable and not subject to possible variations as the supply voltage line may be so subject.
These and the other circuits described herein may be implemented as integrated circuits either on the same substrate as the display (e.g. the display glass) or on separate substrates off the display.
3. Embodiment of Calibration of the Sensors and Circuit
The sensors may be calibrated during manufacturing before the display is completed (pre-manufacture calibration) or after manufacturing has been complete (or at selected stages in between these two times). The first embodiment of calibration is the calibration during manufacturing. FIG. 9 is an illustration showing an embodiment of the calibration flow chart for pre-manufacturing calibration. The point of calibration is after the active-matrix and sensor circuitry has been completed, but before the OLED structure has been deposited on the active-matrix back plane. At this point the completed active matrix back plane is inserted into a test fixture that connects all the display inputs except the L1 supply voltage to a display control board which drives the active-matrix backplane in an identical fashion as it will be in full operation as a display. There need be no connection to L1 since there is no OLED D1 yet integrated with the back plane. This calibration process is described relative to the second embodiment of the pixel circuitry illustrated and described relative to FIG. 8, where capacitor C2 is charged through the sensor line and Vcap.
First (Step 801), the active-matrix backplane (am backplane) is loaded into the test fixture which is connected to the display control system, such as for example the control system illustrated in FIG. 4.
Second (Step 802), the am backplane is uniformly illuminated with a calibrated laboratory uniform light source at a luminance equal to gray scale luminance 1. (This step may be performed with the backplane uniformly illuminated with a light source at a luminance equal to gray scale luminance of a different level, such as another low level illumination so long as the level is known and the calibration procedure takes this different level into account, but this approach is not preferred.)
Third (Step 803), the display controller Z104 sends a select row 1 to Row Select 240 to turn on all the T3 transistors in row 1 of the display.
Fourth (Step 804), since the third step (Step 803) turned on all the transistor T3 s in row 1, and charge flows from the sensor line L4 into capacitor C2 charging it to a voltage, such as for example, charging it to 10 volts.
Fifth (Step 805), when capacitor C2 charges, the current is sensed by operational amplifier (OP amp) to generate VC1 and the value is sampled and held by Z101 for each pixel in row 1.
Sixth (Step 806), the sampled and held voltages are digitized and multiplexed (MUX) to a serial data stream by A/D Converter 207 and MUX, 207 a. The sequence of the D/A and MUX may be interchanged with no affect on performance.
Seventh (Step 807), the display controller Z104 directs the serial data stream to be stored as the zero line to Calibration Memory (Cal Mem) 250. This is referred to as the zero line because this data is on sensors that have not had the full frame time to photon flux integrate the gray level.
Next (Step 808), Steps 803 through Steps 807 are repeated for all rows in the display to be calibrated (usually every row) until all rows in the frame have been sampled. At this point the first gray level of emission for the first row has been integrated by S1 and C2 for the full frame time.
After all rows have been calibrated for the gray level 1 value, the next step (Step 809) repeats Steps 803 though Step 807 for the next gray level to be calibrated, usually gray level 2 in the preferred embodiment. The sample and held values determined from Step 806 are the proper values for the first gray level and are stored in Step 807 to the first row values for gray level 1.
In a final step (Step 810), each of the first nine steps (Step 801 through Step 809) are repeated until all gray levels have been sampled and stored to Calibration Memory (Cal Mem) 205. Note that in one embodiment, the last or highest gray level (e.g. gray level 256 for an 8-bit system) may be or is run for two frames since the gray level values recorded at the beginning of the 256^thframe are for the 255^thgray level and this assures that the final value is stored in the Calibration Memory 250.
The second embodiment for calibration (post-manufacture calibration), calibrates the completed manufactured display, such as for example when the display is first powered on, booted-up, or otherwise initialized or used for the first time. This calibration system assumes that the manufacturer adjusted the display in the usual manner prior to shipment for sale to the display user or OEM manufacturer of another device. Therefore the voltages used to operate the display have been put into a gamma table or other look-up table as is the usual practice in the industry. This means that the first sensor values measured are automatically calibrated. This embodiment takes advantage of the manufacturer's calibration. Details of this post-manufacture calibration are described with reference to the embodiment illustrated in FIG. 10.
First (Step 831), the analog image Data function logic block 208 sends first gray level 1 image voltage for the first pixel (pixel 1) in the first row (row 1) to image A/D converter 209 where the analog voltage is digitized to a gray level 1 digital value. (Where the gray level image values are already in digital form this analog-to-digital conversion is not necessary.) Second (Step 832), this digitized gray level 1 voltage value is sent or otherwise communicated to gray level logic function block Z103.
Third (Step 833), gray level logic function block Z103 combines information from (i) the manufacturer's (or an otherwise generated or available) gamma table Z103 b and from (ii) a pixel deviation memory Z102 within a pixel deviation logic block, but since there are no values yet stored or only default values stored in the pixel deviation memory there is no change to the manufacturer's value determined by the gamma table. (The pixel deviation logic block and the pixel deviation memory and its stored values are described in greater detail herein below.)
Fourth (Step 834), the digital gray level 1 voltage is sent to Display Controller function logic block Z104.
Fifth (Step 835), Display Controller function logic block Z104 relays the digital gray level 1 voltage value to display first column driver (column driver 1) in function logic block 238.
Sixth (Step 836), Step 831 through Step 835 are repeated for all the pixels in the first row until all the pixels data in row 1 have been loaded into a line buffer in column driver 238.
Seventh (Step 837), on command from Display Controller Z104, the row 1 pixel data is downloaded to a series of digital-to-analog converters (DACs) at the head of each column, where each digital pixel voltage is converted to an analog voltage and loaded onto the line L3 s for each column of pixels.
Eighth (Step 838), display controller Z104, after waiting for the analog voltages on the column lines L3 to stabilize, sends a select row 1 signal to the Row Select function logic block 240.
Ninth (Step 839), the row select function logic block 240 puts a high voltage on line L2 and turns on all the gates to all the transistor T1 in row 1, causing the display voltage on line L3 to flow into capacitor C1 where it is held when the voltage on line L2 goes low; and at the same time transistor T3 is turned on causing charge to flow into capacitor C2 from sensor line L4.
Tenth (Step 840), the movement of charge into capacitor C2 causes a voltage to be sampled and held in function logic block Z101, and a value for each individual sensor S1 in row one is read.
Eleventh (Step 841), the sample and held voltages are digitized and multiplexed (or multiplexed and then digitized) to a serial data stream by A/D Converter 207 and multiplexer (MUX) 207 a.
Twelfth (Step 842), Display Controller Z104 directs the serial sensor data stream to be stored in row 1 of Calibration Memory (Cal Mem) 250 for gray level zero.
Thirteenth (Step 843), Step 836 through Step 843 are repeated until all rows in the frame have been sampled and stored for gray level 0.
Fourteenth (Step 844), Step 831 through Step 843 are repeated for gray level 2. The sensor values read on this frame are for the previous gray level 1 and are stored in calibration memory (Cal Mem 250) as the values for the first gray level or gray level 1.
Fifteenth (Step 845), Steps 831 through Step 844 are repeated until all gray levels have been sampled and saved to the calibration memory Cal Mem 250. Note that as in the pre-manufacture calibration procedure, the last gray level is run for two frames so that the final value is stored in calibration memory Cal Mem 250.
The Pixel Deviation memory has been referred to in the above calibration procedures. In one embodiment, the Pixel Deviation memory stores data or other information that indicates changes, differences, history, aging or other data or information relevant to display operation and calibration. There are many methods to use the data such as aging data stored in Pixel Deviation Memory Z102.
In one embodiment, for example, the voltage can be raised for the aged pixels that have undergone a decrease in luminance to bring them back to the correct ruminations. One possible drawback in some embodiments may be that voltage head room has to be built into the column drivers in Column Drivers 238 to fully utilize this type of correction or compensation. In another embodiment, another way to use the data in Pixel Deviation Memory is implemented to reduce the number of gray levels for the less aged (or less degraded) pixels. Yet another method is to use a 9-bit gray scale in a nominally 8-bit system allowing the highest gray level to increase beyond gray level 256 so that an aged pixel can be effectively be driven to level 257 (or other required gray level value) so that it will emit a luminance at the luminance level specified for a gray level 256. Therefore, all the image gray levels for that pixel would be bumped up by one (or an appropriate number) level of gray. Another method uses spatial dithering, a well know gray scale method, to increase the effective number of gray levels without increasing the number of bits in the logic. Alternately, temporal dithering which is known for conventional displays may be used, or combinations of spatial and temporal dithering can be used. These different methods or techniques and the structures associated with such methods may be used alone or in any combination with each other or with other techniques.
4. Embodiment of the Sensor Read Circuit and Method
FIG. 5 shows an exemplary embodiment of a voltage sensing amplifier read circuit. When the row is selected by Row Select 240 the voltage goes high on line L2 turning on transistor T3 allowing voltage on capacitor C2 to transfer to the plus terminal on operational amplifier OA1. This voltage is amplified according to the ratio of resistance R2 to the resistance (R_L4) of line L4. Typically the resistance R_L4of L4 is on the order of several kilo-ohms (≈10³ohms). Therefore, if resistance R2 is several megohms (≈10⁶ohms) the amplification factor is 30 dB or 1000 to 1. Therefore, a one-millivolt reading on capacitor C2 would show up on pin or node P4 as one-volt and be sent to the sample and hold function block Z101. One possible drawback to this circuit is that any parasitic capacitance on line L4 may reduce the voltage on capacitor C2 during the read time. Therefore this circuit is best used for a display with a low number of rows and therefore a relatively low resolution display, but in any event even with this possible limitation, performance relative to conventional circuits and methods is improved and this potential constraint is only pointed out so that the virtues of a second embodiment may be appreciated to the fullest.
The second embodiment of the read circuit is shown in FIG. 6 and is termed a charge amp/transimpedance amplifier. It gets its name from the fact that the charge required to re-charge capacitor C2 to the full voltage is measured by this circuit and that the input of the circuit (the negative input on charge amplifier CA1) is in the Gig-ohms range or higher and the output at pin or node P3 is almost zero ohms. In fact the node at P3 may sometimes be viewed as a virtual ground.
Operation of this embodiment of the circuit is now described with reference to FIG. 6. A voltage is placed on the plus input pin of first charge amplifier CA1, for example, 10 volts (or other established value). Since initially there is no voltage on the negative input pin, 10 volts instantly appears on pin P3 and is transferred to the negative input pin by C3. Subsequently, the now 10 volts appearing on the negative pin is subtracted from the 10 volts on the positive input pin of the first charge amplifier CA1, causing the voltage on pin P3 to become zero (or substantially zero), but the 10 volts on the negative pin remains, because if the voltage on the negative input pin decays by an amount of voltage (such as by a volt, for example) then this voltage difference (a volt) shows up on pin P3 thereby boosting the voltage on the negative pin back up to 10 volts (or other established value). This is similar to how a charge pump works.
When the circuit settles, there is 10 volts (or other established value) on both the input pin to charge amplifier CA1 and zero volts on pin P3. Node or pin P3 may almost never be exactly 0 volts for a couple of reasons. First of all, the family of operational amplifiers to which charge amplifier CA1 belongs may typically have an offset voltage, because the pair of internal transistors that make up the operational transistor may not usually be exactly alike in characteristics or performance and the difference shows up a the offset voltage. Another reason that the voltage on P3 is not zero is that L4 is connected to all the T3 transistors in the column. This may for example, be as high as one-thousand T3 transistors for a high resolution display having 1000 rows, and an even greater number for larger and/or higher resolution displays. Each of these T3 s may typically have a current leakage on the order of several pico-amps (10⁻¹²amps) that tends to lower the voltage on the negative pin of the charge amplifiers CA1 causing a voltage to appear at pin P3 on top of the afore described offset voltage. In operation, the voltage on pin P3 is sampled before the voltage on L2 goes high, in order to determine the voltage caused by the offset voltage and the leakage current on line L4. Pin P3 is advantageously again sampled after the voltages on line L2 goes high and the two voltage subtracted (using logic functions common in the industry) to generate a difference voltage. The difference between the two readings is a measure of the charge moving into capacitor C2 to bring line L4 and capacitor C2 up to the 10 volts (or other established value) as used in the example.
One advantage of this embodiment is that the reading of charge by a voltage change on pin P3 is independent (or substantially independent) of the capacitance on line L4. The first charge amplifier CA1 keeps line L4 charged to the voltage on its plus (+) input pin. If one electron is removed from L4 then one electron moves out of capacitor C3 to replace it, and any movement of electrons from capacitor C2 cause the voltage to decrease on the negative input pin of charge amplifier CA1 with a corresponding voltage change on pin P3. In one embodiment, the value of the C3 capacitance is selected to be on the same order as the C2 capacitance; therefore, if capacitor C2 has a capacitance of about a picofarad then C3 should also be selected to have a capacitance of about a picofarad, but they need not have identical values. The charge amplifier may be a typical operational amplifier as used in the industry. The size of the charge amplifier (its power rating) is determined by taking into account the leakage on line L4. If for example the leakage of one-thousand T3 transistors is a several nano-amps, then charge amplifier CA1 is advantageously able to supply several nano-amps, and preferable this amount with some safety margin. Embodiments of the invention provide safety margins of a factor of two or three times the leakage current, but lesser or greater safety margins may be implemented.
The discussion has focused on the inventive sensor circuit and its operation. It will be appreciated that any photoconductive (or photoresistive) material may be used for the sensor, including for example any of amorphous silicon, poly-silicon, cadmium selenide, or other photoconductive or photoresistive materials that are know in the art or to be developed in the future. It will also be appreciated that a poly-silicon based sensor may provide for an inherently more stabile operation than an amorphous silicon based sensor, the use of poly-silicon also has inherently greater production costs for a display because the flat panel display manufacturing infrastructure is well established for amorphous silicon, but would need to be rebuilt for poly-silicon at costs measured in the billions of dollars. Therefore the inventive system, structure, and method that permit use of amorphous silicon materials through its calibration and feedback stabilization and control provide distinct advantages. Issues associated with the differences between crystalline silicon (x-Si), poly-silicon (p-Si) and amorphous silicon (a-Si) are described elsewhere in this specification.
5. Embodiment of Method Of Operation the Display Device and System
Having described many features of the inventive system and device and calibration methods and techniques related thereto, further attention is directed to aspects of operation of the display. Attention is focused on embodiments that use the read circuit of the FIG. 6 embodiment, and the pixel circuit of the FIG. 8 embodiment with VC1 and T4 being replaced with charge amplifier CA1 in FIG. 6. It will be apparent to those workers having ordinary skill in the art in light of the description provided here that other combinations of the different embodiments already described may be utilized for the display device and system.
An embodiment of a system and method for operating a display and display system is now described with reference to the flow-chart diagram of FIG. 11. This sequence of steps is exemplary, including optional steps, and it will be apparent that some reordering of steps may be made, and that other steps may be performed in parallel, without deviating from the spirit and scope of the invention.
First (Step 851), the analog image Data function logic block 208 sends the image voltage for the first pixel in the first row (pixel 1, row 1) to the image A/D Converter 209 where the image analog voltage is converted to a digital number representing the image gray level, which, in an 8-bit gray level system, is a number between 0 and 255. For a gray level system supporting a different number of bits of pixel gray level data, the digital number will correspond to that range or to a lesser range if fewer than all possible levels are actually utilized. An 8-bit gray level system with 256 levels for each color channel will be assumed for purposes of this description, but this in no way limits the invention. (Note that performing this procedure or any of the other procedures beginning with the first pixel of the first row and then subsequent pixels of the first row and then all the other rows makes logical sense, but neither this procedure requires this starting point or sequence, and in reality so long as the logic is designed to calibrate and/or operate each pixel in the described manner, any ordering may be used.)
Second (Step 852), this image gray level value between 0 and 255 is sent to the gray level logic function block Z103.
Third (Step 853), gray level logic function block Z103 converts the gray level number for the first pixel in the first row (pixel 1, row 1) into a digital voltage to be applied to the pixel to cause the OLED D1 to emit a photon flux at a level of luminance to equal the image gray level input to the display system at the first step. This voltage is determined using information in the manufacturer's gamma table and the information from the Pixel Deviation Memory Z102. Initially when the display is new there is no deviation data in Pixel Deviation Memory or the values stored there are default values so that these values will not really change the manufacturer's gamma table values, but as the display ages pixel deviation values are built up in the Pixel Deviation Memory Z102.
Fourth (Step 854), the digital voltage for the first pixel of the first row (pixel 1, row 1) is sent to Display Controller Z104.
Fifth (Step 855), Display Controller Z104 relays or otherwise communicates a digital voltage for the first pixel in the first row (pixel 1, row 1) to a line buffer in Column Driver 238. Line buffers for displays are known in the art and not described here in greater detail. The pixel voltage for the first pixel in the first row (pixel 1, row 1) is loaded into the line buffer at the first column position (column position 1).
Sixth (Step 856), Step 851 through Step 855 are repeated for all the pixels in the row until all the pixels in the row have voltages loaded into the line buffer of Column Driver 238.
Seventh (Step 857), on command from the Display Controller Z104, the first row (row 1) pixel data is downloaded to a series of parallel DACs (one for each column in the display) which convert the digital pixel voltages to analog voltage applied to all the L3 (one for each column).
Eighth (Step 858), Display controller Z104, after waiting for the voltage placed on L3 to settle sufficiently, sends a select row 1 signal to Row Select logic block 240.
Ninth (Step 859), Row Select logic block 240 places a high voltage on line L2 for row 1, therefore turning on all T1 transistors in the first row and causing the voltages applied to the line L3 s to be transferred to the C1 capacitors in all the pixels in the first row. This in turn, causes the power TFT transistor T2 to supply current to the D1 OLED diodes in the first row. At the same or substantially the same time, all the sensor TFTs T3 are turned on causing charge to flow into capacitor C2 until capacitor C2 is at the re-charge voltage, for example, the 10V exemplary value described in the earlier example.
Tenth (Step 860), the movement of charge into capacitor C2 causes a voltage to be sampled and held in function logic block Z101 for each pixel in the row. Eleventh (Step 861), the sampled and held voltages are digitized and multiplexed to a serial data stream (the order of digitizing and multiplexing can be reversed without loss of performance) by A/D Converter 207 and multiplexer MUX 207 a.
Twelfth (Step 862), Display Controller Z104 directs the serial sensor data and a stream of calibration data from Calibration Memory (Cal Mem) 250 to meet at Comparator 260 so that a comparison of the serial sensor data and the calibration data for the pixels can be generated.
Thirteenth (Step 863), comparator 250 subtracts (or generates a difference between) the sensor data from the calibration data and sends the result to Pixel Deviation Memory Z102 for the first row (row 1) where the data is stored according to pixel number and row (or any other scheme) and by gray level established for the pixel in the first step (Step 851) that is a digital number representing the image gray level.
Fourteenth (Step 864), Step 856 through Step 863 are repeated for all rows until all rows in the frame have been down loaded and deviations (if any) have been determined and stored in Pixel Deviation Memory.
Fifteenth (Step 865), Step 851 through Step 864 are repeated for each frame (or for any designated frame according to an established plan of operation). While one embodiment performs the procedure for each frame, this is not necessary as pixels do not normally age or otherwise change at this rate. Alternatives may include repeating the procedure at any predetermined number of frames, at device power-on, after a clock determined period of time of operation, in response to an automatically or manually generated signal, or other event. In one embodiment, the procedure is repeated for every frame as once the circuits and methods have been established, there is no cost in performing the procedure for every frame.
6. Embodiment of a Display System
FIG. 12 is an illustration showing an embodiment of a display system according to aspects of the present invention. A display screen 602 having a plurality of emissive pixels 603 of the type already described arranged in an array is held or mounted within a housing 604 such as a monitor frame, cabinet, or other device, and displays an image 605 or other two dimensional graphic. (Note that one-dimensional displays may also be fabricated using the features of the invention but although possibly useful are less interesting.)
Circuits and devices that are formed on the display substrate (often glass or polymeric material) are referred to as on-glass circuits and devices while those that are not formed on the display substrate are referred to as off-glass circuits and devices. The pixels including the pixel emitters D1, sensors S1, sensor capacitors C2, and other elements formed within each of the display pixels are formed on-glass. Other elements may be formed off glass according to conventional display design principles. The on-glass circuits and devices connect to the off-glass circuits and elements such as display drive and control electronics 606 over an interface 608. These display drive and control electronics 606 may be mounted within or without the monitor housing 604 but may usually be housed within so that a user may simply plug in one or more (analog or digital) video or image sources (such as for example, a DVD player 610, a computer 612, a video or digital camera 614, or memory card 616) and have the image or video displayed. Alternatively or in addition, the display system 600 may include image generators within the system, such as a TV tuner or receiver 618 or other internal generator. Of course there may be various other wired or wireless interfaces for sending data to the system 600 for display. A switching device SW 620 may be provided to manually or automatically select which of the sources are to be displayed, and multiple sources may be simultaneously displayed such as by using picture-in-picture technology. The system may also support various forms of image processing and enhancement.
This is only one example of the application of the display technology to imaging applications and it will be appreciated that although a primary application of the technology is to flat-panel displays, the inventive technology may be applied to displays having curved surfaces as well. There are an endless variety of display applications for which the inventive technology may be applied. We list several by way of example but not limitation; they include: any information appliance, a television monitor, a CD player, a DVD player, a computer monitor, a computer system, an automobile instrument panel, an aircraft instrument display panel, a video game, a cellular telephone, a personal data assistant (PDA), a telephone, a graphics system, a printing system, a scoreboard system, document and image scanners, an entertainment system, a domestic or home appliance, a copy machine, a global positioning system navigation display, a dynamic art display device, a digital or video camera, and any combinations of these.
7. Exemplary Embodiments Having Particular Combinations of Features
Various structures, devices, systems, architectures, methods, procedures, and computer programs have been described in this specification and illustrated in the figures. It will be appreciated in light of the description that the invention provides many different features and elements that can be utilized separately or in various combinations. This section of the description sets forth some particular embodiments that have or require particular combinations of features and elements of the invention. The combinations set forth are merely exemplary, and any of the features and elements described in this section or in the specification as a whole may be used separately or in combination. It will also be appreciated that the section headers and sub-headers set forth in the detailed description are merely intended to serve as a guide to the reader and that different aspects, features, and elements of the invention are set forth throughout the specification.
In one aspect the invention provides a system and method for a long-life luminance feedback stabilized display panel. In a first embodiment, the invention provides a stabilized feedback display system comprising: a display device having a plurality of emissive picture elements (pixels) each formed from at least one electronic circuit device; a display driver circuit receiving a raw input image signal from an external image source and applying a corrected image signal the display; a display luminance detector generating at least one display device luminance value; and a processing logic unit receiving the at least one display device luminance value and communicating information to the display driver circuit, the display driver circuit using this communicated information to generate a transformation for generating the corrected image signal from the raw input image signal.
In second particular embodiment of this system, each of the picture elements comprises: a sample and hold circuit; a current source controlled by the sample and hold circuit; a photon emission device supplied by the current source; and a luminance detection device disposed within a separation distance from the photon emission device for detecting photons emitted by the photon emission device.
In a third embodiment, each of the picture elements comprises: a photon emitter; and a photon flux integrator disposed within the pixel to intercept a flux of photons from the photon emitter during a specified time, to undergo an electrical property change in response to the photons intercepted, to integrate or count the number of photons intercepted during the time, and to generate a signal indicative of a the total integrated photon flux during the specified time. In a fourth embodiment, the photon flux integrator comprises: a sensor formed of a photo device that exhibits changing or variable properties in response to a changing or variable photon flux; a charge storage device adapted to store or release charges; and a control circuit that directs charges to or removes charges from the charge storage device in response to the change in resistance or conductance of the sensor. In a fifth embodiment, the charge storage device comprises a capacitor. In a sixth embodiment, the control circuit includes a transistor. In a seventh embodiment, the photo device comprises a photo sensitive resistor that changes its resistance or conductance with changes of photon flux impinging on its surface. In an eighth embodiment, photo device comprises a photo diode the leakage of which increases or decreases with variations of photon flux impingent on its surface. In a ninth embodiment, the photo diode leakage comprises one or more of voltage leakage, current leakage, or charge leakage. In a tenth embodiment, the photo device comprises a phototransistor the current of which increases or decreases with variations of photon flux impingent on the phototransistor surface.
In another embodiment of the system, the luminance detector comprises a photon flux integrator. In another embodiment of the system, the picture element (pixel) comprises a particular photon flux integrator that integrates a photon flux emitted by the photon emission device within the same pixel as the photon flux integrator. In another embodiment of the system, each photon flux integrator comprises: an isolation switching device for isolating a first circuit node from a second circuit node and having an output port (node); a photosensitive unit having an input coupled to the isolation switching device output port (node) and an output connected with a voltage reference node; and a charge storage device having a first electrode coupled with a first port of the isolation switch and a second electrode coupled with the voltage reference node. In another embodiment of the system, the charge storage device comprises a capacitor. In another embodiment of the system, the isolation switch comprises a transistor. In another embodiment of the system, the isolation switch is formed on a substrate as a thin film transistor (TFT). In another embodiment of the system, the thin film transistor is constructed from amorphous silicon. In another embodiment of the system, the thin film transistor is constructed from polysilicon. In another embodiment of the system, the thin film transistor is constructed from cadmium selenide. In another embodiment of the system, the thin film transistor is constructed from any semiconductor material.
In another embodiment of the system, the thin film transistor comprises a channel defined in a material, and the material is selected from the set of materials consisting of: an amorphous silicon channel, a poly-silicon channel, a cadmium selenide channel, a gallium arsenide channel, and a channel formed or defined in any other semiconducting material.
In another embodiment of the system, the display device comprises multiple picture elements arranged in a planar array. In another embodiment of the system, the multiple individual picture elements are addressed by column and row. In another embodiment of the system, the specified time is equal to or less than the row address time. In another embodiment of the system, the specified time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the system, the specified time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the system, the specified time is equal to or less than the frame time. In another embodiment of the system, the specified time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the system, the specified time is equal to multiple frame times.
In another embodiment of the system, the display emissive device is an organic light emitting diode (OLED). In another embodiment of the system, the organic light emitting diode (OLED) is a small molecule OLED. In another embodiment of the system, the organic light emitting diode (OLED) is a polymer OLED (PLED). In another embodiment of the system, the organic light emitting diode (OLED) is a phosphorescent OLED (PHOLED). In another embodiment of the system, the organic light emitting diode (OLED) is constructed from any organic material in any combination of single or multiple layers of organic materials and electrodes. In another embodiment of the system, the organic light emitting diode (OLED) is a active matrix OLED. In another embodiment of the system, the display emissive device is an electroluminescent device. In another embodiment of the system, the display emissive device is a plasma emission device. In another embodiment of the system, the display emissive device is any controllable photon emissive device. In another embodiment of the system, the active matrix is constructed from amorphous silicon. In another embodiment of the system, the active matrix is constructed from poly silicon. In another embodiment of the system, the active matrix is constructed from cadmium selenide. In another embodiment of the system, the active matrix is constructed from any type of semiconductor material.
In another aspect, the invention provides a method for stabilizing a display system comprising: providing a display device having a plurality of emissive picture elements (pixels) each formed from at least one electronic circuit device; receiving a raw input image signal by a display driver circuit from an external image source and applying a corrected image signal to the display; detecting a display luminance and generating at least one display device luminance value; and receiving the at least one display device luminance value by a processing logic unit and communicating information to the display driver circuit, and using this communicated information to generate a transformation for generating the corrected image signal from the raw input image signal.
In another aspect the invention provides a method for operating and individually controlling the luminance of each pixel in an emissive active-matrix display device. In one embodiment of this method, the invention provides a method for controlling the luminance of a picture element (pixel) in a display device, the method comprising: storing a transformation between a digital image gray level value and a display drive signal that generates a luminance from a pixel corresponding to the digital gray level value; identifying a target gray level value for a particular pixel; generating a display drive signal corresponding to the identified target gray level based on the stored transformation and driving the particular pixel with the drive signal during a first display frame; measuring a parameter representative of an actual measured luminance of the particular pixel at the end of the first display time; determining a difference between the identified target luminance and the actual measured luminance for the particular pixel; modifying the stored transformation for the particular pixel based on the determined difference; and storing and using the modified transformation for generating the display drive signal for the particular pixel during a frame time following the first frame time.
In another embodiment of this method, the first display frame is any display frame designated by software programming or by the display user or by a combination of the programming and the user. In another embodiment of this method, the frame time following the first frame is any subsequent frame time. In another embodiment of this method, the first display frame is any display frame designated by software programming or by the display user or by a combination of the programming and the user. In another embodiment of this method, the first display time may be either a single continuous period of time or comprised of a plurality of discontinuous periods of time, and wherein either of the continuous period of time and the discontinuous periods of time may occur during a single frame time or over multiple frame times. In another embodiment of this method, storing and/or the using of the modified transformation for generating the display drive signal for the particular pixel is applied at any subsequent portion of a single frame or at different frames. In another embodiment of this method, the storing and/or the using of the modified transformation for generating the display drive signal for the particular pixel may be either at single continuous period of time or comprised of a plurality of discontinuous periods of time, and wherein either of the continuous period of time and the discontinuous periods of time may occur during a single frame time or over multiple frame times. In another embodiment of this method, the storing and/or the using of the modified transformation for generating the display drive signal for the particular pixel may be either at single continuous period of time or comprised of a plurality of discontinuous periods of time, and wherein either of the continuous period of time and the discontinuous periods of time may occur during a single frame time or over multiple frame times.
In another embodiment of this method, the stored transformation comprises a transformation stored in a gray level logic functional block of a display system. In another embodiment of this method, the stored transformation comprises a transformation stored in a gamma table for a display device. In another embodiment of this method, the measured parameter representative of an actual measured luminance of the particular pixel at the end of the first display time comprises a voltage measurement corresponding to a number of electrons accumulated or released from a charge storage device. In another embodiment of this method, the measured parameter representative of an actual measured luminance of the particular pixel at the end of the first display time comprises a current measurement corresponding to a number of electrons accumulated or released from a charge storage device. In another embodiment of this method, the measured parameter representative of an actual measured luminance of the particular pixel at the end of the first display time comprises a charge measurement corresponding to a number of electrons accumulated or released from a charge storage device. In another embodiment of this method, the charge storage device comprises a capacitor. In another embodiment of this method, the electrons are accumulated or released in proportion to a resistivity or conductivity of a sensor element having a resistivity or conductivity that changes in response to a flux of photons incident on the sensor. In another embodiment of this method, the proportion is a direct proportion.
In another embodiment of this method, the frame time following the first frame time is the next subsequent frame time. In another embodiment of this method, the frame time following the first frame time is any subsequent frame time. In another embodiment of this method, the frame time following the first frame time is a next display device power on time. In another embodiment of this method, the frame time following the first frame time is a frame time at a predetermined or dynamically determined time interval. In another embodiment of this method, a different transformation is stored for each pixel in the display device. In another embodiment of this method, a different transformation is stored for each different gray level that may be displayed for each separately addressable pixel in the display device. In another embodiment of this method, the first display time is the duration of time a pixel is turned on in the display. In another embodiment of this method, the display time is substantially any time between 8 milliseconds and 36 milliseconds. In another embodiment of this method, the display time is substantially any time between 10 milliseconds and 20 milliseconds. In another embodiment of this method, the portion of the frame time comprises substantially the row address time. In another embodiment of the method, the specified time is equal to or less than the row address time. In another embodiment of the method, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the frame time. In another embodiment of the method, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the method, the portion of the frame time is equal to multiple frame times. In another embodiment of the method, the portion of the frame time comprises a time between the row address time and the frame time.
In another embodiment of the method, the measuring of a parameter representative of an actual measured luminance of the particular pixel at the end of the first display time comprises measuring a voltage stored on a capacitor that has either been charged toward or discharged from a known voltage and the amount of charging or discharging is proportional to a photon flux emitted from the emitter within the particular pixel onto a sensor within the same particular pixel.
In another embodiment of the method, the steps of identifying, generating, measuring, determining, modifying, and using are repeated for every pixel in the display. In another embodiment of the method, the determining of a difference between the identified target luminance and the actual measured luminance for the particular pixel is based on a reference integrated photon flux on the particular pixel sensor determined during a display calibration procedure performed during manufacture or when initially used. In another embodiment of the method, the method further comprising a display calibration procedure that determines and stores an initial transformation for every pixel and every gray level the display may be commanded to display.
In another aspect the invention provides a control system for controlling the luminance of a picture element (pixel) in a display device, the control system comprising: a stored pixel gray level to display pixel drive signal transformation for each pixel and each gray level the pixel may be commanded to display, the stored transformation based on performance characteristics of the display pixels during a prior display frame time period; a display drive signal generator responsive to a control that receives a command to display a particular gray level for a particular pixel location and generates a drive signal to the particular pixel using the stored transformation during a first frame time; a luminance measurement circuit for each separate pixel in the display for measuring parameters representative of an actual measured luminances of each of the plurality of particular pixels at the end of the first display time; a comparator circuit for determining a difference between the identified target luminance and the actual measured luminance for the particular pixel; transformation update logic for modifying the stored transformation for each particular pixel based on the determined difference during a portion of a first frame time; and using the modified transformation for generating the display drive signal for the particular pixel during a portion of a second frame time following the first frame time.
In another embodiment of the control system, the stored transformation comprises a transformation stored in a gray level logic functional block of a display system. In another embodiment of the control system, the stored transformation comprises a transformation stored in a gamma table for a display device. In another embodiment of the control, system, the luminance measurement circuit measures a parameter representative of an actual measured luminance of the particular pixel at the end of the first display time and comprises a voltage measurement corresponding to a number of electrons accumulated or released from a charge storage device separately for each pixel of the display. In another embodiment of the control system, the charge storage device comprises a capacitor. In another embodiment of the control system, the electrons are accumulated or released in proportion to a resistivity or conductivity of a sensor element having a resistivity or conductivity that changes in response to a flux of photons incident on the sensor. In another embodiment of the control system, the proportion is a direct proportion. In another embodiment of the control system, the second frame time following the first frame time is a portion of the next subsequent frame time. In another embodiment of the control system, the portion of a second frame time following the portion of the first frame time is a portion of time in any one or plurality of subsequent frame times. In another embodiment of the control system, the frame time following the first frame time is a next display device power on time. In another embodiment of the control system, the frame time following the first frame time is a frame time at a predetermined or dynamically determined time interval. In another embodiment of the control system, a different transformation is stored for each pixel in the display device. In another embodiment of the control system, a different transformation is stored for each different gray level that may be displayed for each separately addressable pixel in the display device. In another embodiment of the control system, the first display time is the duration of time a pixel is turned on in the display.
In another embodiment of the control system, the display time is substantially any time between 8 milliseconds and 36 milliseconds. In another embodiment of the control system, the display time is substantially any time between 10 milliseconds and 20 milliseconds. In another embodiment of the control system, the portion of the frame time comprises substantially the row address time. In another embodiment of the control system, the portion of the frame time comprises a time between the row address time and the frame time. In another embodiment of this control system, the portion of the frame time comprises substantially the row address time. In another embodiment of the control system, the portion of the frame time is equal to or less than the row address time. In another embodiment of the control system, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the control system, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the control system, the portion of the frame time is equal to or less than the frame time. In another embodiment of the control system, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the control system, the portion of the frame time is equal to multiple frame times. In another embodiment of the control system and method, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In another embodiment of the control system, the measuring of a parameter representative of an actual measured luminance of the particular pixel at the end of the first display time comprises measuring a voltage stored on a capacitor that has either been charged toward or discharged from a known voltage and the amount of charging or discharging is proportional to a photon flux emitted from the emitter within the particular pixel onto a sensor within the same particular pixel.
In another embodiment of the control system, the steps of identifying, generating, measuring, determining, modifying, and using are repeated for every pixel in the display. In another embodiment of the control system, the determining of a difference between the identified target luminance and the actual measured luminance for the particular pixel is based on a reference integrated photon flux on the particular pixel sensor determined during a display calibration procedure performed during manufacture or when initially used. In another embodiment of the control system, the control system further comprises a display calibration procedure that determines and stores an initial transformation for every pixel and every gray level the display may be commanded to display. In another embodiment of the control system, the measured parameter representative of an actual measured luminance of the particular pixel at the end of the first display time comprises a current measurement corresponding to a number of electrons accumulated or released from a charge storage device. In another embodiment of the control system, the measured parameter representative of an actual measured luminance of the particular pixel at the end of the first display time comprises a charge measurement corresponding to a number of electrons accumulated or released from a charge storage device. In another embodiment of the control system, the first display frame is any display frame designated by software programming or by the display user or by a combination of the programming and the user. In another embodiment of the control system, the frame time following the first frame is any subsequent frame time. In another embodiment of the control system, the first display frame is any display frame designated by software programming or by the display user or by a combination of the programming and the user. In another embodiment of the control system, the first display time may be either a single continuous period of time or comprised of a plurality of discontinuous periods of time, and wherein either of the continuous period of time and the discontinuous periods of time may occur during a single frame time or over multiple frame times.
In another embodiment of the control system, the storing and/or the using of the modified transformation for generating the display drive signal for the particular pixel is applied at any subsequent portion of a single frame or at different frames. In another embodiment of the control system, the storing and/or the using of the modified transformation for generating the display drive signal for the particular pixel may be either at single continuous period of time or comprised of a plurality of discontinuous periods of time, and wherein either of the continuous period of time and the discontinuous periods of time may occur during a single frame time or over multiple frame times. In another embodiment of the control system, the storing and/or the using of the modified transformation for generating the display drive signal for the particular pixel may be either at single continuous period of time or comprised of a plurality of discontinuous periods of time, and wherein either of the continuous period of time and the discontinuous periods of time may occur during a single frame time or over multiple frame times.
In another aspect the invention provides a feedback control system and method for operating a high performance stabilized active matrix emissive display. In one embodiment of this method, the invention provides a system for operating an active-matrix OLED display device or other emissive display device having a plurality of pixels, the system comprising: a gray level logic coupled to an external source of digital image data, the gray level logic including a transformation for transforming a first representation of an image pixel gray level value to a second representation of the same image gray level pixel value; a display controller operable to receive inputs from the gray level logic and to communicate image and control signals to display matrix row select and column drive circuits, the row select and column drivers operable to cause an image to be displayed during a frame time for a plurality of pixels; each of the plurality of pixels including a pixel photon flux emitter and a pixel photon flux receptor that integrates at least a portion of the emitted photon flux from the emitter during a portion of the pixel display frame time and generates an output signal indicative of the integrated photon flux; a calibration memory storing a calibration value for each pixel and each pixel value that may be displayed by the pixel; a comparator receiving the output signals from each of the plurality of pixels and the calibration memory and comparing the received output signals with a like plurality of corresponding signals from the calibration memory to compute a difference signal for each pixel; and a pixel deviation logic receiving difference signals from the comparator and directing a change in the gray level logic transformation for at least pixel locations and pixel gray level values that have a difference between the calibration and the measured values.
In another embodiment of this system, the pixel deviation logic includes a pixel deviation memory for storing a deviations between a calibrated pixel luminance value and a measured pixel luminance value. In another embodiment of this system, the calibration values are voltage values and the output signals indicative of the integrated photon flux are voltages, and the comparator is a voltage comparison circuit. In another embodiment of this system, the calibration values are current values and the output signals indicative of the integrated photon flux are currents, and the comparator is a current based charge amp/impedance transformation circuit. In another embodiment of this system, the calibration values are charge values and the output signals indicative of the integrated photon flux are charges, and the comparator is a charge based comparison circuit. In another embodiment of this system, the calibration values are voltage values and the output signals indicative of the integrated photon flux are charges, and the comparator is a voltage comparison circuit.
In another embodiment of this system, the output signal indicative of the integrated photon flux are analog signals, and the system further comprising: a sample and hold circuit for sampling an analog signal as a voltage representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value; an analog to digital converter converting the sampled and held analog signals to digital values; and a multiplexer coupled to the analog-to-digital converter and receiving digital values and communicating them to the comparator according to a predetermined format and order.
In another embodiment of this system, the output signal indicative of the integrated photon flux are analog signals, and the system further comprising: a sample and hold circuit for sampling an analog signal as a voltage representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal; a multiplexer coupled to the sample and hold circuit and receiving the sampled and held analog values; and an analog to digital converter converting the sampled and held analog signals received from the multiplexer and converting the analog values to digital values and communicating them to the comparator according to a predetermined format and order.
In another embodiment of this system, the system further comprising the external source of digital image data. In another embodiment of this system, the external source of digital image data comprises either a source of digital image data, or the combination of an analog image data and a image analog-to-digital converter.
In another embodiment of this system, the portion of the frame time comprises the row address time or a shorter period of time. In another embodiment of this system, the portion of the frame time comprises substantially the entire frame time. In another embodiment of this system, the portion of the frame time comprises at least 50 percent of the entire frame time. In another embodiment of this system, the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time. In another embodiment of this system, the portion of the frame time comprises at least 1 millisecond. In another embodiment of the control system, the portion of the frame time comprises substantially the row address time. In another embodiment of the control system, the portion of the frame time comprises a time between the row address time and the frame time. In another embodiment of this control system, the portion of the frame time comprises substantially the row address time. In another embodiment of the control system, the portion of the frame time is equal to or less than the row address time. In another embodiment of the control system, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the control system, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the control system, the portion of the frame time is equal to or less than the frame time. In another embodiment of the control system, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the control system, the portion of the frame time is equal to multiple frame times. In another embodiment of the control system, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In another embodiment, the invention provides a method for operating an active-matrix display device having a plurality of pixels, the method comprising: storing a calibration value for each pixel and each gray level value that may be displayed by each of the pixels in a calibration memory; storing a transformation in a transformation memory for transforming first representations of an image pixel gray level values to second representations of the same image gray level pixel values for each pixel and each gray level that may be displayed by each of the pixels in the display; receiving first gray level representations of image pixel gray level values for a plurality of pixels from an external source; transforming the first gray level representations to an equivalent number of second gray level representations for each pixel in accordance with the stored transformation; generating image data and control signals for driving pixel elements in a matrix display device during a present display frame time in accordance with the second representation of the image gray level pixel value; generating an integrated photon flux signal for each of the plurality of pixels in the display indicative of the integrated photon flux on each of the plurality of pixels in the display during a portion of the present display frame time; comparing the plurality of integrated photon flux signals for a commanded gray level and with the calibration values for the same gray level for each pixel on a pixel-by-pixel basis and generating a plurality of comparison results indicating a difference between the commanded gray level and the measured gray level; and identifying any deviation for each pixel based on the comparison results and directing a change in the stored transformation to be applied during a subsequent display frame time for at least pixel locations and pixel gray level values that have a difference between the calibration and the measured values.
In one embodiment of this method, the step of identifying any deviation includes storing pixel deviations between a calibrated pixel luminance value and a measured pixel luminance value in a pixel deviation memory.
In one embodiment of this method, the calibration values are voltage values and the integrated photon flux values are voltages, and the comparison includes a comparison of voltages. In one embodiment of this method, the calibration values are current values and the integrated photon flux values are currents, and the comparison includes a comparison of currents. In one embodiment of this method, the calibration values are charge values and the integrated photon flux values are charges, and the comparison includes a comparison of charges.
In one embodiment of this method, the integrated photon flux values are analog signals, and the method further comprising: sampling an analog signal as a voltage representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value; and converting the analog sampled signal to a digital signal.
In one embodiment of this method, the integrated photon flux values are analog signals, and the method further comprising: sampling an analog signal as a charge representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value; and converting the analog sampled signal to a digital signal.
In one embodiment of this method, the integrated photon flux values are analog signals, and the method further comprising: sampling an analog signal as a current representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value; and converting the analog sampled signal to a digital signal.
In one embodiment of this method, the method further comprising generating the first gray level representations of image pixel gray level values for a plurality of pixels. In one embodiment of this method, the digital image data comprises either a digital image data, or an analog image data that is converted to a digital data by an image analog-to-digital converter. In one embodiment of this method, the portion of the frame time comprises a time less than or equal to the row address time.
In one embodiment of this method, the portion of the frame time comprises substantially the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least 50 percent of the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least 1 millisecond. In another embodiment of the method, the portion of the frame time comprises a time between the row address time and the frame time. In another embodiment of this method, the portion of the frame time comprises substantially the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the row address time. In another embodiment of the method, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the frame time. In another embodiment of the method, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the method, the portion of the frame time is equal to multiple frame times. In another embodiment of the method, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In another embodiment of the method, the subsequent display frame time is the next display time following the present display frame time. In another embodiment of the method, the subsequent display frame time is any display frame time following the present display frame time. In another embodiment of the method, the subsequent display frame time is a frame time at display initialization or power-on. In another embodiment of the method, the image data and control signals include display matrix row and column control and drive signals operable to cause an image to be displayed during a frame time for a plurality of pixels.
In another embodiment of the method, the pixels include at least one thin film transistor constructed from amorphous silicon. In another embodiment of the method, the pixels include at least one thin film transistor constructed from polysilicon. In another embodiment of the method, the pixels include at least one thin film transistor constructed from cadmium selenide. In another embodiment of the method, the pixels include at least one thin film transistor constructed from semiconductor material.
In another embodiment of the method, the portion of the present display frame time is equal to or less than the row address time. In another embodiment of the method, the portion of the present display frame time is equal to or less than the frame time. In another embodiment of the method, the portion of the present display frame time is equal to multiple frame times. In one embodiment of this method, the portion of the frame time comprises substantially the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least 50 percent of the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least 1 millisecond. In another embodiment of the method, the portion of the frame time comprises a time between the row address time and the frame time. In another embodiment of this method, the portion of the frame time comprises substantially the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the row address time. In another embodiment of the method, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the frame time. In another embodiment of the method, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the method, the portion of the frame time is equal to multiple frame times. In another embodiment of the method, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In another embodiment of the method, the display device is an organic light emitting diode (OLED) pixel display device. In another embodiment of the method, the organic light emitting diode (OLED) is a small molecule OLED. In another embodiment of the method, the organic light emitting diode (OLED) is a polymer OLED (PLED). In another embodiment of the method, the organic light emitting diode (OLED) is a phosphorescent OLED (PHOLED). In another embodiment of the method, the organic light emitting diode (OLED) is constructed from any organic material in any combination of single or multiple layers of organic materials and electrodes. In another embodiment of the method, the organic light emitting diode (OLED) is a active matrix OLED. In another embodiment of the method, the display device is an electroluminescent device. In another embodiment of the method, the display device is an plasma emission device. In another embodiment of the method, the display device is any controllable photon emissive device.
In another embodiment of the method, the active matrix display device is constructed from amorphous silicon. In another embodiment of the method, the active matrix display device is constructed from poly-silicon. In another embodiment of the method, the active matrix display device is constructed from cadmium selenide. In another embodiment of the method, the active matrix display device is constructed from any type of semiconductor material.
In another aspect the invention provides an active-matrix display and pixel structure for feedback stabilized flat panel display. In one embodiment the invention provides an emissive pixel device having an integrated luminance sensor, the pixel device comprising: a light emitting device; a drive circuit generating a current to drive the light emitting device to a predetermined luminance corresponding to an image voltage and applying the drive current to the light emitting device during a frame time; a photo sensor that exhibits a change in electrical characteristic in response to a change in incident photon flux disposed near the light emitting device to intercept a measurable photon flux when the light emitting device is in an emitting state; a charge storage device coupled with the sensor for accumulating or releasing charges and exhibiting a capacitance charge and voltage proportional to the charge at a time; and a control circuit or other control means for controlling the charging and discharging of the charge storage device in response to changes in the electrical characteristics of the sensor during at least a portion of the frame time.
In one embodiment of this device, the device further comprising: a voltage reading circuit for measuring the voltage across the charge storage device at the end of the at least a portion of a display frame time, the measured voltage being an indication of a measured luminance of the pixel during the portion of the frame time.
In another embodiment of the device, the device further comprising: a current reading circuit for measuring the current from the charge storage device at the end of the at least a portion of a display frame time, the measured current being an indication of a measured luminance of the pixel during the portion of the frame time.
In another embodiment of the device, the device further comprising: a charge reading circuit for measuring the charge on the charge storage device at the end of the at least a portion of a display frame time, the measured charge being an indication of a measured luminance of the pixel during the portion of the frame time.
In another embodiment of these devices, the device further comprising a feedback control circuit for applying a correction to the pixel drive circuit during a subsequent frame time so that the measured luminance during the subsequent frame time will have a smaller variation from the reference luminance than during the frame time of the measurement.
In one embodiment of the device, the voltage across the charge storage device represents an integrated photon flux during the portion of the frame time over which the control circuit permitted charging or discharging or the charge storage device. In another embodiment of the device, the voltage reading circuit further comprising a voltage comparator circuit that receives the voltage across the charge storage device and a reference voltage corresponding to a target luminance and generates a difference signal representing the difference between the target luminance and the measured luminance. In another embodiment of the device, the current reading circuit further comprising a current comparator circuit that receives the current from the charge storage device and a reference current corresponding to a target luminance and generates a difference signal representing the difference between the target luminance and the measured luminance. In another embodiment of the device, the charge reading circuit further comprising a charge comparator circuit that receives the charge on the charge storage device and a reference charge corresponding to a target luminance and generates a difference signal representing the difference between the target luminance and the measured luminance. In another embodiment of the device, the read circuit is configured as a charge amp/transimpedance amplifier having a charge amplifier circuit. In another embodiment of the device, the charge amp/transimpedance amplifier measures the charge required to re-charge the storage capacitor to the full charge voltage, and that an inverting (−) input of the charge amplifier circuit has a resistance that is at least one Gig-ohm and the output of the charge amplifier circuit has a resistance that is between about 0 ohms and 100 ohms. In another embodiment of the device, the resistance of the output of the charge amplifier circuit is a resistance that is substantially between 0 ohms and 10 ohms. In another embodiment of the device, the control circuit comprises at least one transistor. In another embodiment of the device, the charge storage device comprises at least one capacitor. In another embodiment of the device, the charge storage device comprises multiple capacitors. In another embodiment of the device, the sensor device comprises a photoresistive or photoconductive device having a resistivity or conductivity that varies according to the number of photons incident on it. In another embodiment of the device, the light emitting device emits photons. In another embodiment of the device, the light emitting device comprises a light emitting diode. In another embodiment of the device, the light emitting device comprises an organic light emitting diode. In another embodiment of the device, the light emitting device comprises an inorganic light emitting diode. In another embodiment of the device, the light emitting device is one of a plurality of light emitting devices arranged as a two-dimensional array arranged as rows and columns. In another embodiment of the device, the light emitting device comprises a light emitting diode.
In another embodiment of the device, the light emitting device comprises an organic light emitting diode. In another embodiment of the device, the organic light emitting diode (OLED) is a small molecule OLED. In another embodiment of the device, the organic light emitting diode (OLED) is a polymer OLED (PLED). In another embodiment of the device, the organic light emitting diode (OLED) is a phosphorescent OLED (PHOLED). In another embodiment of the device, the organic light emitting diode (OLED) is constructed from any organic material in any combination of single or multiple layers of organic materials and electrodes. In another embodiment of the device, the organic light emitting diode (OLED) is a active matrix OLED. In another embodiment of the device, the display device is an electroluminescent device. In another embodiment of the device, the display device is an plasma emission device. In another embodiment of the device, the display device is any controllable photon emissive device.
In another embodiment of the device, the active matrix display device is constructed from amorphous silicon. In another embodiment of the device, the active matrix display device is constructed from poly-silicon. In another embodiment of the device, the active matrix display device is constructed from cadmium selenide. In another embodiment of the device, the active matrix display device is constructed from any type of semiconductor material.
In another embodiment of the device, the photo sensor element includes a resistive component and the resistance changes in proportion to the photon flux incident upon it. In another embodiment of the device, the photo sensor element includes photodiode exhibiting a change of resistance and/or conductance in response to photon flux incident upon it. In another embodiment of the device, the photo sensor element includes phototransistor exhibiting a change of resistance and/or conductance in response to photon flux incident upon it. In another embodiment of the device, the photo sensor intercepts photons emitted by the light emitting device and converts them to charge carriers making the material of the sensor a better current conductor and thus having lower electrical resistance. In another embodiment of the device, the lower resistance of the photo sensor drains a charge stored on a capacitor coupled in parallel across a two-terminal resistive component of the sensor. In another embodiment of the device, the pixel circuit includes a photon flux count integrator comprising the sensor having a resistive component and a capacitor. In another embodiment of the device, the amount of drained charge is proportional to the number of photons incident on the sensor during a portion of the frame time and the voltage on the capacitor at the end of the portion of the frame time is an indicator of the photons counted or integrated during the portion of the frame time.
In another embodiment of the device, a particular luminance level produces a photocurrent in the sensor, and the magnitude of the photocurrent serves as an indication of the luminance (photon flux through the sensor). In another embodiment of the device, the photocurrent is proportional to the luminance. In another embodiment of the device, the photocurrent is directly proportional to the luminance. In another embodiment of the device, the photo responsive element is disposed within the same pixel as the light emitting diode. In another embodiment of the device, the photo responsive element is integrated with the light emitting diode so that all or substantially all the photon flux emitted by the light emitting diode is incident on the photo responsive element. In another embodiment of the device, the photo responsive element has a surface or layer that is physically located in contact with a semiconductor anode side of the light emitting device.
In another embodiment of the device, the portion of the frame time comprises the row address time or less. In another embodiment of the device, the portion of the frame time comprises substantially the entire frame time. In another embodiment of the device, the portion of the frame time comprises at least 50 percent of the entire frame time. In another embodiment of the device, the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time. In another embodiment of the device, the portion of the frame time comprises at least 1 millisecond. In another embodiment of the device, the portion of the frame time is equal to or less than the row address time. In another embodiment of the device, the portion of the frame time comprises a time between the row address time and the frame time. In another embodiment of this device, the portion of the frame time comprises substantially the row address time. In another embodiment of the device, the portion of the frame time is equal to or less than the row address time. In another embodiment of the device, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the device, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the device, the portion of the frame time is equal to or less than the frame time. In another embodiment of the device, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the device, the portion of the frame time is equal to multiple frame times. In another embodiment of the device, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In another aspect, the invention provides a method of operating an emissive pixel device having an integrated luminance sensor, the method comprising: generating a current to drive a light emitting device to a predetermined luminance corresponding to an image voltage and applying the drive current to the light emitting device during a frame time; a charge storage device coupled with the sensor for accumulating or releasing charges and exhibiting a capacitance charge and voltage proportional to the charge at a time; exposing a photo sensor that exhibits a change in electrical characteristic in response to a change in incident photon flux to photons emitted by the light emitting device during the frame time; accumulating (charge) or draining (discharge) charges to or from a charge storage device coupled with the sensor, the sensor including a component that controls the rate of accumulation or release of charges during the frame time; measuring the voltage arising from the charges present on the charge storage device at the end of a portion of the frame time, the measured voltage being an indication of an actual luminance during the portion of the frame time; comparing the luminance related measured voltage with a reference target luminance for the pixel emitter image voltage and pixel emitter drive current to generate a difference value; and applying the difference value as a feedback input to a correction circuit that modifies the image voltage and drive current for the same pixel during a subsequent frame time.
In one embodiment of the method, the light emitting device comprises an inorganic light emitting diode. In one embodiment of the method, the light emitting device comprises an organic light emitting diode (OLED). In one embodiment of the method, the organic light emitting diode (OLED) is a small molecule OLED. In one embodiment of the method, the organic light emitting diode (OLED) is a polymer OLED (PLED). In one embodiment of the method, the organic light emitting diode (OLED) is a phosphorescent OLED (PHOLED). In one embodiment of the method, the organic light emitting diode (OLED) is constructed from any organic material in any combination of single or multiple layers of organic materials and electrodes. In one embodiment of the method, the organic light emitting diode (OLED) is a active matrix OLED. In one embodiment of the method, the display emissive device is an electroluminescent device. In one embodiment of the method, the display emissive device is an plasma emission device. In one embodiment of the method, the display emissive device is any controllable photon emissive device.
In one embodiment of the method, the active matrix is constructed from amorphous silicon. In one embodiment of the method, the active matrix is constructed from poly silicon. In one embodiment of the method, the active matrix is constructed from cadmium selenide. In one embodiment of the method, the active matrix is constructed from any type of semiconductor material.
In one embodiment of the method, the photo sensor intercepts photons emitted by the light emitting device and converts them to charge carriers making the material of the sensor a better current conductor and thus having lower electrical resistance. In one embodiment of the method, the amount of accumulated or drained charge is proportional to the number of photons incident on the sensor during a portion of the frame time and the voltage on the capacitor at the end of the portion of the frame time is an indicator of the photons counted or integrated during the portion of the frame time. In one embodiment of the method, a particular luminance level produces a photocurrent in the sensor, and the magnitude of the photocurrent serves as an indication of the luminance (photon flux through the sensor). In one embodiment of the method, the photo sensor element is disposed within the same pixel as the light emitting diode.
In one embodiment of the method, the portion of the frame time comprises the row address time or less. In one embodiment of the method, the portion of the frame time comprises substantially the entire frame time. In one embodiment of the method, the portion of the frame time comprises at least 50 percent of the entire frame time. In one embodiment of the method, the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time. In one embodiment of the method, the portion of the frame time comprises at least 1 millisecond. In one embodiment of the method, the portion of the frame time is equal to or less than the row address time.
In another embodiment of the method, the portion of the frame time comprises a time between the row address time and the frame time. In another embodiment of this method, the portion of the frame time comprises substantially the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the row address time. In another embodiment of the method, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the frame time. In another embodiment of the method, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the method, the portion of the frame time is equal to multiple frame times. In another embodiment of the method, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In another aspect the invention provides a device and method for operating a self-calibrating emissive pixel. In one embodiment the invention provides an emissive pixel device and a method for operating a self-calibrating pixel, the method comprising: establishing a sensor capacitor at a predetermined starting voltage; delivering a current to a photon emitting device to cause photons to be emitted at a predetermined target photon emission level; exposing a sensor device, having electrical properties that varies according to a photon flux on the sensor device, to the emitted photon emission during at least a portion of a display frame time; permitting the sensor capacitor to either charge or discharge from the predetermined starting voltage through the sensor device so that the portion of the frame time and the average resistance of the sensor during the portion of the frame time determine the amount of charge on the sensor capacitor; measuring the voltage or charge remaining on the sensor capacitor at the end of a portion of the frame time as an indication of the integrated photon flux and pixel luminance during the portion of the frame time used for measurement; and modifying the image voltage and current to be applied to the same pixel and gray level during a subsequent display frame time using the measured sensor capacitor voltage as a feedback parameter.
In one embodiment of this method, the sensor comprises a photoresistive device. In one embodiment of this method, the sensor comprises a photoconductive device. In one embodiment of this method, the sensor comprises at least one of a photodiode, a photoresistor, a photoconductor, and a phototransistor. In one embodiment of this method, the sensor comprises a phototransistor. In one embodiment of this method, the sensor comprises a photodiode. In one embodiment of this method, the established capacitor starting voltage is established by charging the sensor capacitor to a predetermined charging voltage. In one embodiment of this method, the established capacitor starting voltage is established at substantially zero volts. In one embodiment of this method, the predetermined capacitor starting voltage is a non-zero voltage having a voltage magnitude. In one embodiment of this method, for a sensor capacitor that was charged to a non-zero predetermined starting voltage and then permitted to discharge, the difference voltage remaining across the sensor capacitor is an indication of total photon integrated flux during the portion of the frame time.
In one embodiment of this method, for a sensor capacitor that was uncharged at substantially zero volts or charged at a different voltage and then permitted to charge during the portion of the frame integration time, the difference of the starting voltage and the ending voltage across the sensor capacitor is an indication of total photon integrated flux during the portion of the frame time.
In one embodiment of this method, the step of modifying the image voltage and current to be applied to the same pixel and gray level during a subsequent display frame further comprises comparing the measured sensor capacitor voltage with a reference calibration voltage stored in a memory and generating a correction using the difference between these voltages.
In one embodiment of this method, the method is performed substantially in parallel for each pixel of a two-dimensional active-matrix pixel array.
In one embodiment of this method, the current delivered is delivered by applying a voltage to a control device that delivers a current corresponding to that voltage to the photon emitting device to cause photons to be emitted at a predetermined target photon emission level.
In one embodiment of this method, the portion of the frame time comprises the row address time or less. In one embodiment of this method, the portion of the frame time comprises substantially the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least 50 percent of the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time. In one embodiment of this method, the portion of the frame time comprises at least 1 millisecond. In one embodiment of this method, the portion of the frame time is equal to or less than the row address time. In another embodiment of the method, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the frame time. In another embodiment of the method, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the method, the portion of the frame time is equal to multiple frame times. In another embodiment of the method, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In one embodiment of the method, the method further comprising charging a sensor coupled capacitor to a first predetermined voltage through a sensor line by a transistor and capacitor charging voltage source prior to an integration frame time. In one embodiment of the method, a capacitor charge voltage is applied over a sensor line and the sensor line only delivers current when a measurement is being made of the sensor capacitor voltage or when sensor capacitor is being recharged and the voltage is highly stable and not subject to variation.
In another aspect the invention provides high-performance emissive display device for computers, information appliances, and entertainment systems. In one embodiment the invention provides an information appliance comprising: a flat panel or other display device comprising a plurality of active-matrix pixels arranged as a two-dimensional array, each pixel including an organic light emitting diode emitter, an emitter drive circuit receiving an input image data for each pixel and generating a pixel drive signal intended to produce a corresponding target pixel luminance during a frame time, and an emitter luminance sensor and measurement circuit that measures an electrical parameter indicative of the actual luminance of each pixel over a portion of a measurement display frame time; and a display logic subsystem coupled to the flat panel display device and receiving the pixel luminance related electrical parameter for each pixel and generating a correction to be applied during a frame time subsequent to the measurement display frame time to the input image data for each pixel based on a difference between the target pixel luminance and the measured pixel luminance.
In one embodiment, the information appliance further comprises at least one of: a television monitor, a television receiver, a CD player, a DVD player, a computer monitor or display, a computer system, an automobile instrument panel, an aircraft instrument display panel, a video game, a cellular telephone, a personal data assistant (PDA), a telephone, a graphics system, a printing system, a scoreboard system, an entertainment system, a domestic or home appliance, a copy machine, a global positioning system navigation display, a dynamic art display device, a camera, and any combinations thereof.
In one embodiment of this information appliance, each of the pixels comprises: a light emitting device; a drive circuit generating a current to drive the light emitting device to a predetermined luminance corresponding to an image voltage and applying the drive current to the light emitting device during a frame time; a photo sensor that exhibits a change in electrical characteristic in response to a change in incident photon flux disposed near the light emitting device to intercept a measurable photon flux when the light emitting device is in an emitting state; a charge storage device coupled with the sensor for accumulating or releasing charges and exhibiting a capacitance charge and voltage proportional to the charge at a time; a control circuit controlling the charging and discharging of the charge storage device in response to changes in the electrical characteristics of the sensor during at least a portion of the frame time; a voltage reading circuit for measuring the voltage across the charge storage device at the end of the at least a portion of a display frame time, the measured voltage being an indication of a measured luminance of the pixel during the portion of the frame time; and a feedback control circuit for applying a correction to the pixel drive circuit during a subsequent frame time so that the measured luminance during the subsequent frame time will have a smaller variation from the reference luminance than during the frame time of the measurement.
In another embodiment, the invention provides a method of operating a display device of the type having a plurality of active-matrix pixels arranged as a two-dimensional array, each pixel including a light emitting diode emitter and an emitter drive circuit receiving an input image data for each pixel and generating a pixel drive signal intended to produce a corresponding target pixel luminance during each frame display time; the method characterized in that the method further includes: measuring a voltage indicative of a photon flux intercepted by an emitter luminance measurement circuit during at least a portion of a first frame time; and comparing the measured voltage corresponding to a measured luminance with a reference voltage corresponding to a reference luminance to generate a difference signal and using the difference signal to modify the input image data for each pixel during a subsequent frame display time so that the pixel luminance during the subsequent display frame time will more nearly equal the reference luminance.
In one embodiment of this method, the portion of the frame time comprises the row address time or less. In one embodiment of this method, the portion of the frame display time comprises substantially the entire frame time. In one embodiment of this method, the portion of the frame display time comprises at least 50 percent of the entire frame time. In one embodiment of this method, the portion of the frame display time comprises at least between 90 percent and 100 percent of the entire frame time. In one embodiment of this method, the portion of the frame display time comprises at least 1 millisecond. In one embodiment of this method, the portion of the frame time is equal to or less than the row address time. In another embodiment of the method, the portion of the frame time is between 0.01 (1 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is between 0.1 (10 percent) of the row address time and the row address time. In another embodiment of the method, the portion of the frame time is equal to or less than the frame time. In another embodiment of the method, the portion of the frame time is greater than 0.01 of the row address time and less than or equal to the frame time. In another embodiment of the method, the portion of the frame time is equal to multiple frame times. In another embodiment of the method, the portion of the frame time comprises a time between 0.01 of the row address time and the frame time.
In one embodiment of the method, the subsequent frame display time is a frame display immediately following the first display time. In one embodiment of the method, the subsequent frame display time is a frame display a predetermined number of display frames following the first frame display time for which the luminance measurement was made, and wherein the predetermined number of frames is any integer number of frames N. In one embodiment of the method, the subsequent frame display time is a frame display at the occurrence of a predetermined or dynamically determined event.
In one embodiment of the method, the occurrence of a predetermined or dynamically determined event is selected from a display initialization event, a display power-on event, a display time of operation event, a user initiated event, any automatic policy or rule based event, and combinations of these.
In one embodiment of the method, the display device comprises a flat panel display device that is a component in an overall system and wherein the system is selected from the set of systems consisting of: any information appliance, a television monitor, a CD player, a DVD player, a computer monitor, a computer system, an automobile instrument panel, an aircraft instrument display panel, a video game, a cellular telephone, a personal data assistant (PDA), a telephone, a graphics system, a printing system, a scoreboard system, an entertainment system, a domestic or home appliance, a copy machine, a global positioning system navigation display, a dynamic art display device, a camera, and any combinations thereof.
In one embodiment of the appliance and method, the light emitting device comprises an organic light emitting diode (OLED). In one embodiment of the appliance and method, the organic light emitting diode (OLED) is a small molecule OLED. In one embodiment of the appliance and method, the organic light emitting diode (OLED) is a polymer OLED (PLED). In one embodiment of the appliance and method, the organic light emitting diode (OLED) is a phosphorescent OLED (PHOLED). In one embodiment of the appliance and method, the organic light emitting diode (OLED) is constructed from any organic material in any combination of single or multiple layers of organic materials and electrodes. In one embodiment of the appliance and method, the organic light emitting diode (OLED) is a active matrix OLED. In one embodiment of the appliance and method, the light emitting device is an electroluminescent device. In one embodiment of the appliance and method, the light emitting device is a plasma emission device. In one embodiment of the appliance and method, the light emitting device is any controllable photon emissive device.
In one embodiment of the appliance and method, the display device is constructed from amorphous silicon. In one embodiment of the appliance and method, the display device is constructed from poly silicon. In one embodiment of the appliance and method, the display device is constructed from cadmium selenide. In one embodiment of the appliance and method, the display device is constructed from any type of semiconductor material.
In another aspect, the invention provides an integrated circuit. In one embodiment, the integrated circuit comprises: a sample and hold circuit receiving an analog voltage signals characterizing integrated photon flux and luminance measurements from a plurality of display pixels; an analog-to-digital converter receiving the sampled and held analog voltage signal and converting the analog signal to a digital signal; a calibration value memory for storing a reference value for each pixel and for each gray level value the pixel may be required to display; at least one comparator receiving at least one of the converted digital signal value indicating a particular measured pixel luminance and at least one reference signal value indicating a reference luminance for the same pixel and generating a difference signal indicating a deviation of the measured pixel luminance from the reference pixel luminance; and a pixel deviation logic including a pixel deviation memory for storing an indication of the deviation for the pixel. In another embodiment of the integrated circuit, the pixel deviation memory and the calibration value memory are logically defined within a common physical memory. In another embodiment of the integrated circuit, the pixel deviation memory and the calibration value memory are defined within different physical memories.
Having described several methods in considerable detail it will be appreciated that these descriptions include optional device, apparatus, system, and methodological steps (features) that may be combined so that fewer than the recited number of features may be implemented to achieve the same or substantially same result. It will also be appreciated that the order of the steps in method claims may be modified in many instances to achieve the same or substantially the same results and that the connectivity of circuits and devices may often be modified while still achieving the performance of the invention.
From the foregoing it will be appreciated that, although specific embodiments of the invention have been described herein for purposes of illustration, various modifications may be made without deviating from the spirit and scope of the invention.

Claims

1. A system for operating an active-matrix OLED display device having a plurality of pixels, the system comprising:

a gray level logic coupled to an external source of digital image data, the gray level logic including a transformation for transforming a first representation of an image pixel gray level value to a second representation of the same image gray level pixel value;

a display controller operable to receive inputs from the gray level logic and to communicate image and control signals to display matrix row select and column drive circuits, the row select and column drivers operable to cause an image to be displayed during a frame time for a plurality of pixels;

each of the plurality of pixels including a pixel photon flux emitter and a pixel photon flux receptor that integrates at least a portion of the emitted photon flux from the emitter during a portion of the pixel display frame time and generates an output signal indicative of the integrated photon flux;

a calibration memory storing a calibration value for each pixel and each pixel value that may be displayed by the pixel;

a comparator receiving the output signals from each of the plurality of pixels and the calibration memory and comparing the received output signals with a like plurality of corresponding signals from the calibration memory to compute a difference signal for each pixel; and

a pixel deviation logic receiving difference signals from the comparator and directing a change in the gray level logic transformation for at least pixel locations and pixel gray level values that have a difference between the calibration and the measured values.

2. A system as in claim 1, wherein the pixel deviation logic includes a pixel deviation memory for storing a deviations between a calibrated pixel luminance value and a measured pixel luminance value.

3. A system as in claim 1, wherein the calibration values are voltage values and the output signals indicative of the integrated photon flux are voltages, and the comparator is a voltage comparison circuit.

4. A system as in claim 1, wherein the calibration values are voltage values and the output signals indicative of the integrated photon flux are voltages, and the comparator is a charge amp/impedance transformation circuit.

5. A system as in claim 1, wherein the calibration values are voltage values and the output signals indicative of the integrated photon flux are currents, and the comparator is a voltage comparison circuit.

6. A system as in claim 1, wherein the calibration values are voltage values and the output signals indicative of the integrated photon flux are charges, and the comparator is a voltage comparison circuit.

7. A system as in claim 1, wherein the output signal indicative of the integrated photon flux are analog signals, and the system further comprising:

a sample and hold circuit for sampling an analog signal as a voltage representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value;

an analog to digital converter converting the sampled and held analog signals to digital values; and

a multiplexer coupled to the analog-to-digital converter and receiving digital values and communicating them to the comparator according to a predetermined format and order.

8. A system as in claim 1, wherein the output signal indicative of the integrated photon flux are analog signals, and the system further comprising:

a sample and hold circuit for sampling an analog signal as a voltage representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal;

a multiplexer coupled to the sample and hold circuit and receiving the sampled and held analog values; and

an analog to digital converter converting the sampled and held analog signals received from the multiplexer and converting the analog values to digital values and communicating them to the comparator according to a predetermined format and order.

9. A system as in claim 1, further comprising the external source of digital image data.

10. A system as in claim 9, wherein the external source of digital image data comprises either a source of digital image data, or the combination of an analog image data and a image analog-to-digital converter.

11. A system as in claim 1, wherein the portion of the frame time comprises the row address time or a shorter period of time.

12. A system as in claim 1, wherein the portion of the frame time comprises substantially the entire frame time.

13. A system as in claim 1, wherein the portion of the frame time comprises at least 50 percent of the entire frame time.

14. A system as in claim 1, wherein the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time.

15. A system as in claim 1, wherein the portion of the frame time comprises at least 1 millisecond.

16. A method for operating an active-matrix display device having a plurality of pixels, the method comprising:

storing a calibration value for each pixel and each gray level value that may be displayed by each of the pixels in a calibration memory;

storing a transformation in a transformation memory for transforming first representations of an image pixel gray level values to second representations of the same image gray level pixel values for each pixel and each gray level that may be displayed by each of the pixels in the display;

receiving first gray level representations of image pixel gray level values for a plurality of pixels from an external source;

transforming the first gray level representations to an equivalent number of second gray level representations for each pixel in accordance with the stored transformation;

generating image data and control signals for driving pixel elements in a matrix display device during a present display frame time in accordance with the second representation of the image gray level pixel value;

generating an integrated photon flux signal for each of the plurality of pixels in the display indicative of the integrated photon flux on each of the plurality of pixels in the display during a portion of the present display frame time;

comparing the plurality of integrated photon flux signals for a commanded gray level and with the calibration values for the same gray level for each pixel on a pixel-by-pixel basis and generating a plurality of comparison results indicating a difference between the commanded gray level and the measured gray level; and

identifying any deviation for each pixel based on the comparison results and directing a change in the stored transformation to be applied during a subsequent display frame time for at least pixel locations and pixel gray level values that have a difference between the calibration and the measured values.

17. A method as in claim 16, wherein the step of identifying any deviation includes storing pixel deviations between a calibrated pixel luminance value and a measured pixel luminance value in a pixel deviation memory.

18. A method as in claim 16, wherein the calibration values are voltage values and the integrated photon flux values are voltages, and the comparison includes a comparison of voltages.

19. A method as in claim 16, wherein the calibration values are current values and the integrated photon flux values are currents, and the comparison includes a comparison of currents.

20. A method as in claim 16, wherein the calibration values are charge values and the integrated photon flux values are charges, and the comparison includes a comparison of charges.

21. A method as in claim 16, wherein the integrated photon flux values are analog signals, and the method further comprising:

sampling an analog signal as a voltage representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value; and

converting the analog sampled signal to a digital signal.

22. A method as in claim 16, wherein the integrated photon flux values are analog signals, and the method further comprising:

sampling an analog signal as a charge representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value; and

converting the analog sampled signal to a digital signal.

23. A method as in claim 16, wherein the integrated photon flux values are analog signals, and the method further comprising:

sampling an analog signal as a current representing a per pixel integrated photon flux during the portion of the pixel display frame time and holding that sampled signal for conversion to a digital value; and

converting the analog sampled signal to a digital signal.

24. A method as in claim 16, further comprising generating the first gray level representations of image pixel gray level values for a plurality of pixels.

25. A method as in claim 24, wherein the digital image data comprises either a digital image data, or an analog image data that is converted to a digital data by an image analog-to-digital converter.

26. A method as in claim 16, wherein the portion of the frame time comprises a time less than or equal to the row address time.

27. A method as in claim 16, wherein the portion of the frame time comprises substantially the entire frame time.

28. A method as in claim 16, wherein the portion of the frame time comprises at least 50 percent of the entire frame time.

29. A method as in claim 16, wherein the portion of the frame time comprises at least between 90 percent and 100 percent of the entire frame time.

30. A method as in claim 16, wherein the portion of the frame time comprises at least 1 millisecond.

31. A method as in claim 16, wherein the subsequent display frame time is the next display time following the present display frame time.

32. A method as in claim 16, wherein the subsequent display frame time is any display frame time following the present display frame time.

33. A method as in claim 16, wherein the subsequent display frame time is a frame time at display initialization or power-on.

34. A method as in claim 16, wherein the image data and control signals include display matrix row and column control and drive signals operable to cause an image to be displayed during a frame time for a plurality of pixels.

35. A method as in claim 16, wherein the pixels include at least one thin film transistor constructed from amorphous silicon.

36. A method as in claim 16, wherein the pixels include at least one thin film transistor constructed from polysilicon.

37. A method as in claim 16, wherein the pixels include at least one thin film transistor constructed from cadmium selenide.

38. A method as in claim 16, wherein the pixels include at least one thin film transistor constructed from semiconductor material.

39. A method as in claim 16, wherein the portion of the present display frame time is equal to or less than the row address time.

40. A method as in claim 16, wherein the portion of the present display frame time is equal to or less than the frame time.

41. A method as in claim 16, wherein the portion of the present display frame time is equal to multiple frame times.

42. A method as in claim 16, wherein the display device is an organic light emitting diode (OLED) pixel display device.

43. A method as in claim 42, wherein the organic light emitting diode (OLED) is a small molecule OLED.

44. A method as in claim 42, wherein the organic light emitting diode (OLED) is a polymer OLED (PLED).

45. A method as in claim 42, wherein the organic light emitting diode (OLED) is a phosphorescent OLED (PHOLED).

46. A method as in claim 42, wherein the organic light emitting diode (OLED) is constructed from any organic material in any combination of single or multiple layers of organic materials and electrodes.

47. A method as in claim 42, wherein the organic light emitting diode (OLED) is a active matrix OLED.

48. A method as in claim 16, wherein the display device is an electroluminescent device.

49. A method as in claim 16, wherein the display device is an plasma emission device.

50. A method as in claim 16, wherein the display device is any controllable photon emissive device.

51. A method as in claim 47, wherein the active matrix display device is constructed from amorphous silicon.

52. A method as in claim 47, wherein the active matrix display device is constructed from poly-silicon.

53. A method as in claim 47, wherein the active matrix display device is constructed from cadmium selenide.

54. A method as in claim 47, wherein the active matrix display device is constructed from any type of semiconductor material.