TWI674628B - 氮化鈦移除 - Google Patents
氮化鈦移除 Download PDFInfo
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- TWI674628B TWI674628B TW105101133A TW105101133A TWI674628B TW I674628 B TWI674628 B TW I674628B TW 105101133 A TW105101133 A TW 105101133A TW 105101133 A TW105101133 A TW 105101133A TW I674628 B TWI674628 B TW I674628B
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- titanium nitride
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- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 title claims abstract description 85
- 239000000758 substrate Substances 0.000 claims abstract description 137
- 238000000034 method Methods 0.000 claims abstract description 113
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 99
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 99
- 238000012545 processing Methods 0.000 claims abstract description 95
- 239000002243 precursor Substances 0.000 claims abstract description 78
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 42
- 229910052802 copper Inorganic materials 0.000 claims abstract description 42
- 239000010949 copper Substances 0.000 claims abstract description 42
- 239000000460 chlorine Substances 0.000 claims abstract description 38
- 229910052801 chlorine Inorganic materials 0.000 claims abstract description 35
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims abstract description 26
- 239000001257 hydrogen Substances 0.000 claims description 43
- 229910052739 hydrogen Inorganic materials 0.000 claims description 43
- 238000005530 etching Methods 0.000 claims description 41
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 28
- 238000011065 in-situ storage Methods 0.000 claims description 18
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 17
- 229910052760 oxygen Inorganic materials 0.000 claims description 16
- 239000001301 oxygen Substances 0.000 claims description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 13
- 229910052710 silicon Inorganic materials 0.000 claims description 13
- 239000010703 silicon Substances 0.000 claims description 13
- 229910003481 amorphous carbon Inorganic materials 0.000 claims description 11
- 150000002431 hydrogen Chemical class 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 8
- 239000007921 spray Substances 0.000 claims description 5
- ZDICFBIJLKDJAQ-UHFFFAOYSA-N dichloroxenon Chemical compound Cl[Xe]Cl ZDICFBIJLKDJAQ-UHFFFAOYSA-N 0.000 claims description 2
- 239000000376 reactant Substances 0.000 claims description 2
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 60
- 230000009977 dual effect Effects 0.000 abstract description 9
- 239000012808 vapor phase Substances 0.000 abstract description 4
- 150000004767 nitrides Chemical class 0.000 abstract description 2
- 210000002381 plasma Anatomy 0.000 description 161
- 239000010410 layer Substances 0.000 description 119
- 239000007789 gas Substances 0.000 description 40
- 150000002500 ions Chemical class 0.000 description 29
- 239000000463 material Substances 0.000 description 29
- 239000012530 fluid Substances 0.000 description 15
- 230000007935 neutral effect Effects 0.000 description 8
- 238000010894 electron beam technology Methods 0.000 description 7
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 6
- 239000003989 dielectric material Substances 0.000 description 6
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 6
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 6
- 230000008878 coupling Effects 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 5
- 238000005859 coupling reaction Methods 0.000 description 5
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- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 230000008901 benefit Effects 0.000 description 4
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- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- 239000012159 carrier gas Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
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- 239000010432 diamond Substances 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
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- OTMSDBZUPAUEDD-UHFFFAOYSA-N Ethane Chemical compound CC OTMSDBZUPAUEDD-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- HMDDXIMCDZRSNE-UHFFFAOYSA-N [C].[Si] Chemical compound [C].[Si] HMDDXIMCDZRSNE-UHFFFAOYSA-N 0.000 description 1
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- 239000003574 free electron Substances 0.000 description 1
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
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Abstract
描述了一種移除氮化鈦硬遮罩的方法。在移除之前,該硬遮罩位在低k介電層上方,而且在移除製程之後該低k介電層保持相對低的淨介電常數。該低k介電層可以是雙鑲嵌結構的一部分,該雙鑲嵌結構在通孔的底部具有銅。在氮化鈦硬遮罩移除之前沉積非多孔碳層,以包護該低k介電層和銅。使用在遠端電漿中從含氯前驅物形成的電漿流出物以氣相蝕刻移除該氮化鈦硬遮罩和該非多孔碳層。使該遠端電漿內的電漿流出物流入基板處理區域,在該基板處理區域該電漿流出物與該非多孔碳層和該氮化鈦反應。
Description
本文之標的物係關於移除氮化鈦。
在基板表面上產生錯綜複雜的圖案化材料層的製程使積體電路成為可能。在基板上產生圖案化材料需要受控的方法來移除暴露的材料。化學蝕刻被用於各種目的,包括將光阻中的圖案轉移到下層中、薄化層或薄化已存在表面上的特徵之橫向尺寸。往往理想的是具有蝕刻一種材料比另一種材料更快的蝕刻製程,從而有助於例如圖案轉移製程進行。這樣的蝕刻製程被說成是相對於第二材料對第一材料具有選擇性。由於材料、電路及製程的多樣性,已開發出對各種材料具有選擇性的蝕刻製程。
乾蝕刻製程對於從半導體基板選擇性地移除材料時常是理想的。理想性源自於以最少的物理干擾從微型結構和緩地移除材料的能力。乾蝕刻製程還允許藉由去除氣相試劑來突然停止蝕刻速度。有一些乾蝕刻製程涉及使基板暴露於由一種或更多種前驅物形成的遠端電漿副產物,以實現高的蝕刻選擇率。所實現的高選擇率致能新的製程程序。
需要方法來增加利用這些新的遠端電漿乾蝕刻製程提供的高蝕刻選擇率的製程程序。
描述了一種移除氮化鈦硬遮罩的方法。在移除之前,該硬遮罩位在低k介電層上方,而且在移除製程之後該低k介電層保持相對低的淨介電常數。該低k介電層可以是雙鑲嵌結構的一部分,該雙鑲嵌結構在通孔的底部具有銅。在氮化鈦硬遮罩移除之前沉積非多孔碳層,以包護該低k介電層和銅。使用在遠端電漿中從含氯前驅物形成的電漿流出物以氣相蝕刻移除該氮化鈦硬遮罩和該非多孔碳層。使該遠端電漿內的電漿流出物流入基板處理區域,在該基板處理區域該電漿流出物與該非多孔碳層和該氮化鈦反應。
實施例包括移除氮化鈦硬遮罩的方法。該等方法包括在圖案化基板上下銅層上方的低k介電質壁上方形成含碳層。該低k介電質壁形成彼此流體耦接的溝槽和通孔,而且該低k介電質壁被氮化鈦硬遮罩覆蓋。該氮化鈦硬遮罩懸置於該低k介電質壁上。該方法進一步包括將該圖案化基板放在基板處理室的基板處理區域中。該方法進一步包括使基團-氯前驅物和基團-碳-氫前驅物流入該基板處理區域中。該方法進一步包括蝕刻掉該氮化鈦硬遮罩和一部分的該含碳層,留下剩餘部分的該含碳層。藉由該剩餘部分的該含碳層來防止該基團-氯前驅
物和該基團-碳-氫前驅物與該下銅層反應。該方法進一步包括移除該剩餘部分的該含碳層。
該通孔的寬度小於50nm。該溝槽的寬度小於70nm。該方法可以在移除該剩餘部分的該含碳層的操作之後包括用銅填充該通孔和該溝槽的操作。在蝕刻掉該氮化鈦硬遮罩和該部分的該含碳層的操作期間,該基板處理區域內的電子溫度可以低於0.5eV。可以將矽碳氮化物層配置在該下銅層與至少一個該低k介電質壁之間。可以藉由該剩餘部分的該含碳層防止該基團-氯前驅物與該低k介電壁反應。該含碳層可以僅由碳、氫及氮組成。
實施例包括移除氮化鈦硬遮罩的方法。該方法包括在圖案化基板上下銅層上方的低k介電質壁上方形成含碳層。該低k介電質壁形成間隙,而且該圖案化基板在該低k介電質壁上方進一步包括氮化鈦硬遮罩。其中一個該氮化鈦硬遮罩比下支撐低k介電質壁更寬。該方法進一步包括將該圖案化基板放在基板處理室的基板處理區域中。該方法進一步包括使含氯前驅物和含碳和氫的前驅物流入遠端電漿區域,該遠端電漿區域流體耦接到該基板處理區域,同時在該遠端電漿區域中形成遠端電漿,以產生電漿流出物。該方法進一步包括使該電漿流出物通過噴頭中的通孔流入該基板處理區域,該噴頭被配置在該基板處理區域與該遠端電漿區域之間。該方法進一步包括使用該電漿流出物蝕刻該含碳層和該氮化鈦
硬遮罩兩者,留下剩餘部分的該含碳層。由於存在該剩餘部分的該含碳層,該電漿流出物不與該下銅層反應。該方法進一步包括使含氧前驅物和第二含碳和氫的前驅物流入該遠端電漿區域,該遠端電漿區域流體耦接到該基板處理區域,同時在該遠端電漿區域中形成第二遠端電漿,以產生第二電漿流出物。該方法進一步包括使該第二電漿流出物通過該噴頭中的通孔流入該基板處理區域。該方法進一步包括使用該電漿流出物蝕刻掉該剩餘部分的該含碳層。該方法進一步包括移除該剩餘部分的該含碳層。
蝕刻該含碳層和該氮化鈦硬遮罩兩者的操作可以移除該氮化鈦硬遮罩。在蝕刻該含碳層和該氮化鈦硬遮罩兩者的操作期間該基板處理區域無電漿。該方法可以進一步包括在該基板處理區域中形成原地電漿,以進一步激發該電漿流出物。
實施例包括移除硬遮罩的方法。該方法包括在圖案化基板上方形成保形含非晶碳層。該圖案化基板包括溝槽和在該溝槽下方的通孔。該通孔在下銅層上方。該溝槽和該通孔的側壁包括低k介電質壁,而且該溝槽的側壁進一步包括氮化鈦特徵。該氮化鈦特徵在該溝槽的頂部形成比該低k介電質壁之間的溝槽寬度更窄的間隙。該溝槽被流體耦接到該通孔。該方法進一步包括回蝕該保形含非晶碳層並移除該氮化鈦特徵,留下剩餘部分的該保形含非晶碳層。該剩餘部分的該保形含非晶
碳層完全覆蓋該下銅層和該低k介電質壁兩者,所以反應物無法到達該下銅層或該低k介電質壁中之任一者。該方法進一步包括移除該剩餘部分的該保形含非晶碳層。該硬遮罩可以進一步包括在該氮化鈦特徵下方並在該低k介電質壁上方的氧化矽特徵。
在下面的描述中部分提出另外的實施例和特徵,而且對於所屬技術領域中具有通常知識者而言,在檢視本說明書後其中有部分將變得顯而易見,或者可以藉由實施所揭示的實施例而得知。可以藉由說明書中描述的手段、組合及方法來實現和獲得所揭示實施例的特徵和優點。
101‧‧‧氮化鈦硬遮罩移除製程
110-150‧‧‧操作
201‧‧‧下銅層
210‧‧‧矽碳氮化物層
220‧‧‧低k介電層
230‧‧‧氮化鈦硬遮罩
240-1‧‧‧含碳層
240-2‧‧‧含碳層
1001‧‧‧基板處理室
1002‧‧‧遠端電漿系統(RPS)
1003‧‧‧冷卻板材
1005‧‧‧氣體入口組件
1010‧‧‧流體供應系統
1014‧‧‧上板材
1015‧‧‧腔室電漿區域
1016‧‧‧下板材
1017‧‧‧面板
1018‧‧‧容積
1019‧‧‧第一流體通道
1020‧‧‧絕緣環
1021‧‧‧第二流體通道
1023‧‧‧離子抑制器
1025‧‧‧噴頭
1027‧‧‧小孔
1031‧‧‧通孔
1033‧‧‧基板處理區域
1055‧‧‧基板
1058‧‧‧氣體供應區域
1065‧‧‧基座
1101‧‧‧處理系統
1102‧‧‧負載鎖定腔室
1104‧‧‧機器人手臂
1106‧‧‧保持區域
1108a-f‧‧‧基板處理室
1110‧‧‧第二機器人手臂
可以藉由參照其餘部分的說明書和圖式來實現對實施例的本質和優點的進一步瞭解。
第1圖為依據實施例的氮化鈦硬遮罩移除製程之流程圖。
第2A圖、第2B圖、第2C圖、及第2D圖圖示元件在依據實施例的例示性氮化鈦硬遮罩移除製程之各個階段的剖視圖。
第3A圖圖示依據實施例的基板處理腔室之示意性剖視圖。
第3B圖圖示依據實施例的一部分基板處理腔室之示意性剖視圖。
第3C圖圖示依據實施例的噴頭之仰視圖。
第4圖圖示依據實施例的例示性基板處理系統之俯視圖。
在附圖中,類似的元件及/或特徵可以具有相同的元件符號。另外,相同類型的各種元件可以藉由在該元件符號之後以破折號和區分類似元件的第二符號來區分。假使在說明書中只有使用第一元件符號,則不管第二元件符號為何,描述可適用於具有相同第一元件符號的相似元件中之任一者。
描述了移除氮化鈦硬遮罩的方法。在移除之前硬遮罩位在低k介電層上方,而且在移除製程之後低k介電層保持相對低的淨介電常數。低k介電層可以是在通孔的底部具有銅的雙鑲嵌結構的一部分。在氮化鈦硬遮罩移除之前沉積非多孔碳層,以保護低k介電層和銅。使用在遠端電漿中從含氯前驅物形成的電漿流出物以氣相蝕刻移除氮化鈦硬遮罩和非多孔碳層。使遠端電漿中的電漿流出物流入基板處理區域,電漿流出物與非多孔碳層和氮化鈦在基板處理區域反應。
銅雙鑲嵌結構已被使用了幾十年,並且包括形成介電層的兩個不同圖案。下圖案可以包括通孔結構,而上圖案可以包括溝槽。通孔和溝槽同時被填充。氮化鈦硬遮罩可被用於一個或兩個圖案化操作(通孔及/或溝槽)。本文中氮化鈦硬遮罩的移除是以來自先前使用的方法的方式完成。過去的方法包括使用化學機械研
磨移除氮化鈦硬遮罩,但是氮化鈦硬遮罩的懸垂已經破壞了通孔/溝槽的銅填充。過去的方法還包括在銅填充之前使用SC1清洗溶液移除氮化鈦,但SC1溶液會損壞在通孔的底部暴露的銅。本文中提出的方法避免了這兩個問題。
為了更好地瞭解和理解本文描述的實施例,現在參照第1圖,第1圖是依據實施例的氮化鈦硬遮罩移除製程101。將同時參照第2A圖、第2B圖、第2C圖、及第2D圖,第2A圖、第2B圖、第2C圖、及第2D圖圖示在氮化鈦硬遮罩移除製程101的不同階段的元件之剖視圖。在實施例中,所圖示的元件部分可以是積體電路在形成過程中的接線互連部分的後端(BEOL)。在第一操作之前(第2A圖),暴露的氮化鈦層被形成、圖案化成氮化鈦硬遮罩230、以及用於在圖案化基板上圖案化下方的低k介電層220。矽碳氮化物層210可以被用於物理性分隔下銅層201與低k介電層220。下銅層201位於低k介電層之下,並通過通孔和溝槽暴露於大氣。氮化鈦硬遮罩230可以藉由輔助硬遮罩與低k介電層220物理性分隔,以方便處理,雖然在第2A-2D圖中並未圖示出這樣的層。在實施例中輔助硬遮罩層可以是氧化矽硬遮罩。本文中將使用「頂部」、「上方」、及「向上」來描述在基板平面的垂直遠端和在垂直方向上進一步遠離基板主平面的部分/方向。將使用「垂直」來描述在「向
上」方向上朝向「頂部」對齊的項目。可以使用其他意義現在就清楚的類似術語。
在操作110中含碳層240-1被形成在圖案化基板上,形成之後被圖示在第2B圖中。在實施例中,含碳層在圖案化基板的特徵上可以是非保形或保形的。含碳層可以填充大部分的間隙或完全填充在圖案化基板的低k介電層中的間隙(如第2B圖所示),在第1-2圖的實例中間隙包括通孔及/或溝槽。在實施例中,含碳層240-1可以是具有比例如有機含碳層更高密度和更低孔隙度的非晶碳間隙填充含碳層240-1。含碳層可以抑制隨後引入的蝕刻劑擴散,因此可以在處理過程中保護低k介電層220與下方銅層201的完整性。矽碳氮化物層210可以位於下方銅層201與低k介電層220之間,如第2A圖所示。已經發現有機含碳層允許蝕刻劑擴散,蝕刻劑提高低k介電層220的有效介電常數並腐蝕下方銅層201。在實施例中,有機含碳層(例如有機平坦化層)保持存在於有機分子中的化學鍵結幾何形狀,因此在含碳層240-1抑制或停止擴散時允許擴散。在實施例中,含碳層可以包含碳、氫及氮或僅由碳、氫及氮所組成。
將氯(Cl2)的流動引入與處理區域分開的電漿區域中(操作120)。可以使用其他的氯源來增加或取代氯。一般來說,可以使含氯前驅物流入電漿區域,例如雙原子氯(Cl2)、原子氯、二氯化氙或三氯化硼。本文中分開的電漿區域可以被稱為遠端電漿區域並且可
以在與處理室不同的模組內或是處理室內的隔室。也可以使含碳和氫的前驅物(例如甲烷)流入電漿區域,並在遠端電漿中與氯一起激發。使在遠端電漿區域中形成的電漿流出物流入基板處理區域(也在操作120)。
在操作130中,含碳層240-1和氮化鈦硬遮罩230被同時回蝕。依據實施例,蝕刻操作130可以是非等向性或等向性的。在實施例中,應保留足夠的含碳層240-2以完全密封低k介電層220。使用含碳層240-2密封低k介電層220可避免在後續處理中任意過度增加低k介電層220的介電常數。含碳和氫的前驅物被包括,以確保同時移除氮化鈦硬遮罩230和一部分的含碳層240-1而形成240-2。依據實施例,含碳和氫的前驅物也可以有助於去除氮化鈦硬遮罩230(例如氧化鈦)上的任何氧化。
第2C圖圖示操作130之後的圖案化基板。在實施例中,操作130可以涉及移除或完全移除氮化鈦硬遮罩。依據實施例,本文揭示的所有實例之選擇性蝕刻可以比各種無鈦介電質材料明顯更快地蝕刻氮化鈦,該無鈦介電質材料可以包括氧化鉿(HfO2)或含矽材料,例如矽(例如多晶矽)、氧化矽、低K介電質、氮化矽或矽碳氮化物。這樣的製程可以具有廣泛的效用,例如,在圖案化之後,可以使用本文揭示的蝕刻製程選擇性地從含矽膜疊層上方移除氮化鈦。含碳層240-1可以在這個點被移除(在操作150中),因為在製程的這個點可
以不再需要由含碳層240-1提供的保護。第2D圖圖示操作150之後的圖案化基板。
操作150可以藉由使用與操作130使用的相同的基板處理區域和遠端電漿區域配置來實現。將氧(O2)的流動引入遠端電漿區域(操作140)。可以使用其他的氧源來增加或取代氧(O2)。一般來說,可以使含氧前驅物流入電漿區域,例如氧(O2)、原子氧、臭氧(O3)或水分(H2O)。也使含碳和氫的前驅物(例如甲烷)流入電漿區域,並在遠端電漿中與含氯前驅物一起激發。使在遠端電漿區域中形成的電漿流出物流入基板處理區域(也在操作140)。在操作150移除含碳層240-2。在一部分的操作150中明顯暴露出低k介電層220,而且本文所提實施例的效益包括減少任何潛在的介電常數增加。已發現包括含碳和氫的前驅物與含氧前驅物可有利地限制低k介電層220的介電常數增加超過單獨的含氧前驅物。
操作130在蝕刻操作期間以明顯的速率移除氮化鈦和含碳材料兩者。包括含碳和氫的前驅物可以提高氮化鈦的蝕刻速度,以使蝕刻操作130能夠一次而不是依序移除兩種材料。依據實施例,氮化鈦對含碳材料的蝕刻選擇率可以接近1:1或介於1:2與2:1之間。儘管在氮化鈦與含碳材料的蝕刻速度上缺乏差異,但氮化鈦和含碳材料可以都被選擇性地相對於其他材料蝕刻。
在操作130和150兩者中,對於氮化鈦和含碳以外的材料來說,本文揭示的製程之氮化鈦及/或含碳材料的蝕刻選擇率在實施例中可以大於或約為10:1、大於或約為20:1、大於或約為50:1、或是大於或約為100:1。施加偏壓功率(但如稍後所述保持低電平)可以提高這些已經提升的選擇率。本文揭示的製程顯示出含碳層240-1的氮化鈦及/或含碳材料相對於各種特定材料的蝕刻選擇率。在實施上,在基板處理區域的原地電漿中低偏壓功率的情況下,這些材料中許多材料的蝕刻速度是如此地低,以致於無法準確量測。在實施例中,氮化鈦及/或含碳材料相對於氧化矽的蝕刻選擇率可以大於或約為100:1、大於或約為250:1、大於或約為500:1或是大於或約為1000:1。可以使用氧化矽作為低k介電層220與氮化鈦硬遮罩230之間的硬遮罩層。低k介電質膜和矽碳氮化物膜,例如Black Diamond IIITM和BlokTM(皆購自應用材料公司)分別顯示出基本上無法量測的蝕刻速度。在實施例中,氮化鈦相對於碳氧化矽(例如Black Diamond IIITM)的蝕刻選擇率可以大於或約為100:1、大於或約為250:1、大於或約為500:1、或是大於或約為1000:1。依據實施例,氮化鈦相對於矽碳氮化物(例如BlokTM)的蝕刻選擇率可以大於或約為100:1、大於或約為250:1、大於或約為500:1、或是大於或約為1000:1。
填充有含碳層的溝槽結構可以是在溝槽下方包括通孔的雙鑲嵌結構。從上方觀看,通孔可以是低深寬比的間隙。從平放的圖案化基板上方觀看,通孔可以看起來像例如圓形。在實施例中,通孔可以或可以不被金屬填充。術語「間隙」是指在本文描述的低k介電質中的溝槽及/或通孔。結構可以是在可產生較大尺寸的接線的後端,取決於元件的類型。依據實施例,通孔的寬度可以小於50nm、小於40nm、小於30nm、或小於20nm。在實施例中,溝槽的寬度可以小於70nm、小於50nm、小於40nm、或小於30nm。本文描述的尺寸適用於雙鑲嵌結構或涉及單層的結構。從上方觀看,通孔的深寬比可為約1:1,而溝槽的深寬比可以大於10:1,因為溝槽是用於容納意圖電連接多個通孔的導體。
在操作120-130中包括含碳和氫的前驅物,以有助於從氮化鈦層頂上移除任何鈦氧化層。在操作140-150中包括含碳和氫的前驅物以限制低k介電層承受的介電常數增加。在實例中含碳和氫的前驅物可以是甲烷(CH4),但也可以是更高級的烴,例如乙烷(C2H6)。一般來說,含碳和氫的前驅物可以包括碳和氫,而且可以只由碳和氫組成。在實施例中,含碳和氫的前驅物可以只含有單鍵。可以使用具有一些多鍵的烴,而且在製程期間也可以添加氫(H2)到遠端電漿區域,以調整H:C原子流量比。
含氯前驅物、含氧前驅物及含碳和氫的前驅物的流動可以進一步包括一種或更多種相對惰性的氣體,例如He、N2、Ar。可以使用惰性氣體來改善電漿穩定性或製程均勻性。氬氣作為添加劑是有幫助的,以促進穩定的電漿形成。包括氦時通常可提高製程均勻性。貫穿本說明書,這些添加劑存在於實施例中。可以使用不同氣體的流動速率和比率來控制蝕刻速度和蝕刻選擇率。
在本文描述的各種製程中,含氯前驅物(例如Cl2)是以介於約25sccm(每分鐘的標準立方厘米)和800sccm之間的流動速率供應,含氧前驅物(例如O2)是以介於約30sccm和900sccm之間的流動速率供應,含碳和氫的前驅物(例如CH4)是介於約5sccm和100sccm之間的流動速率,He是介於約0slm(每分鐘的標準升)和3slm之間的流動速率,而Ar是介於約0slm和3slm之間的流動速率。所屬技術領域中具有通常知識者將認可的是,可以使用其他的氣體及/或流量,取決於許多因素,包括處理室配置、基板尺寸、幾何形狀及被蝕刻的特徵之佈局。
在蝕刻操作120-150期間,一般來說可以將基板保持在介於約-30℃和約400℃之間。在實施例中,圖案化基板在蝕刻操作120-150期間的溫度可以介於-20℃和350℃之間、-10℃和250℃之間、介於0℃和50℃之間或介於5℃和20℃之間。在實施例中,
在基板處理區域和遠端電漿區域中的壓力在蝕刻操作120-150期間可以介於0.1托和50托之間、介於1托和15托之間、或介於5托和10托之間。藉由將基板溫度保持在相對低溫,例如在10℃以下,並將製程腔室保持在低於10托的壓力下,蝕刻選擇率可以通過抑制氮化鈦以外的材料的蝕刻速度來提高。
該方法還包括施加能量到在遠端電漿區域中的含氯前驅物與含碳和氫的前驅物(操作120)或到含氧前驅物與含碳和氫的前驅物(操作140),以產生電漿流出物。如所屬技術領域中具有通常知識者將理解的,電漿可以包括多種帶電的和中性的物種,包括基團和離子。在遠端電漿區域(例如在腔室電漿區域)中的電漿可以使用習知的技術(例如射頻激發、電容耦合功率、感應耦合功率等)產生。在一實施例中,能量是使用電容耦合電漿單元施加的。在實施例中,遠端電漿源功率可以介於約40瓦和約1500瓦之間、介於約100瓦和約1200瓦之間、介於約250瓦和約1000瓦之間、或介於約400瓦和約800瓦特之間。400瓦到800瓦的範圍可以最佳化氮化鈦相對於多種其他暴露材料的選擇性移除,該暴露材料包括含矽介電質膜以及一些不含鈦的金屬和金屬氧化物。電容耦合電漿單元可以被配置在基板處理區域的遠端,但仍在基板處理室內。例如,電容耦合電漿單元和電漿產生區域可以藉由噴頭與氣體反應區域分隔。或者,對於基板處理室外部的遠端電漿來說,
遠端電漿功率可被以500W和10kW之間的電平施加到遠端電漿區域。在實施例中,遠端電漿功率可以使用感應線圈施加,在這種情況下,遠端電漿將被稱為感應耦合電漿(ICP)。
在本文描述的蝕刻製程期間,也可以將電漿功率同時施加(操作120、140)到遠端電漿區域和基板處理區域兩者。在腔室電漿區域中的電漿可以被施加來產生較高濃度的、進入基板處理區域的中性基團。在基板處理區域中的原地電漿可以被相對於基板施加偏壓,以施加濺射成分。在本文中可以將基板處理區域中的原地電漿稱為原地電漿。原地電漿可以使用與用以產生遠端電漿相同的技術產生。在蝕刻過程中可以藉由在基板上方和下方的板材之間施加電漿功率來使用電容耦合電漿單元施加原地電漿功率。在實施例中,原地電漿功率可以介於約5瓦和約200瓦之間、介於約10瓦和約150瓦之間、介於約15瓦和約100瓦之間、或介於約20瓦和約80瓦之間。選擇基板處理區域中原地電漿的原地電漿功率,以保持低的離子能量,使得朝向氮化鈦的蝕刻選擇率保持很高。原地電漿功率可以小於或約為遠端電漿功率的20%、小於或約為遠端電漿功率的15%、或是小於或約為遠端電漿功率的10%。
在實施例中,使用原地電漿以有利於移除可能在氮化鈦層頂部上的氧化鈦層。可以相對於基板對原地電漿施加偏壓,以除了化學機制以外藉由使用物理濺
射機制來進一步有助於移除任何氧化鈦層。被施加到平行於基板的板材的電容耦合電漿功率可以被內在加偏壓,而其他的電漿可能需要單獨的原地電漿偏壓功率。氧化鈦可能需要濺射的協助,因為氧化鈦中的鍵結比氮化鈦中的鍵結更強。在實施例中,可選的原地電漿偏壓功率可以介於約2瓦和約100瓦之間、介於約3瓦和約75瓦之間、介於約5瓦和約60瓦之間、或介於約10瓦和約50瓦之間。原地電漿偏壓功率未被包括在原地電漿功率中,所以總施加電漿功率是這兩個量的總和。
儘管原地電漿激發的使用是可選的,但也可以使用離子抑制器(可以是噴頭)來提供用於氣相蝕刻的基團及/或中性物種。也可將離子抑制器稱為離子抑制元件。例如,在實施例中,在從遠端電漿區域到基板處理區域的途中使用離子抑制器來過濾蝕刻電漿流出物。可以使用離子抑制器來提供基團濃度比離子更高的反應氣體。電漿流出物通過位在遠端電漿區域與基板處理區域之間的離子抑制器。離子抑制器的功能是劇烈地減少或大體上消除從電漿產生區域行進到基板的離子物種。本文描述的離子抑製器只是一種在本文描述的氣相蝕刻製程期間在基板處理區域中實現低電子溫度的方式。
在實施例中,使電子束在平行於基板的平面中穿過基板處理區域,以降低電漿流出物的電子溫度。假使以這種方式施加電子束,則可以使用較簡單的噴頭。在實施例中,可以使電子束作為位於基板上方的層
片穿過。在實施例中,電子束提供中和負電荷源,並提供更主動的、用於減少朝向基板的正電荷離子流並提高蝕刻選擇率的手段。可以調整電漿流出物的流量和管理電子束操作的各種參數,以降低在基板處理區域中測得的電子溫度。
在遠端電漿中激發電漿的過程中,電子溫度可以使用在基板處理區域中的朗繆爾(Langmuir)探針量測。電子溫度可以小於0.5eV、小於0.45eV、小於0.4eV、或小於0.35eV。這些極低值的電子溫度是藉由存在的電子束、噴頭及/或離子抑制器來實現。不帶電的中性和基團物種可以穿過電子束及/或離子抑制器中的開口,以在基板反應。與傳統包括濺射和轟擊的電漿蝕刻製程相比,這種使用基團和其他中性物種的製程可以減少電漿損傷。實施例也優於其中液體的表面張力會造成小特徵彎曲和剝離的傳統濕蝕刻製程。
本文中可以將基板處理區域描述為在本文描述的蝕刻製程期間「無電漿」。「無電漿」並不一定意味著該區域沒有電漿。在電漿區域內形成的離子化物種和自由電子可以以非常小的濃度行進通過隔板(噴頭)中的孔(縫隙)。腔室電漿區域中的電漿邊界可以通過噴頭中的縫隙侵入基板處理區域到某些小的程度。此外,可以在基板處理區域中形成低強度電漿而不會消除本文所述蝕刻製程的理想特徵。在形成激發電漿流出物的過程中,所有形成具有遠比腔室電漿區域更低強度的
離子密度的電漿的原因皆不偏離本文使用的「無電漿」的範圍。
本文描述的實例涉及在雙鑲嵌結構中的通孔上方製備溝槽。一般來說,結構可以只涉及一個層級,而且依據實施例低k介電層可以具有溝槽及/或通孔。使用含碳層240可避免在間隙的底部留下一部分矽碳氮化物層210以保護下方銅層201的需求。依據實施例,使用含碳層240來保護低k介電層220和下方銅層201可以避免扭曲和破壞低k結構。一般來說,在實施例中,下方銅層201可以是任意的下方導電層。在操作150之後,可以使用導體(例如銅)填充溝槽和通孔,以完成半導體製造製程的雙鑲嵌部分。
第3A圖圖示在處理室內具有分隔的電漿產生區域的例示性基板處理室1001之剖視圖。在膜蝕刻期間,可以使製程氣體通過氣體入口組件1005流入腔室電漿區域1015。遠端電漿系統(RPS)1002可以可選地被包括在系統中,而且可以處理第一氣體,然後該第一氣體行進通過氣體入口組件1005。在進入腔室電漿區域1015之前,製程氣體可以在RPS 1002內被激發。因此,在實施例中,例如以上討論的含氯前驅物可以通過RPS 1002或繞過RPS單元。
冷卻板材1003、面板1017、離子抑制器1023、噴頭1025、及上面配置基板1055的基板支座1065(也稱為基座)被圖示出,而且依據實施例可以每
個皆被包括。基座1065可以具有熱交換通道,熱交換流體流過該熱交換通道以控制基板的溫度。這種配置可以允許基板1055的溫度被冷卻或加熱,以保持相對低溫,例如介於-20℃至200℃之間。還可以使用內嵌加熱器元件將基座1065電阻式加熱到相對高溫,例如介於100℃和1100℃之間。
例示性的配置可以包括使氣體入口組件1005對氣體供應區域1058開放,氣體供應區域1058藉由面板1017與腔室電漿區域1015隔開,使得氣體/物種流過面板1017中的孔而進入腔室電漿區域1015。可以選擇結構和操作特徵,以防止電漿從腔室電漿區域1015大量回流返回到供應區域1058、氣體入口組件1005、及流體供應系統1010。結構特徵可以包括選擇面板1017中的孔的尺寸和剖面幾何形狀,以使回流電漿失去活性。操作特徵可以包括在氣體供應區域1058與腔室電漿區域1015之間保持壓力差,此舉保持大體上單向的電漿流動通過噴頭1025。圖示出面板1017或腔室的導電頂部和噴頭1025具有位於特徵之間的絕緣環1020,從而允許AC電位被相對於噴頭1025及/或離子抑制器1023施加到面板1017。絕緣環1020可以被定位在面板1017與噴頭1025及/或離子抑制器1023之間,從而使電容耦合電漿(CCP)能夠被形成在腔室電漿區域中。
離子抑制器1023中的多個孔可設以控制活化氣體穿過離子抑制器1023的通道,該活化氣體即離子、基團、及/或中性物種。例如,可以控制孔的深寬比、或孔的直徑對長度、及/或孔的幾何形狀,使得通過離子抑制器1023的活化氣體中的離子性帶電物種的流量減少。離子抑制器1023中的孔可以包括面向腔室電漿區域1015的錐形部分及面向噴頭1025的圓柱形部分。可以設計該圓柱形部分的形狀和尺寸,以控制通過到噴頭1025的離子物種的流動。還可以施加可調整的電偏壓到離子抑制器1023作為控制通過抑制器的離子物種流動的附加手段。離子抑制元件1023的功能可以減少或消除從電漿產生區域行進到基板的離子帶電物種的量。不帶電的中性和基團物種仍然可以通過離子抑制器中的開口以與基板反應。
電漿功率可以具有各種頻率或多種頻率的組合。在例示性處理系統中,電漿可以相對於離子抑制器1023及/或噴頭1025由被遞送到面板1017的電漿功率提供。在實施例中,電漿功率可以介於約10瓦和約5000瓦之間、介於約100瓦和約2000瓦之間、介於約200瓦和約1500瓦之間、或介於約200瓦和約1000瓦之間。在實施例中,該例示性處理系統中施加的RF頻率可以是小於約200kHz的低RF頻率、介於約10MHz和約15MHz之間的高RF頻率、或大於或約為1GHz的微波頻
率。電漿功率可以被電容耦合(CCP)或感應耦合(ICP)到遠端電漿區域中。
可以藉由本文所述噴頭的實施例使前驅物(例如含氯前驅物及含碳和氫的前驅物)流入基板處理區域1033。在腔室電漿區域1015中衍生自製程氣體的激發物種可以行進通過離子抑制器1023、及/或噴頭1025中的孔,並與從噴頭的單獨部分流入基板處理區域1033的其他前驅物反應。或者,假使所有的前驅物物種都在腔室電漿區域1015中被激發,則可以不使其他的前驅物流過噴頭的單獨部分。在實施例中,在遠端電漿蝕刻製程期間,基板處理區域1033中可以存在很少或沒有電漿。前驅物的激發衍生物可以在基板上方及/或基板上的區域中結合,以蝕刻結構或從基板移除物種。
處理氣體可以在腔室電漿區域1015中被激發,而且可以以激發態通過噴頭1025到達基板處理區域1033。可以如所述與腔室電漿區域1015中的遠端電漿同時地在基板處理區域1033中形成原地電漿。或者,在實施例中可以不在基板處理區域1033中產生電漿。
第3B圖圖示影響通過面板1017的處理氣體分配的特徵之詳細視圖。氣體分配組件(例如在處理腔室部分1001中使用的噴頭1025)可以被稱為雙通道噴頭(DCSH),並在本文中在第3A圖以及第3C圖描述的實施例中另外詳細。雙通道噴頭可以提供允許蝕刻劑
在處理區域1033外側分離的蝕刻製程,以在被遞送到處理區域之前提供有限的、與腔室元件和彼此的相互作用。
噴頭1025可以包含上板材1014和下板材1016。可以將板材彼此耦接以在板材之間界定容積1018。耦接板材可設以提供穿過上和下板材的第一流體通道1019及穿過下板材1016的第二流體通道1021。所形成的通道可設以提供流體單獨藉由第二流體通道1021穿過下板材1016進出容積1018,而第一流體通道1019可與板材之間的容積1018及第二流體通道1021流體隔離。容積1018可以通過氣體分配組件1025的一側流體進出。雖然第3A-3C圖的例示性系統包括雙通道噴頭,但應當理解的是,可以利用在基板處理區域1033之前將第一和第二前驅物保持流體隔離的替代分配組件。例如,可以利用多孔板材和板材下方的管,雖然其他的配置可能具有降低的操作效率或無法提供如所述雙通道噴頭均勻的處理。
在圖示的實施例中,噴頭1025可以藉由第一流體通道1019分配製程氣體,該製程氣體含有在腔室電漿區域1015中藉由電漿激發的電漿流出物。在實施例中,被引入RPS 1002及/或腔室電漿區域1015的製程氣體可以含有氯(例如Cl2)及含碳和氫的前驅物(例如CH4)。製程氣體還可以包括載氣,例如氦氣、氬氣、氮氣(N2)等。電漿流出物可以包括製程氣體的離子化
或中性衍生物,而且在本文中還可以被稱為基團-氯前驅物,指的是被引入的製程氣體之原子組分。
第3C圖為在實施例中用於處理室的噴頭1025之仰視圖。噴頭1025與第3A圖圖示的噴頭對應。通孔1031(顯示第一流體通道1019的概觀)可以具有多種形狀和配置,以控制並修改前驅物通過噴頭1025的流動。小孔1027(顯示第二流體通道1021的概觀)可以大體上均勻地分佈在噴頭的表面上,甚至在通孔1031之間,此舉可有助於在前驅物離開噴頭時提供比其他配置更均勻混合的前驅物。
可以將乾蝕刻系統的實施例併入更大的製造系統中,用於製造積體電路晶片。第4圖圖示一種這樣的處理系統(主框架)1101,在實施例中處理系統1101包括沉積、蝕刻、烘烤、及固化腔室。在此圖中,一對前開式晶圓傳送盒(負載鎖定腔室1102)供應各種尺寸的基板,該等基板被機器人手臂1104接收並放入低壓保持區域1106中,之後再被放入其中一個基板處理室1108a-f。第二機器人手臂1110可被用來從保持區域1106移送基板晶圓到基板處理室1108a-f並返回。每個基板處理室1108a-f都可被安裝配備以執行多種基板處理操作,除了週期性層沉積(CLD)、原子層沉積(ALD)、化學氣相沉積(CVD)、物理氣相沉積(PVD)、蝕刻、預清洗、除氣、定向、及其他基板製程之外,該基板處理操作還包括本文描述的乾蝕刻製程。
由於進入基板處理區域的兩種不同途徑,可以將噴頭稱為雙通道噴頭。可以使含氯前驅物及含碳和氫的前驅物流經雙區噴頭中的通孔,並且輔助前驅物可以通過雙區噴頭中的不同區域。如上所述,該不同區域可以對基板處理區域開放,但不對遠端電漿區域開放。
前驅物與電漿流出物進入基板處理區域的結合流動速率可以佔整體氣體混合物的0.05體積%至約20體積%;其餘是載氣。在實施例中,含氯前驅物及含碳和氫的前驅物流入遠端電漿區域,但電漿流出物具有相同的體積流量比。在含氯前驅物的情況下,可以在含氯氣體及含碳和氫的前驅物穩定遠端電漿區域中的壓力之前使淨化氣體或載氣先進入遠端電漿區域。
本文中使用的「基板」可以是上面有或無層形成的支撐基板。圖案化基板可以是絕緣體或具有各種摻雜濃度和分佈的半導體,而且可以例如是積體電路製造中使用的類型的半導體基板。圖案化基板的暴露「氧化矽」主要是SiO2,但也可以包括其他元素組分(例如氮、氫及碳)的濃度。在一些實施例中,使用本文揭示的方法蝕刻的氧化矽部分基本上是由矽和氧所組成。圖案化基板的暴露「氮化矽」主要是Si3N4,但也可以包括其他元素組分(例如氧、氫及碳)的濃度。在一些實施例中,本文描述的氮化矽部分基本上是由矽和氮所組成。圖案化基板的暴露「氮化鈦」主要是鈦和氮,但也可以包括其他元素組分(例如氧、氫及碳)的濃度。在
一些實施例中,本文描述的氮化鈦部分基本上是由鈦和氮所組成。在實施例中,含非晶碳的膜可以包括約79%的碳、20%的氫及1%的氮,或是可以含有75-83%的碳、18%-22%的氫及0.3-2%的氫。圖案化基板的「銅」主要是銅,但也可以包括其他元素組分(例如氧、氫及碳)的濃度。在一些實施例中,本文描述的銅部分基本上是由銅所組成。
全文使用術語「間隙」並非暗指蝕刻出的幾何形狀具有大的橫向深寬比。從表面上方觀看時,間隙可以看起來像圓形、橢圓形、多邊形、矩形、或其他各種形狀。「溝槽」是長的間隙。溝槽的形狀可以是圍繞材料島的壕溝,溝槽的深寬比是壕溝的長度或周長除以壕溝的寬度。如本文中使用的,保形的蝕刻製程是指以與表面相同的形狀大致均勻地移除表面上的材料,即被蝕刻層的表面與蝕刻前的表面大致平行。所屬技術領域中具有通常知識之人士將認可的是,被蝕刻的界面很可能無法100%保形,因此術語「大致」允許可接受的公差。
使用術語「前驅物」來指稱參與反應以從表面移除材料或沉積材料到表面上的任意製程氣體。「電漿流出物」形容從腔室電漿區域離開並進入基板處理區域的氣體。電漿流出物處於「激發態」,其中至少一些氣體分子處於振動激發、解離及/或離子化狀態。「基團前驅物」是用來形容參與反應以從表面移除材料或在表
面上沉積材料的電漿流出物(離開電漿、處於激發態的氣體)。「基團-氯前驅物」形容含有氯、但也可以含有其他元素組分的基團前驅物。「基團-碳-氫前驅物」形容含有碳和氫、但也可以含有其他元素組分的基團前驅物。詞語「惰性氣體」是指當蝕刻或被摻入膜中時不會形成化學鍵的任意氣體。例示性的惰性氣體包括稀有氣體,但也可以包括其他氣體,只要當(通常)微量陷入膜中時不形成化學鍵即可。
已經揭示了幾個實施例,所屬技術領域中具有通常知識者將理解的是,可以在不偏離所揭示的實施例之精神下使用各種修改、替代結構、及均等物。此外,並未描述若干眾所周知的製程和元件,以避免不必要地模糊本文描述的實施例。因此,以上描述不應被視為限制申請專利範圍的範疇。
當提供一個範圍的數值時,應當瞭解的是,除非上下文另有清楚指明,否則在該範圍的上限與下限之間、到下限單位的十分之一的每個中間值也被具體揭示了。在任意陳述值或在陳述範圍中的中間值與任何其他陳述值或在該陳述範圍中的中間值之間的每個較小範圍也被涵括。這些較小範圍的上限和下限可以獨立地被該範圍包括或排除,而且當限值中之任一者、兩者皆不、或兩者皆被包括在該較小範圍中時,每個範圍也都被涵括在所述的實施例中,並接受該陳述範圍中任何限值的
具體排除。當該陳述範圍包括限值中之一者或兩者時,排除那些包括的限值中之一者或兩者的範圍也被包括。
除非內文以其他方式清楚指明,否則本文和所附申請專利範圍中使用的單數形「一」及「該」包括複數的指示對象。因此,舉例來說,提及「一製程」包括複數種這樣的「製程」,而提及「介電質材料」包括指稱一種或更多種介電質材料及所屬技術領域中具有通常知識者習知的介電質材料之均等物。
同樣地,當被用於本說明書和以下的申請專利範圍中時,字詞「包含」和「包括」意圖明確說明所陳述的特徵、整數、成分、或步驟的存在,但該等字詞並不排除存在或添加一種或更多種的其他特徵、整數、成分、步驟、動作、或基團。
Claims (15)
- 一種移除氮化鈦硬遮罩的方法,該方法包含以下步驟:在一圖案化基板上一下銅層上方的低k介電質壁上方形成一含碳層,其中該低k介電質壁形成彼此流體耦接的一溝槽和一通孔,而且該低k介電質壁被氮化鈦硬遮罩覆蓋,其中該氮化鈦硬遮罩懸置於該低k介電質壁上;將該圖案化基板放在一基板處理室的一基板處理區域中;使一基團-氯前驅物和一基團-碳-氫前驅物流入該基板處理區域中;蝕刻掉該氮化鈦硬遮罩和一部分的該含碳層,留下一剩餘部分的該含碳層,其中藉由該剩餘部分的該含碳層來防止該基團-氯前驅物和該基團-碳-氫前驅物與該低k介電質壁或該下銅層反應;以及移除該剩餘部分的該含碳層。
- 如請求項1所述之方法,其中該通孔的寬度小於50nm。
- 如請求項1所述之方法,其中該溝槽的寬度小於70nm。
- 如請求項1所述之方法,進一步包含在移除 該剩餘部分的該含碳層的操作之後用銅填充該通孔和該溝槽的操作。
- 如請求項1所述之方法,其中在蝕刻掉該氮化鈦硬遮罩和該部分的該含碳層的操作期間,該基板處理區域內的電子溫度低於0.5eV。
- 如請求項1所述之方法,其中一矽碳氮化物層被配置在該下銅層與至少一個該低k介電質壁之間。
- 如請求項1所述之方法,其中藉由該剩餘部分的該含碳層防止該基團-氯前驅物與該低k介電壁反應。
- 如請求項1所述之方法,其中該含碳層僅由碳、氫及氮組成。
- 一種移除氮化鈦硬遮罩的方法,該方法包含以下步驟:在一圖案化基板上一下銅層上方的低k介電質壁上方形成一含碳層,其中該低k介電質壁形成一間隙,而且該圖案化基板在該低k介電質壁上方進一步包含氮化鈦硬遮罩,其中一個該氮化鈦硬遮罩比一下支撐低k介電質壁更寬;將該圖案化基板放在一基板處理室的一基板處理區域中; 使一含氯前驅物和一含碳和氫的前驅物流入一遠端電漿區域,該遠端電漿區域流體耦接到該基板處理區域,同時在該遠端電漿區域中形成一遠端電漿,以產生電漿流出物;使該電漿流出物通過一噴頭中的通孔流入該基板處理區域,該噴頭被配置在該基板處理區域與該遠端電漿區域之間;使用該電漿流出物蝕刻該含碳層和該氮化鈦硬遮罩兩者,留下一剩餘部分的該含碳層,其中由於存在該剩餘部分的該含碳層,該電漿流出物不與該下銅層反應;使一含氧前驅物和一第二含碳和氫的前驅物流入該遠端電漿區域,該遠端電漿區域流體耦接到該基板處理區域,同時在該遠端電漿區域中形成一第二遠端電漿,以產生第二電漿流出物;使該第二電漿流出物通過該噴頭中的通孔流入該基板處理區域;使用該電漿流出物蝕刻掉該剩餘部分的該含碳層;以及移除該剩餘部分的該含碳層。
- 如請求項9所述之方法,其中蝕刻該含碳層和該氮化鈦硬遮罩兩者的操作移除該氮化鈦硬遮 罩。
- 如請求項9所述之方法,其中在蝕刻該含碳層和該氮化鈦硬遮罩兩者的操作期間該基板處理區域無電漿。
- 如請求項9所述之方法,進一步包含在該基板處理區域中形成一原地電漿,以進一步激發該電漿流出物。
- 如請求項9所述之方法,其中該含氯前驅物包含選自由原子氯、雙原子氯、三氯化硼、及二氯化氙所組成之群組的一前驅物。
- 一種移除一硬遮罩的方法,該方法包含以下步驟:在一圖案化基板上方形成一保形含非晶碳層,其中該圖案化基板包含一溝槽和一在該溝槽下方的通孔,其中該通孔在一下銅層上方,其中該溝槽和該通孔的側壁包含低k介電質壁,而且該溝槽的側壁進一步包含硬遮罩,該硬遮罩包含氮化鈦特徵,其中該氮化鈦特徵在該溝槽的頂部形成一比該低k介電質壁之間的溝槽寬度更窄的間隙,而且其中該溝槽被流體耦接到該通孔;回蝕該保形含非晶碳層並移除該氮化鈦特徵,留下一剩餘部分的該保形含非晶碳層,其中該剩餘部分的 該保形含非晶碳層完全覆蓋該下銅層和該低k介電質壁兩者,所以反應物無法到達該下銅層或該低k介電質壁中之任一者;以及移除該剩餘部分的該保形含非晶碳層。
- 如請求項14所述之方法,其中該硬遮罩進一步包含在該氮化鈦特徵下方並在該低k介電質壁上方的氧化矽特徵。
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