JP2010170108A - 半導体装置、およびその作製方法 - Google Patents
半導体装置、およびその作製方法 Download PDFInfo
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- JP2010170108A JP2010170108A JP2009281286A JP2009281286A JP2010170108A JP 2010170108 A JP2010170108 A JP 2010170108A JP 2009281286 A JP2009281286 A JP 2009281286A JP 2009281286 A JP2009281286 A JP 2009281286A JP 2010170108 A JP2010170108 A JP 2010170108A
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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Abstract
【解決手段】トランジスタのゲート電極と同一の材料層で形成される配線と、ソース電極またはドレイン電極と同一の材料層で形成される配線との間に、ゲート絶縁層以外の絶縁層を設ける。
【選択図】図1
Description
本実施の形態では、半導体装置の作製方法の一例について、図面を参照して説明する。
本実施の形態では、半導体装置の作製方法につき、上記実施の形態と異なる一例について図面を参照して説明する。なお、本実施の形態における半導体装置の作製工程は、多くの部分で他の実施の形態と共通している。したがって、以下においては、重複する部分の説明は省略し、異なる点について詳細に説明する。
本実施の形態では、半導体装置の作製方法につき、上記実施の形態と異なる一例について図面を参照して説明する。なお、本実施の形態における半導体装置の作製工程は、多くの部分で他の実施の形態と共通している。したがって、以下においては、重複する部分の説明は省略し、異なる点について詳細に説明する。
本実施の形態では、半導体装置の使用形態の一例であるアクティブマトリクス基板の作製工程について、図面を用いて説明する。なお、本実施の形態で示す作製工程は、多くの部分で実施の形態1〜実施の形態3と共通している。したがって、以下においては、重複する部分の説明は省略し、異なる点について詳細に説明する。なお、以下の説明において、図6、図7は断面図を示しており、図8は平面図を示している。また、図6および図7のA1−A2、B1−B2、C1−C2は、それぞれ、図8のA1−A2、B1−B2、C1−C2に対応する領域を示す。
本実施の形態では、アクティブマトリクス基板の作製工程の別の一例について、図面を用いて説明する。なお、本実施の形態で示す作製工程は、多くの部分で実施の形態1〜実施の形態4と共通している。したがって、以下においては、重複する部分の説明は省略し、異なる点について詳細に説明する。なお、以下の説明において、図9は断面図を示しており、図10は平面図を示している。また、図9のA1−A2、B1−B2、C1−C2は、それぞれ、図10のA1−A2、B1−B2、C1−C2に対応する領域を示す。
本実施の形態では、薄膜トランジスタを作製し、該薄膜トランジスタを画素部や駆動回路に用いて表示機能を有する半導体装置(表示装置ともいう)を作製する場合について説明する。また、駆動回路の一部または全体を、画素部と同じ基板上に一体形成し、システムオンパネルを形成することができる。
本実施の形態では、図13を参照して半導体装置の一例であるアクティブマトリクス型の電子ペーパーについて説明する。半導体装置に用いられる薄膜トランジスタ650は、上記実施の形態1〜5で示す薄膜トランジスタと同様に作製することができる。
本実施の形態では、半導体装置として発光表示装置の例を示す。表示装置の有する表示素子としては、ここではエレクトロルミネッセンスを利用する発光素子を用いて示す。エレクトロルミネッセンスを利用する発光素子は、発光材料が有機化合物であるか、無機化合物であるかによって区別され、一般的に、前者は有機EL素子、後者は無機EL素子と呼ばれている。
半導体装置は、電子ペーパーとして適用することができる。電子ペーパーは、情報を表示するものであればあらゆる分野の電子機器に用いることが可能である。例えば、電子ペーパーを用いて、電子書籍(電子ブック)、ポスター、電車などの乗り物の車内広告、クレジットカード等の各種カードにおける表示等に適用することができる。電子機器の一例を図16、図17に示す。
半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、デジタルカメラ、デジタルビデオカメラ等のカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機、などが挙げられる。
本実施の形態では、半導体装置の作製方法につき、上記実施の形態と異なる一例について図面を参照して説明する。なお、本実施の形態における半導体装置の作製工程は、多くの部分で他の実施の形態と共通している。したがって、以下においては、重複する部分の説明は省略し、異なる点について詳細に説明する。
本実施の形態では、半導体装置の作製方法につき、上記実施の形態と異なる一例について図面を参照して説明する。なお、本実施の形態における半導体装置の作製工程は、多くの部分で他の実施の形態と共通している。したがって、以下においては、重複する部分の説明は省略し、異なる点について詳細に説明する。
本実施の形態では、半導体装置の作製方法につき、上記実施の形態と異なる一例について図面を参照して説明する。なお、本実施の形態における半導体装置の作製工程は、多くの部分で他の実施の形態と共通している。したがって、以下においては、重複する部分の説明は省略し、異なる点について詳細に説明する。
102 導電層
104 レジストマスク
105 レジストマスク
106 レジストマスク
108 ゲート電極
109 第1の配線
110 第1の配線
111 絶縁層
112 レジストマスク
113 絶縁層
114 ゲート絶縁層
115 絶縁層
116 導電層
117 半導体層
118 ソース電極
119 半導体層
120 ドレイン電極
121 半導体層
122 第2の配線
123 半導体層
124 半導体層
143 スリット部
150 トランジスタ
152 積層構造
160 トランジスタ
162 積層構造
170 トランジスタ
172 積層構造
180 半導体層
181 半導体層
182 半導体層
183 半導体層
184 半導体層
185 半導体層
186 半導体層
187 半導体層
190 トランジスタ
192 トランジスタ
194 トランジスタ
200 基板
201 導電層
202 ゲート電極
203 導電層
204 容量配線
205 導電層
206 第1の配線
207 導電層
208 第1の端子
209 レジストマスク
210 レジストマスク
212 ゲート絶縁層
214 ソース電極
216 ドレイン電極
218 第2の配線
220 接続電極
222 第2の端子
224 半導体層
226 保護絶縁層
228 透明導電層
230 透明導電層
232 透明導電層
234 透明導電層
250 トランジスタ
600 基板
602 基板
650 薄膜トランジスタ
660 電極層
670 電極層
680 球形粒子
680a 黒色領域
680b 白色領域
682 充填材
701 TFT
702 発光素子
703 陰極
704 発光層
705 陽極
711 TFT
712 発光素子
713 陰極
714 発光層
715 陽極
716 遮蔽膜
717 導電膜
721 TFT
722 発光素子
723 陰極
724 発光層
725 陽極
727 導電膜
1000 携帯電話機
1001 筐体
1002 表示部
1003 操作ボタン
1004 外部接続ポート
1005 スピーカ
1006 マイク
2600 TFT基板
2601 対向基板
2602 シール材
2603 素子層
2604 液晶層
2605 着色層
2606 偏光板
2607 偏光板
2608 配線回路部
2609 フレキシブル配線基板
2610 冷陰極管
2611 反射板
2612 回路基板
2613 拡散板
2631 ポスター
2632 車内広告
2700 電子書籍
2701 筐体
2703 筐体
2705 表示部
2707 表示部
2711 軸部
2721 電源
2723 操作キー
2725 スピーカ
4001 基板
4002 画素部
4003 信号線駆動回路
4004 走査線駆動回路
4005 シール材
4006 基板
4008 液晶層
4010 薄膜トランジスタ
4011 薄膜トランジスタ
4013 液晶素子
4015 接続端子電極
4016 端子電極
4018 FPC
4019 異方性導電膜
4020 絶縁層
4021 絶縁層
4030 画素電極層
4031 対向電極層
4032 絶縁層
4033 絶縁層
4035 スペーサ
4051 基板
4501 基板
4502 画素部
4503a 信号線駆動回路
4503b 信号線駆動回路
4504a 走査線駆動回路
4504b 走査線駆動回路
4505 シール材
4506 基板
4507 充填材
4509 薄膜トランジスタ
4510 薄膜トランジスタ
4511 発光素子
4512 電界発光層
4513 電極層
4515 接続端子電極
4516 端子電極
4517 電極層
4518a FPC
4518b FPC
4519 異方性導電膜
4520 隔壁
9400 通信装置
9401 筐体
9402 操作ボタン
9403 外部入力端子
9404 マイク
9405 スピーカ
9406 発光部
9410 表示装置
9411 筐体
9412 表示部
9413 操作ボタン
9600 テレビジョン装置
9601 筐体
9603 表示部
9605 スタンド
9607 表示部
9609 操作キー
9610 リモコン操作機
9700 デジタルフォトフレーム
9701 筐体
9703 表示部
9881 筐体
9882 表示部
9883 表示部
9884 スピーカ部
9885 入力手段(操作キー
9886 記録媒体挿入部
9887 接続端子
9888 センサ
9889 マイクロフォン
9890 LEDランプ
9891 筐体
9893 連結部
9900 スロットマシン
9901 筐体
9903 表示部
Claims (6)
- 基板上に第1の導電層を形成し、
前記第1の導電層上に、複数の厚みを有するレジストマスクを選択的に形成し、
前記レジストマスクを用いて前記第1の導電層をエッチングして、ゲート電極および第1の配線を形成し、
前記レジストマスクを後退させて、前記ゲート電極上のレジストマスクを除去すると共に、前記第1の配線上のレジストマスクの一部を残存させ、
前記ゲート電極、前記第1の配線および前記残存させたレジストマスクを覆うようにゲート絶縁層を形成し、
前記ゲート絶縁層上に第2の導電層を形成し、
前記第2の導電層を選択的にエッチングして、ソース電極およびドレイン電極を形成すると共に、前記残存させたレジストマスクと重なる領域において前記第1の配線を乗り越える第2の配線を形成し、
前記ゲート電極と重なる領域に、前記ソース電極および前記ドレイン電極と接する半導体層を形成することを特徴とする半導体装置の作製方法。 - 請求項1において、
前記半導体層として、インジウム、ガリウムおよび亜鉛を含む酸化物半導体層を形成することを特徴とする半導体装置の作製方法。 - 請求項1または2において、
前記残存させたレジストマスクと重なる領域における前記第1の配線の幅が、他の領域における前記第1の配線の幅より小さくなるように、前記第1の配線を形成することを特徴とする半導体装置の作製方法。 - 請求項1乃至3のいずれか一において、
前記残存させたレジストマスクと重なる領域における前記第2の配線の幅が、他の領域における前記第2の配線の幅より小さくなるように、前記第2の配線を形成することを特徴とする半導体装置の作製方法。 - 請求項1乃至4のいずれか一において、
前記残存させたレジストマスクと重なる領域における前記第1の配線の厚みが、他の領域における前記第1の配線の厚みより大きくなるように、前記第1の配線を形成することを特徴とする半導体装置の作製方法。 - 請求項1乃至5のいずれか一において、
前記残存させたレジストマスクと重なる領域における前記第2の配線上に、別の導電層を形成することを特徴とする半導体装置の作製方法。
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