CN1320964A - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
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- CN1320964A CN1320964A CN01109597A CN01109597A CN1320964A CN 1320964 A CN1320964 A CN 1320964A CN 01109597 A CN01109597 A CN 01109597A CN 01109597 A CN01109597 A CN 01109597A CN 1320964 A CN1320964 A CN 1320964A
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- semiconductor chip
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- tack coat
- semiconductor device
- electrode
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Abstract
半导体器件3包括:半导体芯片11;利用立柱凸点法设置于焊盘电极12上的Au球凸点21;热塑性粘结层22,设置在半导体芯片11的形成有焊盘电极12的表面上,使Au球凸点21的上部伸出粘结层22的表面。通过形成用于电连接的凸点和在半导体芯片上具有粘结作用的粘合树脂实现可靠的键合。本发明还提供一种将铜箔键合到半导体晶片上从而形成布线图形的方法,以及一种多芯片组件,利用通过粘结层彼此键合的凸点建立电连接。
Description
本发明涉及一种半导体器件及其制造方法,具体涉及一种采用倒装方法的高密度型半导体器件(HDP:高密度封装)、包括安装在插入结构(interposer)上的HDP的半导体器件(尤其是CSP:芯片尺寸(级)封装)和包括多个HDPs的多芯片组件(MCM:多芯片组件,叠置的MCP:多芯片封装)及它们的制造方法。
近年来,人们对半导体器件的更高密度安装进行了研究和开发,在封装形式或安装方法方面提出了许多结构和方法。响应于管脚数增大及尺寸和重量减小方面的要求,这些形式正从典型的常规半导体封装QFPs(方形扁平封装)过渡到面阵列型BGA(球栅阵列)封装。称作CSP的高密度半导体封装,其减小的封装尺寸等于芯片尺寸,这种封装已常用于小尺寸电子设备。
目前,用于BGA和CSP的主要有三类插入结构:由聚酰亚胺等制造的布线带,由玻璃环氧树脂等制造的印刷布线板型印刷电路板,以及陶瓷基板。插入结构用于电和机械连接半导体芯片与其上将安装芯片的基板。
倒装技术是将半导体芯片以高密度安装到插入结构上的理想技术。图1(a)是采用倒装技术的常规倒装芯片BGA的剖面图。倒装技术采用具有形成于半导体芯片11的电极12上的凸点(突起电极)的半导体器件1。凸点13由Au、Cu、Pb-Sn等制造,并利用光刻和镀敷法形成。半导体器件1面向下键合到插入结构14上。此时,凸点13通过金属结合与形成在插入结构14的表面上的铜布线15的各个部分的键合焊盘16电连接。根据倒装技术,可使半导体芯片具有增加的管脚数、减小的安装面积和更高的信号处理速度。
然而,在这种倒装芯片安装中,在半导体器件1安装到插入结构14上时,半导体芯片11和插入结构14间的热膨胀系数差,会将应力集中在半导体器件1和插入结构14间的结点上,引起错误连接。因此,难以确保充分的可靠性,所以关键是努力确保安装的可靠性,以及安装后可以独立替换不合格芯片。
为确保这种安装的可靠性,开发了底层填充技术,用于在半导体芯片11和插入结构14间填充保护树脂。图1(b)是采用倒装技术和底层填充技术的常规倒装BGA的剖面图。由于底层填充技术的实施,可以使半导体器件1安装在插入结构14上后,将例如环氧树脂之类的底层填充树脂17填充在半导体芯片11和插入结构14之间,以保护半导体芯片11的表面,加固凸点13的外围,因而可以实现更加可靠的连接。
然而,底层填充技术存在一个问题,即,较小间距的电极12(细间距)、随之而来的较小尺寸的凸点13及半导体芯片11和插入结构14间的较小间隙,造成了在半导体芯片11和插入结构14之间完全填充底层树脂17方面,以及检查安装后是否存在未填充部分(空洞)方面的困难。
例如,日本专利未决公开公报5-3183中公开了一种能解决这种问题的方法。如图2所示,在日本专利未决公开公报5-3183公开的这种方法中,首先,在属于半导体晶片20的许多半导体芯片11的电极12上,提供凸点13(图2(b))。然后,在半导体晶片20(半导体芯片11)的表面上施加树脂,形成保护膜18。然后,固化保护膜18(图2(c))。然后,抛光半导体晶片20(半导体芯片11)的背面,减薄芯片(图2(d))。抛光保护膜18,露出凸点13的表面,这样便完成了半导体器件2。
在半导体器件2安装到插入结构上时,另外在插入结构上提供用于键合到凸点13上的凸点。
按该方法,可以安全地覆盖和保护半导体芯片11的表面。只有进行电筛选,才能将好的芯片安装到插入结构上,由于形成保护树脂18后半导体晶片20(半导体芯片11)的抛光会产生薄至约50微米的芯片,所以该方法适于提供较小的厚度。此外,即便在安装到插入结构上后发生任何故障,由于器件没有利用环氧树脂等完全固定到插入结构上,所以容易单独进行替换。
另一方面,日本专利未决公开公报11-26642公开了一种方法,其中在组装前,分别制造具有凸点80的半导体器件70、带通孔102的粘结片98和具有连接孔96的插入结构72B。根据该方法,凸点80与连接孔96对准后,粘结片98插在半导体器件主体70和插入结构72B之间,使通孔102处于相对的凸点80和连接孔96之间。将半导体器件70压到插入结构72B上,凸点80穿过通孔102,与连接孔96连接,然后将它们彼此键合和固定在一起(见图3)。
此外,日本专利未决公开公报11-26642还公开了一种方法,其中采用各向异性导电膜代替粘结片98。
日本专利未决公开公报8-102474公开了一种方法,其中在其上形成有电极的半导体芯片的主表面上施加了粘结剂后,去除电极上的那部分粘结剂,在粘结层中形成孔,所述各电极通过这些孔露出,然后在孔中填入凸点。根据该方法,在半导体晶片的整个表面上,形成由例如聚酰亚胺或环氧树脂等光敏树脂构成的粘结层,并通过对粘结层的将要暴露电极焊盘的部分进行化学腐蚀,形成孔。然后,通过镀敷等,在孔中填入例如Au等金属。
然而,上述现有技术存在以下问题。
在日本专利未决公开公报5-3183中,借助于保护膜18固定的凸点13和半导体芯片11,在安装于基板上时,半导体芯片11和凸点13的结合表面可靠。然而,在安装到各种插入结构上时,不能可靠地键合到这种插入结构上。另外,较薄的半导体芯片11会引起从结合点加到半导体芯片11上的热应力和翘曲应力,会破坏半导体芯片11本身。这是由于安装到各种插入结构上时,仅作用于连接端子(凸点)上的热应力和机械应力与端子的配置、管脚数、芯片(封装)尺寸、芯片厚度等密切相关。
为确保键合的可靠性,需要注入底层填充树脂。然而,这种情况下,该安装结构变得复杂,安装步骤数增加,造成了较高的成本。此外,如上所述,很难在半导体芯片和插入结构间注入底层填充树脂,尤其是在管脚数为1000或更多时,空洞频繁发生,昂贵的基板容易变成无用的材料。
根据日本专利未决公开公报11-26642所公开的方法,如果安装能很好地进行,粘结片98可以粘结到半导体器件70和插入结构72B上,可以加固凸点80的外围,因而可以确保键合的可靠性。
然而,却难以控制粘结片98的位置,使通孔102精确设置在相对的凸点80和连接孔96之间。由于尤其在具有细间距电极和较小凸点的小型化半导体器件的情况下,这种精确设置更难,半导体器件的小型化受阻。此外,由于从安装前起,希望有加固凸点80外围的部件,但该部件不存在,所以,在加压时,负载作用于凸点80,容易引起错误连接。尽管在采用各向异性导电膜时,不需要定位该粘结片,但加压时作用于凸点的负载仍容易引起错误连接。另外,一般说,各向异性导电膜不那么便宜。
所以,根据日本专利未决公开公报11-26642公开的方法,难以以低成本可靠地安装例如具有在10mm×10mm面积上形成的1000个管脚电极的高密度电极的半导体器件。
在日本专利公开公报8-102474所公开的方法中,在其上形成有电极的半导体芯片主表面上的粘结层中形成孔后,凸点填入孔中。于是,不能采用作为引线键合技术的立柱式凸点法。不能采用引线键合技术产生了不适应各种情况,所以难以进行灵活制造的问题。
另一方面,作为插入结构基本材料的聚酰亚胺、BT树脂、陶瓷等昂贵,造成了关于高成本产品价格比的问题。所以,希望有便宜的替代品。
采用倒装方法的常规BGA型半导体封装,采用了组合(build-up)BT基板作为插入结构,以支持200微米的很小焊盘间距的半导体芯片。然而,组合BT基板很贵,产生了关于高成本产品价格比的问题。所以,希望有便宜的替代品。
本发明考虑了现有技术的上述问题,其目的是能够利用在半导体芯片的电极(键合焊盘)和引线之间形成和连接金属凸点的倒装芯片键合,将具有小间距且等于裸芯片的高密度型半导体器件安装到插入结构或安装基板(此后也称为“插入结构”)上,通过提供一种较简单的安装结构,较容易且减少的安装步骤及提高的成品率,以低成本提供半导体器件。
本发明的另一目的是便于安装后的替换。
本发明的再一目的是利用适用于插入结构制造方法的某些想法,减少制造步骤数,并降低材料成本,从而以低成本提供半导体器件。
本发明的又一目的是以低成本可靠地提供利用多个等于裸芯片的高密度型半导体器件组装的多芯片组件。
为实现上述目的,根据本发明的第一方面,提供一种半导体器件,包括:半导体芯片;设置在半导体芯片的电极上的立柱凸点;设置在半导体芯片的形成有电极的表面上的粘结层,其中所述立柱凸点从粘结层的表面上伸出。
根据本发明第一方面的半导体器件,由于选择了立柱凸点,所以可以采用布线键合技术。因此半导体器件具有适应各种情况的能力,允许灵活制造。
由于凸点从粘结层的表面上伸出,所以,立柱凸点可以热压键合到插入结构等上的引线(引线上不提供凸点)上。另外,粘结层从外围加固立柱凸点,在安装时,没有负载作用于立柱凸点。此外,在半导体器件安装于插入结构等上时,粘结层可以形成半导体芯片与插入结构间的完全密封。
因此,第一方面的半导体芯片具有以下优点:能够确保在不用底层填料的情况下具有很高的可靠性,容易利用简单结构和简单方法,将具有小间距且等于裸芯片的高密度型半导体器件安装于插入结构等上,可以提高成品率,并能以低成本进行制造。
根据本发明的第二方面,提供一种半导体器件,该半导体器件是通过热压键合,将根据本发明第一方面的半导体器件键合到插入结构上得到的。
所以,根据本发明第二方面的半导体器件具有以下优点:由于采用了本发明第一方面的半导体器件,所以具有如上所述的高可靠性和低成本等优点。在键合两个或多个半导体器件时,可以得到高密度封装的MCM。
根据本发明的第三方面,提供一种半导体器件,包括:半导体芯片;设置在半导体芯片上形成有电极的表面上的保护树脂层;设置在半导体芯片的电极上并在保护树脂层的表面露出的凸点;通过固化的焊剂粘结到保护树脂层的表面上并与凸点电连接的插入结构。
所以,根据本发明第三方面的半导体器件具有以下优点:由于在保护树脂层和插入结构间设置固化的焊剂,以便将焊剂键合两者上,因而可以牢固地将半导体芯片固定到插入结构,以确保非常可靠的键合。用于凸点与插入结构的连接的热固性焊剂不会增加工艺步骤或不需要底层填料。
根据本发明第四方面,提供一种半导体器件,该半导体器件是通过在本发明的第二或第三方面的半导体器件中的插入结构中形成器件孔得到的。
器件孔是指在除安装焊盘电极的区域外其上安装有半导体芯片的插入结构表面上设置的孔。
所以,根据本发明第四方面的半导体器件具有以下优点:由于插入结构配有器件孔,所以可以防止由于爆玉米花现像造成的插入结构和粘结层间界面的损伤;由于通过器件孔露出的半导体芯片表面被粘结层树脂密封,所以在插入结构上安装了半导体芯片后,不需要填充或提供例如底层填料等保护树脂。
根据本发明的第五方面,提供一种半导体器件,包括:半导体芯片;设置在半导体芯片上形成有电极的表面上的粘结层;设置在半导体芯片的电极上并在粘结层的表面露出的凸点;粘结到粘结层表面上并局部键合到凸点上的布线图形;用于绝缘和覆盖布线图形并选择性开孔从而形成外部连接部分的绝缘覆盖层。
在本发明第五方面的半导体器件中,由于只有布线图形及绝缘覆盖层相当于插入结构,所以不使用用作插入结构基本材料的例如聚酰亚胺、BT树脂或陶瓷等昂贵材料,可以提供插入结构的作用,即,夹在半导体芯片和安装基板间,从而提供具有比可以安装在安装基板上的焊盘电极更大间距的端子的作用。结果,半导体器件具有以下优点,即,不需要使用现有插入结构,因而可以低成本制造。
此外,该半导体器件的优点在于:用粘结层固定布线图形,可以确保非常可靠的键合。
根据本发明的第六方面,提供一种半导体器件,包括:半导体芯片;设置在半导体芯片的其上形成有电极的表面上的保护树脂层;设置在半导体芯片的电极上并在保护树脂层的表面露出的凸点;通过固化的焊剂粘结到保护树脂层的表面上并局部键合到凸点上的布线图形;用于绝缘和覆盖布线图形并选择性开孔从而形成外部连接部分的绝缘覆盖层。
在本发明第六方面的半导体器件中,由于只有布线图形及绝缘覆盖层相当于插入结构,所以不使用用作插入结构基本材料的例如聚酰亚胺、BT树脂或陶瓷等昂贵材料,可以提供插入结构的作用,即,夹在半导体芯片和安装基板间,从而提供具有比可以安装在安装基板上的焊盘电极更大间距的端子的作用。结果,半导体器件具有以下优点,即,不需要使用现有插入结构,因而可以低成本制造。
此外,该半导体器件的优点在于:用固化的焊剂固定布线图形,可以确保非常可靠的键合。用于凸点与布线图形间连接的热固性焊剂不会增加工艺步骤或不需要底层填料。
根据本发明的第七方面,提供一种包括两个或多个半导体器件的半导体装置(多芯片组件),每个器件包括:半导体芯片;设置在半导体芯片上形成有电极的表面上的粘结层;设置在半导体芯片的电极上并在粘结层的表面露出的凸点,其中,一个半导体器件的其上提供有粘结层的表面部分键合到另一个半导体器件的其上提供有粘结层的部分或整个表面上,它们彼此通过键合面上的凸点电连接。
根据本发明第七方面的半导体装置是通过键合半导体芯片,使其上形成有电极的表面彼此键合得到的多芯片组件,所述半导体装置具有以下优点:具有高封装密度;可以确保与粘结层的非常可靠的键合。可以在除半导体芯片的键合面外形成有粘结层的半导体器件表面上,粘结插入结构等,从而在用于安装的区域,将所述凸点键合到插入结构的引线上。
根据本发明的第八方面,提供一种包括两个或多个叠置的半导体器件的半导体装置(多芯片组件),每个器件包括:具有形成于正面和反面上的电极的半导体芯片;设置于半导体芯片正面或反面上的粘结层;设置在半导体芯片的电极上并在粘结层的表面露出的凸点,其中上面一个半导体器件通过粘结层与下面一个半导体器件键合,并且它们的电极通过凸点彼此连接。
根据本发明第八方面的半导体装置是通过键合和叠置多个半导体芯片,并通过凸点建立电传导得到的多芯片组件,该半导体装置具有以下优点:高封装密度;可以确保与粘结层的非常可靠的键合。
根据本发明的第九方面,提供一种半导体器件,包括具有与本发明的第一、第二、第五、第七或第八方面的半导体器件中的粘结层相同的粘结性的热塑性树脂。
所以,根据本发明第九方面的半导体器件具有以下优点:由于粘结层由具有粘结性的热塑性树脂构成,且借助于加于粘结层上的热可以使半导体与基层材料分离,所以可以个别地替换不合格半导体芯片。特别是,由于甚至在大量半导体芯片安装到单个布线基板上后,也可以替换不合格芯片,所以不会浪费布线基板。
根据本发明的第十方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;及
切割半导体晶片,从而分成各半导体芯片。
所以,根据本发明第十方面的制造半导体器件的方法,能够利用简单工艺制造半导体器件,容易实现可靠的安装,从而提供与插入结构的粘结和电连接,并密封结合点。
由于在设置了凸点后形成粘结层,所以不需要在粘结层中钻孔和进行某些处理。因此,不需要通过例如利用光刻技术的掩模设计、抗蚀层应用、曝光、显影和腐蚀等多个工艺步骤来形成粘结层。在利用布线键合技术设置了凸点之后,所需要的工艺步骤就是提供和腐蚀粘结层。
根据本发明的第十一方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;
切割半导体晶片,从而分成各半导体芯片;及
在一个布线基板上安装一个或两个或多个半导体芯片,并进行加热和加压,从而利用粘结层实现与布线基板的粘结,并利用凸点实现与布线基板上布线的电连接。
所以,根据本发明第十一方面的制造半导体器件的方法,能够提供与本发明第十方面类似的优点,其优点在于:由于能够同时进行与插入结构的粘结和电连接,以便同时得到半导体芯片上所有电极的内引线键合,和半导体芯片与布线基板的粘结及结合面的密封,所以可以明显减少制造半导体封装的工艺步骤数,明显减少各步骤所需要的时间。
例如,当在布线基板上安装每个具有1000个管脚电极的30个半导体器件时,假定键合每个电极花0.1秒,常规单点键合法共花3000秒。然而,根据本发明的第十一方面,可以在10-20秒时间内完成键合,还同时完成粘结,所以从时间和经济上考虑非常有利。
此外,粘结层可以提供非常可靠的键合,从而不再需要采用底层填料。
应注意,布线基板对应于布线带、塑料基板、陶瓷基板、引线框架等。
根据本发明的第十二方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成保护树脂层;
腐蚀保护树脂层的整个表面,直到凸点伸出为止;
切割半导体晶片,从而分成各半导体芯片;及
对于一个或两个或多个半导体芯片,在凸点和保护树脂层上或在布线基板上相应的位置施加热固性焊剂;
将所述凸点置于布线基板的布线上;
通过加热将凸点焊接到布线上,并固化热固性焊剂。
根据本发明第十二方面的制造半导体器件的方法的优点在于:由于通过回流和夹在保护树脂层与布线基板间的固化焊剂,凸点键合到布线基板上的布线上,由此将半导体芯片键合到布线基板上,从而同时实现与插入结构的粘结和电连接,所以制造半导体器件封装的步骤数明显减少,这些步骤所需要的时间显著减少,这与本发明的第十一方面类似。
此外,固化的焊剂可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明第十三方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;
将半导体晶片通过粘结层键合到布线基板上,并沿半导体芯片的外围进行切割,从而分成各半导体芯片。
本发明第十三方面制造半导体器件的方法的优点在于:由于在与布线基板键合到其上后切割半导体芯片,所以将半导体晶片的划片和布线基板与之键合的两个步骤减少到一个。
根据本发明第十三方面的制造半导体器件的方法,可以使其中半导体芯片和插入结构具有相同面积并完全层叠的CSP的制造简单。对于制造包括其面积大于半导体芯片面积的插入结构的凸缘型封装来说,可以在与本发明的第十一方面一样分成各半导体芯片后,将半导体芯片安装到布线基板上。
此外,粘结层可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明的第十四方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;
通过粘结层将半导体晶片与布线基板对准,进行加热和加压,从而利用粘结层将半导体晶片粘结到布线基板上,并利用凸点实现与布线基板上布线的电连接,沿其外围切割半导体芯片,从而分成各半导体芯片。
本发明第十四方面制造半导体器件的方法的优点与本发明第十三方面的优点类似,其优点在于:由于与插入结构的粘结和电连接同时进行,以同时实现半导体芯片上所有电极的内引线键合和半导体芯片与布线基板的粘结及结合表面的密封,所以制造半导体封装的步骤明显减少,这些步骤所需要的时间显著减少。粘结层可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明第十五方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成保护树脂层;
腐蚀保护树脂层的整个表面,直到凸点伸出为止;
在凸点和保护树脂层上或在布线基板上相应位置施加热固性焊剂;
将所述凸点置于布线基板的布线上;
加热焊接凸点与布线,并固化热固性焊剂;及
沿半导体芯片外围进行切割,从而分成各半导体芯片。
本发明第十五方面制造半导体器件的方法的优点与本发明的第十一方面类似,其优点在于:由于通过回流和夹在保护树脂层与布线基板间的固化焊剂,使凸点键合到布线基板上的布线上,由此将半导体芯片键合到布线基板上,从而同时实现与插入结构的粘结和电连接,所以与本发明第十一方面类似,制造半导体器件封装的步骤数明显减少,这些步骤所需要的时间显著减少。
固化的焊剂可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明第十六方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;
将所述半导体芯片通过所述粘结层键合到金属箔上;及
将金属箔形成为布线图形。
根据本发明第十六方面的制造半导体器件的方法具有以下优点:由于连接半导体芯片与安装基板的布线图形采用半导体芯片作基底形成,避免了采用附加的插入结构和相应的材料和工艺步骤,因此降低了成本;可以提供较薄的半导体封装。粘结层可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明第十七方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;
通过所述粘结层使半导体芯片与一金属箔对准,进行加热和加压,从而利用粘结层实现与该金属箔的粘结,并利用凸点实现与金属箔的电连接;及
将金属箔形成为布线图形。
根据本发明第十七方面的制造半导体器件的方法具有与本发明第十六方面类似的优点,其优点如下:由于与金属箔的粘结和电连接同时进行,以同时实现半导体芯片上所有电极的内引线键合,和半导体芯片与金属箔的粘结及结合面的密封,所以制造半导体封装的步骤数明显减少,这些步骤所需要的时间显著减少。
根据本发明第十八方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成保护树脂层;
腐蚀保护树脂层的整个表面,直到凸点伸出为止;
通过所述保护树脂层与所述半导体芯片与一金属箔对准;
通过加热将凸点焊接到金属箔上,并固化热固性焊剂;及
将金属箔形成为布线图形。
根据本发明第十八方面的制造半导体器件的方法具有与本发明第十六方面类似的优点,其优点如下:由于通过回流和夹在保护树脂层与布线基板间的固化焊剂,使凸点键合到布线基板上的布线上,由此将半导体芯片键合到布线基板上,从而同时实现与插入结构的粘结和电连接,所以制造半导体器件封装的步骤数明显减少,这些步骤所需要的时间也明显减少。
固化的焊剂可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明第十九方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;
将所述半导体晶片通过所述粘结层键合到一金属箔上;
将金属箔形成为布线图形;及
沿半导体芯片外围进行切割,将其分成各半导体芯片。
根据本发明第十九方面的制造半导体器件的方法具有以下优点:由于在该工艺中,在半导体晶片上为半导体芯片提供用于连接半导体芯片与安装基板的布线图形,避免了采用附加的插入结构和相应的材料和工艺步骤,因此降低了成本;可以提供较薄的半导体封装。粘结层可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明的第二十方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成粘结层;
腐蚀粘结层的整个表面,直到凸点伸出为止;
将所述半导体芯片通过所述粘结层与一金属箔对准,进行加热和加压,利用粘结层实现与金属箔的粘结,并利用凸点实现与金属箔的电连接;
将金属箔形成为布线图形;
沿半导体芯片外围进行切割,将其分成各半导体芯片。
根据本发明第二十方面的制造半导体器件的方法具有本发明第十九方面的优点,其优点如下:由于与金属箔的粘结和电连接同时进行,以同时实现半导体芯片上所有电极的内引线键合,和半导体芯片与金属箔的粘结及结合面的密封,所以制造半导体器件封装的步骤数明显减少,这些步骤所需要的时间明显减少。
根据本发明的第二十一方面,提供一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个半导体芯片的电极上设置凸点;
在其上设置有凸点的表面上形成保护树脂层;
腐蚀保护树脂层的整个表面,直到凸点伸出为止;
将所述半导体芯片通过所述保护树脂层与一金属箔对准;
通过加热将凸点焊接到金属箔上,并固化热固性焊剂;
将金属箔形成为布线图形;及
然后,沿半导体芯片外围进行切割,从而分成各半导体芯片。
根据本发明第二十一方面的制造半导体器件的方法提供本发明第十九方面的优点,其优点如下:由于通过回流和夹在保护树脂层与布线基板间的固化焊剂,使凸点键合到布线基板上的布线上,由此将半导体芯片键合到布线基板上,从而同时实现与插入结构的粘结和电连接,所以制造半导体器件封装的步骤数明显减少,这些步骤所需要的时间明显减少。
固化的焊剂可以提供非常可靠的键合,从而不再需要采用底层填料。
根据本发明的第二十二方面,提供一种根据本发明第十六至二十一方面中任一种的制造半导体器件的方法,其中在所述金属箔形成布线图形后,在所述布线图形上选择性形成绝缘覆盖层。
在根据本发明第二十二方面的制造半导体器件的方法中,选择性形成于所述布线图形上的绝缘覆盖层绝缘和覆盖所述布线图形,该绝缘覆盖层中的开口露出所述布线图形的一部分,以形成用于与外部电连接的电极(岛形部分)。该器件可用于LGA型封装。
根据本发明的第二十三方面,提供根据本发明第二十二方面的制造半导体器件的方法,其中在所述布线图形上选择性形成绝缘覆盖层后,在通过绝缘覆盖层的开口露出的布线图形的岛形部分上提供焊料球。
该制造半导体器件的方法提供BGA型封装。
根据本发明的第二十四方面,提供根据本发明第十、十一、十三、十四、十六、十七、十九或二十方面的制造半导体器件的方法,其中粘结层是具有粘结性的热塑树脂。
根据本发明第二十四方面的制造半导体器件的方法具有以下优点:由于粘结层是具有粘结性的热塑料树脂,所以可以通过加热粘结层从基层材料上分离半导体芯片,所以粘结后能够单独替换不合格半导体芯片。特别是,由于甚至在大量半导体芯片粘结到一个布线基板上后,也可以替换不合格芯片,所以该方法具有不浪费布线基板的优点。
根据本发明的第二十五方面,提供一种半导体器件,包括:半导体芯片;设置在半导体芯片的其上形成有电极的表面上的粘结层;设置在半导体芯片的电极上并在粘结层的表面露出的凸点;载带基板;插入结构,其中半导体芯片利用粘结层粘结到载带基板的正面,半导体芯片借助于凸点与载带基板电连接,所述插入结构接在载带基板的背面,用于实现电导通。
如上所述,本发明的效果在于,可以低成本制造高密度封装(以后简称为“HDP”),该封装可以通过在半导体芯片上形成用于电连接的凸点和具有粘结作用的粘结树脂,实现可靠的键合。
在HDP安装于另一BGA基板等上,从而制造比半导体芯片大的封装时,由于粘结层粘结到BGA基板等上,提供了半导体芯片与基板间的密封,所以不需要在半导体芯片和基板间注入树脂的底层填充步骤。因此,可以在插入结构等上可靠地安装具有较小间距的HDP,可以得到较简单的安装结构,安装更容易,安装步骤数减少,成品率提高。所以本发明具有在制造例如CSP等半导体封装时安装可靠的优点。
由于在半导体芯片上形成用于电连接的凸点和具有粘结作用的粘结层,以实现可靠键合,所以本发明有助于安装后的替换,可以避免昂贵的布线基板的浪费。
此外,插入结构直接形成在半导体晶片上,可以减少制造插入结构的步骤数,并降低插入结构的材料费用。这样一来,本发明具有能够以低成本提供各种半导体封装的效果。
有益的是,通过使用多个HDP,使它们彼此局部键合,或彼此层叠和键合,本发明可以以低成本非常可靠地提供一种高密度封装多芯片组件。
另外,由于在作为晶片的半导体芯片上形成凸点和粘结树脂,所以可以高效地进行制造。
由于预先提供具有粘结树脂的半导体器件,所以,在半导体器件安装到BGA基板等上时,通过热压键合或回流处理与热固性焊剂结合,可以同时进行与BGA基板等的电连接和粘结,因此有利于制造效率的提高。
另外,由于可将布线键合技术应用于凸点的形成,所以本发明可以支持灵活制造。
图1(a)、(b)是展示半导体器件的常规实例的剖面图;
图2(a)-(d)是描述半导体器件的常规实例及其制造方法的各步骤的剖面图;
图3是展示半导体器件的常规实例及其制造方法的剖面图;
图4(a)-(d)是展示根据本发明实施例1的半导体器件及其制造方法的各步骤的剖面图;
图5(a)是展示本发明实施例2的半导体器件的剖面图,图5(b)是展示发明实施例3的半导体器件的剖面图;
图6是展示本发明实施例4的半导体器件的剖面图;
图7是展示本发明实施例5的半导体器件的剖面图;
图8(a)-(d)是展示本发明实施例6的半导体器件及其制造方法的剖面图;
图9(a)和(b)是展示根据本发明实施例6的半导体器件的应用的剖面图;
图10(a)和(b)是展示根据本发明实施例6的半导体器件的其它应用的剖面图;
图11(a)是展示根据本发明实施例7的半导体器件的剖面图,图11(b)展示根据本发明实施例8的半导体器件的透视图,图11(c)是沿图11(b)中的A面取的剖面图;
图12是展示根据本发明实施例9的半导体器件的剖面图;
图13是展示根据本发明实施例10的半导体器件的剖面图。
下面结合附图介绍根据本发明的优选实施例的半导体器件及其制造方法。以下介绍展示了本发明的例示实施例,但并非是限制本发明的范围。
实施例1
首先结合图4(a)-(d)介绍根据本发明实施例1的半导体器件及其制造方法。图4(a)-(d)是展示本发明实施例1的半导体器件及其制造方法的各步骤的剖面图。
如图4(d)所示,本发明实施例1的半导体器件3(HDP:高密度封装)包括:半导体芯片11;利用立柱凸点法设置于盘电极12上的Au球凸点21;热塑性粘结层22,该层设置在半导体芯片11的形成有焊盘电极12的表面上,使Au球凸点21的上部从粘结层22的表面伸出。
尽管考虑到粘结后不合格芯片的替换,粘结层22由热塑性粘合剂形成,但如果不需要替换,也可以用热固性粘合剂。
半导体器件3如下制造。图4(a)-(d)是展示形成于半导体晶片20中的特定半导体芯片11的放大示图。
在半导体晶片20中制造了预定数量的半导体芯片11后,在每个芯片11的焊盘电极12上,设置Au球凸点21。Au球凸点21是利用作为布线键合技术的一种应用的立柱凸点法形成的立柱凸点。具体说,采用布线键合设备,在从毛细管伸出的金丝的端部形成金球,金球被压到焊盘电极12上。超声振动毛细管,将金球超声焊接到焊盘电极12上,然后切断金丝。如上所述,Au球凸点21形成在焊盘电极12上(图4(b))。
然后,在其上设置有Au球凸点21的表面上,施加厚约50微米的热塑性PI树脂,暂时固化该树脂到流性丧失的程度,从而提供粘结层22(图4(c))。
然后,将粘结层22的整个表面浸在例如KOH或N2H4(联氮)等腐蚀剂中进行腐蚀,直到Au球凸点21的上部从该表面伸出(图4(d))。
通过上述步骤得到了隔离之前的半导体器件3。然后,切割半导体晶片20,将之分成以后将介绍的随后步骤使用的半导体器件3。
实施例2
下面,结合图5(a)介绍根据本发明实施例2的半导体器件及其制造方法。图5(a)是展示根据本发明实施例2的半导体器件的剖面图。
图5(a)所示的半导体器件是一种将半导体器件3通过进行热压键合和树脂模制键合到作为插入结构的布线带23上的半导体器件(BGA型半导体封装)。关于制造,首先切割半导体晶片20,将之分成分立的半导体器件3。
然后,在一个布线带23上,安装一个或两个或多个半导体器件3,进行加热和加压,利用粘结层22建立与布线带23的粘结,并利用Au球凸点建立与布线带23上的铜布线24的电连接。这种粘结和连接可以如下进行。
这种情况采用的布线带23构成为,在对应于焊盘电极12的位置,使铜布线24由绝缘膜25支撑,即,在对应于焊盘电极12的位置处,在绝缘25中不提供应用键合设备所需要的孔。这是由于实施例2不采用利用键合设备的单点键合法的缘故。
首先,布线带23设置在厚约0.2-1.0mm的硅片(未示出)上,半导体器件3被定位并安装在铜布线24上的镀Au焊盘26上。然后,使环境气氛变为真空。
在真空气氛中,加热板(未示出)从上拉下,压在众半导体芯片11的背面(与其上形成有电极的表面相反的一侧)。于是,在对粘结层22和包括Au球凸点21的内引线连接部分上加热的同时,布线带23几乎压到其上形成有焊盘电极12的每个半导体芯片11的整个表面上。
此时,由于在对应于焊盘电极12的位置处,铜布线24由绝缘膜25支撑,所以加热板的压力容易传递到内引线连接部分。在真空中进行的加压可以避免空气在半导体芯片11和粘结层22之间累积,从而可以得到令人满意的粘结。
较好是预先选择加热和加压的值,以实现粘结层22的最佳粘结效果,选择加热和加压的值,得到与Au球凸点21的最佳金属结合,使这两者具有相同的值。这样便可以使适量的热和压力作用于粘结层22和内引线连接部分,从而实现较好的粘结状态,和较好的金属结合状态。
如上所述,Au球凸点21熔化,粘结层22固化,于是完成了镀Au焊盘26与Au球凸点21间的金属结合,和半导体芯片11与布线带23间利用粘结层22的粘结。结果,可以得到较好的粘结状态和较好的金属结合状态。真空气氛使得其上形成有焊盘电极12的半导体芯片11的表面和粘结层22间没有形成空洞。在芯片尺寸变得越来越大时,关于空洞的问题会加重。在这种情况下,真空气氛中的粘结会象本实施例中一样有效。
镀Au焊盘26可以在例如270℃、历时10秒、和980mN/凸点等条件下,键合到Au凸点21上,以建立电传导。这种情况下,希望选择用于粘结层22的粘结剂的组分和粘结层22的厚度等,使粘结层22较好是在例如270℃、历时10秒、和980mN/凸点等条件下,将半导体芯片11粘结到布线带23上。
然后,将其上安装有半导体器件3的布线带23传到树脂模制设备,放到模具中,布线带23的键合半导体器件的表面被树脂密封。此外,固化密封树脂27,形成覆盖抗蚀层50,形成焊料球31,划片成各分立封装。利用上述步骤,得到了图5(a)所示的半导体器件(BGA型半导体封装)。
尽管图5(a)示出了单个芯片封装,但可以在一个封装内排列多外半导体器件3,提供多芯片封装。
另一有效的制造工艺是,在切割半导体晶片20、将之分成分立半导体器件3之前,将半导体晶片20通过粘结层22粘结到布线带23上,然后,沿其外围将半导体芯片11分成分立的小片。这种情况下,所得半导体封装构成为半导体芯片11的每个端面与布线带23的每个端面齐平,作为相同的切割表面。
实施例3
下面,结合图5(b)来介绍本发明实施例3的半导体器件及其制造方法。图5(b)是展示根据本发明实施例3的半导体器件的剖面图。
图5(b)所示的半导体器件包括:半导体芯片11;作为保护树脂层的粘结层22,该层设置在其上形成焊盘电极12的表面上;形成在焊盘电极12上并在粘结层22的表面上露出的Au球凸点21;通过固化的焊剂28粘结到粘结层22表面的布线带23,用作与Au球凸点21电连接的插入结构。该半导体器件是通过用热压键合并进行树脂模制键合半导体器件3与布线带23制造的半导体器件(BGA型半导体封装)。
关于制造,首先,切割半导体晶片20(见图4),将之分成分立的半导体芯片11。对一个或两个或多个半导体芯片11,在Au球凸点21和粘结层22上施加热固性焊剂28,或与此对应在布线带23上施加热固性焊剂28。
然后,将Au球凸点21设置在通过焊料镀敷布线带23的铜布线24的一部分形成的镀了焊料的焊盘29上。
然后,通过红外加热、热气加热等方法进行加热,并进行回流处理。以此方式,将Au球凸点21焊接到镀了焊料的焊盘29上,并固化热固性焊剂28。由于其固化可以把粘结层22键合到布线带23上,所以采用热固性焊剂28。于是可以用非粘合性保护树脂层代替粘结层22。
然后,将其上安装有半导体器件3的布线带23传送到树脂模制设备,放入模具中,布线带23的与半导体器件3键合的表面被树脂密封。此外,固化密封树脂27,形成覆盖抗蚀层50,提供焊料球31,划片分成各分立封装。利用上述步骤,得到图5(b)所示的半导体器件(BGA型半导体封装)。
尽管图5(b)示出了单芯片封装,但一个封装中可以排列多个半导体器件3,从而提供多芯片封装。
此外,以下对半导体晶片20的工艺也是有效的。具体说,在切割半导体晶片20之前,在半导体晶片20的Au球凸点21和粘结层22上施加热固性焊剂28,或在与之相应的布线带23上施加焊剂28。然后,将Au球凸点21置于镀了焊料的焊盘29上,加热将Au球凸点21焊接到镀了焊料的焊盘29上,并固化热固性焊剂28。然后,沿其外围切割半导体片芯11,分成分立的小片。这种情况下,所得半导体封装构成为半导体芯片11的每个端面与布线带23的每个端面齐平,作为共同的切面。
实施例4
下面结合图6介绍根据本发明实施例4的半导体器件及其制造方法。图6是展示本发明实施例4的半导体器件的剖面图。
实施例4的半导体器件是多芯片组件,其中多个半导体器件3按与实施例2相同的方式安装在插入结构14上,散热器32通过热辐射膏键合到半导体器件3的背面。这种结构可以得到具有高热辐射水平的多芯片组件。
此外,与实施例3一样,通过利用热固性焊剂的回流可以进行安装。这种情况下,镀了焊料的焊盘接收Au球凸点21,热固性焊剂将用作保护树脂层的粘结层22键合到铜布线15上。
实施例5
下面结合图7介绍根据本发明实施例5的半导体器件及其制造方法。图7是展示本发明实施例5的半导体器件的剖面图。
如图7所示,实施例5的半导体器件构成为,按与实施例2相同的方式,将半导体器件3安装在作为插入结构的具有器件孔的布线带33上。此外,可以与实施例3相同,通过利用热固性焊剂的回流进行安装。这种情况下,镀了焊料的焊盘接收Au球凸点21,热固性焊剂将用作保护树脂层的粘结层22键合到铜布线35上。
如图7所示,粘结层22在半导体器件3的外围粘结到布线带33上,Au球凸点21键合到铜布线35上的镀金焊盘36上,建立电连接。半导体器件3的中心部分通过器件孔34露出。
根据实施例5的半导体器件,布线带33中设置的器件孔34可以避免由于爆玉米花现象对布线带33和粘结层22间界面的损伤。由于在对应于器件孔34的区域中,半导体芯片11的表面被粘结层22树脂密封,所以半导体芯片安装到布线带上后,不必填充或提供例如底层填料等保护树脂。
实施例6
下面结合图8(a)-(d)介绍根据本发明实施例6的半导体器件及其制造方法。图8(a)-(d)是展示本发明实施例6的半导体器件及其制造方法的各步骤的剖面图。
如图8(d)所示,实施例6的半导体器件包括:包括半导体芯片11的半导体器件3;设置在其上形成有焊盘电极12的表面上的粘结层22;设置在焊盘有12上且在粘结层22的表面上露出的Au球凸点21;粘结到粘结层22的表面并局部键合到Au球凸点21的铜布线42;用作绝缘覆盖层的覆盖抗蚀层43,该层绝缘和覆盖铜布线42,并选择性开口从而形成外部连接部分。该半导体器件是一种BGA型半导体封装,具有形成为外部端子的焊料球31。Au球凸点21建立与铜布线42上的镀金焊盘44的Au-Au金属结合。
实施例6的半导体器件如下制造。如图8(a)所示,首先,准备例如厚50微米的铜箔。
铜箔41通过粘结层22与半导体器件3对准,按与实施例2类似的方式,在真空气氛中利用加热板加热和加压。于是粘结层22将半导体器件3粘结到铜箔41上,Au球凸点21通过镀Au焊盘44键合到铜箔41,从而建立电连接。
以此方式,半导体芯片11通过粘结层22键合到铜箔41上后,通过光刻技术将铜箔41形成预定图形,得到铜布线42。
然后,在铜布线42上施加覆盖抗蚀层43作为绝缘覆盖层,曝光并显影,在其中形成开口,从而露出铜布线42的岛状部分,用于设置焊料球31。
最后,通过回流将焊料球31安装设置在岛状部分上。
利用上述步骤,完成实施例6的半导体器件(BGA型半导体封装)。
另一有效制造工艺如下,隔离前,具有形成于其中的半导体器件3的半导体晶片30(见图4)通过粘结层22与铜箔41对准,进行加热和加压,利用粘结层22实现与铜箔41的粘结,利用Au球凸点21实现与铜箔41的电连接,将铜箔41形成布线图形,然后沿半导体芯片11的外围切割半导体晶片20,将之分成分立的小片。在这种情况下,所得BGA型半导体封装具有与封装的外部尺寸或半导体芯片11的外部尺寸相同的尺寸。
按与实施例3相同的方式,可以通过利用热固性焊剂的回流,将具有形成于其中的半导体器件3或许多半导体器件3的半导体晶片20键合到铜箔41上。在这种情况下,镀了焊料的焊盘接收Au球凸点21,热固性焊剂将用作保护树脂层的粘结层22键合到铜箔41。
如图9(a)所示,可以进行树脂模制,使密封树脂27密封半导体器件3,由此保护半导体芯片11。
此外,如图9(b)所示,另一可能的结构如下,具有顶板部分和壁部分的散热器40通过热辐射膏45连接到半导体芯片11,以便顶板部分的内表面键合到半导体芯片11的背面,壁部分的下端借助于散热器固定粘结剂46,键合到填充在铜布线42间的覆盖抗蚀层43上,从而提供较高热辐射水平。
此外,如图10(a)所示,可以采用通过将包括不同半导体芯片11a、11b的半导体器件3a、3b键合到同一铜箔上制造的多芯片组件,可以用树脂模制来密封该多芯片组件,由密封树脂47密封半导体器件3a、3b,从而保护半导体芯片11。
实施例7
下面结合图11(a)介绍根据本发明实施例7的半导体器件及其制造方法。图11(a)是展示根据本发明实施例7的半导体器件的剖面图。
实施例7的半导体器件是包括三个半导体器件3c、3d、3e的多芯片组件,其中半导体器件3c的设置有粘结层22c的部分粘结到半导体器件3d的设置有粘结层22d的部分上,它们在键合表面借助于Au球凸点21彼此电连接,半导体器件3e的设置有粘结层22e的部分粘结到半导体器件3d的设置有粘结层22d的部分,它们在键合表面借助于Au球凸点21彼此电连接。
插入结构48键合到半导体器件3c表面的设置有粘结层22e的区域,但与半导体器件3d的键合表面除外,还键合到半导体器件3e表面的设置有粘结层22e的区域,同样与半导体器件3d的键合表面除外,Au球凸点21在用于安装的区域中键合到插入结构48的引线上。半导体器件3d插在插入结构48中的孔51中。
所示结构可通过树脂密封得以保护。
实施例8
下面结合图11(c)介绍根据本发明实施例8的半导体器件及其制造方法。图11(b)是展示本发明实施例8的半导体器件的透视图,图11(c)是沿图11(b)的A面取的剖面图。
实施例8的半导体器件是包括两个半导体器件3f、3g的多芯片组件,其中半导体器件3g表面的设置有粘结层22g的部分粘结到半导体器件3f的设置有粘结层22f的整个表面,它们借助于它们的Au球凸点21在键合表面彼此电连接,如图11(c)所示。
插入结构(未示出)键合到半导体器件3g表面的设置有粘结层22g的区域,但与半导体器件3f的键合表面除外(图11(b)、11(c)中半导体器件3f的两侧上存在的区域),Au球凸点21a在用于安装的区域键合到插入结构的引线上。半导体器件3f按与实施例7相同的方式插在插入结构中设置的孔内。
此外,可以进行树脂密封以用于保护。
实施例9
下面结合图12介绍根据本发明实施例9的半导体器件及其制造方法。图12是展示本发明实施例9的半导体器件的剖面图。
与实施例2类似,半导体器件4键合到布线带23上。
然而,与实施例2所用半导体器件3不同,半导体器件4构成为包括具有形成在正面和背面上的焊盘电极的半导体芯片5。正面焊盘电极12a和背面焊盘电极12b间通过铝布线49建立电连接。
实施例9的半导体器件是多芯片组件,其中四个半导体器件4借助粘结层22的粘结性叠置,一个半导体器件4的Au球凸点21键合到下面半导体器件4背面上的焊盘电极12b上,用于电连接。该半导体器件具有高封装密度,与粘结层22的键合非常可靠。
此外,可以通过树脂密封进行保护。
尽管根据本发明上述实施例的半导体器件的制造方法采用作为引线键合技术的一种应用的立柱凸点法来形成凸点,但也可以用镀敷法。在这种情况下,镀敷的凸点如下形成。具体说,在半导体晶片20上施加抗蚀层,进行曝光和显影,形成在焊盘电极12上具有开口的抗蚀图形。然后,利用镀敷法,在开口中淀积金属形成凸点。然后,去掉抗蚀层。镀敷法适于批量生产,而立柱法适于灵活制造。是采用立柱法还是镀敷法,取决于制造的数量。
形成在芯片上的凸点的材料不限于Au,其材料也可以采用Cu、Pb-Sn等。
实施例10
下面结合图13介绍根据本发明实施例10的半导体器件及其制造方法。图13是展示本发明实施例10的剖面图。
如图13所示,实施例10的半导体器件包括:半导体器件3;载带基板52;插入结构14,其中半导体器件3通过载带基板52安装在插入结构14上。
载带基板52是一种载带形状的布线带,是通过光刻由聚酰亚胺构成的绝缘膜53的正面和背面、按预定图形形成铜布线54而得到的。绝缘膜53上具有通孔,用于建立正面和背面上的铜布线54间的电传导。镀金焊盘55设置在形成在载带基板52表面上的铜布线54的一部分上。形成有载带基板52的背面上的铜布线54被覆盖抗蚀层56绝缘和覆盖,岛状部分除外。
半导体器件3借助于粘结层22粘结到载带基板52的表面上,它们之间通过Au球凸点21建立电连接。每个Au球凸点21设置在半导体芯片11的焊盘电极12上,其一端连接到焊盘电极12,另一端连接到镀金焊盘55。粘结层22形成半导体芯片11和载带基板52间的密封,Au球凸点21的密封可以保证安装的可靠性。粘结层22还用于保护半导体芯片11的表面。
在载带基板52背面的铜布线54的岛状部分上设置焊料球57。每个焊料球57的一端连接到该岛状部分,另一端连接到镀了焊料的焊盘59,焊盘59是通过在插入结构14上进行焊料镀敷形成的,用于电连接载带基板52与插入结构14。在载带基板52和插入结构14之间焊料球57周围,填充固化的热固性焊剂58,用于加固载带基板52和插入结构14间的结合,由此保证安装的可靠性。
另一方面,在半导体芯片11的背面上施加热辐射膏30,通过热辐射膏30,将散热器32粘结到半导体芯片11上。
实施例10的半导体器件如下制造。
首先,象实施例1那样制备半导体器件3。
然后,象实施例2那样将半导体器件热压键合到载带基板52的表面。
在这种情况下,象实施例3那样,可以通过利用热固性焊剂的回流进行安装。
然后,在载带基板52背面上的岛状部分上设置焊料球57。
然后,在载带基板52的背面上或插入结构14的键合区域上,施加热固性焊剂58。
然后,将其上粘结有半导体器件3的载带基板52安装到插入结构14上,利用红外加热、热气加热等进行加热,并进行回流处理。以此方式,将焊料球57焊接到镀了焊料的焊盘59上,并固化热固性焊剂58。
在半导体芯片11的背面上施加热辐射膏30,粘结上散热器32,由此完成了作为多芯片封装的实施例10的半导体器件。
在倒装法形成的常规BGA型半导体封装中,采用昂贵的组合BT基板作为插入结构,以适应200微米的极小焊盘间距的半导体芯片。
然而,根据实施例10的半导体器件,以低成本形成的细间距载带基板52插在半导体芯片11和插入结构14之间,在背面上设置间距(例如500微米)比半导体芯片11的焊盘间距(例如200微米)大的焊料球57作为外部端子。于是,不需要插入结构14来适应细间距,可以采用便宜的布线基板作插入结构14。
由于载带基板52本身价格便宜,所以可以按比用组合BT基板低的成本形成半导体封装。
Claims (25)
1.一种半导体器件,包括:
半导体芯片;
设置在所述半导体芯片的电极上的立柱凸点;
设置在所述半导体芯片的形成有所述电极的表面上的粘结层,
其中所述立柱凸点从所述粘结层的表面伸出。
2.根据权利要求1所述的半导体器件,还包括通过热压键合而被键合的插入结构(interposer)。
3.一种半导体器件,包括:
半导体芯片;
设置在所述半导体芯片的其上形成有电极的表面上的保护树脂层;
设置在所述半导体芯片的所述电极上并在所述保护树脂层的表面露出的凸点;
通过固化的焊剂粘结到所述保护树脂层的表面上并与所述凸点电连接的插入结构。
4.根据权利要求2所述的半导体器件,其中所述插入结构配有器件孔。
5.一种半导体器件,包括:
半导体芯片;
设置在所述半导体芯片的其上形成有电极的表面上的粘结层;
设置在所述半导体芯片的所述电极上并在所述粘结层的表面露出的凸点;
粘结到所述粘结层表面上并局部键合到所述凸点上的布线图形;
用于绝缘和覆盖所述布线图形并选择性开孔从而形成外部连接部分的绝缘覆盖层。
6.一种半导体器件,包括:
半导体芯片;
设置在所述半导体芯片的其上形成有电极的表面上的保护树脂层;
设置在所述半导体芯片的所述电极上并在所述保护树脂层的表面露出的凸点;
通过固化的焊剂粘结到所述保护树脂层的表面上并局部键合到所述凸点上的布线图形;
用于绝缘和覆盖所述布线图形并选择性开孔从而形成外部连接部分的绝缘覆盖层。
7.一种半导体装置,包括:
两个或多个半导体器件,每个所述器件包括:半导体芯片;设置在所述半导体芯片上形成有电极的表面上的粘结层;设置在所述半导体芯片的所述电极上并在所述粘结层的表面露出的凸点,
其中一个所述半导体器件的其上设置有所述粘结层的表面部分键合到另一个所述半导体器件的其上设置有所述粘结层的部分或整个表面上,它们彼此通过粘结面上的所述凸点电连接。
8.一种半导体装置,包括:
两个或多个叠置的半导体器件,每个器件包括:具有形成于正面和反面上的电极的半导体芯片;设置于所述半导体芯片正面或反面上的粘结层;设置在所述半导体芯片的所述电极上并在所述粘结层的表面露出的凸点,
其中一个所述半导体器件通过所述粘结层与下面一个所述半导体器件键合,并且它们的电极通过所述凸点彼此连接。
9.根据权利要求1的半导体器件,其中所述粘结层是具有粘性的热塑性树脂。
10.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述凸点伸出为止;及
切割所述半导体晶片,从而分成各所述半导体芯片。
11.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述凸点伸出为止;
切割所述半导体晶片,从而分成各所述半导体芯片;及
在一个布线基板上安装一个或两个或多个所述半导体芯片,并进行加热和加压,从而利用所述粘结层实现与所述布线基板的粘结,并利用所述凸点实现与所述布线基板上布线的电连接。
12.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成保护树脂层;
腐蚀所述保护树脂层的整个表面,直到所述凸点伸出为止;
切割所述半导体晶片,从而分成各所述半导体芯片;及
对于一个或两个或多个所述半导体芯片,在所述凸点和所述保护树脂层上或在所述布线基板上相应的位置施加热固性焊剂;
将所述凸点置于所述布线基板的布线上;
通过加热将所述凸点焊接到所述布线上,并固化所述热固性焊剂。
13.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述凸点伸出为止;和
将所述半导体晶片通过所述粘结层键合到布线基板上,并沿所述半导体芯片外围进行切割,从而分成各所述半导体芯片。
14.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述凸点伸出为止;
通过所述粘结层对准所述半导体晶片与布线基板,进行加热和加压,从而利用所述粘结层将所述半导体晶片粘结到所述布线基板上,并利用凸点实现与所述布线基板上所述布线的电连接;
沿所述半导体芯片外围进行切割,从而分成各所述半导体芯片。
15.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成保护树脂层;
腐蚀所述保护树脂层的整个表面,直到所述凸点伸出为止;
在所述凸点和所述保护树脂层上或在所述布线基板上相应位置施加热固性焊剂;
将所述凸点置于所述布线基板的所述布线上;
加热焊接所述凸点与所述布线,并固化所述热固性焊剂;及
沿所述半导体芯片外围进行切割,从而分成各所述半导体芯片。
16.一种制造半导体器件的方法,包括以下步骤:
在半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述凸点伸出为止;
将所述半导体芯片通过所述粘结层键合到金属箔上;及
将所述金属箔形成为布线图形。
17.一种制造半导体器件的方法,包括以下步骤:
在半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述凸点伸出为止;
通过所述粘结层使所述半导体芯片与一金属箔对准,进行加热和加压,从而利用所述粘结层实现与所述金属箔的粘结,并利用所述凸点实现与所述金属箔的电连接;及
将所述金属箔形成为布线图形。
18.一种制造半导体器件的方法,包括以下步骤:
在半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成保护树脂层;
腐蚀所述保护树脂层的整个表面,直到所述凸点伸出为止;
通过所述保护树脂层将所述半导体芯片与一金属箔对准;
通过加热将所述凸点焊接到所述金属箔上,并固化热固性焊剂;及
将所述金属箔形成为布线图形。
19.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述点伸出为止;
将所述半导体晶片通过所述粘结层键合到一金属箔上;
将所述金属箔形成为布线图形;及
然后,沿所述半导体芯片外围进行切割,以分成各所述半导体芯片。
20.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成粘结层;
腐蚀所述粘结层的整个表面,直到所述凸点伸出为止;
将所述半导体芯片通过所述粘结层与一金属箔对准,进行加热和加压,利用所述粘结层实现与所述金属箔的粘结,并利用凸点实现与所述金属箔的电连接;
将所述金属箔形成为布线图形;及
沿所述半导体芯片外围进行切割,将其分成各半导体芯片。
21.一种制造半导体器件的方法,包括以下步骤:
在半导体晶片上形成预定数量的半导体芯片,并在每个所述半导体芯片的电极上设置凸点;
在其上设置有所述凸点的表面上形成保护树脂层;
腐蚀所述保护树脂层的整个表面,直到所述凸点伸出为止;
将所述半导体芯片通过所述保护树脂层与一金属箔对准;
通过加热将所述凸点焊接到所述金属箔上,并固化热固性焊剂;
将所述金属箔形成为布线图形;及
然后,沿所述半导体芯片外围进行切割,从而分成各所述半导体芯片。
22.一种根据权利要求16的制造半导体器件的方法,在所述金属箔形成为布线图形后,还包括在所述布线图形上选择性形成绝缘覆盖层的步骤。
23.根据权利要求22的制造半导体器件的方法,在所述布线图形上选择性形成所述绝缘覆盖层后,还包括在通过所述绝缘覆盖层的开口露出的所述布线图形的岛形部分上提供焊料球的步骤。
24.根据权利要求10的制造半导体器件的方法,其中所述粘结层是具有粘结性的热塑树脂。
25.一种半导体器件,包括:
半导体芯片;
设置在半导体所述芯片的其上形成有电极的表面上的粘结层;
设置在所述半导体芯片的所述电极上并在所述粘结层的表面露出的凸点;
载带基板;及
插入结构,
其中所述半导体芯片利用所述粘结层粘结到所述载带基板的正面,所述半导体芯片借助于所述凸点与所述载带基板电连接,所述插入结构接在所述载带基板的背面,用于实现导电性。
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CN102347315B (zh) * | 2010-07-21 | 2014-11-26 | 株式会社村田制作所 | 陶瓷电子部件和布线基板 |
CN102543779A (zh) * | 2010-12-10 | 2012-07-04 | 新科金朋有限公司 | 形成与半导体小片垂直分隔的互连层中的电感器的半导体器件和方法 |
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CN103426780A (zh) * | 2012-05-14 | 2013-12-04 | 万国半导体(开曼)股份有限公司 | 焊球阵列用作高度垫块及焊料固定物 |
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CN105895607A (zh) * | 2015-02-13 | 2016-08-24 | 台湾积体电路制造股份有限公司 | 用于半导体封装件的互连结构和制造互连结构的方法 |
CN105895607B (zh) * | 2015-02-13 | 2019-03-15 | 台湾积体电路制造股份有限公司 | 用于半导体封装件的互连结构和制造互连结构的方法 |
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US20020132463A1 (en) | 2002-09-19 |
JP3597754B2 (ja) | 2004-12-08 |
US6791195B2 (en) | 2004-09-14 |
KR20010104626A (ko) | 2001-11-26 |
TW501208B (en) | 2002-09-01 |
KR100384260B1 (ko) | 2003-05-16 |
US20010036711A1 (en) | 2001-11-01 |
JP2001308140A (ja) | 2001-11-02 |
EP1150347A2 (en) | 2001-10-31 |
SG100674A1 (en) | 2003-12-26 |
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