TW201246413A - Compliant interconnects in wafers - Google Patents

Compliant interconnects in wafers Download PDF

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Publication number
TW201246413A
TW201246413A TW100145366A TW100145366A TW201246413A TW 201246413 A TW201246413 A TW 201246413A TW 100145366 A TW100145366 A TW 100145366A TW 100145366 A TW100145366 A TW 100145366A TW 201246413 A TW201246413 A TW 201246413A
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Taiwan
Prior art keywords
substrate
microelectronic unit
conductive
microelectronic
recess
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TW100145366A
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English (en)
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TWI508195B (zh
Inventor
Vage Oganesian
Belgacem Haba
Ilyas Mohammed
Piyush Savalia
Craig Mitchell
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Tessera Inc
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Publication of TW201246413A publication Critical patent/TW201246413A/zh
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Publication of TWI508195B publication Critical patent/TWI508195B/zh

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    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Description

201246413 六、發明說明： 【發明所屬之技術領域】 本發明係關於堆疊微電子總成及製造此等總成之方法， 且係關於在此等總成中有用的組件。 • 【先前技術】 •常提供半㈣w作為個別、封料元…標準晶片具 有擁有-前表面之-平坦、矩形本體，該前表面具有連接 至該晶片之主動電路之若干接觸件。各個別晶片通常安裝 於一封裝中，該封裝繼而安裝於—電路板（諸如，一印刷 電路板）上且將該晶片之接觸件連接至該電路板之導體。 在許多習知設計中，該晶片封裝佔有遠大於該晶片自身之 面積之電路板之-面積。如本發明參考具有一前表面之一 平坦晶片所使用’「晶片之面積」應理解為係指該前表面 之面積。 在「覆晶」設計中，該晶片之前表面面向一封裝基板之 表面(亦即 曰曰片載體)’及該晶片上的接觸件係藉由 焊球或其他連接元件直接結合至該晶片載體之接觸件。繼 而，該晶片載體可透過覆蓋該晶片之前表面之端子結合至 -電路板。該「覆晶」設計提供一相對緊密之配置；各晶 . 4佔有等於Μ大於該晶片之前表面（面積之該電路板之 -面積，例如，諸如共同讓與之美國專利第5，148,265號、 第5,148,266號及第5,679,977號之某些實施例中所揭示該 等案之揭示内容以引用的方式併入本文中。 除了最小化由微電子總成佔有之電路板之平面面積外， 160713.doc 201246413 亦期望產生存在垂直於該電路板之平面之一低整體高度或 尺寸之一晶片封裝。此等薄微電子封裝容許具有安裝於其 内之封裝之一電路板緊挽接近於相鄰結構而放置，因此減 少併入該電路板之產品之整體大小。 亦已提出封裝一「堆疊」配置（亦即，複數個晶片彼此 重疊放置之一配置）中的複數個晶片。在一堆疊配置中， :¾干曰曰片可女裝於小於該等晶片之總面積之該電路板之一 面積中。某些堆疊晶片配置係揭示於（例如）前述美國專利 第5，148,265號、第5,679,977號及美國專利第5,347，159號 之某些實施例中，該等案之揭示内容以引用的方式併入本 文中。亦以引用的方式併入本文中的美國專利第4,941,〇33 號揭示晶片彼此互相堆疊且藉由與該等晶片相關聯之所謂 「佈線膜」上的導體彼此互連之一配置。 習知晶片接觸件可由於接觸件上的一非最佳化應力分佈 及一半導體晶片與（例如）晶片所結合之結構之間的熱膨脹 係數（CTE)之一不匹配而具有可靠性挑戰。例如，當一半 導體晶片之一表面上的導電接觸件係藉由一相對較薄且勁 性之介電質材料而絕緣時，該等接觸件上可存在明顯的應 力。此外，當半導體晶片結合至一聚合基板之導電元： 時，晶片與基板之較高CTE結構之間的電連接將經受由於 CTE不匹配而引起之應力。 大小在晶片之任意實體配置中係一重要考慮因素。隨著 可攜式電子裝置之快速發展，更緊密之晶片實體配置之需 求已變得更強烈。僅以實例之方式，常稱為「智慧型電 160713.doc 201246413 話」之裝置整合一蜂巢式電話與高效資料處理器、記憶體 及輔助裝置（諸如，全球定位系統接收器、電子照相機及 區域網路連接以及高解析度顯示器及相關影像處理晶片） 之功能。此等裝置可提供諸如全網際網路連接、包含全解 析度視訊之娛樂、航空、電子銀行業及更多之能力，所有 皆在一 口袋型裝置中。複雜的可攜式裝置需要將許多個晶 片封裝至-小空間中。此外，該等晶片之—些具有許多輸 入及輸出連接，常稱為「1/0」。此等1/0必須與其他晶片之 I/O互連。該等互連應為短的且應具有低阻抗以最小化信 號傳播延遲。形成該等互連之組件不應大幅增加總成之大 小。類似需求亦發生於其他應用中，例如，發生於（諸如） 用於網際網路搜尋引擎之資料伺服器中。例如，提供複雜 晶片之間的許多短小、低阻抗之互連之結構可增加該搜尋 引擎之頻寬且減少其之功率消耗。 儘管半導體接觸件形成及互連得到了提升，然亦需要進 仃改良以最小化半導體晶片之大小，同時增強電互連可靠 性。本發明之此等屬性係藉由如下文所描述之微電子封裝 之構造而達成。 【發明内容】 根據本發明之一態樣，一種微電子總成可包含一基板及 —導電元件。該基板可具有小於10 ppmrc之一cte、具有 不延伸穿過該基板之-凹部之-主要表面及安置於該^部 内之具有小於10 GPa之一彈性模數之一材料。該導電元件 可包含覆蓋該凹部且自藉由該基板切之—錯定部延伸之 1607 丨 3.doc 201246413 接合部。該接合部可至少部分曝露於該主要表面以連接 至該微電子單元之外之一組件。 在實施例中’該基板可具有小於7 ppm/C之一 CTE 〇 在一特定實施例t，該接合料移動以便減少（諸如）可於 刼作製造或測試微電子單元期間存在之該接合部上的應 力在例不性實施例中，該基板實質上可由自半導體、 玻璃制U成之群組選擇之—材料㈣。在―實施例 中’ 5亥基板可包含複數個主動半導體裝置及該導電元件可 與該複數個主動半導體裝置之至少-者電連接。在一特定 實施例中，安置於該凹部内的材料可包含自聚醯亞胺、聚 石夕氧及環氧樹脂組成之群組選擇之至少-材料。 j-例不性實施例中，該凹部可不延伸穿過該基板。^ 實把例中’該接合部可在實質上平行於該基板之主要4 面之-方向上延伸。在一特定實施例中，該錨定部及該去 口。P可在相同方向上延伸。在__作彳示性實施例中，該導$ 元件可與朝向與該主要表面相對之該基板之一第二表面灸 伸之-導通體電㈣合。在—實施例中，該導通體可曝露方 該第二表面。在一特定實施例中，該導通 第二表㈣伸至該主要表面之該基板中的—孔内延。申丄 在實知例中，5亥孔可包含自該主要表面朝向該第二^ 面延伸之一第一開口及自該第一 一第二開口。該第—開口及該第 對於該主要表面之第一方向及第 質角度。在一例示性實施例中， 開口延伸至該第二表面之 二開口之内表面分別在相 一方向上延伸以界定一實 一堆疊總成可包含至少第 160713.doc 201246413 一微電子單元及第二微電子单元，該第二微電子單元堆疊 有該第一微電子單元’其中該第一微電子單元之基板於其 内與該第二微電子單元之一基板電連接。在一特定實施例 中，該堆疊總成可進一步包含電耦合至該第一微電子單元 之接合部之一導電塊（conductive mass)及該第二微電子單 元之一導電元件。 根據本發明之另一態樣，一種微電子總成可包含一基板 及一導電元件。該基板可具有小於丨〇 ppmfC之一 CTE、具 有不延伸穿過該基板之一凹部之一主要表面及安置於該凹 部内之具有小於10 GPa之一彈性模數之一材料。該導電元 件可具有相對於該基板而固定之—錨定部、至少部分覆蓋 δ玄凹部之-接合部及自該接合部向下延伸至該錯定部之一 連=部。該接合部可在遠離該衫部之—方向上延伸且可 曝露於該主要表面以連接至微電子單元之外之一組件。該 連接部可具㈣符合該凹部之内表面之—輪紅—輪廊。X 在一例示性實施例中’該基板可具有小於7 ppmrc之一 =在-實施例中，該接合部可移動以便 戈貝“式微電子“期間存在之該接合部上的 f力在-特定實施射，該基板實質上可由自 玻璃及陶瓷組成之群 风之群組選擇之一材料組 中’該基板可包含複數 '貫細例 可虚該複袁“… 勒千導體裝置，及該導電元件 ，、复數個主動半導體裝置之至少 示性㈣該連接部可延伸至該凹部中。。-例 在一料實施例中’該導電㈣可與朝向與該主要表面 160713.doc 201246413 相對之該基板之-第二表面延伸之一導通體電耦合。在_ 實施例中，該導通體可曝露於該第：表面U示性實 施例中，料通體可延伸於自該第二表面延伸至該主要表 面之該基板中的-孔内。在-特定實施例中，該孔可包含 自該主要表面朝向該第二表面延伸之一第一開口及自該第 -開口延伸至該第二表面之-第二開口。該第一開口及該 第二開口之内表面分別在相對於該主要表面之第一方向及 第二方向上延伸以教-實質角度。在—實施例中，該銷 定部可具有符合該孔之一内表面之一輪廓之一輪癖。在一 例示性實施例中，該接合部可界定一内部孔隙。 在一實施例中，該孔隙可延伸穿過該接合部至該連接部 中。在一特定實施例中，該孔隙之至少一部分可填充有一 介電質材料。在一例示性實施例中’ 一堆疊總成可包含至 少第一微電子單70及第二微電子單元，該第二微電子單元 堆疊有該第-微電子單元，纟中該第一微電子單元之基板 於其内與該第二微電子單元之—基板電連接。在一特定實 施例中，該堆疊總成可進一步包含電耦合至該第一微電子 單元之接合部一導電塊及該第二微電子單元之一導電元 件。 根據本發明之又一態樣，一種製作一微電子單元之方法 可包含如下步驟：形成支撐於具有小於1〇 ppm/t>c之一 cte 之一基板之一主要表面上的一導電元件；自該主要表面移 除支撐该導電元件之至少一接合部之材料以形成不延伸穿 過該基板之一凹部；及將一材料沈積於具有小於1〇 ^以之 1607l3.doc 201246413 -彈性模數之凹勒。該接合部可不藉由該基板支撲，而 鄰近錢合部之該導電元件之―心部可藉由該基板支 撑。該接合部可至少部分曝露於該基板之主要表面以連接 至該微電子單元之外之一組件。 在一實施例中，該基板可具有小於7 ppm/k —d 在-例示性實施例中’該基板實質上可由自半導體、破璃 及陶竞組成之群組選擇之一材料組成。在一特定實施例 中，該基板可包含複數個主動半導體裝置，及形成該導電 元件之步驟可以該複數個主動半導體裝置之至少一者而與 該導電元件電連接。在-例示性實施例中，可執行形成該 導電元件之步驟使得該接合部係實質上平行於該主要表面 而安置。在-實施例中’該方法可進一步包含如下步驟： 自該基板移除材料以形成自該主要表面延伸至與該主要表 面相對之該基板之-第二表面之一孔’及形成延伸於該孔 内之一導通體使得該導通體與該導電元件電耗合且朝向該 第二表面延伸。 在一特定實施例中，自該基板移除材料以形成—孔之步 驟可包含形成自該主要表面朝向該第二表面延伸之—第二 開口及自該第-開σ延伸至該第二表面之—第二開口。該 第一開口及該第二開口之内表面可分別在相對於該主要表 面之第一方向及第二方向上延伸以界定一實質角度。在一 實施例中，一種製作包含至少第一微電子單元及第二微電 子單元之一堆4總成之方法可進一步包含將該第一微電子 單元之基板電連接至该第二微電子單元之一基板之步驟。 160713.doc 201246413 根據本發明之又一態樣，一種製作一微電子單元之方法 可包含如下步驟：自具有小於1〇 ppmrc之一 CTEi—美板 移除材料以形成自該基板之—主要表面延伸至與該主^表 面相對之-第二表面之一孔；形成具有延伸於該主要表面 之上且支撐於該主要表面上之—接合部之一導電元件、相 =該基板固定之1定部及自該接合部向下延伸至該錯 定。卩之連接部；自該主要表面移除支撐該導電元件之至 ^ =接合部之材料以形成一凹部使得該接合部至少部分覆 蓋該凹部；及將—材料沈積於具有小於ig他之—彈性模 數之忒凹。卩内。該連接部之一表面可具有符合該孔之—内 表面之一輪廓之一輪廓。該連接部之表面之輪廓可不符合 /凹。P之—内表面之一輪廓。該接合部可至少部分曝露於 該基板之主要表面以連接至該微電子單元之外之一組件。 在一特定實施例中’該基板可具有小於7 ppm/〇c之— CTE在—例不性實施例中，製作一微電子單元之方法可 進步包含：在形成導電元件之步驟之前，形成延伸於孔 内且朝产|笛 士 °弟二表面延伸之一導通體，使得形成該導電元件 之步驟藉由該導通體與該導電元件電耦合。在一實施例 中可執仃形成導電元件之步驟使得接合部相對於連接部 非居中。在一特定實施例中，該基板實質上可由自半導 體玻璃及陶瓷組成之群組選擇之一材料組成。在一例示 性實施例Φ ^v. « . 该基板可包含複數個主動半導體裝置，及形 成/‘電元件之步驟可藉由該複數個主動半導體裝置之至 '、者而與該導電元件電連接。在一實施例中，可執行形 160713.doc 201246413 成該導電70件之步驟使得該接合部界;t -内部孔隙。在-特疋實施例中’可執行形成該導電元件之步驟使得該孔隙 延伸穿過該接合部至該連接部中。 在一實施例中，製作一微電子單元之方法可進一步包含 將一介電質材料沈積至該孔隙之至少一部分中之步驟。在 特疋貫施例中’自基板移除材料以形成一孔之步驟可包 含形成自主要表面朝向第二表面延伸之一第一開口及自該 第開口延伸至該第二表面之一第二開口。該第一開口及 該第二開口之内表面可分別在相對於該主要表面之第—方 向及第二方向上延伸以界定一實質角度。在一例示性實施 例中’-種製作包含至少第一微電子單元及第二微電子單 兀之一堆疊總成之方法可進一步包含將該第一微電子單元 之基板電連接至該第二微電子單元之一基板之步驟。 本發明之進一步態樣提供併入根據本發明之前述態樣之 微電子結構、根據本發明之前述態樣之複合晶片或兩者與 其他電子裝置結合之系統。例如，該系統可安置於一單二 外殼中，該單-外殼可為—可攜式外殼。根據本發明=此 態樣中的較佳實施例之系統比相稱習知系統更緊密。 本發明之進一步態樣提供可包含根據本發明之前述態樣 之複數個微電子總成之模組。各模組可呈右 ^ 7 八另用於傳輸信號 至该等微電子總成之各者及自該等微電子确成 丁心成之各者傳輸 信號之一共同電介面。 【實施方式】 參考圖1A ’ 根據本發明之一實施例之— 堆疊微電子總成 160713.doc -11 - 201246413 10包含一第一微電子單元12及一第二微電子單元14。在一 些實施例中，該第一微電子單元12及該第二微電子單元14 可為一半導體晶片、一晶圓、一介電質基板或類似物。例 如，該第一微電子單元12及該第二微電子單元14之一者或 兩者可包含一記憶體儲存元件。如本文所使用，一「記情 體儲存元件」係指連同用於儲存資料及自記憶體單元擷取 資料（諸如’用於在一電介面上傳輸資料）之電路以一陣列 配置之多個記憶體單元。 忒第一微電子單元12包含：一基板20，該基板2〇具有一 凹部30，該凹部30自一主要表面21朝向一第二表面22部分 延伸穿過該基板；及一導電元件4〇，該導電元件4〇具有藉 由該基板支撐之一錨定部41、自該錨定部延伸之一接合部 42及一端部46，該接合部42至少部分覆蓋該凹部3〇且至少 分曝露於該主要表面以與該第一微電子單元之外之一組 件互連如展示，该端部46位於該接合部42之一端上。一 介電質區域50至少覆蓋該凹部3〇内的一内表面31。 "在圖1A中’平行於該主要表面21之方向在本文稱為「水 平」或「橫向」方向’而垂直於前表面之方向在本文稱為 :上或向下方向且亦在本文稱為「垂直」方向。本文中所 指之方向係在所指之結構之參考系（frame of reference 中因此此等方向對於正常或重力參考系可處於任意定 ^ 1較於另-特徵部’一特徵部安裝於「—表面之上」 之較向尚度上之-陳述意謂：相較於另一特徵部 徵部在遠離表面之相同正交方向上具有一較大距離 160713.doc •12· 201246413 反，相較於另一特徵部，一特徵部安裝於「一表面之上」 之一較低高度上之一陳述意謂：相較於其他特徵部，—特 徵部在遠離該表面之相同正交方向上具有一較小距離。 基板20較佳具有小於！㈤〇-Vc (或ppm/t)之一熱膨服 係數（「CTE」）。在-特定實施例中，該基板2()可具有小 於7χ1〇·6/°(：(或ppm/t：)之一熱膨脹係數（「CTE」）。該基 板20實質上較佳由諸如半導體、玻璃或陶竞之—材料植 成。在該基板20係由-半導體（諸如，聚石夕氧）製成之實施 例中，複數個主動半導體裝置（例如，電晶體、二極體等） 可安置於位於該主要表面21或該第二表面22上或之下之— 主動半導體區域中。該主要表面21與該第二表面22之間的 該基板20之厚度通常為小於2〇〇微米，及可顯著更小，例 如，130微米、7〇微米或甚至更小。 該基板2G可進—步包含安置於該主要表面21與至少-導 電το件40之間的一介電層。一介電層可覆蓋該第二表面 22 °此—介電層可使導電元件與該基板2G電絕緣。此等介 電層之厂者或兩者可稱為該第一微電子單元。之一「鈍化 層^該介電層可包含—有機或無機介電質材料或兩者。 電^可匕3 —電鏟保形塗層或其他介電質材料，例 ά 可光成像聚合材料(例如，-焊料遮罩材料)。 該微電子元件12可包切露於該基板20之主要表面21之 ;或多個導電元件4〇。各導電元件4〇之接合部42可曝露於 4主要表面2 1以與該第—微電子元件i 2之外之—組件（諸 如’第二微電子元件14)互連。儘管圖中未具體展示，然 I60713.doc •13· 201246413 該基板20中的主動半導體裝置亦可導電連接至該接合部 42因此’該等主動半導體裝置可透過延伸於該基板20之 或多個介電層内或之上之所併人之佈線而導電接達。該 等導電7C件40(及本文所描述之其他導電元件之任意者）可 由任意導電金屬（包含(例如)銅或金)製成。 例如如展不，在圖1C中，接合部42,可具有一導電結 σ墊（例如薄平坦構件）之仰視圖形狀。各接合部a可 具有任思仰視圖形狀’其包含（例如）如圖中所展示之一 矩形跡線形狀、如圖1(：中所展示之圓形墊形狀、擴圓形 狀、正方形形狀、三角形形狀或更複雜形狀。在其他實施 例中’該接合部42可為任意其他類型之導電接觸件，其包 含（例如）一導電柱。 該接合部42可與凹部3G對準且可整體或部分安置於由該 凹部界定之該基板2〇之—區域十。如圖1A可見，該接合部 42係整體安置於由該凹部3〇界定之一區域中。如展示，由 該接合部42之-頂表面43界定之—平面實f上平行於由該 基板之主要表面21界定之—平面。如展示。該接合部仏 之一底表面44位於由該基板2〇之主要表面21界定之一平面 上。在其他實施例中’該接合部42之底表面44可位於由該 主要表面21界定之平面之上或之下。該導電元件4〇之端部 46未藉由該基板20支撐，使得該端部可相對於該錨定部41 懸掛在外。覆蓋該主要表面21及鄰近於該介電質區域5〇而 定位之該接合部42之此一未支撐之端部46可相對於該經支 撐之錨定部41自由移動，使得該接合部42可用作一懸臂。 160713.doc •14- 201246413 如本發明中所使用，—導電元件「曝露於」-基板之-表面或覆蓋該基板之-表面之—介電Μ件之—陳述指 示：該導電元件係用於與以垂直於該介電質元件之表面自 該介電質元件之外部朝向該介電質.元件之一方向移動之一 理論點接觸。因此，曝露於一介電質元件之一表面之一端 子或其他導電元件可自此表面突出；可與此表面同高；或 可相對於此表面凹進及透過該介電質中的-孔或凹陷曝 路。 儘管實質上用於形成導電元件之任意技術可用於形成本 文所描述之導電元件，然亦可利用如更詳細討論於薦年 7月23日申請之共同擁右夕菜宙立 擁有之美國專利申請案第12/842,669號 中的特定技術’該案以引用的方式併入本文中。此等技術 可包含（例如）以一雷射或機械程序（諸如，銑切或喷沙）選 擇性處理-表面以便沿著不同於該表面之其他部分形成導 =之路徑處理該表面之該等部分。例如，一雷射或機 械程序可用於僅沿著-特定路徑自該表面切除或移除一材 料（諸如，—犧牲層）且因此形成沿著該路徑延伸之-凹 槽。接著，一材料(諸如’-催化劑)可沈積於該凹槽中， 及一或多個金屬層亦可沈積於該凹槽中。 該導電元件40之端部46在时展示為非橫 平行於該基板心主要表面21之—方㈤ 3〇之外邊界32(見圖1Β)β在本文 ^ <凹4 ,社尽文所揭不之實施例之任意者 2導電元件之端部及/或接合部可橫向延伸超過凹部之 外邊界。在—實施财，接合部之合至橫向延^ 160713.doc -15- 201246413 超過對應凹部之外邊界之一導電跡線（未展示），但該接合 部亦可以下文所描述之方式相對於對應基板而移動。 該凹部30自該主要表面21朝向該第二表面22部分延伸穿 過該基板20。該凹部30之内表面31以任意角度自該主要表 面21延伸穿過該基板2〇。較佳地，該内表面31以介於〇度 與90度之間的一角度自該主要表面21延伸至由該主要表面 21界定之水平面。該内表面31可具有一恆定斜率或一變化 斜率。例如，隨著該内表面31進一步朝向該第二表面22貫 穿時，相對於由該主要表面21界定之水平面之該内表面31 之角度或斜率可呈量值減少（亦即，變為弱正或弱負）。 凹。卩3 〇可具有任意仰視圖形狀，其包含（例如）如圖1 b 中所展不之一橢圓形或如圖1C中所展示之一圓形。在圖 1]5中所展示之實施例中，凹部3〇在沿著該主要表面2ι之一 第橫向方向上具有一寬度W，及該凹部在橫向於該第一 =向方向《沿著肖主要表面之—第二橫向方向丨具有一長 度L ^该長度大於該寬度。在一些實例中，該凹部％可具 ，、一、准形狀，其除了其他以外亦包含（例如）一圓柱體 形狀、一立方體形狀、一稜桎形狀或一截頭圓錐體形狀。 ,特疋實轭例中，如圖1D中所展示，該凹部3 0可為具 立少°卩刀覆蓋該凹部之複數個接合部42之一矩形通道。 可：：里之接合部42可覆蓋一單一凹部3〇，及該等接合部 ^、二蓋單—凹部之任意幾何組態配置。例如，如圖1D —個接合部42可沿著覆蓋一單一凹部30之一共同 160713.doc -16· 201246413 在所展示之實施例中，該介電質區域5〇填充該凹部3〇使 得該介電質區域之一輪廓符合該凹部之一輪廓（亦即，該 凹部之内表面31之形狀）。該介電質區域5〇可相對於該基 板20提供良好的介電隔離。該介電質區域5〇可為順應，具 有一足夠低之彈性模數及足夠的厚度使得該彈性模數及該 厚度之乘積提供順應性。較佳地，該導電元件4〇之接合部 42至少部分覆蓋該介電質區域5〇β當一外部負載施加至該 接合部時，一順應介電質區域5〇可容許該導電元件4〇之接 合部42相對於該基板2〇及支撐於其上之該導電元件之錨定 部41稍微撓曲或移動。以此方式，該第一微電子單元I〗之 接合部42與該第二微電子單元14之端子之間之結合能更好 地經受由於該第一微電子單元與該第二微電子單元之間的 熱膨脹係數（「CTE」）之不相配所引起之熱應力。 如本文結合一導電元件之一接合部所使用，「可移動」 意謂接合部可藉由施加至其之—外部負載相對於基板之主 要表面位移至-^程度以致該位移可略微減緩或減少機械 應力’諸如’與不具有此位移之導f元件電連接而存在之 於操作、製造或測試微電子單元期間所引起之該等應力。 藉由介電質區域50之厚度與其彈性模數之乘積所提供之 順應度可足以對由於第一微電子單元12與該第一微電子單 元透過接合部安裝之第二微電子單元14之間的熱膨服不相 配所引起之施加至接合部42之應力作補冑。一側填滿料 (未展示）可提供^該介電f區域5G之—外表面51與此第二 微電子單元14之間以增強對由於CTE不相配所引起之熱應 160713.doc •17· 201246413 力之阻抗。 在所展示之實施例中，該介電質區域5〇之外表面5i(圖 1A)係位於由該基板20之主要表面21界定之一平面内。替 代地，該介電質區域50之外表面51可延伸於由該基板2〇之 主要表面21界定之一平面之上，或該介電質區域之外表面 可凹陷低於由該基板之主要表面界定之一平面。 一介電層25可覆蓋基板2〇之主要表面21及不為接合部42 之導電元件40之部分以相對於該基板及不為接合部之該等 導電兀件之部分提供良好的介電隔離。該介電層25可包含 一無機或有機介電質材料或兩者。在一特定實施例中，該 介電層25可包含與介電質區域5〇相同之順應介電質材料。 在一例不性實施例中，可藉由該介電質區域5〇連續形成該 介電層25 » 第二微電子單元14可包含一基板15及至少部分曝露於該 基板之一主要表面17以與第一微電子單元12之接合部“互 連之導電接觸件16a及1 61^藉由提供該第一微電子單元12 中的接合部42及該第二微電子單元14中的背面導電接觸件 14,複數個微電子單元可彼此互相堆疊以形成堆疊微電子 總成10。在此配置中，該等接合部42與該等導電接觸件 16a及16b對準。 如圖1A中所展示，該導電接觸件16a為一導電柱。該導 電柱⑹可為任意類型之導電柱且可具有任意形狀，其包 3截頭圓錐形狀。各導電柱Ha之基座及頂端實質上可 為圓形或具有—不同形狀（例如，長方形）。可使用導電柱 160713.doc -18- 201246413 之其他實例’如展示及描述於2〇 10年7月8日申請之共同擁 有之美國專利申請案第12/832,376號中。導電接觸件1613展 示為一導電墊。該導電墊1讣可具有任意形狀，其包含圓 形形狀、正方向形狀、長方形形狀、矩形形狀或一更複雜 形狀。 該第一微電子單元12與該第二微電子單元14之間的連接 可穿過導電塊18。基板20之主要表面21上的介電層25及介 電質區域50及覆蓋基板15之主要表面17之一介電層（例 如，一鈍化層）除了提供互連外亦可提供第一微電子單元 12與第二微電子單元14之間的電隔離。 導電塊18可包括具有一相對較低之熔融溫度之一可溶金 屬（例如，焊料、錫或包含複數個金屬之一共熔混合物 (eutectic mixture))。替代地’該等導電塊18可包含一可濕 金屬（例如，銅或具有高於焊料或另一可熔金屬之熔融溫 度之-熔㉞溫度之其他責金屬或非貴金屬）。此可濕金屬 :與-對應特徵部(例如，一互連元件(諸如，第二微電子 單元14)之彳溶金屬特徵部）接合以將第—微電子單元^ 外部互連至此互連元件。在―特定實施例中，該等導電塊 18可包a散佈於-媒介（例如，—導電膏（例如，金屬填充 膏、焊料填充膏或同向導電黏著劑或異向導電黏著劑))中 的一導電材料。 ’考圖2A至圖2D ’現將描述一種製作微電子總成叫圖 1A至圊1D)之方法。如圖2A$所綠示，微電子單元η包含 基板20及覆蓋主要表面21之_或多個導電元件t該等導 1607l3.doc •19· 201246413 電元件40可藉由一介電層（諸如，一鈍化層（未展示乃與該 基板20絕緣。 在圖2B中所繪示之製作階段中，一介電層25形成於基板 20之主要表面21上且充當期望保留該主要表面之剩餘部分 之一蝕刻遮罩層，其中《例如，該介電層25可為一可光成 像層（例如’一光阻層），其經沈積且圖案化以在實行一定 時蝕刻程序以形成凹部30之後僅覆蓋該主要表面21之部 分。各導電元件40之接合部42可維持至少部分曝露於該主 要表面21(亦即，未藉由該介電層25覆蓋）以連接至該第一 微電子單元12之外之一組件。 可使用各種方法來形成該介電層25。在一實例中，將一 流動介電質材料施加至該基板20之主要表面21，及接著在 一方疋塗操作期間接著可包含加熱之一乾燥循環使該流動材 料跨該主要表面更均勻分佈。在另一實例中，介電質材料 之一熱塑膜可在加熱或於一真空環境（亦即，置於低於周 圍壓力之一環境中）中加熱總成之後施加至該主要表面 21。在另一實例中，可使用蒸汽沈積以形成該介電層25。 在又一實例中，包含基板2〇之總成可浸入一介電質沈積 浴液中以形成一保形介電質塗層或介電層25。如本文所使 用，一「保形塗層」為符合塗覆之表面之一輪廓（諸如， 當該介電層25符合該主要表面21之一輪廓時）之一特定材 料之一塗層。可使用一種電化學沈積方法以形成該保形介 電層25 ’其包含（例如）電泳沈積或電解沈積。 在一實例中，可使用一電泳沈積技術以形成保形介電質 160713.doc -20- 201246413 吏得該保形介電質塗層僅沈積於總成之曝露導電及 表面上。在沈積期間，半導體裝置晶圓保持在 電位上’及將一電極浸入至浴液中以保持該浴液處於一 不同所需電位上。接著，該總成在適當條件下保持㈣浴 二中入―足夠時間以在為導電或半導電之基板之曝露表面 (匕3但不限於沿著該主要表面21)上形[電沈積保形介 s B 25。只要於藉此塗覆之表面與該浴液之間維持一足夠 強之電場’就能發生電泳沈積。當由於電泳沈積達到由參 數（例如’沈積之電屡、漢度等）控管之某 而自身限制時，沈積停止。 曰之後 電泳沈積在該總成之導電及/或半導電外表面上形成一 連續且均勻厚度之保形塗層。此外，可沈積該電泳塗層使 得歸因於其介電質（非導電）性質，而未形成在覆蓋該主要 表面21之-剩餘鈍化層上。換句話說，電泳沈積之一性質 在於，其，倘若覆蓋一導體之一介電質材料層具有足夠厚 度 '給定其介電質材料’則電泳沈積不形成在該介電質材 料層上。通常，電泳沈積不發生於具有大於約10微米至幾 十微米之厚度之介電層上。可由一陰極環氧沈積前驅物形 成該保形介電層25。替代地，可使用一聚胺基曱酸醋或丙 烯酸沈積前驅物。各種電泳塗層前驅組合物及供應來源列 於下文表1中。 160713.doc •21 - 201246413 表1 電泳塗層名稱 POWERCRON 645 POWERCRON 648 CATHOGUARD 325 製造商 MFG PPG PPG BASF 類型 陰極 陰極 陰極 聚合物基 環氧樹脂 環氧樹脂 環氧樹脂 位置 匹茲堡PA 匹茲堡PA 南菲爾德MI 應用資料 Pb/Pf-自由 Pb-自由 Pb或Pf-自由 Pb-自由 HAPs，g/L 60-84 順應 VOC，g/L (減水） 60-84 <95 固化 20 分鐘/175°C 20 分鐘/175°C 膜性質 色彩 黑色 黑色 黑色 厚度，微米 10-35 10-38 13-36 鉛筆硬度 2H+ 4H 浴液特性 固體，重量百分比 20(18-22) 20(19-21) 17.0-21.0 pH(25〇C) 5.9 (5.8-6.2) 5.8 (5.6-5.9) 5.4-6.0 傳導率（25°C)uS 1000-1500 1200-1500 1000-1700 P/B比率 0.12-0.14 0.12-0.16 0.15-0.20 操作溫度°〇 30-34 34 29-35 時間秒 120-180 60-180 120+ 陽極 SS316 SS316 SS316 電壓 200-400 >100 電泳塗層名稱 ELECTROLAC LECTRASEALDV494 LECTROBASE 101 製造商 MFG MACDERMID LVH塗層 LVH塗層 類型 陰極 陰極 陰極 聚合物基 聚胺基曱酸酯 胺基曱酸酯 胺基甲酸酯 位置 沃特伯里CT 伯明罕UK 伯明罕UK 應用資料 Pb/Pf-自由 Pb-自由 Pb-自由 HAPs，g/L VOC，g/L (減水） 固化 20 分鐘/149°C 20 分鐘/175°C 20 分鐘/175°C 膜性質 色彩 透明(+染色Ί 黑色 黑色 厚度，微米 10-35 10-35 錯筆硬麿 4H 浴液特性 固體重量百分比 7.0 (6.5-8.0) 10-12 9-11 pH (25。0 5.5-5.9 7-9 4.3 傳導率(25°C)uS 450-600 500-800 400-800 P/B比率 操作溫；t°C 27-32 23-28 23-28 時間，秒 60-120 陽極 SS316 316SS 316SS j壓 40，最大 50-150 160713.doc -22- 201246413 在另一實例中，可電解形成介電層。此程序類似於電泳 沈積，惟經沈積之層之厚度未受限於接近形成其之導電或 半導電表面除外。以此方式，_電解沈積介電層可形成為 基於需求而選擇之一‘ 厚厪及處理時間為達成該厚度之— 因數。 隨後，在圖2C中所繪示之製作階段中，凹部辦經形成 而自該主要表面21朝向該基板2〇之第二表面22向下延伸。 例如，可在形成期望保留該主要表面21之剩餘部分之一遮 罩層⑼如，介電層25)之後，藉由選擇性银刻該基板⑽以 移除該基板之材料而形成該凹部3〇。該凹部3〇可經形成使 得移除支撐至少接合部42之該基板2〇之材料。 如圖2Ct所展示，可使自該主要表面21朝向該第二表面 22向下延伸之該凹部3〇之内表面31傾斜，亦即，可以除了 與該主要表面成一垂直角(直角)之外的角度延伸。除了其 他之外’㈣刻程序（例如’同向钮刻程序及使用一雜形 刀片之鋸切）可用於形成具有傾斜内表面31之凹部3〇。除 了其他之夕卜’雷射切除、機械銳切、化學錄刻、電浆蝕 刻、朝向該基板20引導一細小磨料粒子喷流亦可用於形成 具有傾斜内表面31之凹部30(或本文所描述之任意其他孔 或開口）。 替代地，該凹部30之内表面可在一垂直或實質上垂直方 向上實質上以與該主要表面成直角自該主要表面21向下延 伸，而非傾斜。除了其他之外’各向異性银刻程序、雷射 切除、機械移除程序（例如，銑切、超音波加工、朝向該 I60713.doc •23· 201246413 基板20引導-細小磨料粒子喷流）可用於形成具有實質上 垂直之内表面之凹部3〇。 、隨後’在圖2D中所繪示之製作階段巾，於該凹部％内形 成介電質區域50»該介電質區域5()可包含—無機材料一 聚合材料或兩1視情況’該介電f區域5G可經形成㈣ · 該區域之曝露外表面51與基板2G之主要表面21或介電㈣ 之一曝露表面共面或實質上共面。例如，一自平坦化介電 質材料可（例如）藉由一施配或模板網印程序沈積於該凹部 3〇中。在另一實例中，在形成該介電質區域5〇之後，一研 磨、研光或拋光程序可運用於該基板2〇之主要表面21或該 介電層25之曝露表面，以使該介電質區域5〇之表面平坦化 至該主要表面21或該介電層25之曝露表面。 隨後，再參考圖1A，第一微電子單元12可堆疊於第二微 電子單元14之頂上，藉此形成堆疊微電子總成1〇。如上文 所描述，該第一微電子單元12與該第二微電子單元14之間 的連接方式可為透過導電塊18。該等導電塊18可提供該第 一微電子單元12之接合部42與該第二微電子單元14之導電 接觸件1 6a及16b之間的一電連接。在此配置中，該等接合 部42與該等導電接觸件16a及16b對準。 · 現參考圖3 A，根據本發明之另一實施例之一堆疊微電子 ‘ 總成110包含一第一微電子單元112及一第二微電子單元 114。該等微電子單元112及114具有與上文所描述之該等 微電子單元12及14類似之功能。 該第一微電子單元112包含一基板120，該基板120具有 1607I3.doc •24· 201246413 一凹部130a及130b，凹部自一主要表面121朝向與該主要 表面相對之一第二表面122部分延伸穿過該基板；及導電 το件140a及140b，各導電元件具有藉由該基板支撐之一各 自錨定部141a及141b、至少部分覆蓋該各自凹部13〇&或 13 Ob且至少部分曝露於該主要表面以與該第一微電子單元 之外之一組件互連之一各自接合部1423或142b、延伸於該 錨定部與接合部之間的一或多個各自連接部1453或14讣， 及若干端部146。如展示，該等端部146位於各接合部142a 及142b之一端。一介電質區域15〇覆蓋至少在該凹部13〇a 或130b内之一内表面13 1。 該基板120進一步包含自開口 130延伸至該第二表面122 之一孔160及在該孔内自該各自錨定部141&或1411?延伸至 該第二表面之一導通體丨7〇。該導通體170包含曝露於該第 二表面122以與該堆疊微電子總成u〇之外之一組件互連之 一接觸部180。 該基板120具有與上文參考圖1A至圖2D所描述之基板20 類似之性質。例如’該基板12〇較佳具有小於1〇 ppm/<»c之 一 CTE ’及該基板12〇較佳實質上由一材料（諸如，一半導 體、玻璃或陶瓷）組成。在該基板12〇係由一半導體（諸如， 石夕）製成之實施例中’複數個主動半導體裝置可安置於其 内。該基板120可進一步包含覆蓋該主要表面121及/或該 第二表面122之一介電層（例如，一「鈍化層」）。 該微電子元件112可包含曝露於該基板120之主要表面 121之一或多個導電元件14〇&及14〇t^該等各自導電元件 160713.doc •25· 201246413 140a及140b之接合部142a及142b可曝露於該主要表面121 以與該第一微電子單元112之外之一組件（諸如，第二微電 子單元114)互連。該基板120中的主動半導體展置可導電 連接至該等接合部142a及142b。 各接合部142a及142b可具有任意仰視圖形狀。如展示， 例如’在圖3B中’該等接合部142a及142b可具有一導電择 合墊（例如’一薄平坦構件或一導電結合墊之一部分）之形 狀。例如’圖3B及圖3C中所展示之接合部142b具有一圓 形、實心仰視圖形狀。圖3B中所展示之接合部142a具有擁 有延伸穿過其中之一孔隙147之一圓形仰視圖形狀。圖3C 中所展示之接合部區段142a，共同具有擁有延伸穿過其中之 孔隙147及延伸於鄰近接合部區段之間之間隙148之一圓形 仰視圖形狀。 該等接合部142a及142b可具有其他仰視圖形狀，其包含 (例如）一矩形跡線形狀或矩形跡線形狀部分。例如，圖3D 中所展示之接合部142b1’具有一矩形跡線形狀。圖3D中所 展不之接合部142a’，為具有位於其中之孔隙147之矩形跡線 形狀部分。替代地，該等接合部142a&142b可具有更複雜 形狀。在其他實施例中，該等接合部142&及1421)可為任意 其他類型之導電接觸件，其包含（例如）一導電柱。 6亥等接合部142a及142b可與該各自凹部13〇&或13〇b對準 且可整體或部分安置於由該凹部界定之基板12〇之一區域 中。如圖3A中可見，該等接合部142a&142b係整體安置於 由該各自凹部130a或130b界定之一區域中。如展示，由該 160713.doc 26 - 201246413 等各自接合部142a或142b之頂表面143a及143b界定之一平 面貫質上平行於由該基板120之主要表面121界定之一平 面。如展示’該等各自接合部142a或142b之底表面144a及 14仆係位於由該基板120之主要表面121界定之一平面上。 在其他貫施例中’該等底表面1443及144b可位於由該主要 表面121界定之平面之上或之下。 泫等連接部145a及145b自該等各自接合部142a或142b向 下延伸至該各自錯定部141a或141b。該等連接部145a及 1451?之至少一部分具有不符合該各自凹部130a或13Ob之内 表面131之一輪廓之一輪廓。在一特定實施例中，可有自 該錨定部141b延伸至該接合部1421)之一單一跡線形狀連接 部145b。在替代實施例中，可具有自該錨定部延伸之任意 數量之連接部。例如，在一實施例中，諸如於圖3 B中所展 示之實施例中，該連接部145a可具有擁有一内孔隙147之 一空心截頭圓錐形狀。在另一實施例中，可具有延伸於一 單一錨定部141a與各自接合部（諸如，圖3(：中所展示之接 合部142a')之間的四個個別連接部。在又一實施例中，可 具有延伸於一單一錨定部14ia與各自接合部（諸如，圖3D 中所展不之接合部142a’’）之間的兩個個別連接部。該等接 合部142a及142b較佳相對於該等各自連接部1453或14几不 居中，使得該各自導電元件14〇&或丨4〇b之端部146可相對 於該各自錨定部14la或141b懸掛在外。 s亥專凹部130a及130b類似於上文參考圖ία至圖2D所展 示及描述之凹部30。該等凹部13〇&及n〇b自該主要表面 160713.doc 27. 201246413 121朝向該第二表面122部分延伸穿過該基板12〇。該等凹 部130a及130b之内表面131可以任意角度自該主要表面121 延伸穿過該基板12(^較佳地，該等内表面131以〇度與9〇 度之間的一角度自該主要表面121延伸至由該主要表面121 界定之水平平面。 該等凹部130a及130b可具有任意仰視圖形狀，其包含 (例如）一橢圓形（諸如，圖1B至圖1D中所展示之凹部13〇1?) 或一圓形（諸如，圖1B及圖1C中所展示之凹部〗3〇a)。在一 些實施例令，該等凹部13〇3及13〇13可具有任意三維形狀’ 除了其他之外亦包含（例如）圓柱體形狀、立方體形狀、稜 柱形狀或截頭圓錐形狀。在一特定實施例中，在類似於圖 1D中所展示之s亥荨接合部42之組態之一組態中，該等凹部 130a及130b可為具有至少部分覆蓋該凹部之複數個各自接 合部142a及142b之一矩形通道。 介電質區域150具有與上文參考圖1A至圖2D所展示及描 述之介電質區域50類似之可能組態及性質。例如，在圖3 a 至圖3D中所展示之實施例中，該介電質區域i5〇填充該等 凹部130a及i30b使得該介電質區域之一輪廓符合該凹部之 輪廓（亦即，該等凹部之内表面131之形狀）。該介電質區 域150可為順應’其具有一足夠低之彈性模數及足夠之厚 度使得該彈性模數及該厚度之乘積提供順應性。較佳地， 該等接&。卩142a及142b至少部分覆蓋該介電質區域15〇使 得該等接合部可相對於該基板丨2〇移動。 類似於上文參考圖1A至圖2D所描述之介電層乃，一介 160713.doc -28- 201246413 電層125可覆蓋該基板120之主要表面121及不為接合部 142a及142b之導電元件140a及140b之部分，以相對於該基 板及不為接合部之該導電元件之部分提供良好的介電隔 離。 如圖3A至圖3D中所展示，階化孔160，該孔160包含自 開口 130朝向第二表面122延伸之一第一開口 161及自該第 一開口延伸至該第二表面之一第二開口 162。該階化孔160 可具有更詳細展示且描述於2010年7月23日申請之共同擁 有之美國專利申請案第12/842,71 7號及共同擁有之美國專 利申請公開案第2008/0246136號中的任意結構，該等案以 引用的方式併入本文中。在其他實施例中，孔（諸如，參 考圖6所展示及描述之孔6〇b)可具有一更簡單非階化結 構。 該第一開口 161自該凹部130朝向該第二表面122部分延 伸穿過s亥基板120。該第一開口 161包含以〇度與9〇度之間 的一角度自該凹部130延伸穿過該基板12〇至由該主要表面 121界定之水平平面之若干内表面163。該等内表面163可 具有一恆定斜率或一變化斜率。例如，當該等内表面10 ，該等内表面163相對於
160713.doc 進一步朝向該第二表面122貫穿時 由該主要表面121界定之水平平面 減少（亦即，變為弱正或弱負）。 中°亥第一開口 161具有在該凹部 •29· 201246413 方向上漸縮。在其他實例中，該第一開口可具有一恆定寬 度’或該第一開口可在自該第二表面朝向前表面之-方向 上漸縮。該第-開口 161可具有任意三維形狀，其除了其 他之外亦包含（例如）立方體、圓柱體、截頭圓錐體或棱 柱。 該第二％ 口 162自該第一開口 161朝向該第二表面122部 刀延伸穿過該基板120。該第二開口 162包含以0度與卯度 之間的·角度自該第-開口 161延伸穿過該基板120至由該 要表面121界疋之水平平面之若干内表面164。類似於上 文所描述之内表面163，該等内表面164可具有—值定斜率 或-變化斜率。如展示’例如’在圖4D中，該第二開口 I62具有在該第二開口交會該第一開口 161處的一寬度W3 及在大於W3之該第二表面122處的一寬度w4，使得該第一 開口在自該第二表面122朝向該主要表面121之一方向上漸 縮在其他實例中，該第二開口可具有一怪定寬度，或該 第一開口可在自前表面朝向該第二表面之一方向上漸縮。 該第二開口 162可具有任意三維形狀，其除了其他之外亦 包含(例如)立方體、圓柱體、截頭圓錐體或稜柱。 在特疋實施例中，I亥等内表面163及164可分別在相對 ::主要表面m之第一方向及第二方向上延伸以界定一 只質角度。任意數量之第—開口 161可自一單一第二開口 162延伸’及任意數量之第二開口可自一單一第一開口延 伸。第-開口 161及該等第二開口 162可相對於彼此及相對 於該基板120以任意幾何組態配置。各種第-開口組態及 1607I3.doc 201246413 第二開口組態及形成此等組態之方法之特定實例係描述於 前述共同擁有之美國專利申請案第12/842,717號及美國專 利申請公開案第2008/0246136號中。 該等各自導電元件140a及140b之錨定部141 a及141b較佳 具有符合該各自第一開口 161之一輪廊之輪廓，使得該等 錨定部具有相對於該基板120而固定之位置。一錯定部 141a或141b可用作一支點，一附接接合部1423或1421?在處 於（諸如，由關於一附接微電子單元之差異熱膨脹所引起 之）機械應力下時可關於該支點柩轉。 導通體170延伸穿過該各自錯定部141a或141b與該第-表面122之間的孔160 »如圖3A中所展示，該導通體17〇可 填充可使該基板120與該導通體電絕緣之一選用之介電層 (未展示）之内側之第二開口 162内的所有體積。該導通體 1 70可符合該第二開口 1 62之輪廓。該導通體i70可具有— 圓柱形狀或截頭圓錐形狀。該導通體17〇可由一金屬（包含 (例如）銅或金）或一金屬之導電化合物製成。 在其他實施例中（未展示），導通體17〇之一輪廓（亦即， 該導通體之外表面之形狀）不符合第二開口 162之一輪廊（亦 即，該第二開口之内表面164之形狀）。在此非保形導通體 實施例中，該導通體170可具有任意形狀，其包含（例如）圓 柱形狀、截頭圓錐形狀，或距離第二表面122不同距離之 圓柱形狀及截頭圓錐形狀之組合。 該導通體170可為實心或空心。在一些實施例中，該導 通體可包含填充有一介電質材料之一内部空間。例如，可 160713.doc 31 201246413 藉由沈積覆蓋該第二開口 162之内表面164之一金屬而形成 該導通體170，藉此產生覆蓋該第二開口之内表面之一導 電層。各種導通體組態及形狀此等組態之方法之特定實例 係描述於前述共同擁有之美國專利申請案第N〇. 12/842,717號及美國專利申請公開案第2008/0246136號 中。 該等導通體Π0各包含曝露於該第二表面ι22以與堆疊微 電子總成110之外之一組件互連之一接觸部180。在一些實 施例中’各導通體170可電耦合至曝露於該第二表面122之 一分離導電接觸件。 第二微電子單元114類似於上文參考圖ία所展示及描述 之第二微電子單元14。該第二微電子單元114可包含一基 板115及至少部分曝露於該基板之一主要表面117以與第一 微電子單元112之接合部142a及142b互連之導電接觸件 116。 如圖3A中所展示，該等導電接觸件116為導電墊。該等 導電墊116可具有任意形狀，其包含圓形、正方形、長方 形、矩形或更複雜形I在特定實施例中，該等導電接觸 件116可為任意類型之導電接觸件，其包含（例如）一導電 柱，諸如，圖1A中所展示之導電柱16a。如於2〇ι〇年7月8 日申請之共同擁有之美國專利巾請案第12/832,376號中所 展示及描述’可使用導電柱之其他實例。 該第一微電子單元112與該第二微電子單元ιΐ4之間的連 接可以類似於參考圖1A至圖2D所描述之方式之一方式穿 160713.doc -32- 201246413 過導電塊118。基板120之主要表面121上的介電層125及介 電質區域150及覆蓋該基板115之主要表面117之一介電層 (例如’一鈍化層）除了提供互連外亦可提供該第一微電子 單元112與該第二微電子單元114之間的電隔離。 參考圖4A至圖4D，現將描述製作微電子總成u〇(圖3A 至圖3D)之一方法。在圖4A中所繪示之製作階段中，第一 微電子單元112包含基板120。可藉由自該基板移除材料而 形成自主要表面121延伸至該基板12〇之第二表面122之孔 160。在一特定實施例中，可形成自該主要表面121向内延 伸之第一開口 161，及可形成自該第二表面122向内延伸之 第二開口。在其他實施例中，可由該主要表面121或該第 二表面122形成該第一開口 161及該第二開口 162之任一者 或兩者。 可如上文關於形成凹部30所描述之一類似方式且使用類 似程序形成該等孔160 ^例如，可在形成期望保留該主要 表面12 1之剩餘部分之一遮罩層之後藉由選擇性蝕刻該基 板120以移除該基板之材料而形成該等孔16〇，其中。類似 於該凹部30，該第一開口 161之内表面163及該第二開口 162之内表面164可相對於該主要表面121以任意恆定或變 化角度延伸。 儘管未展示"電層可視情況形成於基板120之主要 表面121上及/或覆蓋第1 口 161之内表面163及第二開口 162之内表面164以提供導電元件i術及離及導通體17〇 與該基板之電隔離。可使用上文參考圖2B中所展示之介電 160713.doc -33- 201246413 層25所描述之各種方法之任意者而形成此一介電層。此一 介電層可另外為或取代為已覆蓋基板120之主要表面12 一純化層。 在圖4B中所繪示之製作階段中，可於第一開口 ι61内形 成導電元件140a及140b之錨定部14 la及141b及各自連接部 145a及145b，可形成覆蓋主要表面121之接合部142a及 142b，及可於第二開口 162内形成導通體170，其中接觸部 180曝露於第二表面122。可以單一金屬沈積程序或分離程 序而形成該等錨定部141a及141b、該等連接部145&及 145b、s玄荨接合部142a及l42b及該等導通體170之各者。 在該等導通體170係電耦合至曝露於該第二表面ι22之分離 導電接觸件之一實施例中，此等導電接觸件可連同該等導 電元件140a及140b及該4導通體以一單一金屬沈積程序予 以形成’或可以一分離程序形成此等導電接觸件。 形成該等導電元件140a及140b及該等導通體17〇之一例 示性方法包含：藉由將一主要金屬層濺鍍至該基板12〇之 曝露表面上'電鍍或機械沈積之一或多者而沈積一金屬 層。機械沈積可包含以尚速將一加熱金屬粒子流引導至 待塗覆之表面上。例如，此步驟可藉由毯覆沈積至該主要 表面121及該等内表面163及1 64中而執行。在一實施例 中，該主要金屬層包含鋁或實質上由鋁組成。在另一特定 實施例中，該主要金屬層包含銅或實質上由銅組成。在又 一實施例中，該主要金屬層包含鈦或實質上由鈦組成。一 或多種其他例示性金屬可用於一程序中以形成導電元件 160713.doc -34- 201246413 140a 及 140b 及 _ 一 ’、』〜員例甲，巳耳偎数個金 屬層之-堆疊可形成於前述表面之__或多個上。例如，此 堆疊金屬層可包含-層鈦’接著覆蓋該鈦之一層銅⑺_ Cu)，-層錄，接著-層覆蓋該鎳層卜層銅（Ni_c小以 類似方式言史置之-鎳-鈦，⑽_Ti_Cu)堆疊，或(例如卜 鎳-飢堆疊。 在-特定實施例中’例如’如圖2A中所繪示之製作階段 所展示，在自基板移除任意材料之前，接合部142&及14几 可沈積至基板120之主要表面121上。在此一實施例中例 如，可藉由蝕刻穿過該等接合部1423及/或1421?且接著蝕 刻至該基板120中形成孔160。在形成穿過該等接合部丨 及/或142b之孔160之後，可如上文所描述形成連接部〗々^ 及145b、錫定部141 a及141b，及導通體17〇。 在圖4C中所繪示之製作階段中，介電層125係形成於基 板120之主要表面121上且用作期望保留該主要表面之剩餘 部分之一蝕刻遮罩層。可使用上文參考圖2B中所展示之介 電層25所描述之各種方法之任意者而形成該介電層丨25。 該等接合部142a及142b可維持至少部分曝露於該主要表面 121(亦即，未由該介電層125覆蓋）以連接至第一微電子單 元112之外之一組件。 隨後’在圖4D中所繪示之製作階段中，可如上文關於形 成凹部30所描述之一類似方式及使用類似程序形成凹部 130。例如，可在形成期望保留該主要表面121之剩餘部分 之一遮罩層（例如，介電層25)之後，藉由選擇性地蝕刻該 160713.doc •35- 201246413 基板120以移除該基板之材料而形成該等凹部13〇。該凹部 130可經形成使得移除支撐至少接合部142a及〗42b之基板 120之材料。類似於凹部30，該等凹部130之内表面131可 以相對於該主要表面丨2丨之任意恆定或變化角度延伸。 如圖4D中所展示，該等凹部130可經形成使得其等自該 主要表面121的延伸不似該等第一開口 161一樣遠，使得該 等錨定部141&及14lb之輪廓符合該第一開口之内表面163 之剩餘部分之一輪廓。在一特定實施例中，該等凹部【3 〇 可經形成使彳于其自該主要表面121延伸至少與該等第一開 口 161樣遠，使得該等錫定部141a及141b之輪廓不致符 合s亥基板1 20之任意内表面之輪廓。在此一實施例中該 等錨疋部141a及141b可透過該等錨定部與可具有符合該等 第二開口 162之内表面164之輪廓之輪廓之導通體17〇之間 的附接而固定至該基板120。 隨後，在圖4E中所繪示之製作階段中，可如上文關於在 凹部30内形成介電質區域50所描述之一類似方式及使用類 似程序而於凹部1 3 0之内側形成介電質區域丨5 〇。例如，該 介電質區域150可經形成使得該區域之一曝露外表面151與 s玄基板120之主要表面121(如圖4E中所展示）或該介電層 125之一曝露表面共面或實質上共面。 隨後，再參考圖3A，第一微電子單元112可堆疊於第二 微電子單元114之頂部上，藉此形成堆疊微電子總成ιι〇。 如上文所描述，該第一微電子單元丨丨2與該第二微電子單 元114之間的連接可穿過導電塊118。該等導電塊118可提 160713.doc •36· 201246413 供該第一微電子單元112之接合部142a及142b與該第二微 電子單元114之導電接觸件116之間的一電連接。在此配置 中’該等接合部142a及142b與該等各自導電接觸件116對 準。 如圖5中所展示，展示一導電元件24〇之一基座部24丨及 一接合部242’其適用於上文參考圖ία至圖4E所描述之任 意實施例中。该接合部242自該導電元件240之基座部241 延伸。該基座部241可為（例如）上文參考圓3a中所展示之 第一微電子單元112所描述之接合部丨42&及142b之部分， 或上文參考圖1A中所展示之第一微電子單元12所描述之錨 定部41之部分。該基座部241可連接至位於基板22〇之主要 表面221之下或介電質區域25〇之一外表面251之下之其他 導電元件。在圖5中所展示之實施例中，該基座部241包含 為順應或可在由該主要表面221界定之一平板之一方向上 移動之一區段243，使得該區段可藉由施加至其之一外部 負載在沿著該主要表面221之一方向上位移。 現參考圖6，根據另一實施例之一第一微電子總成12•類 似於圖1A中所展示之第一微電子總成12，惟導電元件4〇, 電連接至延伸於基板20’之主要表面21與第二表面22之間的 導通體70a及70b除外。 該基板20’包含自該主要表面21及該第二表面22延伸之 孔60a及60b，及導通體70a&7〇b於該等各自孔内自該等導 電元件40’之各自錨定部41，延伸至該第二表面。各導通體 70a及70b包含曝露於該第二表面22以與該第一微電子單元 160713.doc -37- 201246413 12’之外之一組件互連之一接觸部8〇。該孔6〇a為類似於展 示於圖3A中的孔160之一階化孔，惟開口 3〇未與該等孔 或60b之任一者重疊除外，因此該等孔6〇a及6〇b自該第二 表面22延伸至s亥主要表面21’而非自該第二表面延伸至一 各自開口。該孔60b未階化，亦即，可（例如）以自該基板 20’移除材料之一單一蝕刻或其他程序而形成該孔6〇1^ 類似於圖1A中所展示之第一微電子總成12，各導電元件 40'包含可曝露於該主要表面21以與該第一微電子單元 之外之一組件互連之一接合部42。亦類似於第一微電子單 元12,介電質區域50可為順應，使得各接合部“可相對於 該基板20'移動。 圖7描繪包含以一單元一起配置之至少兩個微電子總成 3 10之一模組300，其具有用於傳輸信號之該等微電子總成 310之各者且自該等微電子總成31〇之各者傳輸信號之一電 介面320。該電介面可包含用於傳輸信號或參考電位（例 如，電源及接地）之一或多個接觸件，其等為其内之微電 子το件之各者所共有。該等微電子總成3 1〇可為上文所描 述之總成之任意者。在一特定實例中，該模組3〇〇可為一 雙列記憶體模組（「DIMM」）或單列記憶體模組 (「SIMM」）’其具有經調整大小用於入至（諸如）可設置於 一主機板上之一系統之其他連接器之一對應插槽中之一或 多個部分。在此DIMM或SIMM中，該電介面可具有適於與 此插槽連接器内的複數個對應彈力接觸件相配之接觸件 330。此彈力接觸件可安置於各插槽之單一或多個側上以 160713.doc •38· 201246413 與對應模組接觸件相配。各種其他模組及互連配置 t 小 J月b 的，其中一模組可具有非堆疊或堆疊微電子總成，或其可 具有並列電介面或串列電介面，或用於傳輸電信號至該模 組及自該模組傳輸電信號之並列電介面及_列電介面之— 組合°藉由本發明可預期該模組3〇〇與一進一步系統之間 的任意種類之電互連配置。 如圖8中所展示，上文所描述之微電子總成可用於建構 夕種電子系統。例如，根據本發明之一進一步實施例之一 系統400包含結合其他電子組件4〇8及4丨〇之如上文所描述 之一微電子總成406。在所描繪之實例中，組件4〇8為一半 導體晶片，而組件410為一顯示螢幕，但亦可使用任意其 他組件。t然’儘管為了繪示之簡潔，於圖8中僅描繪兩 個額外組件，然該系統可包含任意數量之此組件。該微電 子總成406可為上文所描述之總成之任意者。在一進一步 變量中，可使用任意數量之此等微電子總成。 微電子總成4〇6及組件4〇8及41〇係安裝於一共同外殼 4〇1(不意性地以虛線描繪)中’且視需要彼此電互連以形成 所需電路。在所展示之例示性系統，，該系統包含一電路 板402(諸如，一撓性印刷電路板)，且該電路板包含許多導 體404 ’圖8中僅描繪該等導體之—者，該等組件彼此互 連。然而，此僅為例示性，可使用用於製成電連接之任意 合適結構。 該外殼4〇1係描綠為用於（例如）一蜂巢式電話或個人數 位助理之-可攜式外殼類型’及螢幕川曝露於該外殼之 160713.doc -39· 201246413 表面。在結構406包含一光敏感元件（諸如，一成像晶片）之 情況下，一透鏡4U或其他光學農置亦可提供用於^光投 送至該結構。此外’圖8中所展示之簡化系統僅為例示 性丄可使用上文所描述之結構製作其他系統，包含統稱為 固定結構（諸如，桌上型電腦、路由器及類似物）之系統。 可藉由（諸如）更詳細揭示於2〇1〇年7月23日申請之同在 申請中共同讓與之美國專利申請案第12/842,587號、第 ^㈣川號、第12/842,651號、第12/842，⑽號、第 42’692號及第12/842,717號巾及公開之美國專利申請公 開案第2()()8/()246136號中的該等程序而形成揭示於本文中 的導通體及導通孔導體，該等案之揭示内容以引用的方式 併入本文中。 儘管本發明在本文中已參考特定實施例予以描述，然應 理解’此等實施例僅緣示本發明之原理及應用。因此，應 理解，可對繪示性實施例作許多修改且可在不脫離如由隨
附申請專利範圍界定之本發明之精神及料之情況下想出 其他配置D 一會解闡釋於其中之各種獨立申請專利範圍及特徵可 以不同於初始申請專利範圍中所存在之方式之方式組合。 μ :瞭解、”且合個別實施例所描述之特徵可與該等所描述 之實施例之其他特徵共用。 【圖式簡單說明】 圖1Α係、.會不根據本發明之—實施例之具有—接觸結構之 一堆疊總成之一側視截面圖。 160713.doc 201246413 圖1B係沿著線A-A截取之圖3A之堆疊總成之—對應仰視 截面圖之一實施例。 圖1C係沿著線A-A截取之圖3A之堆疊總成之—對應仰視 截面圖之另一實施例。 圖1D係沿著線A-A截取之圖3 A之堆疊總成之—對應仰視 截面圖之又一實施例。 圖2A至圖2D係繪示圖1A中所描繪之根據本發明之實施 例之製作階段之截面圖。 圖3 A係繪示根據本發明之一實施例之具有—接觸結構之 一堆疊總成之一側視截面圖。 圖3B係沿著線Β·Β載取之圖1A之堆疊總成之—對應仰視 截面圖之一實施例。 圖3C係沿著線B_B載取之圖1 a之堆疊總成之一對應仰視 截面圖之另一實施例。 圖3D係沿著線B-B截取之圖1A之堆疊總成之一對應仰視 截面圖之又一實施例。 圖4A至圖4E係繪示圖3A中所描繪之根據本發明之實施 例之製作階段之截面圖。 圖5係根據本發明之具有與一晶片電連接之一墊之一基 板之一俯視透視圖。 圖6係繪示根據本發明之另一實施例之具有一接觸結構 之一基板之一侧視截面圖。 圖7係根據本發明之一實施例之一模組之一示意圖。 圖8係根據本發明之一實施例之一系統之一示意圖。 160713.doc •41 · 201246413 【主要元件符號說明】 10 堆疊微電子總成 12 第一微電子單元/第一 微電子元件 12' 第一微電子總成 14 第二微電子單元/第二 微電子元件 15 基板 16a 導電接觸件/導電柱 16b 導電接觸件/導電柱 17 主要表面 18 導電塊 20 基板 20， 基板 21 主要表面 22 第二表面 25 介電層 30 凹部/開口 31 内表面 32 外邊界 40 導電元件 40' 導電元件 41 錨定部 41' 錨定部 42 接合部 42， 接合部 160713.doc • 42· 201246413 43 44 46 50 51 60a 60b 70a 70b 80 110 112 114 115 116 117 118 120 121 122 125 130 130a 130b 頂表面 底表面 端部 介電質區域 外表面 孔 孔 導通體 導通體 接觸部 微電子總成 第一微電子單元/微電子元件 第二微電子單元 基板 導電接觸件 主要表面 導電塊 基板 主要表面 第·—表面 介電層 凹部/開口 凹部 凹部 160713.doc -43- 201246413 131 内表面 140a 導電元件 140b 導電元件 141a 錯定部 141b 錨定部 142a 接合部 142b 接合部 142a' 接合部區段 142a" 接合部 142b" 接合部 143a 頂表面 143b 頂表面 144a 底表面 144b 底表面 145a 連接部 145b 連接部 146 端部 147 孔隙 148 間隙 150 介電質區域 151 外表面 160 161 第一開口 162 第二開口 •44 160713.doc 201246413 163 内表面 164 内表面 170 導通體 180 接觸部 220 基板 221 主要表面 240 導電元件 241 基座部 242 接合部 243 區段 250 介電質區域 251 外表面 300 模組 310 微電子總成 320 電介面 330 接觸件 400 系統 401 外殼 402 電路板 404 導體 406 微電子總成/結構 408 電子組件 410 電子組件/螢幕 411 透鏡 160713.doc -45- 201246413 L 長度 W 寬度 W1 寬度 W2 寬度 W3 寬度 W4 寬度 160713.doc -46

Claims (1)

  1. 201246413 七、申請專利範圍： 1. 一種微電子單元，其包括： 基板’其具有小於10 ppm/1之—熱膨膳係數 (CTE)、具有不延伸穿過該基板之—凹部之—主要表面 及安置於該凹部内之具有小於1()仍之_彈性模數之一 材料；及 一導電7G件’其包含覆蓋該凹部且自由該基板支標之 鲕疋延伸之-接合部，該接合部至少部分曝露於該 主要表面以連接至該微電子單元之外之一組件。 2. 如請求項1之微電子單元，其中該基板具有小於了啊化 之一 CTE。 3. ^請求項1之微電子單元，其中該接合部可移動以便減 少諸如可於操作、製造或測試該微電子單元期間存在之 該接合部上的應力。 4·如凊求項1之微電子單元，其中該基板實質上由自半導 體、玻璃及陶瓷組成之群組選擇之一材料組成。 5.如請求们之微電子單元，#中該基板包含複數個主動 半導體裝置，並且該導電元件與該複數個主動半導體裝 置之至少一者電連接。 如明求項1之微電子單元，其中安置於該凹部内的該材 料包含自聚醯亞胺、聚矽氧及環氧樹脂組成之群組選擇 之至少一材料。 7.如請求項1之微電子單元，其中該凹部不延伸穿過該基 板0 160713.doc 201246413 8. 9. 10 11. 12. 13. 14. 15. 其中該接合部在實質上平行 方向上延伸。 其中該錨定部及該接合部在 其中該導電元件與朝向與該 第二表面延伸之一導通體電 其中該導通體曝露於該第 如請求項1之微電子單元， 於該基板之該主要表面之一 如請求項1之微電子單元， 相同方向上延伸。 如請求項9之微電子單元， 主要表面相對之該基板之一 輕合。 如請求項10之微電子單元 表面。 如請求項1 0之微電子單亓，让 一 早兀其中该導通體延伸於自嗲第 二表面延伸至該主要表面之該基板中的-孔^ Μ 如請求項12之微雷早置； . 朝…主中該孔包含自該主要表面 朝向该第二表面延伸之一第一 弟開口及自該第一開口延伸 至該第二表面之一第二開口，其中該第一開口及該第二 開口之内表面分別在相對於該主要表面之第—方向及第 二方向上延伸以界定一實質角度。 -種堆疊總成，其包含至少第一微電子單元及第二微電 子單元，該帛—微冑子單元係如請求項丄之微電子單 元’該第二微電子單元堆疊有該第一微電子單元，其中 該第二微電子單元之基板於其内與該第二微電子單元之 一基板電連接。 ，青求頁Η之堆疊總成，其進一步包括電耦合至該第一 微電子單兀之該接合部之—導電塊及該第二微電子單元 之一導電元件。 160713.doc 201246413 之結構及電連接至該結構 包括一外殼，該結構及該 16· 一種系統，其包括如請求項】 之一或多個電子組件。 17.如請求項16之系統，其進一步 等其他電子組件安裝至該外殼 “包含如請求項1之任一項之複數個微電子 -、Mu具有用於將信號傳輸至該等微電子總成之 各者及自該等微電子總成之各者傳輸信號之—共同電介 面〇 19_ 一種製作—微.電子單元之方法其包括： ^成支撑於具有小於10 PPm/°C之-CTE之-基板之-主要表面上的一導電元件； 自該主要表面移除支揮該導電元件之至少一接合部之 材料以形成不延伸穿過該基板之一凹部，使得該接合部 未藉由该基板支揮，而鄰近該接合部之該導電元件之一 錫定部係藉由該基板支撐；及 將—具有小於10 GPa之一彈性模數之材料沈積於該凹 部内， 其中該接合部至少部分曝露於該基板之該主要表面以 連接至該微電子單元之外之一組件。 20.如請求項19之方法，其中該基板具有小於7 ppm/〇c之一 CTE 〇 21. 如凊求項Η之方法，其中該基板實質上由自半導體、玻 璃及陶瓷組成之群組選擇之一材料組成。 22. 如請求項〗9之方法，其中該基板包含複數個主動半導體 160713.doc 201246413 裝置’及形成该導電元件之步驟拉 卞<灾鄉碏由該複數個主動半導 體裝置之至少一者而與該導電元件電連接。 23·如請求項19之方法，其中執行形成該導電元件之步驟使 得該接合部係實質上平行於該主要表面而安置。 24. 如請求項19之方法，其進—步包括： 自該基板移除材料以形成自該主要表面延伸至與該主 要表面相對之該基板之一第二表面之一孔；及 形成延伸於該孔内之一導通體使得該 元件電Μ合且朝向該第二表面延伸e U導電 25. 如請求項24之方法，其中自該基板移除材料以形成一孔 之步驟包含：形成自該主要表面朝向該第二表面延伸之 一第一開口及自該第一開口延伸至該第二表面之一第二 開口’其中該第一開口及該第二開口之内表面分別在相 對於該主要表面之第一方向及第二方向上延伸以界定一 實質角度。 26. —種製作包含至少第一微電子單元及第二微電子單元之 一堆疊總成之方法，該第一微電子單元如請求項19而製 作其進步包括將该第一微電子單元之該基板電連接 至該第二微電子單元之一基板之步驟。 27. —種製作一微電子單元之方法，其包括： 自具有小於10 ppm/°c之一 CTE之一基板移除材料以形 成自忒基板至一主要表面延伸至與該主要表面相對之一 第二表面之一孔； 形成具有延伸在該主要表面之上且支撐於該主要表面 160713.doc λ 201246413 接δ。卩之—導電元件、相對於該基板而固定之一 4田疋。卩及自该接合部向下延伸至該錨定部之一連接部， 該連接部之一主I „ 衣面具有符合該孔之一内表面之一輪廓之 一輪廓； 自該主要表面移除支撐該導電元件之至少一接合部之 材料m凹部使得該接合部至少部分覆蓋該凹部， 及使得該連接部之該表面之該輪廓不符合該凹部之-内 表面之一輪廓；及 夺具有j於10 GPa之一彈性模數之材料沈積於該凹 部内， 其中該接合部至少部分曝露於該基板之該主要表面以 連接至該微電子單元之外之一組件。 28·如請求項27之方法，其中該基板具有小於7 ppmrc之一 CTE。 29.如請求項27之方法，其進一步包括：在形成該導電元件 之步驟t前，形成延伸於該孔内且朝向該第二表面延伸 之-導通體’使付形成該導電元件之步驟藉由該導通體 與該導電元件電耦合。 3〇·如請求項27之方法’其中執行形成該導電元件之步驟使 得該接合部相對於該連接部非居令。 31. 如請求項27之方法，其中該基板實質上由自半導體、玻 璃及陶究組成之群組選擇之一材料组成。 32. 如請求項27之方法’其中該基板包含複數個主動半導體 裝置，及形成該導電元件之步驟藉由該複數個主動半導 160713.doc 201246413 體裝置之至少一去；& 33 34. 35. 36. 37. ^ ^者而與該導電元件電連接。 _^=27之方法’其中執行形成該導電元件之步驟使 仟該接合部界定一内部孔隙。 :::項33之方法，其令執行形成該導電元件之步驟使 Ψ 隙延伸穿過該接合部至該連接部中。 如請求項34之方法，其進_步包括將一介電質材料沈積 至該孔隙之至少一部分中。 如清求項27之方法’其中自該基板移除材料以形成一孔 之步驟包含·形成自該主要表面朝向該第二表面延伸之 一第一開口及自該第一開口延伸至該第二表面之一第二 開口，其中該第—開口及該第二開口之内表面分別在相 對於6亥主要表面之第一方向及第二方向上延伸以界定一 實質角度。 一種製作包含至少第一微電子單元及第二微電子單元之 一堆疊總成之方法，該第一微電子單元如請求項2 7而製 作，其進一步包括將該第一微電子單元之該基板電連接 至該第二微電子單元之一基板之步驟。 160713.doc 6 -
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