AU2002211507A1 - Method and apparatus for processing thin metal layers - Google Patents

Method and apparatus for processing thin metal layers

Info

Publication number
AU2002211507A1
AU2002211507A1 AU2002211507A AU1150702A AU2002211507A1 AU 2002211507 A1 AU2002211507 A1 AU 2002211507A1 AU 2002211507 A AU2002211507 A AU 2002211507A AU 1150702 A AU1150702 A AU 1150702A AU 2002211507 A1 AU2002211507 A1 AU 2002211507A1
Authority
AU
Australia
Prior art keywords
metal layers
thin metal
processing thin
processing
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002211507A
Other languages
English (en)
Inventor
James S. Im
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Columbia University in the City of New York
Original Assignee
Columbia University in the City of New York
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Columbia University in the City of New York filed Critical Columbia University in the City of New York
Publication of AU2002211507A1 publication Critical patent/AU2002211507A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • H01L21/76894—Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/94—Laser ablative material removal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/955—Melt-back

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • Laser Beam Processing (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Recrystallisation Techniques (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
AU2002211507A 2000-10-10 2001-10-09 Method and apparatus for processing thin metal layers Abandoned AU2002211507A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US23919400P 2000-10-10 2000-10-10
US60/239,194 2000-10-10
PCT/US2001/031391 WO2002031869A2 (en) 2000-10-10 2001-10-09 Method and apparatus for processing thin metal layers

Publications (1)

Publication Number Publication Date
AU2002211507A1 true AU2002211507A1 (en) 2002-04-22

Family

ID=22901034

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002211507A Abandoned AU2002211507A1 (en) 2000-10-10 2001-10-09 Method and apparatus for processing thin metal layers

Country Status (10)

Country Link
US (2) US7115503B2 (ko)
EP (1) EP1259985A2 (ko)
JP (1) JP4599032B2 (ko)
KR (1) KR100854834B1 (ko)
CN (1) CN1404627A (ko)
AU (1) AU2002211507A1 (ko)
CA (1) CA2389607A1 (ko)
MX (1) MXPA02005590A (ko)
TW (1) TW521387B (ko)
WO (1) WO2002031869A2 (ko)

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US6961117B2 (en) * 2000-11-27 2005-11-01 The Trustees Of Columbia University In The City Of New York Process and mask projection system for laser crystallization processing of semiconductor film regions on a substrate
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CN100459041C (zh) * 2002-08-19 2009-02-04 纽约市哥伦比亚大学托管会 激光结晶处理薄膜样品以最小化边缘区域的方法和系统
CN1757093A (zh) * 2002-08-19 2006-04-05 纽约市哥伦比亚大学托管会 具有多种照射图形的单步半导体处理系统和方法
AU2003265498A1 (en) * 2002-08-19 2004-03-03 The Trustees Of Columbia University In The City Of New York Process and system for laser crystallization processing of film regions on a substrate to provide substantial uniformity within areas in such regions and edge areas thereof, and a structure of such film regions
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US7318866B2 (en) * 2003-09-16 2008-01-15 The Trustees Of Columbia University In The City Of New York Systems and methods for inducing crystallization of thin films using multiple optical paths
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US7364952B2 (en) * 2003-09-16 2008-04-29 The Trustees Of Columbia University In The City Of New York Systems and methods for processing thin films
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WO2002031869A2 (en) 2002-04-18
CN1404627A (zh) 2003-03-19
EP1259985A2 (en) 2002-11-27
CA2389607A1 (en) 2002-04-18
US20090140173A1 (en) 2009-06-04
WO2002031869A3 (en) 2002-09-19
TW521387B (en) 2003-02-21
JP2004511908A (ja) 2004-04-15
US7115503B2 (en) 2006-10-03
KR20020054367A (ko) 2002-07-06

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