WO1998034285A1 - Element electroluminescent, dispositif electroluminescent a semiconducteur, et leur procede de production - Google Patents
Element electroluminescent, dispositif electroluminescent a semiconducteur, et leur procede de production Download PDFInfo
- Publication number
- WO1998034285A1 WO1998034285A1 PCT/JP1997/004916 JP9704916W WO9834285A1 WO 1998034285 A1 WO1998034285 A1 WO 1998034285A1 JP 9704916 W JP9704916 W JP 9704916W WO 9834285 A1 WO9834285 A1 WO 9834285A1
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- electrode
- light emitting
- emitting device
- light
- semiconductor region
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Definitions
- the present invention relates to a light emitting device having a semiconductor laminated film formed on an insulating substrate, a semiconductor light emitting device including such a semiconductor light emitting device, and a method for manufacturing the same.
- the present invention is suitably applied to a light emitting device (LED) using a gallium nitride-based compound semiconductor formed on a sapphire substrate and a light emitting device (LED lamp) including such a light emitting device.
- LED light emitting device
- LED lamp light emitting device
- gallium nitride-based compound semiconductors I ⁇ 1 Y Ga ⁇ _ ⁇ ⁇ , 0 ⁇ , 0 ⁇ > ⁇ + ⁇ 1
- LEDs high-brightness blue and green light-emitting diodes
- FIGS. 4A, 4B, and 4C are a plan view, a cross-sectional view taken along the line BB, and a cross-sectional view taken along the line CC, respectively, of a conventional commercialized GaN LED device. Note that the thickness of each semiconductor layer shown in the drawing does not correspond to the actual thickness.
- Figure 5 is a cross-sectional view of a conventional LED lamp that has been commercialized.
- the GaN 'LED element 40 has a GaN buffer layer 31, an n-type GaN layer 32, an InGaN active layer 33, a p-type AlGaN layer 34, and a p-type GaN
- the layer 35 has a double hetero structure in which layers are sequentially laminated.
- the upper surface of the n-type GaN layer 32 is formed in a stepped shape including a lower part and an upper part, and On the upper surface of the n-type GaN layer 32, an n-electrode 36 made of Ti and Au is formed.
- the above-mentioned InGaN active layer 33, p-type A1 GaN layer 34, and p-type GaN layer 35 are sequentially stacked on the upper surface of the n-type GaN layer 32 in the upper section. I have.
- a transparent electrode 37 for current diffusion composed of Ni and Au is formed, and further a p-electrode 38 is formed thereon.
- both electrodes are formed on the upper surface side of the sapphire substrate.
- the upper surface of the Ga ⁇ LED device 40 is a light extraction surface, and the upper surface of the n-electrode 36 and the p-electrode 38 excluding the bonding pad portions 36 a and 38 a is overcoated with a protective film 39. ing.
- the GaN LED element 40 is diced to a die pad at the tip of the lead frame 44a via an insulating adhesive 43.
- the n electrode 36 of the GaN LED element 40 is connected to the lead frame 44a via the Au wire 41, and the p electrode 38 is connected to the lead frame 44b via the Au wire 42.
- the tips of the lead frames 44a and 44b on which the GaN LED elements 40 are mounted are molded with a translucent epoxy resin 45 to form an LED lamp.
- the conventional light emitting device has the following problems.
- the diameter of each of the n-electrode 36 and the p-electrode 38 is at least 100 xm or more.
- the bonding pads 36a, 38a each having a circular shape or a square shape with 100 or more sides are required, and the light extraction efficiency is poor because the electrodes 36, 38 are formed on the light extraction surface side. It becomes. Therefore, if the area required for the bonding pad portions 36a and 38a and the area necessary for securing the light extraction amount are to be secured, the reduction in the size of the light emitting element is restricted, and the light emitting element size is limited. The problem that miniaturization becomes difficult come.
- a main object of the present invention is to provide a semiconductor light-emitting device and a method for manufacturing the same, which reduce the area required for electrodes for electrical connection of the light-emitting device, reduce the size of the light-emitting device as a whole, The purpose is to improve the light extraction efficiency.
- the light emitting device includes: a substrate; a first conductivity type semiconductor region formed on the substrate; and a second conductivity type semiconductor region formed on a part of the first conductivity type semiconductor region.
- a light emitting element comprising: a second electrode; and a plurality of microphone opening bumps made of a conductive material formed on the first and second electrodes, further comprising: a plurality of microphone opening bumps formed on the first electrode.
- the number of the microphone opening bumps is one, and the number of the microphone opening bumps formed on the second electrode is one or more.
- Each of the micro-bumps has a columnar or mushroom-like shape, a maximum horizontal dimension of each of the micro-bumps is in a range of 5 to 300 trn, and a height of each of the micro-bumps. Preferably, it is in the range of 5 to 50 m. It is preferable that a metal layer having good adhesion to the first or second conductivity type semiconductor region is provided below at least one of the first electrode and the second electrode.
- Another light emitting device of the present invention includes: a substrate; a first conductivity type semiconductor region formed on the substrate; and a second conductivity type formed on a part of the first conductivity type semiconductor region.
- a light-emitting element comprising: a first electrode and a microphone opening bump formed of a conductive material formed on the first electrode and the second electrode; and the first electrode
- a probe region to which a probe needle can contact is formed in addition to the region where the microphone opening bump is formed. It is preferable that the probe region of the first electrode is formed so as to extend over a part of the die sinter street.
- Still another light emitting device of the present invention includes a substrate, a first conductivity type semiconductor region formed on the substrate, and a first conductivity type semiconductor region formed on a part of the first conductivity type semiconductor region.
- a light emitting device comprising: a second electrode formed on the first electrode and a second electrode, and a microphone opening bump made of a conductive material formed on the second electrode. An opening for emitting light from the light emitting element to the outside is formed in the electrode.
- the shape of the opening formed in the second electrode is preferably a circle having a diameter of 20 im or less, or a polygon included in a circle having a diameter of 20 / m or less.
- a conductive transparent electrode for forming an ohmic contact with the second conductivity type semiconductor region may be provided in the opening formed in the second electrode.
- the substrate is preferably formed of a material that is transparent to light emitted by the light emitting device.
- the substrate may be formed of sapphire, and a GaN-based compound semiconductor multilayer structure may be formed on the substrate. It is preferable that the microbump is formed of a metal material containing at least Au.
- the method for manufacturing a light-emitting device is a method for manufacturing a light-emitting device, comprising: A second step of removing a part of the second conductivity type semiconductor region to expose a part of the first conductivity type semiconductor region; and a second step of exposing a part of the first conductivity type semiconductor region.
- a semiconductor layer comprising at least a first conductivity type semiconductor region and a second conductivity type semiconductor region on the first conductivity type semiconductor region is formed on a substrate.
- a light-emitting device includes an insulating substrate and a semiconductor film formed on the insulating substrate, and a p-type semiconductor region and an n-type semiconductor region formed near an upper surface of the semiconductor film.
- a light-emitting element configured to emit light in accordance with a voltage applied between the region and the n-type semiconductor region, and electrically connected to the P-type semiconductor region and the n-type semiconductor region of the light-emitting element, respectively.
- a current flows between the two pole portions.
- a static electricity protection element configured to flow.
- the static electricity protection element is configured such that a current flows from the first pole to the second pole in a forward direction in which the current flows more easily than the reverse direction.
- the P-type semiconductor region is electrically connected to the second electrode of the electrostatic protection element, and the n-type semiconductor region of the light-emitting element is electrically connected to the first electrode of the electrostatic protection element. Is preferred. It is preferable that the electrostatic protection element is a diode.
- the forward operating voltage of the diode is lower than the reverse breakdown voltage of the light emitting device, the reverse breakdown voltage of the diode is higher than the operating voltage of the light emitting device, and the forward breakdown voltage of the light emitting device. It is preferably smaller than.
- the electrostatic protection element is a field-effect transistor having the first pole portion as a drain region and the second pole portion as a source region, and a threshold voltage of the field-effect transistor is an operation of the light-emitting element.
- the voltage may be higher than the voltage and lower than the forward breakdown voltage and the reverse breakdown voltage of the light emitting element. It is preferable that the light emitting element and the electrostatic protection element are in a state where they overlap each other.
- the electrostatic protection element is a diode having a forward direction in which a current flows from the first pole to the second pole, and a diode connected to the first and second poles, respectively. 1, having a second electrode on one surface, wherein the light emitting element has a P electrode connected to the p-type semiconductor region and an n electrode connected to the n-type semiconductor region on the upper surface. And a microphone opening bump between the p-electrode of the light-emitting element and the second electrode of the electrostatic protection element, and between the n-electrode of the light-emitting element and the first electrode of the electrostatic protection element. Preferably, they are electrically connected.
- the light emitting element is mechanically connected to the static electricity protection element by an adhesive, and at least one of the first and second electrodes of the static electricity protection element is provided via the micro bump.
- a region connected to the P electrode or the n electrode of the light emitting element, and a bonding pad connected to an external member via a wire It may be divided into regions.
- the light emitting element and the electrostatic protection element are mechanically connected by an adhesive, and the whole of the first electrode and the second electrode of the electrostatic protection element is divided in a certain direction. It may be composed of a plurality of rectangular portions.
- the light emitting element and the static electricity protection element are mechanically connected by an adhesive, and a groove surrounding a region of the first electrode and the second electrode of the static electricity protection element where the adhesive exists.
- a convex portion may be formed.
- the light emitting element is mounted on the static electricity protection element, and one of the first electrode and the second electrode of the static electricity protection element is planar with the light emitting region of the light emitting device. It may be formed in the same area and configured to reflect light emitted from the light emitting area upward.
- the diode may be a lateral diode in which a first pole portion and a second pole portion are a P-type semiconductor region and an n-type semiconductor region formed near one surface in a semiconductor region.
- the static electricity protection element may be constituted by a semiconductor thin film formed on the light emitting element via an interlayer insulating film.
- the electrostatic protection element may be formed on the insulating substrate together with the light emitting element.
- the electrostatic protection element is constituted by a semiconductor thin film formed on the insulating substrate. It may be.
- the insulating substrate of the light emitting element and the electrostatic protection element may be provided on a common parent substrate.
- the electrostatic protection element may be constituted by a semiconductor thin film formed on the parent substrate.
- the light emitting element may be a light emitting element for a backlight of a liquid crystal device. It is preferable that the light emitting element and the electrostatic protection element are housed in a common house. It is preferable to further include a reflector provided at least around the light emitting element and configured to reflect light emitted from the light emitting element. The reflector may be configured such that an upper end thereof is higher than at least a light emitting region in the light emitting element.
- the reflector is formed of a metal lead, and the electrostatic protection element is mounted on the metal lead.
- Another light-emitting device of the present invention includes a GaN-based compound light-emitting device having an insulating substrate and a GaN-based semiconductor layer formed on the insulating substrate; It has an electrostatic protection element that protects against electricity.
- the electrostatic protection element includes a diode element having a p-electrode and an n-electrode, and a P-electrode of the diode element is electrically connected to an n-electrode of the GaN-based light emitting element; It is preferable that the n-electrode of the device is electrically connected to the p-electrode of the GaN-based light-emitting device.
- the gap between the p-electrode of the diode element and the n-electrode of the GaN-based light-emitting element and the gap between the n-electrode of the diode element and the p-electrode of the GaN-based light-emitting element are all via a microphone opening bump. It is preferable that a composite element of an electronic device and an optical device be configured. It is preferable that the GaN-based light-emitting element and the electrostatic protection element are incorporated in a common eight-us.
- a method for manufacturing a light-emitting device includes a semiconductor light-emitting element in which a semiconductor laminated film is formed on a transparent substrate, and a p-side electrode and an n-side electrode are formed on the surface of the semiconductor laminated film.
- a submount element having electrodes; and a base material supporting the submount element and capable of supplying power to the submount element, such that the submount element is electrically connected to the base material.
- a method of manufacturing a flip-chip type semiconductor light-emitting device wherein the semiconductor light-emitting element is mounted on the base material and the semiconductor light-emitting element is mounted face-down on the upper surface of the submount element.
- the method may include a step of forming a plurality of wafers from the wafer.
- the chip bonding step heat, ultrasonic waves, and a load are applied to at least one of the semiconductor light emitting element and the submount element while bringing the electrodes facing each other through the microbump into contact with each other.
- a step of welding the micro bumps to the electrodes may be included.
- the step of forming the micro-bump includes a step of forming a stud bump on a p-side electrode and an n-side electrode of the semiconductor light emitting element, and the chip bonding step is performed for each of the submount elements in the wafer.
- the step of forming the microphone opening bump includes a step of forming a stud bump on a p-side electrode and an n-side electrode of the semiconductor light emitting element.
- the chip bonding step includes mounting the submount element on the base. After fixing the sub-mount element on the base material, the micro-bump is attached to the sub-mount element.
- the method may include a step of fixing the semiconductor light emitting element on the submount element by welding to the electrode, and electrically connecting the opposing electrode through the microphone opening bump.
- the microphone opening bump may be formed by a plating process.
- the step of forming the micro-bump includes forming a stud bump on an electrode of each sub-mount element included in the wafer, and the chip bonding step corresponds to each sub-mount element in the wafer. Fixing the semiconductor light-emitting element on the sub-mount element and fixing the opposing electrode to the electrode by welding the micro-bump to the electrode of the semiconductor light-emitting element.
- the step of forming the micro-bump may include a step of forming a stud bump on the electrode of the submount element, and the step of bonding the chip may include a step of electrically connecting via a microphone opening bump.
- the chip bonding step includes: bringing the chip-shaped semiconductor light-emitting element closer to a wafer on which a plurality of sub-mount elements including the sub-mount element are formed in a matrix; and Bonding a p-side electrode and an n-side electrode of the semiconductor light emitting device to the electrode of the submount device included in the wafer.
- the optical characteristic inspection step is preferably performed on each semiconductor light emitting device in the wafer after the chip bonding.
- FIG. 1 is a plan view showing an electrode arrangement of a gallium nitride-based compound semiconductor light emitting device according to the first embodiment of the present invention.
- FIG. 2 is a cross-sectional view of the gallium nitride-based compound semiconductor light emitting device according to the first embodiment, taken along line AA in FIG.
- FIG. 3 is a cross-sectional view of an LED device obtained by mounting the gallium nitride-based compound semiconductor light emitting device according to the first embodiment on a lead frame by a micro bump bonding method.
- Fig. 4A is a plan view of a commercialized conventional LED element, and Fig. 4B is its B
- FIG. 4C is a cross-sectional view taken along the line C—C.
- FIG. 5 is a cross-sectional view showing the configuration of a conventional LED lamp that has been commercialized.
- FIG. 6A is a plan view showing the structure of the GaN LED device according to the second embodiment, and
- FIG. 6B is a sectional view taken along line DD of FIG.
- FIG. 7A is a plan view showing the structure of a GaN LED device according to the third embodiment, FIG. 7B, and a sectional view taken along line EE of FIG. 7B.
- FIG. 8A is a plan view showing the structure of a GaN LED element according to the fourth embodiment, and FIG. 8B is a cross-sectional view taken along line F_F.
- FIG. 9A is a plan view showing the structure of a GaN LED element according to the fifth embodiment
- FIG. 9B is a sectional view taken along line GG.
- FIG. 10 is a plan view showing the structure of the GaN LED element according to the sixth embodiment.
- FIG. 11A is a plan view showing a structure of a GaN LED element according to a seventh embodiment
- FIG. 11B is a sectional view taken along line HH of FIG.
- FIG. 12A is a plan view showing the structure of a GaN LED element according to the eighth embodiment, and FIG. 12B is a cross-sectional view taken along the line II.
- FIG. 13 is a sectional view of a GaN LED lamp according to the ninth embodiment.
- FIG. 14 is a circuit diagram for explaining an LED lamp protection circuit according to the ninth embodiment.
- FIG. 15A is a plan view showing the structure of the GaN LED device according to the ninth embodiment, and FIG. 15B is a cross-sectional view taken along the line JJ.
- FIG. 16A is a plan view showing the structure of the Si diode element according to the ninth embodiment, and FIG. 16B is a sectional view taken along the line KK of FIG.
- FIG. 17 is a cross-sectional view illustrating the structures of a GaN LED element and a diode element according to the tenth embodiment.
- FIG. 18 is a cross-sectional view illustrating the structures of the GaN LED element and the diode element according to the first embodiment.
- FIG. 19 is a cross-sectional view showing the structures of a GaN LED element and a diode element according to the twelfth embodiment.
- FIG. 20 is a sectional view of another embodiment of the semiconductor light emitting device according to the present invention.
- FIG. 21 is a flowchart of the manufacturing method according to the thirteenth embodiment.
- FIG. 22 is a flowchart of the manufacturing method according to the fourteenth embodiment.
- FIG. 23 is a flowchart of the manufacturing method according to the fifteenth embodiment.
- FIG. 24 is a flowchart of the manufacturing method according to the sixteenth embodiment.
- FIG. 25 is a flowchart of the manufacturing method according to the nineteenth embodiment.
- FIG. 26 is a flowchart of the manufacturing method according to the twentieth embodiment.
- FIG. 27 is a cross-sectional view schematically showing a relationship between a wafer, an LED element, and a jig for transporting the LED element in a chip bonding step.
- FIG. 28 is a cross-sectional view schematically showing a relationship between the wafer and the cavities 102 in the step of forming stud bumps.
- FIG. 29 is a cross-sectional view showing a state in which an LED element is arranged for an Si diode element on a mount portion in a chip bonding step.
- FIG. 30 is a cross-sectional view schematically showing the relationship between the wafer 90 and the capillary 102 in the step of forming stud bumps.
- FIG. 31A is a plan view of an LED element used in the thirteenth embodiment
- FIG. 31B is a cross-sectional view along the line L_L.
- FIG. 32A is a plan view of an LED element on which micro-bumps are formed by a plating method
- FIG. 32B is a cross-sectional view taken along the line MM.
- FIG. 33A is a plan view of an Si diode element on which stud bumps are formed
- FIG. 33B is a cross-sectional view taken along the line NN.
- FIG. 34 is a flowchart of the manufacturing method according to the twenty-first embodiment.
- FIG. 35 is a cross-sectional view schematically showing a relationship among a wafer, a probe, and a photodetector in an optical characteristic inspection process.
- a light emitting device includes one microbump formed on a first electrode and at least one microbump formed on a second electrode. No. The reason why the number of microbumps on one electrode is one is to minimize the area occupied by the first electrode and maximize the light emitting area of the light emitting element.
- a columnar or mushroom-shaped microbump having a diameter of about 30 to 40 hereinafter, such a microbump is referred to as a “point-shaped microbump” is preferably formed. .
- the number of microbumps on the second electrode is one or more.
- the dot of micro-bump provided on the first electrode and the bump of the microphone provided on the second electrode stably support the chip of the semiconductor light emitting device such as GaN LED device. And keep the tip from tilting.
- the number of the microbumps is preferably two or more.
- a micro-bump in which dot-shaped microphone opening bumps are continuously connected in a linear manner hereinafter, such a micro-bump is referred to as a “linear micro-bump”
- a dot-shaped micro bump is continuously formed.
- a plane microbump In the case of forming a microbump connected in a plane (hereinafter, such a microbump is referred to as a “plane microbump”), one microbump is sufficient.
- the maximum lateral dimension of the microbump is preferably in the range of 5 to 300 and the height is preferably in the range of 5 to 50 zm.
- the reason why the maximum dimension in the horizontal direction is preferably 5 am or more is that, when a microbump is formed by plating, the maximum dimension in the horizontal direction of the microbump is preferably 5 m or more from the viewpoint of ease of formation. It is preferable that the maximum dimension in the horizontal direction of the microbump is equal to or less than 300 x m.
- the point-like microbumps preferably have a circle having a diameter of 30 to 40 m or a polygonal shape included in the circle.
- the linear microbump preferably has a size of 20 to 30 x m in width and 150 to 200 m in length.
- the height of the microbump is 5 m or more. The reason is This is because when the chip of the body light emitting element is joined to the lead frame or the like via the microphone opening bump, a joining method of welding the microphone opening bump using a load, heat, and ultrasonic waves is used. If the height of the micro-bumps is less than 5 m, the chip and the lead frame may come into contact with parts other than the bumps, and short-circuit failure may occur.
- the height of the microphone opening bump is preferably 50 tm or less. The reason is that the micro bumps can be easily formed by plating at such a high height. A more preferable height of the microbump is 20 to 30 m.
- the chips placed with the microphone opening bumps down
- the chip is supported at at least three points and does not tilt.
- the three microbumps are preferably placed at the three vertices of an isosceles triangle that can be as large as possible in the chip.
- the microphone opening bump on the second electrode is connected to a linear microbump or a planar microphone.
- the chip is supported at three or more points and does not tilt. Therefore, the error in the chip recognition error at the time of the die sponger is eliminated.
- the microbump formed on the second electrode can be a plurality of dot-shaped, linear, or various-shaped planar microbumps.
- the mouth bump it is preferable to form only one point-like micro bump. This is to reduce the area of the first electrode as much as possible and to make the light emitting area as large as possible.
- the light emitting device of the present invention when a chip is bonded to a lead frame or the like via a microbump, the Au microbump is welded by a load, heat, and ultrasonic waves. Also in the joining method, the chip and the lead frame do not come into contact with each other at portions other than the bumps, and short-circuit failure does not occur.
- the electrodes are peeled off by ultrasonic waves even in the method of welding and bonding Au micro bumps using load, heat and ultrasonic waves. No problem arises.
- the first and second conductivity type semiconductor regions are n-type GaN and p-type GaN
- Ti is a metal having good adhesion.
- Ti is also a good omic contact electrode of n-type GaN, which is convenient.
- a region (probe region) to which the probe needle can contact may be formed in a region other than the region where the microphone opening bump is formed.
- the probe region needs to have an area of at least 50 mx 50 m, but the probe region can be easily secured on the second electrode. However, in the case of the first electrode, it is preferable to reduce this area as much as possible.
- the probe region of the first electrode may be formed so as to extend over a part of the die sinter street.
- the size of the first electrode can be made large enough to form one cylindrical or mushroom-shaped microbump having a diameter of about 30 to 40 zm, and the light emitting area is as large as possible. Can be taken.
- the dicing street is formed so as to expose the n-type GaN layer.
- the first electrode may be separated to separate the region for forming the microphone opening bump from the probe region, but it is preferable that both regions are adjacent to each other and the first electrode is not separated. This is because accurate characteristic inspection can be performed.
- An opening for extracting light emitted from the light emitting element may be formed in the second electrode.
- the opening formed in the second electrode is a circle having a diameter of 20 or less or a polygon included in the circle. The reason is that if the opening is too large, if the second conductivity type semiconductor region (p-type GaN layer) is thin, current cannot be sufficiently injected into the active layer, and not only sufficient light cannot be extracted. This is because it causes a decrease in luminance. Sufficient light cannot be extracted if the opening is too small, but a plurality of openings may be formed in a mesh shape.
- a conductive transparent electrode may be formed, which has an atomic contact with the second conductivity type semiconductor region.
- current can be injected into the InGaN active layer and light can be extracted.
- the substrate can be made of a transparent body with respect to light emitted from the light emitting element. This makes it possible to extract the light emitted in the element from the substrate side, and it is possible to extract light efficiently with a flip-chip structure.
- the substrate is preferably made of sapphire. This makes it possible to utilize the good crystallographic consistency between the GaN crystal and the sapphire crystal, and the fact that the sapphire substrate is a translucent insulating substrate, which is advantageous for flip-chip structures. A flip-chip structured light emitting device having good light emission characteristics such as light can be obtained.
- the refractive index of G a N is 2.1, the refractive index of sapphire is 1.77, and the refractive index of the mold resin is 1.5. It has a refractive index in the middle of the mold and the mold resin, and is a convenient substrate that can efficiently extract light.
- FIG. 1 and FIG. 2 are a plan view and a cross-sectional view taken along line A_A of the GaN LED device 1 of the present embodiment, respectively.
- the GaN LED device 1 has a GaN buffer layer 31, an n-type GaN layer 32, an InGaN active layer 33, and a p-type Al It has a double hetero structure in which a GaN layer 34 and a p-type GaN layer 35 are sequentially stacked.
- the upper surface of the n-type GaN layer 32 is formed in a step-like shape including a lower portion occupying a very small portion of the upper surface and an upper portion occupying the remaining majority, and the upper surface of the n-type GaN layer 32 in the lower portion is formed.
- an n-electrode 6 is formed in which a laminated film of Ni and Au is further laminated on a laminated film of Ti and Au.
- the above-mentioned InGaN active layer 33, p-type AlGaN layer 34, and p-type GaN layer 35 are sequentially stacked.
- the p-electrode 5 made of Ni and Au is directly provided without providing a transparent electrode for current spreading.
- the planar size of the GaN LED element 1 in the present embodiment is a square having a side of about 0.28 mm.
- Micro bumps 22 and 23 made of Au or an Au alloy are formed on the n-electrode 6 and the p-electrode 5, respectively.
- FIG. 3 is a cross-sectional view schematically showing an LED device formed by mounting the GaN LED element 1 on a lead frame by a microbump bonding method.
- Two die pads 17a and 17b which are insulated and separated from each other, are provided at the ends of the lead frames 13a and 13b, and the micro bumps 23 and 22 contact the respective die pads 17a and 17b.
- the GaN LED element 1 is mounted on the die pads 17a and 17b.
- the GaN LED element 1 and the die pads 17a and 17b are fixed by an ultraviolet curable insulating resin 16.
- the light emitted from the light emitting region is reflected upward by the lead frame 13a, passes through the sapphire substrate 30, and is extracted upward.
- light leaking to the side of the GaN LED element 1 is directed upward at the side edges of the lead frames 13a and 13b.
- Reflectors 15a and 15b are provided for reflecting light to the surface.
- a GaN buffer layer 31 As described above, on the upper surface of the sapphire substrate 30, a GaN buffer layer 31, an n-type GaN layer 32, an InGaN active layer 33, a p-type AlGaN layer 34, and a p-type GaN layer 3 and 5 are sequentially stacked to form a wafer having a double heterostructure. Then, on the surface of the p-type GaN layer 35 of this wafer, a SiO 2 resist mask having an opening in a region to be selectively removed is formed, and dry etching is performed using the SiO 2 mask. Then, a part of each of the p-type GaN layer 35, the p-type AlGaN layer 34, and the InGaN active layer 33 is selectively removed in the vertical direction. The part is dug slightly below the surface to form a stepped shape as a whole.
- a lift-off method or an etching method is used to form a Ti film having a thickness of about 0.2 m and an Au film having a thickness of about 0.5 m.
- the laminated film is patterned into a circular shape having a diameter of about 50 m.
- a Ni film with a thickness of about 0.2 m is formed on the entire surface of the wafer, and an Au film with a thickness of about 1 m is formed thereon by vapor deposition.
- a photolithography process is performed to form a resist mask on the laminated film of the Ni film and the Au film with an opening in a region where a micro bump is to be formed.
- a selective plating of Au or an Au alloy is performed on the opening area of the resist mask, and a mushroom shape having a diameter of about 30 ⁇ and a height of about 20 / m is formed on the area located on the n-electrode 6 and the P-electrode 5.
- the micro bumps 22 and 23 are respectively formed.
- the Ni film and the Au film adhering to the other portions are selectively etched, leaving almost the entire region located on the p-type GaN layer 35 and the region located on the n-electrode. Remove.
- the procedure for mounting the GaN LED element 1 on the lead frames 13a and 13b Will be described.
- the micro-bump 23 on the ⁇ electrode 5 is aligned with the die pad 17a
- the micro-bump 22 on the n-electrode 6 is aligned with the die pad 17b.
- the UV-curable insulating resin 16 is applied to the die pads 17a and 17b or the GaN LED element 1, and the UV-curable insulating resin 16 is cured by irradiating ultraviolet rays while pressing the GaN 'LED element 1. .
- the die pads 17a and 17b may be separated after the GaN / LED element 1 is mounted.
- the P electrode 5 and the n electrode 6 are formed on one surface side, and the micro bump 22 is formed on the n electrode 6 and the p electrode 5.
- And 23 are formed to connect the GaN-LED element 1 to a member such as a lead frame via the micro bumps 22 and 23, the following effects can be obtained.
- micro bumps can usually be easily reduced to a diameter of about 10 / • i, eliminating the need for bonding pads as required for conventional devices. Therefore, the electrode structure can be reduced, and the light emitting device (this embodiment) Then, it becomes possible to reduce the size of the GaN * LED element 1).
- the downsizing can reduce costs by reducing the amount of expensive materials used such as the sapphire substrate 30 and the compound semiconductor substrate.
- the n-electrode 6 can be made smaller, the light-emitting region, that is, the pn junction region inside the GaN * LED device 1 is widened, and the brightness is improved as compared with a device having the same size as the conventional device. Further, the light extraction surface is in the direction indicated by the arrow in FIG.
- the diameter of the microbumps 22 and 23 is preferably 5 to 300 m as described above, and more preferably 5 to 100 m. If the diameter of the micro-bumps 22 and 23 exceeds 100 m, the area occupied by the micro-bumps increases, and the merit is smaller than that of wire bonding.
- the diameter of the microbump is more preferably in the range of 10 to 30.
- the height of the micro bumps 22 and 23 is preferably 30 m or less in the case of a columnar shape, and is preferably 50 zm or less in the case of a mushroom shape.
- the resist film is to be formed by the selective plating method, it is necessary to increase the thickness of the resist film formed by one photolithography process.However, a resist film having a thickness of 30 m or more must be formed. Is difficult.
- the plating is performed to a height exceeding 50 xm, the lateral diameter of the mushroom-shaped umbrella part increases to about 100 / m, which is an advantage compared to wire bonding. Less.
- the size of the n-electrode 6 is preferably a size capable of forming the microbump 22, that is, a circle having a diameter slightly larger than the diameter of the cylinder of the microphone opening bump.
- a circle with a diameter of about 50m is suitable for miniaturization of the LED device.
- the shape of the cross section of the microbump is not limited to the circular shape as in the above-described embodiment, but may be an elliptical shape, a shape close to a square, or the like. In that case, it is sufficient that the maximum dimension in the lateral direction is within the range of the diameter dimension described above.
- the light extraction surface is on the side of the sapphire substrate 30, it is not necessary to form a transparent electrode on the p-electrode 5 unlike the conventional GaN LED device, so that a thick film is formed on the entire surface of the p-type GaN layer 35. May be provided.
- the size of the LED element fabricated by the above method is, for example, a square of 0.28 mm on a side and does not contribute to light emission.
- the area around the n-electrode occupies one-fifth of the element surface.
- the size of the device is a square with a side of 0.34 mm, The area that does not contribute to light emission occupies half of the device surface. In other words, in the case of this embodiment, the light emitting area is increased by 1.26 times although the size of the element is reduced by 0.68 times.
- a metal dedicated to the p-electrode (Ni and Au) is further laminated on a metal dedicated to the n-electrode (Ti and Au), and a micro-electrode is placed on the metal dedicated to the p-electrode. Since the selection of the metal constituting the bump is performed, the conditions of the selection can be made uniform. As a result, the p-electrode 5 is composed of only the metal dedicated to the p-electrode, while the n-electrode 6 is composed of the metal dedicated to the p-electrode on top of the metal dedicated to the n-electrode.
- the step between the n-type GaN layer 32 and the n-type GaN layer 32 is alleviated, and there is also an effect that the tips of the micro bumps 22 and 23 at two places are at substantially the same height.
- the method for manufacturing a light-emitting device of the present invention is not limited to such an embodiment, and the p-electrode and the n-electrode are each composed of a dedicated metal only, and micro-bumps are formed thereon. It may be.
- the deposition of the metal constituting the microphone opening bump is not limited to the selective plating method. After depositing a metal film by vapor deposition or the like, the surrounding metal film is removed together with the resist mask by a lift-off method. Alternatively, a lift-off method that leaves only microbumps may be used.
- the GaN LED device is mounted on the lead frame, but the present invention is not limited to such an embodiment.
- a GaN LED element may be flip-chip connected to an active element, a passive element, or a parent substrate, or conversely, another active element or passive element may be flip-chip connected to a GaN LED element. You may.
- the light emitting device according to the present invention is not limited to a GaN LED device, but may be another light emitting device.
- the GaN LED device is formed on a transparent and insulating sapphire substrate, the p-electrode and the n-electrode are formed on one surface side, so the application of the present invention is extremely effective. can do.
- the substrate of the light emitting device according to the present invention does not necessarily need to be a transparent body. In the case of an opaque substrate, light only needs to be extracted to the opposite side of the substrate. However, when the substrate is made of a transparent material, light can be extracted from the opposite direction of the P electrode and the n electrode, so that the light extraction efficiency can be improved as described above.
- the following problems may occur in the probe inspection process for inspecting the characteristics of the GANED LED device or the assembly process in which the chip is divided into chips and assembled into a lead frame or the like.
- the size of the electrode is such that one column-shaped or mushroom-shaped microphone mouth bump having a diameter of about 30 m can be formed. It is preferably a circle of about 0 m. In the probe inspection process for inspecting the characteristics of the device, there is a possibility that the problem that the microbump is broken because the probe needle contacts the microphone opening bump may occur.
- G a N ⁇ Place the wafer on which the LED elements are formed on the stage with the electrode side up, and fix it with a vacuum chuck.
- a probe needle is brought into contact with the electrode from above the wafer to perform a characteristic test.
- the detector that measures the intensity and wavelength of light is usually placed above the stage, so the light from the GaN LED device can be extracted.
- the problem may be that sufficient light does not reach the detector above because it is done from the sapphire substrate side.
- the following embodiment relates to a light emitting device having a structure in which a detection process and an assembling process of a flip chip light emitting device having micro bumps can be performed without any trouble.
- FIGS. 6A and 6B are a plan view and a cross-sectional view taken along line DD of the GaN LED element 1 in the present embodiment, respectively.
- This embodiment is characterized in that one dot-shaped microphone opening bump is formed on the n-electrode 6 of the GaN LED device 1 and two dot-shaped microphone opening bumps are formed on the p-electrode 5. It is.
- the element 1 includes a GaN buffer layer 31, an n-type GaN layer 32, an InGaN active layer 33, a p-type AlGaN layer 34, and a p-type GaN layer 35 on the upper surface of a sapphire substrate 30. And have a double heterostructure in which layers are sequentially stacked.
- the upper surface of the n-type GaN layer 32 is formed in a stepped shape including a lower portion occupying a very small portion and an upper portion occupying the remaining majority, and the upper surface of the n-type GaN layer 32 in the lower portion is formed.
- an n-electrode 6 is formed, in which a laminated film of Mg and Au is further laminated on a laminated film of Ti and Au. Further, the above-described InGaN active layer 33, p-type AlGaN layer 34, and p-type GaN layer 35 are sequentially stacked on the upper surface of the n-type GaN layer 32 in the upper part. Then, on the upper surface of the p-type GaN layer 35, the p-electrode 5 made of Mg and Au is directly provided without providing a transparent electrode.
- n-electrode 6 On the upper surface of the n-electrode 6, a single point-shaped On the upper surface of the p-electrode 5, two dot-like micro bumps 25 made of Au or an Au alloy are formed. The surface of the element is covered with a protective film 39 except for the microbump.
- the size of the three point-like microbumps is a mushroom-like or columnar shape having a diameter of 40 m and a height of 20 m, and the positions of three vertices of an isosceles triangle that can be as large as possible in a chip. Are located in
- the chip of the GaN LED element 1 is supported at three points by the microbumps, so that the chip does not tilt even when the chip is placed with the microbumps down. No error occurs when the data is imported.
- the GaN 'LE the GaN 'LE
- the chip and the lead frame come into contact with parts other than the bump by setting appropriate bonding conditions. No short circuit failure occurs, and sufficient bonding strength is maintained.
- Ti of the n electrode and Mg of the ⁇ electrode are electrode materials having a strong adhesive force to GaN, and peeling by ultrasonic waves did not occur.
- FIGS. 7A and 7B are a plan view and a cross-sectional view taken along line EE of the GaN LED element 1 in the present embodiment, respectively.
- the feature of this embodiment is that one dot microbump 24 is formed on the n electrode 6 of the GaN 'LED element 1 and one linear microbump 25 a is formed on the p electrode 5.
- the other points are the same as those of the second embodiment.
- the size of the linear microbump 25a on the p-electrode 5 is 20 // m in width, 180 um in length, and 20 m in height, and the cross section of the EE line is mushroom-like or columnar. . Also in this case, the GaN LED element 1 chip is supported by micro bumps. Since there is no tilt, there is no chip recognition error or arm loading error during dice pounding.
- FIG. 8A and FIG. 8B are a plan view and a cross-sectional view taken along line FF of the GaN LED device 1 in the present embodiment, respectively.
- the feature of this embodiment is that a metal having good adhesion to the p-type GaN layer is laid on the lower surface of the p-electrode where the micro bump of the GaN * LED element 1 is located. This is the same as the embodiment.
- the method of welding the micro bumps by load, heat, and ultrasonic waves was used as an example of the method of joining the chip and the lead frame, but the joining method is not limited to this. It is applicable to the evening bump bonding (SBB) method, the ACF method using anisotropic conductive sheet adhesive, and the method using solder bumps.
- SBB evening bump bonding
- ACF anisotropic conductive sheet adhesive
- solder bumps solder bumps
- FIG. 9A and FIG. 9B are a plan view and a GG sectional view, respectively, of a part of a GaN LED element group formed on a 2-inch wafer in the present embodiment.
- the feature of the present embodiment is that the probe region is provided on the p electrode 5 and the n electrode 6 of the GaN LED element 1, and particularly the probe region provided on the n electrode. Is a point formed on Daishinda Street.
- an n-electrode 6 is formed on the upper surface of the lower portion of the n-type GaN layer 32, and the n-electrode 6 is formed over a part of the die sinter street 37.
- a p-electrode 5 is formed on almost the entire upper surface of the p-type GaN layer 35, and on the n-electrode 6 and the p-electrode 5, micro-mouth bumps 24 and 25 made of Au or Au alloy are provided. Each is formed.
- the surface of the element is covered with a protective film 39, but the probe region 5a for contacting the probe needle with the Au bump 25 on the upper surface of the p-electrode 5 and the Au bump on the upper surface of the n-electrode 6
- a protective film 39 is opened between 24 and the probe region 6a.
- the size of the probe area 5a of the p-electrode 5 is about 70 ⁇ m ⁇ 80 m
- the size of the probe area 6a of the n-electrode 6 is about 40 ⁇ 80 m.
- the probe inspection can be performed without damaging the microphone opening bump, and the light emitting area of the GaN LED element 1 is enabled. It can be as large as possible.
- the present embodiment is the same as the fifth embodiment, except that a probe region 6b is provided on the die cysteine in a form separated from the n-electrode 6.
- the size of the probe region 6b is slightly smaller, but probes are possible. Also in this case, since the probe region 6b is provided on the dicing street, the light emitting area of the LED GaN element 1 can be increased. However, if the probe region 6b is not separated from the n-electrode 6, accurate characteristic inspection can be performed. (Seventh embodiment)
- FIG. 11A and FIG. 11B are GaN and LED elements in this embodiment, respectively.
- FIG. 1 is a plan view of a child 1 and a cross-sectional view taken along line HH.
- the feature of this embodiment is that a plurality of openings 72 are provided in a matrix at the center of the p-electrode 5 of the GaN-LED element 1.
- the size of one opening is a circle with a diameter of 10 m, and by arranging it in 3 rows and 5 columns, it is possible to supply the amount of light necessary for luminance and wavelength measurement to the detector.
- the opening 72 is not limited to the central portion of the p-electrode 5, but may be any portion that can be formed in the p-electrode.
- FIG. 12A and FIG. 12B are a plan view and a cross-sectional view taken along line I-I of the GaN LED device 1 in the present embodiment, respectively.
- the matrix portion of the opening 72 in the seventh embodiment is replaced with a transparent electrode that is in atomic contact with the p-type GaN layer.
- the size of the transparent electrode is 50 m ⁇ 100 m, and a sufficient amount of light can be supplied to the detector. Of course, the size is not limited to this value.
- LED lamps obtained by providing a semiconductor layer on an insulating substrate as shown in Fig. 5 are generally vulnerable to static electricity due to the physical constants (eg, dielectric constant ⁇ ) of the element material and the element structure.
- a static voltage of about 100 V in the forward direction and about 30 V in the reverse direction Destroyed by static voltage. This value is very small compared to the LED device composed of other bulk compound semiconductors (GaP, GaA1As, etc.). For this reason, if the LED lamp is handled without a protective treatment that does not apply static electricity from the outside, the internal GaN LED device may be immediately destroyed.
- a highly reliable semiconductor light emitting device having a built-in destruction prevention function against application of a high voltage such as static electricity will be described.
- FIG. 13 is a cross-sectional view of the semiconductor light emitting device (GaN-based LED lamp) according to the present embodiment.
- the feature of the GaN-based LED lamp according to the present embodiment is that the GaN * LED element 1 is not directly mounted on the lead frame, but the GaN LED element 1 has a Si electrode having a p-electrode and an n-electrode. It is mounted on lead frames 13a and 13b with diode element 2 interposed therebetween.
- the Si diode element 2 is mounted on the die pad at the tip of the lead frame 13a having the reflecting mirror, with the main surface facing upward and the lower surface facing downward.
- the Si diode element 2 is die-bonded to the die pad with the Ag paste 14 while the n-electrode 9 on the lower surface is in contact with the die pad of the lead frame 13a.
- a p-electrode 7, an n-electrode 8, and a bonding pad portion 10 for the p-electrode are provided on the upper surface of the Si diode element 2.
- the GaN / LED element 1 is mounted with the sapphire substrate side facing upward and the p-electrode 5 and the n-electrode 6 facing downward. Then, the p electrode 5 of the GaN LED element 1 and the n electrode 8 of the Si diode element 2 are connected via the Au microbump 12 to the [1] electrode 6 of the GaN element 1 and the Si diode element.
- the p-electrode 7 of the element 2 is electrically connected to the p-electrode 7 via the Au micro-bump 11, and the GaN LED element 1 and the Si diode element 2 are fixed by the ultraviolet curable insulating resin 16. Have been.
- the mechanical connection between the GaN LED element 1 and the Si diode element 2 can be achieved by welding the micro bumps 11 and 12 instead of using the ultraviolet curable insulating resin 16. good. Such welding will be described later.
- the bonding pad portion 10 of the p-electrode of the Si diode element 2 and the lead frame 13b are connected to each other through the Au wire 117. They are connected by key bonding.
- a reflector 15 for reflecting light upward is attached to the side of the die pad of the lead frame 13a, and the GaN LED element 1 is surrounded by the reflector 15.
- the entire leading end of the lead frames 13 a and 13 b is molded with a translucent epoxy resin 18 to form an LED lamp. ing.
- the light generated by the GaN LED device 1 is extracted upward from the sapphire substrate side. Therefore, on the p-electrode 5 side of the GaN * LED element 1, a transparent electrode for current spreading like the one formed in the conventional GaN LED element (the code shown in FIGS. 4A, 4B and 4C) is used.
- the member indicated by 37) is not required, and only the thick-film p-electrode 5 needs to be provided as the current spreading member.
- the tip of the reflector 15 be located at least above the light emitting region of the GaN * LED element 1.
- FIG. 14 is a circuit diagram for explaining a protection circuit built in the LED lamp of the present embodiment.
- the Si diode element 2 and the GaN element 0 are connected in a reverse polarity relationship, that is, the electrodes of the opposite polarities of the P electrode and the n electrode are connected to each other to form the GaN element.
- the forward operating voltage of the Si diode element 2 is about 0.9 V
- the reverse voltage applied to the GaN LED element 1 is cut at 0.9 V.
- the reverse breakdown voltage of the Si diode element 2 can be set to around 10V
- the forward voltage applied to the GaN LED element 1 can also be cut at around 10V.
- the forward breakdown voltage of the GaN LED element 1 is about 100 V, and the reverse breakdown voltage is about 30 V. With this configuration, it is possible to reliably prevent the GaN LED element 1 from being destroyed by application of a high voltage such as static electricity.
- the forward breakdown voltage and the reverse breakdown voltage of the GaNLED element 1 are Vf1 and Vbl, respectively, and the forward operating voltage and the reverse breakdown voltage of the Si diode element 2 are Vf2 and Vb, respectively.
- the operating voltage of G aN LED element 1 is VF
- FIG. 15A and FIG. 15B are a plan view and a cross-sectional view taken along line JJ of the GaN LED device 1 of the present embodiment.
- the GaN LED device 1 has a GaN buffer layer 31, an n-type GaN layer 32, an In n GaN active layer 33, and a p-type A 1 It has a double hetero structure in which a GaN layer 34 and a p-type GaN layer 35 are sequentially stacked.
- the upper surface of the n-type GaN layer 32 is formed in a stepped shape including a lower portion occupying a very small portion of the upper surface and an upper portion occupying the remaining majority, and the upper surface of the n-type GaN layer 32 in the lower portion is formed.
- an n-electrode 6 composed of Ti and Au.
- the above-described InGaN active layer 33, p-type A1 GaN layer 34, and p-type GaN layer 35 are sequentially stacked.
- the p-electrode 5 is provided directly on the upper surface of the p-type GaN layer 35 without providing a transparent electrode for current diffusion.
- the planar size of the GaN LED element 1 in the present embodiment is a square having a side of about 0.28 mm.
- FIGS. 16A and 16B are a plan view and a plan view of the Si diode element 2 of the present embodiment.
- FIG. 4 is a cross-sectional view taken along line K-K.
- a P-type semiconductor region 21 is formed by selectively implanting impurity ions into the n-type silicon substrate 20 of the Si diode element 2. The reverse breakdown voltage is set to around 10V.
- the p-electrode 7 and the n-electrode 8 of the Si diode element 2 are formed on the p-type semiconductor region 21 and the n-type silicon substrate 20 (n-type semiconductor region), and a part of the p-electrode 7 is bonded.
- the pad part is 10.
- On the lower surface of the n-type silicon substrate 20, an n-electrode 9 for electrically connecting to the lead frame is formed.
- the planar size of the Si diode element 2 in the present embodiment is about 0.32 mm ⁇ 0.45 mm.
- the n-electrode 6 of the GaN LED element 1 faces the p-electrode 7 of the Si diode element 2, and the p-electrode 5 of the GaN LED element 1 faces the n-electrode 8 of the Si diode element 2.
- an ultraviolet-curing insulating resin 16 is interposed between the GaN * LED element and the Si diode element, and the ultraviolet light is irradiated while pressing the GaN LED element 1, so that both elements 1, 2 is fixed, and electrical connection between the electrodes of both elements 1 and 2 is performed.
- the composite device is diced on a lead frame 13a with an Ag paste 14, and an Au wire 17 is used between the bonding pad portion 10 of the p electrode 7 and the lead frame 13b.
- Perform the wire bonding process to connect However, the above-described flip chip connection step may be performed after performing the wire-to-bonding step.
- the Si diode element 2 and the GaN LED element 1 are connected in reverse polarity to form a composite element, a high voltage is applied between the lead frames 13a and 13b.
- the reverse voltage applied to the GaN LED element 1 is the voltage near the forward voltage of the Si diode element 2, and the forward voltage applied to the GaN LED element 1. Is a voltage near the reverse breakdown voltage of the Si diode element 2 and can be cut, and the destruction of the GaN / LED element 1 due to static electricity can be reliably prevented.
- the GaN 'LED element 1 is flip-chip mounted on the Si diode element 2 by a microbump bonding method to form a composite element.
- a wide bonding pad portion for wire-to-bonding is not required, so that the entire composite device can be reduced in size, and the area of the n-electrode 6 and its surrounding portion that do not contribute to light emission can be reduced. More specifically, in the case of the present embodiment, the area of the n-electrode 6 and its surrounding portion occupies only one fifteenth of the surface area of the GaN-LED element 1.
- the GaN-based LED 1 of the present embodiment emits light even though the size is 0.68 times smaller than the conventional GaN-LED element 1 shown in FIGS. 4A and 4B. Area increased by 1.26 times I have. Therefore, by performing the flip-chip connection by the microbump bonding method, it is possible to reduce the cost by reducing the area of the expensive compound semiconductor substrate and increase the light emitting ability.
- the p-electrode 7 and the bonding pad 10 are separated from each other, but they may be formed integrally.
- the flip-chip connection step is performed after the wire bonding step is performed first, it is preferable to integrate the bonding pad portion 10 with the portion of the p-electrode 7 where the microbump 11 is to be formed. It is more advantageous. This is because, even if the UV-curable insulating resin 16 spreads over the bonding pad portion 10, no problem occurs, and the bonding pad portion 10 and the p-electrode 7 have the advantage of being stably at the same potential. .
- the p-electrode 5 of the GaN LED element 1 and the n-electrode 8 of the Si diode element 2 face each other, so that light emitted from the light-emitting layer below the p-electrode 5 The light can be reflected upward by the n-electrode 8, and the light extraction efficiency can be improved.
- the micro bumps 11 and 12 are formed on the p-electrode 7 and the n-electrode 8 of the Si diode element 2 has been described. It goes without saying that it may be formed on the electrode 6. Further, it is preferable that the n-electrode 8 on the Si diode element 2 is made as large as possible to face the p-electrode 5 of the GaN LED element 1. This is because light that leaks to the side of the GaN LED element 1 is reflected upward, whereby the light extraction efficiency can be further improved.
- the p electrode and the n electrode on the upper surface side of the Si diode 2 are connected together.
- the present invention is not limited to such an embodiment, and may be divided in an oblique direction as viewed in plan or divided in a curved line. Good. (Tenth embodiment)
- the GaN LED element is mounted on the Si diode element, but in the present embodiment, the Si diode element formed of a thin film is provided on the GaN LED element.
- FIG. 17 is a sectional view showing only a device portion of the LED lamp according to the present embodiment. Although the illustration of the mounting state on the lead frame is omitted, it is mounted on the lead frame in the same state as in FIG. 1 in the first embodiment, and is finally sealed with resin.
- an interlayer insulating film 51 made of a silicon oxide film is formed on a GaN LED element 1 having a structure similar to that of the ninth embodiment, and A silicon thin film is formed, and a P-type semiconductor region 52 and an n-type semiconductor region 53 are formed in the silicon thin film.
- This silicon thin film can be easily formed by using a TFT forming technology of a liquid crystal device. Then, the connection hole formed in the interlayer insulating film 51 is filled and connected to the n-electrode 6 of the GaN LED element 1 and the p-electrode of the diode element 50 connected to the p-type semiconductor region 52 of the diode element 50.
- the p-electrode 54 and the n-electrode 55 of the diode element 50 are connected to a lead frame by wire-to-wire bonding (not shown). In this case, the light generated by the GaN LED element 1 is reflected by the lead frame and extracted upward, but the portion forming the diode element 50 can be limited to a narrow range. It is easy to obtain the desired extraction efficiency.
- the light emitting device of the present embodiment has the same Si diode element as that of the ninth embodiment, but the GaN 'LED element is mounted on the silicon substrate without facing the diode element.
- FIG. 18 is a cross-sectional view showing the structure of only the device portion of the LED lamp according to the present embodiment. Although the illustration of the state of being mounted on the lead frame is omitted, it is mounted on the lead frame in the same state as in FIG. 13 in the ninth embodiment and sealed with resin.
- the Si diode element 2 is formed in an n-type silicon substrate 20 having a larger area than in the ninth embodiment. That is, the p-type semiconductor region 21 is formed by selectively implanting impurity ions into the n-type silicon substrate 20, and after the interlayer insulating film 57 is formed, the p-type semiconductor region 21 is formed on the interlayer insulating film 57. A p-electrode 58 that contacts the p-type semiconductor region 21 is formed. Note that, although not shown, an n-electrode that is in contact with the n-type silicon substrate 20, that is, the n-type semiconductor region, is also formed in a portion other than the cross section illustrated in FIG. The reverse breakdown voltage and the forward voltage of the Si diode element 2 are set to the same values as in the ninth embodiment.
- the GaN LED element 1 having basically the same structure as in the ninth embodiment is mounted on the silicon substrate 20, the GaN LED element 1 having basically the same structure as in the ninth embodiment is mounted.
- the n-electrode 6 of the GaN-LED element 1 is formed large so as to have an area that allows wire bonding.
- the n-electrode 6 of the GaN LED element 1 and the p-electrode 58 of the Si diode element 2 are connected by a wire 59, and FIG.
- the p electrode 5 of the GaN LED element 1 and the n electrode of the Si diode element 2 are connected by one wire.
- light is extracted from the GaN LED element 1 above the p-electrode 6.
- connection between each semiconductor region of the diode element 2 and each electrode of the GaN / LED element 1 may be performed by forming a multilayer wiring structure as in the tenth embodiment.
- the ninth embodiment does not use the microphone opening bump.
- a GaN LED element and a diode element are formed on a common insulating substrate.
- FIG. 19 is a cross-sectional view showing the structure of only the device portion of the LED lamp according to the present embodiment. Although the illustration of the mounting state on the lead frame is omitted, it is mounted on the lead frame in the same state as in FIG. 13 in the ninth embodiment, and is sealed with resin.
- a GaN LED element 1 having the same structure as in the ninth embodiment is formed on a sapphire substrate 30. Further, on the sapphire substrate 30, beside the GaN LED element 1, a diode 60 formed by forming a P-type semiconductor region 61 and an n-type semiconductor region 62 in a silicon thin film is provided. Is provided. The formation of the silicon thin film on the sapphire substrate 30 can be easily performed by using, for example, a TFT forming technology of a liquid crystal device. Then, the connection between the p-type semiconductor region 61 of the diode element 60 and the GaN LED element 1 may be performed by forming a multilayer wiring structure as in the tenth embodiment.
- the bonding may be performed by wire-bonding as in the eleventh embodiment.
- the melting point of the sapphire substrate 30 is high, there is an advantage that formation of a silicon single crystal thin film by a laser recrystallization method after depositing a polysilicon film is extremely easy. Also, since light can be easily extracted from the lower sapphire substrate, even if the GaN LED element 1 and the diode element 60 are connected by wire-to-wire bonding, the light extraction efficiency can be improved. It can be kept high.
- the n-electrode 8 of the Si diode 2 is symmetric with the p-electrode 5 of the GaNLED element 1 so that the two electrodes face each other almost over the entire surface. Is also possible. In this case, the light emitted downward from the p electrode 5 of the GaN LED element 1 is reflected upward by the n electrode 8 of the Si diode element 2, thereby further improving the light extraction efficiency. it can.
- the sapphire substrate is one of the transparent substrates for holding the liquid crystal of the liquid crystal device, and the light emitted from the GaN LED element is extracted to the sapphire substrate side, and the back of the liquid crystal device is taken out. It may be one of the lights.
- the electrostatic protection element can be operated in synchronization with TFT. With such a structure, a highly reliable light emitting device for a backlight of a liquid crystal device can be obtained.
- a device in which a light emitting element and a diode made of a silicon thin film are mounted on a glass substrate of quartz glass or the like can be used as one of the liquid crystal sandwiching plates of a liquid crystal device.
- a horizontal pn diode is formed as an electrostatic protection element, but the present invention is not limited to such an embodiment.
- diodes such as diodes, tunnel diodes, and Gunn diodes
- a gun diode utilizing the gun effect of a compound semiconductor can be formed on a substrate of a light emitting element.
- a field effect transistor whose threshold voltage is adjusted to a value higher than the operating voltage of the light emitting element and smaller than the forward breakdown voltage or the reverse breakdown voltage may be provided as the electrostatic protection element.
- the light emitting device including the GaN LED element as the light emitting element has been described, but the present invention is not limited to such an embodiment.
- a light emitting device including a GaN laser diode element or a light emitting device including a light emitting element provided on an insulating substrate other than a GaN laser diode may be used.
- a configuration may be adopted in which an electrostatic protection element is placed on the die pad beside the GaN LED element and both elements are connected by a single wire.
- a diode formed on a silicon substrate as in the first embodiment may be used as the electrostatic protection element, but a silicon thin film is formed on a die pad via an insulating film, and this silicon thin film is used. It is also possible to form a diode.
- FIG. 20 is a schematic view showing an example of a semiconductor light emitting device provided with a flip-chip type light emitting element obtained by the manufacturing method of the present invention.
- This semiconductor light emitting device is similar to the device of FIG. 13, but the submount element 2 in the following embodiments does not necessarily need to be an element exhibiting an electrostatic protection function.
- the submount element 2 when the circuit shown in FIG. 2 is configured using an Si diode element as the submount element 2, as described above, the submount element 2 functions as an electrostatic protection element and protects against a high voltage such as static electricity. Can be demonstrated.
- the submount element 2 in FIG. 20 played a role in facilitating the connection between the lead frames 13a and 13b and the light emitting element. It is not always necessary to have a structure such as a diode if it is
- the submount element 2 and the LED element 1 are mounted on the mount section 15 of the lead frame 13a in a state of being superimposed.
- the LED element 1 is arranged face-down so that the rear surface of the translucent substrate 1a faces upward, and the P-side electrodes 5 and n formed on the p-type semiconductor region and the n-type semiconductor region of the LED element 1
- the side electrode 6 faces downward.
- the back surface of the translucent substrate 1a functions as a light extraction surface, and light emitted from the element 1 is radiated from the back surface of the translucent substrate 1a with high efficiency.
- a back electrode 9 is formed on the lower surface of the submount element 2.
- the back electrode 9 is electrically connected to the mount 15 via the conductive paste 14.
- electrodes 7 and 8 are formed on the upper surface of the submount element 2, and face the n-side electrode 6 and the p-side electrode 5 of the semiconductor light emitting element 1, respectively.
- the n-side electrode 6 and the p-side electrode 5 of the LED element 1 and the electrodes 7 and 8 of the submount element 2 facing these are connected to each other via micro bumps 11 and 12.
- a bonding pad portion 10 is formed on the surface of the electrode 7 of the submount element 2.
- the bonding pad 10 is connected to the lead frame 13b via a wire 17.
- These elements 1 and 2 are molded with a translucent resin 18.
- the semiconductor light emitting element is electrically connected to the submount element via the microbump. Connect Z physically.
- the electrodes of both elements are brought into contact with each other, a gap corresponding to the height of the microphone opening bump is formed between the two elements. Therefore, the two elements do not come into contact with each other at a portion other than the micro-bump, so that a short-circuit failure at the time of energization can be eliminated, and a manufacturing method with a high yield can be provided.
- the microbumps may be crushed to some extent depending on the connection method.
- the gap between the elements becomes smaller. Therefore, it is preferable that the height of the microbump is formed higher in consideration of this.
- the preferred height of the microbump is about 20 to 50; m.
- Microbump materials are broadly divided into solder and Au-based materials. Either solder or Au-based material may be used for the material of the micro-mouth bump of the present invention, but Au-based material is more preferably used than solder. The reason is that, when Au-based material is used, (1) the area of the electrode on which the micro-bump is formed can be reduced, (2) the micro-bump formation method is simple, and (3) the This has the advantage that the two elements can be joined relatively easily.
- Au-based microbumps can be formed by a stud bump method or a plating method.
- the stud bump method first, the tip of one Au wire passing through the capillary is made spherical, and then the spherical part is pressed onto the electrode, and the spherical part is pressed on the electrode by ultrasonic waves and heat. Weld. After that, the Au bumps are pulled to cut the Au wire trunk, thereby forming micro bumps.
- the electrodes of the semiconductor light emitting element or the submount element are formed of Au or A1.
- the electrodes are formed from Au or A1
- the electrode area needs to be about 100 m or more in diameter.
- an additional plating step is required in the device forming process.
- a microbump is formed on a semiconductor light emitting element by a plating method.
- a semiconductor multilayer film is deposited on a semiconductor light emitting device substrate (sapphire nano), and a p-type semiconductor region and an n-type semiconductor region are formed there.
- an n-electrode in which a Ti layer and an Au layer are sequentially stacked on a part of the n-type semiconductor region is formed.
- an Ni layer and an Au layer are sequentially stacked on the entire surface of the wafer, and a photolithography process is used to form a region above a part of the n-electrode and a p-type semiconductor region.
- a resist film having an opening in a part of the region located above is formed, and Au-based plating is performed on the opening to form a micro bump having a height of about 15 to 30 m.
- the Ni and Au layers are removed by etching except for the n-electrode and the p-type semiconductor region where the microbumps are formed.
- the semiconductor light emitting device having the microbump formed thereon is completed.
- micro bumps are formed on the sub-mount element by plating
- the electrodes of the sub-mount element are made of Au-based material
- the micro opening bump can be formed in the same process as the above process.
- the electrode is formed from A1, it is necessary to form a barrier metal layer on the A1 electrode. This is similar to the method of forming microbumps on the A1 electrode of an integrated circuit device.
- this plating method has disadvantages such as an increase in the number of element manufacturing steps and necessity for an element inspection method, it is necessary to minimize the electrode area required for micro-bump formation.
- an electrode diameter of about 60 / m is sufficient to form a microbump 30 m in diameter and 20 m in height. Therefore, the element size can be reduced and the cost can be reduced.
- the position accuracy of the microbump formation is determined by the position accuracy in the photolithographic process, and therefore, is very good as compared with the case of the stud bump.
- Au microbumps formed on electrodes are welded to the opposing electrodes using heat, ultrasonic waves, and load.
- Second connection method Static bump bonding (SBB) method
- the conductive paste After transferring the conductive paste onto the microbumps, the conductive paste is brought into contact with the opposing electrodes to solidify the conductive paste. After that, the sealing resin is filled and the resin is solidified. It has the advantage of high reliability against external stress. Also, stress occurs during mounting. Hateful. Since inspection is possible before sealing, repair is easy.
- Anisotropic conductive sheet Connect using Z adhesive The advantage is that the number of processes is relatively small.
- Fourth connection method solder bonding method.
- a counter bump is formed by soldering on the electrode on the side facing the micro bump, and the solder is reflowed and joined. Fill with sealant and solidify. There is an advantage that the connection strength after reflow is strong.
- connection methods are suitable for surface-mounting an integrated circuit element having a large number of microphone opening bumps arranged at high density on a circuit board.
- these connection methods require a long time to complete the joining, and the productivity is relatively low.
- the first connection method is not suitable for mounting an integrated circuit element in which bumps are arranged at a high density because the micro bumps are crushed using heat, ultrasonic waves, and a load. It is preferable that two or three microbumps are present at an interval of 100 / m or more on the electrode of the LED element. The time required for implementing the first connection method is 0.
- an LED element manufacturing process is performed, and an LED expanding process is performed in step S1.
- the LED expansion process is the final stage of the wafer-level manufacturing process This is the process of obtaining the LED elements 1 separated from the wafer in units of chips on the floor.
- the LED element 1 shown in FIGS. 31A and 31B is used as a semiconductor light emitting element.
- the LED element 1 is manufactured, for example, as described below.
- a GaN buffer layer 31, an n-type GaN layer 32, an InGaN active layer 33, a p-type AlGaN layer 34, and a p-type GaN layer 35 are formed on the sapphire substrate 1a in this order. Laminate from the side. Thus, a semiconductor laminated structure including a double hetero structure is formed on the sapphire substrate 1a.
- a structure having a shape as shown in FIGS. 31A and 31B can be obtained.
- the upper surface of the n-type GaN layer 32 is processed into a stepped shape including a lower part and an upper part.
- the InGaN active layer 33, the p-type A1 GaN layer 34 and the p-type GaN layer 35 are left without being etched.
- a p-side electrode 5 made of Ni and Au is formed on the upper surface of the p-type GaN layer 35, and an n-electrode 6 made of Ti and Au is formed on the lower part of the upper surface of the n-type GaN layer 32. Formed in the part.
- the stud bump 11 is formed on the n-side electrode 6, and the stud bumps 12a and 12b are formed! ) Formed on the side electrode 5.
- the formation of the stud bumps 11, 12a and 12b is performed by the above-described stud bump method.
- Each of the above steps is performed so that a plurality of LED elements 1 are simultaneously formed on the sapphire substrate 1a using the wafer-like sapphire substrate 1a. Therefore, a plurality of LED elements 1 as shown are formed on a wafer-like sapphire substrate 1a.
- the wafer-like sapphire substrate is formed before the stud bump is formed.
- the sapphire substrate 1a faces the sheet with the microphone opening bumps of the LED element 1 facing downward, and the LED elements 1 on the sapphire substrate 1a form the sheet. Attach. Next, the sapphire substrate 1a is scribed and broken. Then, each LED element 1 is separated in the horizontal direction by stretching the sheet in the horizontal direction (about the LED expander).
- a chip bonding step of step S3 is executed. Specifically, first, a wafer (silicon wafer) in which a plurality of Si diode elements 2 are arranged in a matrix is prepared. An LED element 1 is arranged for each Si diode element 2 in this wafer.
- FIG. 27 schematically shows the relationship between the silicon wafer 90, the £ 0 element 1, and the jig 100 for transporting the LED element 1 in the chip bonding step.
- the LED element 1 is placed on the wafer 90 including the Si diode element 2 so that the surface on which the micro bumps of the LED element 1 are formed faces downward. Get closer. Thereafter, the micro bumps of LED element 1 are aligned with electrodes 7 and 8 of Si diode element 2 (not shown in FIG. 27), and micro bumps 11, 12a and 12b are brought into contact with electrodes 7 and 8. While applying heat, ultrasonic waves and loads. This is the first connection method described above. In this way, the LED element 1 is bonded onto the Si diode element 2 via the micro opening bump by welding the micro bumps to the electrodes 7 and 8.
- the LED element 1 is electrically / physical fixed to the Si diode element 2 via the micro bumps (chip bonding step).
- Chip bonding is short, and LED element recognition, transportation, alignment, and bonding can be performed in less than about 3 seconds. The accuracy of this alignment is less than 15 m.
- LED element 1 and Si die There is a gap of 20 m between the diode element 2 and short-circuit failure hardly occurs.
- FIG. 28 schematically shows the relationship between the wafer 90 and the dicing blade 101 in the dicing step.
- Fig. 21 After transferring the integrated structure to the tray in the transfer process of step S5 in step 1, the integrated structure is transferred to the lead frame in the die bonding process (DZB process) in step S6. 5 Place on ⁇ Fix. At this time, the back electrode 9 of the Si diode element 2 is opposed to the mount section 15 via the conductive paste 14, thereby electrically connecting the back electrode 9 of the Si diode element 2 and the mount section 15 to each other. Connect physically.
- step S7 the bonding pad portion 10 of the Si diode element 2 and the other lead frame 13b are connected by the wire 17. Thereafter, the components at the upper end of the lead frame are molded with the translucent resin 18 to obtain the semiconductor light emitting device of FIG.
- the micro bump is formed on the electrode on the LED element side by the stud bump method, and then the chipped LED element is joined to the wafer-shaped Si diode element.
- micro bump is formed on the electrode on the LED element side by the bump method, and the chip connection between the LED element and the Si diode element is formed by the first connection method described above. To do on the mount is there.
- the LED elements 1 are classified into the luminance rank and the wavelength rank in the rank classification step in step S12.
- the wafer is attached to the sheet such that the back electrode 9 of the wafer including the Si diode element 2 faces the sheet.
- each chip is separated from the wafer in step S14, and the sheet is stretched in the horizontal direction (a zener expanding process).
- step S15 the Si diode element 2 is arranged and fixed on the mounting portion 15 of the lead frame 13a (see FIG. 20). At this time, the back electrode 9 of the Si diode element 2 is opposed to the mount 15 via the conductive paste 14, thereby electrically and physically connecting the back electrode 9 of the Si diode element 2 and the mount 15. Connect (Zener DZB process).
- the LED element 1 is arranged for the Si diode element 2 on the mounting portion 15. More specifically, first, the LED element 1 is made to approach the Si diode element 2 such that the surface of the LED element 1 where the mic opening bump is formed faces downward. Then, align the microbumps of LED element 1 with electrodes 7 and 8 of Si diode element 2 and contact microbumps 11, 12 a and 12 b with electrodes 7 and 8 while applying heat, ultrasonic waves and Apply a load. In this way, the LED element 1 is bonded onto the Si diode element 2 via the micro opening bump by welding the micro bumps to the electrodes 7 and 8. By this bonding, the LED element 1 is electrically and physically fixed to the Si diode element 2 via the micro bumps.
- FIG. 29 shows the LED element 1 and the Si diode element 2 at this stage.
- step S7 the Si die
- a micro bump is formed on the electrode on the Si diode element side in a wafer state by a smooth bump method, and the chip bonding between the chipped LED element and the Si diode element in the wafer state is performed. Is performed by the first joining method.
- FIG. 30 schematically shows the relationship between the wafer 90 and the cavities 110 in the step of forming stud bumps.
- FIGS. 33A and 33B are a plan view and a cross-sectional view of the Si diode element 2 on which stud bumps are formed.
- the Si diode element 2 has a P-type semiconductor region 22 formed by selectively implanting impurity ions into an n-type silicon substrate 21 and has a reverse breakdown voltage of 10 It is set near V.
- a p-electrode 7 and an n-electrode 8 made of A 1 are formed, respectively.
- Stud bumps 11 and 12 are formed on p-side electrode 7 and n-side electrode 8, respectively. Part of the p-side electrode 7 functions as a bonding pad 10.
- a back electrode 9 made of Au is formed on the lower surface of the Si diode element 2.
- step S24 in FIG. 23 the chip bonding step of step S24 in FIG. 23 is performed. More specifically, rank-classified LED elements 1 are arranged for each Si diode element 2 in the wafer. More specifically, first, the surface on which the electrode of LED element 1 is formed faces downward. Then, the LED element 1 is brought closer to the wafer 90 (see FIG. 30) including the Si diode element 2 so as to face. After that, align the electrode of LED element 1 with the electrodes 7 and 8 of Si diode element 2 and bring the electrode of LED element 1 into contact with the bumps 11 and 12 on the Si diode element 2. Apply heat, ultrasonic and load. Thus, the LED element 1 is bonded onto the Si diode element 2 via the microbump by welding the microbumps 11 and 12 to the electrodes. By this bonding, the LED element 1 is electrically and physically fixed to the Si diode element 2 via the microbump (chip bonding step).
- step S25 to step S28 are executed by the same method as the method described in the thirteenth embodiment.
- micro bumps are formed on the electrodes on the Si diode element side in the wafer state by the stud bump method, and the chip bonding between the chipped LED element and the Si diode element is performed using a lead frame. On the mounting part using the first bonding method.
- step S31 the LED elements 1 are classified into a luminance rank and a wavelength rank in a step S32 rank classification step.
- step S33 stud bumps 11 and 12 are formed on the p-side electrode 7 and the n-side electrode 8 of each Si diode element 2 included in the wafer (FIG. 30). See).
- step S34 the wafer is attached to the sheet such that the back electrode 9 of the wafer including the Si diode element 2 faces the sheet.
- step S35 each chip is separated from the wafer in step S35, and the sheet is stretched in the lateral direction (tween-expand process).
- step S36 the Si diode element 2 is arranged and fixed on the mounting portion 15 of the lead frame 13a.
- the back electrode 9 of the Si diode element 2 is opposed to the mount section 15 via the conductive paste 14, thereby electrically connecting the back electrode 9 of the Si diode element 2 and the mount section 15 to each other. / Physically connect (Twina DZB process).
- the LED element 1 is arranged for the Si diode element 2 on the mounting portion 15. More specifically, first, the LED element 1 is brought closer to the Si diode element 2 so that the surface of the LED element 1 on which the electrodes are formed faces downward. Then, align the electrodes of LED element 1 with electrodes 7 and 8 of Si diode element 2 and apply heat, ultrasonic waves and load while contacting the electrodes of LED element 1 with microbumps 11 and 12. Add. Thus, the LED element 1 is bonded onto the Si diode element 2 via the microbump by welding the microbump to the electrode. By this bonding, the LED element 1 is electrically and physically fixed to the Si diode element 2 via the micro bump.
- step S37 the bonding pad portion 10 of the Si diode element 2 and the other lead frame 13b are connected by the wire 17.
- the semiconductor light emitting device of FIG. 20 is obtained.
- the micro bumps are formed on the electrodes of the LED element by the stud bump method.
- the micro bumps are formed on the electrode of the LED element by “Au plating”. Formed.
- the other points are the same as those of the thirteenth embodiment, and the detailed description is omitted.
- FIG. 32A and FIG. 32B are a plan view and a cross-sectional view, respectively, of the LED element 1 on which micro-bumps are formed by plating.
- the structure of the illustrated LED element 1 is the same as that of the LED element 1 shown in FIGS. 31A and 31B.
- the structure is essentially the same, except that the micro-bumps are Au-plated bumps, the protective film 39 is formed on the LED element surface, and the formation area of the n-electrode 6 is small. .
- the microbump is formed on the electrode of the LED element by the stud bump method.
- the microbump is plated with Au on the electrode of the LED element. It is formed by a method. The other points are the same as in the 14th embodiment, and a detailed description thereof will be omitted.
- FIG. 25 shows a flowchart of the present embodiment.
- the manufacturing method of the present embodiment includes a step of forming a microbump on an electrode of a Si diode element in a wafer state by Au plating. Except for this point, it is the same as the fifteenth embodiment. That is, the LED expanding step of step S41, the rank classification step of step S42, the plating bump forming step of step S43, the chip bonding step of step S44, the dicing step of step S45, The transfer process of step S46, the DZB process of step S47, and the WZB process of step S48 are sequentially performed.
- FIG. 26 shows a flowchart of the present embodiment.
- the manufacturing method of the present embodiment includes a step of forming a microbump on an electrode of a Si diode element in a wafer state by Au plating. Except for this point, it is the same as the sixteenth embodiment. That is, the LED expanding process of step S51, the rank classification process of step S52, the plating bump forming process of step S53, the dicing process of step S54, and the twin expanding process of step S55 , Step S 5 6 Zener D / B The process, the chip bonding process in step S57, and the W / B process in step S58 are sequentially performed.
- the sapphire substrate side is the main light extraction surface, so if the semiconductor light emitting device is formed on the wafer, the light extraction surface will be on the opposite side to the detector .
- the light extraction surface is on the opposite side of the detector, a certain amount of light leaks to the side where the electrodes are formed, and this can be detected by the detector, but the overall light quantity is insufficient. Therefore, the wavelength and brightness of light cannot be measured with high accuracy.
- an opening for extracting light is provided on the side where the electrode is formed. Increasing the amount of light can be considered as one effective means.
- micro bumps are formed as Si bumps on the Si diode elements in the wafer state, that is, on the electrodes on the sub-mount element side, and the semiconductor light-emitting elements chipped are bonded on the sub-mount element.
- Perform a characteristic inspection First, after performing the LED expanding process in step S61, in the stud bump forming process in step S62, the stud bumps are formed on the p-side electrode 7 and the n-side electrode 8 of each Si diode element 2 included in the wafer. 1 1 and 1 2 are formed.
- the chip bonding step of step S63 is performed.
- rank-sorted LED elements 1 are arranged. More specifically, first, the LED element 1 is made to approach the wafer including the Si diode element 2 so that the surface on which the electrode of the LED element 1 is formed faces downward. Then, align the electrodes of LED element 1 with electrodes 7 and 8 of Si diode element 2, and apply heat, ultrasonic waves and load while contacting the electrodes of LED element 1 with microbumps 11 and 12. . Thus, the LED element 1 is bonded onto the Si diode element 2 via the microbump by welding the microbumps 11 and 12 to the electrodes. By this bonding, the LED element 1 is electrically and physically fixed to the Si diode element 2 via the microbump (chip bonding step).
- the flip-chip type semiconductor light-emitting element 1 is integrated with the submount element 2 in a wafer state by chip bonding. At this time, the semiconductor light emitting element 1 is in a posture in which the sapphire substrate 1a faces upward.
- step S64 the wafer is placed on the stage of the prober, the probe needle is brought into contact with the bonding pad portion 10 of the submount element 2, and electricity is supplied between the stage and the probe needle.
- FIG. 35 shows the relationship between the wafer 90, the probe needle 103, and the photodetector 105 at this stage.
- the semiconductor light-emitting device 1 emits light by energization
- the upper surface of the sapphire substrate 1a becomes a light extraction surface having the highest light emission luminance.
- the amount of light in the direction of the detector 105 arranged above the wafer is also sufficient, and the wavelength and luminance can be measured with high accuracy. Since the half light emitting elements 1 integrated at a constant pitch are arranged on the wafer 90, the measurement can be performed efficiently.
- the wafer is attached to a die cylin- der sheet in step S65 of Fig. 34, and separated into chips by dicing using a dicing apparatus (see Fig. 28).
- step S66 the wavelength and the brightness are classified into ranks, and the integrated element is transferred to the tray.
- step S67 the integrated element is electrically connected to the mounting portion 15 of the lead frame 13a with the back surface electrode 9 of the submount element 2 facing downward through the conductive base 14. Secure while connecting (DZ B).
- step S68 the bonding pad portion 10 of the submount element 2 and the other lead frame 13b are connected by Au wire 17 (WZB), and finally, the sealing resin 18 is used.
- a light emitting device (FIG. 20) equipped with the flip-chip type semiconductor light emitting element 1 can be obtained.
- the stud bump is formed on the electrode side of the submount element 2.
- the optical characteristic test can be performed by the same method.
- the semiconductor light emitting element 1 has the electrodes mounted on the submount element 2 via the micro bumps 11 and 12, and the sapphire substrate 1 a is oriented upward. Therefore, in the optical characteristic inspection using a probe, the upper surface of the sapphire substrate 1a becomes the light extraction surface with the maximum emission luminance, the light quantity in the D direction becomes sufficient, and the emission wavelength and emission luminance are high. Can be measured with.
- the surface of the transparent substrate opposite to the surface on which the p-side and n-side electrodes are formed is formed on the submount element by bonding the electrodes via the micro bumps.
- the inspection target can be the one that has been bonded to the chip so that it faces upward. Therefore, in the inspection process of the optical characteristics by the detector, sufficient light can be obtained from the light extraction surface, so that the wavelength and luminance can be measured with high accuracy, and a high-quality light emitting element can be obtained.
- the light emitting elements integrated at a constant pitch on the wafer are formed so that the light extraction surface faces upward, the light wavelength and the light emission wavelength can be efficiently and accurately measured in the inspection process of the optical characteristics by the detector.
- the emission luminance can be measured, and the yield can be improved.
- the plurality of submount elements are arranged in a matrix.
- the p-side and n-side electrodes of the chip-shaped semiconductor light-emitting device are joined via microbumps while electrically conducting on the two independent electrodes of the submount device in the wafer state formed on the wafer.
- the optical characteristics inspection process and rank classification process are performed. According to this method, since the light emitting elements integrated at a constant pitch on the wafer are formed in a posture in which the light extraction surface faces upward, the optical characteristics, that is, the wavelength and the luminance, can be efficiently and accurately obtained. Measurement becomes possible.
- the submount element does not need to be in a wafer state, and the submount element may be formed into a chip. If the back surface of the transparent substrate of the light emitting element, that is, the light extraction surface with a large emission luminance faces the direction of the photodetector, and the light emitting element is bonded to the submount element via a microbump, light extraction Since sufficient light can be obtained from the surface, it is possible to measure wavelength and luminance with high accuracy.
- the use of the micro bumps eliminates the need for the bonding pad portion, thereby realizing miniaturization of the device and improvement in luminance.
- the semiconductor light emitting device of the present invention there is provided a highly reliable light emitting device having a semiconductor light emitting element provided on an insulating substrate and having a built-in destruction prevention function against application of a high voltage such as static electricity. .
- a semiconductor light emitting device of the present invention like a GaN LED element, a light emitting element having a P-type semiconductor region and an n-type semiconductor region formed on an insulating substrate
- an electrostatic protection element such as a diode element for bypassing both semiconductor regions and allowing a current to flow is connected in parallel.
- a highly reliable light emitting device having a function of preventing destruction due to static electricity or the like while being formed on an insulating substrate can be manufactured with high yield.
- the electrical connection state between the light emitting element and the electrostatic protection element and the condensing means of the light from the light emitting element it is possible to reduce the size of the light emitting device and to improve the light extraction efficiency. .
- the method for manufacturing a semiconductor light emitting device of the present invention includes a step of bonding a semiconductor light emitting element to a submount element in a state 8
- a semiconductor element such as a silicon diode may be used as the submount element. It will be easier.
- a plurality of semiconductor devices such as silicon diodes are simultaneously manufactured using a silicon wafer. The regular arrangement of the submount elements in a matrix in the wafer facilitates the chip bonding process.
- the electrodes of the semiconductor light emitting device When forming stud bumps on the semiconductor light emitting device side, the electrodes of the semiconductor light emitting device
- it is formed from Au or A1.
- it is formed from Au or A1.
- micro bumps can be formed only on non-defective devices after the inspection of the LED devices.
- each submount device integrated with the semiconductor light emitting device is separated from the wafer into chips by dicing or the like. Therefore, if the alignment accuracy for bonding is poor, the dicing blade may come into contact with the semiconductor light emitting element during dicing.
- the chip size can be reduced, It is possible to strike. Further, the positional accuracy of the step of forming the microbump may be compared with the positional accuracy of the step of forming the stud bump.
- the handling of the semiconductor light emitting element is facilitated by forming the stud bumps on the submount element.
- the present invention provides a flip chip using a submount element that enables a light emitting element that emits light by a semiconductor multilayer film formed on an insulating substrate to be miniaturized and that exhibits a function of protecting the light emitting element from electrostatic breakdown.
- a compact package having a structure can be realized.
- the present invention provides a high-luminance light-emitting device excellent in mass productivity in the field of light-emitting devices such as an LED lamp.
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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US09/155,420 US6333522B1 (en) | 1997-01-31 | 1997-12-26 | Light-emitting element, semiconductor light-emitting device, and manufacturing methods therefor |
EP97950445A EP0921577A4 (en) | 1997-01-31 | 1997-12-26 | ELECTROLUMINESCENT ELEMENT, SEMICONDUCTOR ELECTROLUMINESCENT DEVICE, AND PROCESS FOR PRODUCING THE SAME |
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JP9/18782 | 1997-01-31 | ||
JP1878297 | 1997-01-31 | ||
JP2112497 | 1997-02-04 | ||
JP9/21124 | 1997-02-04 | ||
JP9/302473 | 1997-11-05 | ||
JP30247397 | 1997-11-05 |
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US09/155,420 A-371-Of-International US6333522B1 (en) | 1997-01-31 | 1997-12-26 | Light-emitting element, semiconductor light-emitting device, and manufacturing methods therefor |
US55757300A Division | 1997-01-31 | 2000-04-21 | |
US09/984,148 Continuation US6597019B2 (en) | 1997-01-31 | 2001-10-29 | Semiconductor light-emitting device comprising an electrostatic protection element |
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WO1998034285A1 true WO1998034285A1 (fr) | 1998-08-06 |
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US (3) | US6333522B1 (ja) |
EP (2) | EP0921577A4 (ja) |
JP (2) | JP4459433B2 (ja) |
CN (1) | CN1300859C (ja) |
TW (1) | TW374958B (ja) |
WO (1) | WO1998034285A1 (ja) |
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KR100686416B1 (ko) * | 1999-01-11 | 2007-02-23 | 마츠시타 덴끼 산교 가부시키가이샤 | 복합 발광소자, 반도체 발광장치 및 반도체 발광장치의제조방법 |
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Also Published As
Publication number | Publication date |
---|---|
CN1300859C (zh) | 2007-02-14 |
US6333522B1 (en) | 2001-12-25 |
EP0921577A4 (en) | 2007-10-31 |
US6597019B2 (en) | 2003-07-22 |
US20020024053A1 (en) | 2002-02-28 |
US20020081773A1 (en) | 2002-06-27 |
EP1959506A2 (en) | 2008-08-20 |
JP2001230448A (ja) | 2001-08-24 |
TW374958B (en) | 1999-11-21 |
JP4459433B2 (ja) | 2010-04-28 |
US6642072B2 (en) | 2003-11-04 |
CN1215503A (zh) | 1999-04-28 |
JP2009021643A (ja) | 2009-01-29 |
EP0921577A1 (en) | 1999-06-09 |
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