TW374974B - Method of manufacturing compound wiring substrates, flexible substrates, semiconductor devices and compound wiring substrates - Google Patents

Method of manufacturing compound wiring substrates, flexible substrates, semiconductor devices and compound wiring substrates

Info

Publication number
TW374974B
TW374974B TW087108534A TW87108534A TW374974B TW 374974 B TW374974 B TW 374974B TW 087108534 A TW087108534 A TW 087108534A TW 87108534 A TW87108534 A TW 87108534A TW 374974 B TW374974 B TW 374974B
Authority
TW
Taiwan
Prior art keywords
substrates
insulation layer
compound wiring
wiring substrates
lane
Prior art date
Application number
TW087108534A
Other languages
English (en)
Inventor
Chiaki Takubo
Yoshizumi Sato
Tomitsugu Kojima
Takeshi Takeda
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of TW374974B publication Critical patent/TW374974B/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01087—Francium [Fr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06—Thermal details
    • H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1189—Pressing leads, bumps or a die through an insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4647—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer around previously made via studs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW087108534A 1997-06-03 1998-06-01 Method of manufacturing compound wiring substrates, flexible substrates, semiconductor devices and compound wiring substrates TW374974B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP14545297 1997-06-03
JP34562697A JP3961092B2 (ja) 1997-06-03 1997-12-15 複合配線基板、フレキシブル基板、半導体装置、および複合配線基板の製造方法

Publications (1)

Publication Number Publication Date
TW374974B true TW374974B (en) 1999-11-21

Family

ID=26476558

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087108534A TW374974B (en) 1997-06-03 1998-06-01 Method of manufacturing compound wiring substrates, flexible substrates, semiconductor devices and compound wiring substrates

Country Status (6)

Country Link
US (2) US6329610B1 (zh)
JP (1) JP3961092B2 (zh)
KR (1) KR19990006770A (zh)
MY (1) MY120988A (zh)
SG (1) SG77181A1 (zh)
TW (1) TW374974B (zh)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI506748B (zh) * 2012-06-20 2015-11-01 Zhen Ding Technology Co Ltd 封裝基板、其製作方法及封裝結構
TWI667865B (zh) * 2014-05-07 2019-08-01 易鼎股份有限公司 Flexible circuit board line lap structure
TWI700809B (zh) * 2011-03-16 2020-08-01 日商東芝記憶體股份有限公司 半導體裝置

Families Citing this family (163)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6703565B1 (en) * 1996-09-06 2004-03-09 Matsushita Electric Industrial Co., Ltd. Printed wiring board
US6565954B2 (en) 1998-05-14 2003-05-20 Matsushita Electric Industrial Co., Ltd. Circuit board and method of manufacturing the same
SG86345A1 (en) 1998-05-14 2002-02-19 Matsushita Electric Ind Co Ltd Circuit board and method of manufacturing the same
JP2001015920A (ja) * 1999-06-30 2001-01-19 Toshiba Corp 多層プリント配線板及びその製造方法
JP2001185653A (ja) * 1999-10-12 2001-07-06 Fujitsu Ltd 半導体装置及び基板の製造方法
US20020003049A1 (en) * 1999-12-29 2002-01-10 Sanjay Dabral Inline and "Y" input-output bus topology
JP2001217514A (ja) * 2000-02-03 2001-08-10 Denso Corp 多層配線基板
US6404059B1 (en) * 2000-02-08 2002-06-11 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a mounting structure and fabrication method thereof
JP2001284783A (ja) * 2000-03-30 2001-10-12 Shinko Electric Ind Co Ltd 表面実装用基板及び表面実装構造
JP2001284813A (ja) 2000-03-31 2001-10-12 Mitsubishi Electric Corp 多層配線板の製造方法
US6596948B1 (en) * 2000-04-28 2003-07-22 Hewlett-Packard Development Company, L.P. Processor and power supply circuit
JP2001332859A (ja) * 2000-05-22 2001-11-30 Murata Mfg Co Ltd 積層型セラミック電子部品およびその製造方法ならびに電子装置
US6753483B2 (en) 2000-06-14 2004-06-22 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method of manufacturing the same
JP4895320B2 (ja) * 2000-07-10 2012-03-14 日立化成工業株式会社 光導波路デバイスの製造方法
US6518514B2 (en) * 2000-08-21 2003-02-11 Matsushita Electric Industrial Co., Ltd. Circuit board and production of the same
US6459046B1 (en) * 2000-08-28 2002-10-01 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method for producing the same
JP2008283226A (ja) * 2000-10-18 2008-11-20 Nec Corp 半導体装置搭載用配線基板およびその製造方法、並びに半導体パッケージ
US6930395B2 (en) * 2000-12-05 2005-08-16 Matsushita Electric Industrial Co., Ltd. Circuit substrate having improved connection reliability and a method for manufacturing the same
JP3867523B2 (ja) * 2000-12-26 2007-01-10 株式会社デンソー プリント基板およびその製造方法
JP2002232135A (ja) * 2001-01-30 2002-08-16 Matsushita Electric Ind Co Ltd 積層用両面回路基板とその製造方法及びそれを用いた多層プリント配線板
KR100869013B1 (ko) * 2001-02-08 2008-11-17 가부시키가이샤 히타치세이사쿠쇼 반도체 집적회로장치 및 그 제조방법
JP2001298274A (ja) * 2001-03-13 2001-10-26 Matsushita Electric Ind Co Ltd 電子回路構成体
DE60234281D1 (de) 2001-03-14 2009-12-17 Ibiden Co Ltd Mehrschichtige Leiterplatte
JP2002290030A (ja) * 2001-03-23 2002-10-04 Ngk Spark Plug Co Ltd 配線基板
JP2002299512A (ja) * 2001-03-30 2002-10-11 Nec Corp 半導体装置及びその製造方法
US6753612B2 (en) * 2001-04-05 2004-06-22 International Business Machines Corporation Economical high density chip carrier
US20020180029A1 (en) * 2001-04-25 2002-12-05 Hideki Higashitani Semiconductor device with intermediate connector
JP4092890B2 (ja) * 2001-05-31 2008-05-28 株式会社日立製作所 マルチチップモジュール
US6800947B2 (en) * 2001-06-27 2004-10-05 Intel Corporation Flexible tape electronics packaging
US6927471B2 (en) * 2001-09-07 2005-08-09 Peter C. Salmon Electronic system modules and method of fabrication
US7297572B2 (en) * 2001-09-07 2007-11-20 Hynix Semiconductor, Inc. Fabrication method for electronic system modules
JP2003124312A (ja) * 2001-10-15 2003-04-25 Seiko Epson Corp 半導体装置およびその製造方法
JP2003209366A (ja) * 2002-01-15 2003-07-25 Sony Corp フレキシブル多層配線基板およびその製造方法
JP3998984B2 (ja) 2002-01-18 2007-10-31 富士通株式会社 回路基板及びその製造方法
JP4045143B2 (ja) * 2002-02-18 2008-02-13 テセラ・インターコネクト・マテリアルズ，インコーポレイテッド 配線膜間接続用部材の製造方法及び多層配線基板の製造方法
JP2003264253A (ja) * 2002-03-12 2003-09-19 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
US6734776B2 (en) * 2002-03-13 2004-05-11 Ford Global Technologies, Llc Flex circuit relay
US6812576B1 (en) * 2002-05-14 2004-11-02 Applied Micro Circuits Corporation Fanned out interconnect via structure for electronic package substrates
DE60314868T2 (de) * 2002-05-23 2008-03-13 International Business Machines Corp. Verbesserte struktur gestapelter kontaktlöcher in mehrschichtigen elektronischen bauelementeträgern
JP4291615B2 (ja) * 2002-05-28 2009-07-08 株式会社巴川製紙所 光学素子ウエハ及びその製造方法、光学素子の製造方法
US6911726B2 (en) * 2002-06-07 2005-06-28 Intel Corporation Microelectronic packaging and methods for thermally protecting package interconnects and components
JP4022180B2 (ja) * 2002-07-11 2007-12-12 大日本印刷株式会社 多層配線基板の製造方法
WO2004016054A1 (ja) * 2002-08-07 2004-02-19 Denso Corporation 配線基板および配線基板の接続構造
JP4488684B2 (ja) 2002-08-09 2010-06-23 イビデン株式会社 多層プリント配線板
US6762367B2 (en) * 2002-09-17 2004-07-13 International Business Machines Corporation Electronic package having high density signal wires with low resistance
US6603201B1 (en) * 2002-10-23 2003-08-05 Lsi Logic Corporation Electronic substrate
CN1301048C (zh) * 2003-03-03 2007-02-14 精工爱普生株式会社 配线基板的制造方法
JP4289146B2 (ja) * 2003-03-27 2009-07-01 セイコーエプソン株式会社 三次元実装型半導体装置の製造方法
TW200507218A (en) * 2003-03-31 2005-02-16 North Corp Layout circuit substrate, manufacturing method of layout circuit substrate, and circuit module
JPWO2004091268A1 (ja) * 2003-04-07 2006-07-06 イビデン株式会社 多層プリント配線板
WO2004093508A1 (ja) * 2003-04-18 2004-10-28 Ibiden Co., Ltd. フレックスリジッド配線板
WO2004103039A1 (ja) * 2003-05-19 2004-11-25 Dai Nippon Printing Co., Ltd. 両面配線基板および両面配線基板の製造方法並びに多層配線基板
JP4389471B2 (ja) * 2003-05-19 2009-12-24 パナソニック株式会社 電子回路の接続構造とその接続方法
US6954987B2 (en) * 2003-05-22 2005-10-18 Powerwave Technologies, Inc. Method of interconnecting a circuit board to a substrate
US20070013041A1 (en) * 2003-06-02 2007-01-18 Satoru Ishigaki Flexible wiring board and flex-rigid wiring board
US20050003650A1 (en) * 2003-07-02 2005-01-06 Shriram Ramanathan Three-dimensional stacked substrate arrangements
US7202155B2 (en) * 2003-08-15 2007-04-10 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing wiring and method for manufacturing semiconductor device
US7223924B2 (en) * 2003-09-23 2007-05-29 Avago Technologies General Ip (Singapore) Pte. Ltd. Via placement for layer transitions in flexible circuits with high density ball grid arrays
US7402758B2 (en) * 2003-10-09 2008-07-22 Qualcomm Incorporated Telescoping blind via in three-layer core
US20050104374A1 (en) * 2003-11-17 2005-05-19 Steur Gunnar V.D. Pull-out resistant compression fitting for fluid lines
JP4042785B2 (ja) 2004-02-13 2008-02-06 株式会社村田製作所 電子部品及びその製造方法
JP4298559B2 (ja) * 2004-03-29 2009-07-22 新光電気工業株式会社 電子部品実装構造及びその製造方法
JP2005322878A (ja) * 2004-04-09 2005-11-17 Dainippon Printing Co Ltd 印刷配線基板の組付パネル、印刷配線基板の実装用単位シート、リジッド−フレキシブル基板及びこれらの製造方法
US20050265650A1 (en) * 2004-05-27 2005-12-01 Sunil Priyadarshi Small profile, pluggable optical transceiver subassembly
JP4536430B2 (ja) 2004-06-10 2010-09-01 イビデン株式会社 フレックスリジッド配線板
WO2005122657A1 (ja) * 2004-06-11 2005-12-22 Ibiden Co., Ltd. フレックスリジッド配線板とその製造方法
DE102004031878B3 (de) * 2004-07-01 2005-10-06 Epcos Ag Elektrisches Mehrschichtbauelement mit zuverlässigem Lötkontakt
JP2006066458A (ja) * 2004-08-24 2006-03-09 Sharp Corp 多層プリント配線板及び多層プリント配線板の製造方法
JP2006073593A (ja) * 2004-08-31 2006-03-16 Toshiba Corp 配線基板とそれを用いた半導体装置
KR100691319B1 (ko) * 2004-09-15 2007-03-12 엘지.필립스 엘시디 주식회사 유기 박막 트랜지스터 및 그의 제조 방법
US7289336B2 (en) * 2004-10-28 2007-10-30 General Electric Company Electronic packaging and method of making the same
KR100594299B1 (ko) * 2004-10-29 2006-06-30 삼성전자주식회사 유연성 인쇄 회로 및 이것이 구비된 하드 디스크 드라이브
JP4608297B2 (ja) * 2004-12-06 2011-01-12 インターナショナル・ビジネス・マシーンズ・コーポレーション 積層配線基板の製造方法
US7745912B2 (en) * 2005-03-25 2010-06-29 Intel Corporation Stress absorption layer and cylinder solder joint method and apparatus
DE102005046280B4 (de) 2005-09-27 2007-11-08 Infineon Technologies Ag Halbleiterbauteil mit einem Halbleiterchip sowie Verfahren zur Herstellung desselben
JP4829585B2 (ja) * 2005-10-12 2011-12-07 日本電気株式会社 配線基板及び半導体装置
JP4923510B2 (ja) * 2005-10-19 2012-04-25 大日本印刷株式会社 リジッド−フレキシブル基板及びその製造方法
JP4892924B2 (ja) * 2005-10-21 2012-03-07 パナソニック株式会社 多層プリント配線基板及びその製造方法
US7718904B2 (en) * 2005-11-15 2010-05-18 Intel Corporation Enhancing shock resistance in semiconductor packages
JP4183199B2 (ja) 2005-12-28 2008-11-19 インターナショナル・ビジネス・マシーンズ・コーポレーション 半導体パッケージ及びその製造方法
KR100744994B1 (ko) * 2006-01-25 2007-08-02 삼성전기주식회사 다층 인쇄회로기판 및 그 제조방법
JP4934325B2 (ja) * 2006-02-17 2012-05-16 株式会社フジクラ プリント配線板の接続構造及びプリント配線板の接続方法
CN101449374B (zh) * 2006-06-08 2011-11-09 国际商业机器公司 高热传导性柔软片及其制造方法
CN101480114A (zh) * 2006-07-05 2009-07-08 富士通株式会社 印刷基板和印刷基板单元以及电子设备
JP4935217B2 (ja) * 2006-07-18 2012-05-23 富士通株式会社 多層配線基板
JP2008041995A (ja) * 2006-08-08 2008-02-21 Yazaki Corp プリント配線基板及びプリント配線基板の製造方法
US20080036097A1 (en) * 2006-08-10 2008-02-14 Teppei Ito Semiconductor package, method of production thereof and encapsulation resin
JP5078500B2 (ja) * 2006-08-30 2012-11-21 三洋電機株式会社 素子搭載用基板、半導体モジュールおよび携帯機器
JP2008071812A (ja) * 2006-09-12 2008-03-27 Fujikura Ltd 基板間接続構造
JP2008109094A (ja) * 2006-09-29 2008-05-08 Sanyo Electric Co Ltd 素子搭載用基板および半導体モジュール
JP4926676B2 (ja) * 2006-12-04 2012-05-09 日本メクトロン株式会社 多層プリント配線板の製造方法
JP4277233B2 (ja) * 2007-01-18 2009-06-10 セイコーエプソン株式会社 配線基板の製造方法
KR100837281B1 (ko) * 2007-05-23 2008-06-11 삼성전자주식회사 반도체 소자 패키지 및 그 제조 방법
DE102008007216A1 (de) * 2007-05-29 2008-12-11 Samsung Electro - Mechanics Co., Ltd., Suwon Gedruckte Leiterplatte und Herstellungsverfahren derselben
TWI375999B (en) * 2007-06-07 2012-11-01 Advanced Semiconductor Eng Substrate with bumps process and structure
KR20080111701A (ko) * 2007-06-19 2008-12-24 삼성전기주식회사 실장기판 및 그 제조방법
US8440916B2 (en) * 2007-06-28 2013-05-14 Intel Corporation Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method
KR20090003880A (ko) * 2007-07-05 2009-01-12 삼성전기주식회사 매립패턴 기판 및 그 제조 방법
US8193092B2 (en) 2007-07-31 2012-06-05 Micron Technology, Inc. Semiconductor devices including a through-substrate conductive member with an exposed end and methods of manufacturing such semiconductor devices
TWI358981B (en) * 2007-08-08 2012-02-21 Unimicron Technology Corp Method for fabricating circuit board
CN101785373B (zh) * 2007-08-24 2012-03-28 住友电木株式会社 多层布线基板以及半导体装置
US8238114B2 (en) * 2007-09-20 2012-08-07 Ibiden Co., Ltd. Printed wiring board and method for manufacturing same
KR100866577B1 (ko) * 2007-09-28 2008-11-03 삼성전기주식회사 인쇄회로기판의 층간 도통방법
KR100867150B1 (ko) 2007-09-28 2008-11-06 삼성전기주식회사 칩 캐패시터가 내장된 인쇄회로기판 및 칩 캐패시터의 내장방법
JP5289880B2 (ja) * 2007-10-12 2013-09-11 新光電気工業株式会社 配線基板
KR20090067249A (ko) * 2007-12-21 2009-06-25 삼성전기주식회사 인쇄회로기판 및 그 제조방법
TWI352412B (en) * 2008-03-03 2011-11-11 Advanced Semiconductor Eng Multi-chip package structure and method of fabrica
JP5150518B2 (ja) * 2008-03-25 2013-02-20 パナソニック株式会社 半導体装置および多層配線基板ならびにそれらの製造方法
JP2009252942A (ja) * 2008-04-04 2009-10-29 Dainippon Printing Co Ltd 部品内蔵配線板、部品内蔵配線板の製造方法
US7919851B2 (en) * 2008-06-05 2011-04-05 Powertech Technology Inc. Laminate substrate and semiconductor package utilizing the substrate
KR100962369B1 (ko) * 2008-06-26 2010-06-10 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US20100047540A1 (en) * 2008-08-21 2010-02-25 National University Corporation Chiba University Actuator using a multilayer composite material
KR101013555B1 (ko) * 2008-10-09 2011-02-14 주식회사 하이닉스반도체 반도체 패키지 및 이의 제조 방법
KR101015780B1 (ko) * 2008-12-19 2011-02-18 주식회사 심텍 미세 패턴을 포함하는 인쇄회로기판 및 그 제조 방법
JP4473935B1 (ja) * 2009-07-06 2010-06-02 新光電気工業株式会社 多層配線基板
KR101067199B1 (ko) * 2009-07-07 2011-09-22 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US9136286B2 (en) * 2009-08-07 2015-09-15 Semiconductor Energy Laboratory Co., Ltd. Display panel and electronic book
CN102045939B (zh) * 2009-10-19 2014-04-30 巨擘科技股份有限公司 柔性多层基板的金属层结构及其制造方法
US8207453B2 (en) * 2009-12-17 2012-06-26 Intel Corporation Glass core substrate for integrated circuit devices and methods of making the same
US9420707B2 (en) 2009-12-17 2016-08-16 Intel Corporation Substrate for integrated circuit devices including multi-layer glass core and methods of making the same
JP5450885B2 (ja) * 2010-04-02 2014-03-26 インクテック カンパニー リミテッド 両面プリント回路基板の製造方法
KR20110113980A (ko) * 2010-04-12 2011-10-19 삼성전자주식회사 필름을 포함한 다층 인쇄회로기판 및 그 제조 방법
US8759691B2 (en) * 2010-07-09 2014-06-24 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
US8946904B2 (en) * 2010-08-27 2015-02-03 Avago Technologies General Ip (Singapore) Pte. Ltd. Substrate vias for heat removal from semiconductor die
TW201247051A (en) * 2010-12-08 2012-11-16 Samsung Electro Mech Via structure, method for forming the via structure, and circuit board with the via structure and method for manufacturing the circuit board
US8693203B2 (en) * 2011-01-14 2014-04-08 Harris Corporation Method of making an electronic device having a liquid crystal polymer solder mask laminated to an interconnect layer stack and related devices
US10204879B2 (en) 2011-01-21 2019-02-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming wafer-level interconnect structures with advanced dielectric characteristics
US8492203B2 (en) * 2011-01-21 2013-07-23 Stats Chippac, Ltd. Semiconductor device and method for forming semiconductor package having build-up interconnect structure over semiconductor die with different CTE insulating layers
JP5825897B2 (ja) * 2011-07-20 2015-12-02 新日鉄住金マテリアルズ株式会社 絶縁膜被覆金属箔
JP2013046054A (ja) * 2011-08-23 2013-03-04 Samsung Electro-Mechanics Co Ltd 半導体パッケージ基板及び半導体パッケージ基板の製造方法
US20130048355A1 (en) * 2011-08-30 2013-02-28 Ibiden Co., Ltd. Printed wiring board
US9093164B2 (en) * 2011-11-17 2015-07-28 International Business Machines Corporation Redundant via structure for metal fuse applications
US9040837B2 (en) * 2011-12-14 2015-05-26 Ibiden Co., Ltd. Wiring board and method for manufacturing the same
US9445496B2 (en) 2012-03-07 2016-09-13 Intel Corporation Glass clad microelectronic substrate
KR101382811B1 (ko) 2012-03-14 2014-04-08 엘지이노텍 주식회사 인쇄회로기판 및 그의 제조 방법
US9001520B2 (en) 2012-09-24 2015-04-07 Intel Corporation Microelectronic structures having laminated or embedded glass routing structures for high density packaging
CN103687339B (zh) * 2012-09-26 2017-03-01 碁鼎科技秦皇岛有限公司 电路板及其制作方法
JP2014154800A (ja) * 2013-02-13 2014-08-25 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
US9275925B2 (en) * 2013-03-12 2016-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for an improved interconnect structure
KR20140134479A (ko) * 2013-05-14 2014-11-24 삼성전기주식회사 인쇄회로기판
US20150101846A1 (en) * 2013-10-14 2015-04-16 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method of manufacturing the same
JP5733378B2 (ja) * 2013-12-03 2015-06-10 大日本印刷株式会社 部品内蔵配線板、部品内蔵配線板の製造方法
WO2015166588A1 (ja) * 2014-05-02 2015-11-05 株式会社メイコー 部品内蔵リジッドフレックス基板
DE102014210895A1 (de) * 2014-06-06 2015-12-17 Continental Automotive Gmbh Mehrlagige Leiterplatte und Verfahren zu dessen Herstellung
US9699921B2 (en) * 2014-08-01 2017-07-04 Fujikura Ltd. Multi-layer wiring board
US9818682B2 (en) * 2014-12-03 2017-11-14 International Business Machines Corporation Laminate substrates having radial cut metallic planes
KR101678162B1 (ko) * 2015-07-01 2016-11-21 서울대학교산학협력단 유연성 소자용 접속 구조물 및 이의 제조 방법
US10952320B2 (en) * 2016-03-24 2021-03-16 Kyocera Corporation Printed wiring board and method for manufacturing same
DE102016219732A1 (de) 2016-10-11 2018-04-12 Continental Automotive Gmbh Verfahren zur Herstellung einer mehrlagigen Leiterplatte
EP3322267A1 (en) * 2016-11-10 2018-05-16 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with adhesion promoting shape of wiring structure
US10622340B2 (en) * 2016-11-21 2020-04-14 Samsung Electronics Co., Ltd. Semiconductor package
US10204889B2 (en) 2016-11-28 2019-02-12 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method of forming thereof
JP6819268B2 (ja) * 2016-12-15 2021-01-27 凸版印刷株式会社 配線基板、多層配線基板、及び配線基板の製造方法
CN107068845B (zh) * 2017-05-19 2024-03-19 深圳大道半导体有限公司 组合式半导体结构及灯具
US20190172775A1 (en) * 2017-12-04 2019-06-06 Canon Components, Inc. Flexible substrate and electronic device
AU2018385684B2 (en) 2017-12-14 2021-09-09 Veris Industries, Llc Electrical fault detection for a modular busway
WO2019130496A1 (ja) * 2017-12-27 2019-07-04 日立化成株式会社 積層体及びその製造方法
KR102577769B1 (ko) * 2018-12-13 2023-09-13 엘지이노텍 주식회사 인쇄회로기판 및 이를 포함하는 안테나 모듈
EP3709779A1 (en) * 2019-03-12 2020-09-16 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier and method of manufacturing the same
US11360130B2 (en) 2019-06-20 2022-06-14 Schneider Electric USA, Inc. Distributed electrical energy meter
US20220069489A1 (en) * 2020-08-28 2022-03-03 Unimicron Technology Corp. Circuit board structure and manufacturing method thereof
TWI807464B (zh) * 2020-11-06 2023-07-01 日商互應化學工業股份有限公司 印刷線路板及印刷線路板的製造方法
TWI752820B (zh) * 2021-02-08 2022-01-11 欣興電子股份有限公司 電路板結構及其製作方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8312892D0 (en) * 1983-05-11 1983-06-15 Raychem Ltd Electrical insulator
JPH01206575A (ja) * 1988-02-15 1989-08-18 Shin Etsu Polymer Co Ltd 接着性熱融着形コネクタ
US5260170A (en) * 1990-01-08 1993-11-09 Motorola, Inc. Dielectric layered sequentially processed circuit board
JP2996510B2 (ja) * 1990-11-30 2000-01-11 株式会社日立製作所 電子回路基板
JP3004071B2 (ja) * 1991-04-16 2000-01-31 日本特殊陶業株式会社 集積回路用パッケージ
US5473120A (en) * 1992-04-27 1995-12-05 Tokuyama Corporation Multilayer board and fabrication method thereof
US5483100A (en) 1992-06-02 1996-01-09 Amkor Electronics, Inc. Integrated circuit package with via interconnections formed in a substrate
US5466892A (en) * 1993-02-03 1995-11-14 Zycon Corporation Circuit boards including capacitive coupling for signal transmission and methods of use and manufacture
US5600103A (en) 1993-04-16 1997-02-04 Kabushiki Kaisha Toshiba Circuit devices and fabrication method of the same
US5468597A (en) * 1993-08-25 1995-11-21 Shipley Company, L.L.C. Selective metallization process
US5456004A (en) * 1994-01-04 1995-10-10 Dell Usa, L.P. Anisotropic interconnect methodology for cost effective manufacture of high density printed circuit boards
US5495665A (en) * 1994-11-04 1996-03-05 International Business Machines Corporation Process for providing a landless via connection
US5876842A (en) * 1995-06-07 1999-03-02 International Business Machines Corporation Modular circuit package having vertically aligned power and signal cores
JPH09116273A (ja) * 1995-08-11 1997-05-02 Shinko Electric Ind Co Ltd 多層回路基板及びその製造方法
JPH0964542A (ja) 1995-08-23 1997-03-07 Sony Corp 多層プリント配線板
EP0805614B1 (en) * 1995-11-17 2005-04-13 Kabushiki Kaisha Toshiba Multilayered wiring board, prefabricated material for multilayered wiring board, process of manufacturing multilayered wiring board, electronic parts package, and method for forming conductive pillar

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI700809B (zh) * 2011-03-16 2020-08-01 日商東芝記憶體股份有限公司 半導體裝置
TWI506748B (zh) * 2012-06-20 2015-11-01 Zhen Ding Technology Co Ltd 封裝基板、其製作方法及封裝結構
TWI667865B (zh) * 2014-05-07 2019-08-01 易鼎股份有限公司 Flexible circuit board line lap structure

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