KR960032693A - 반도체장치 및 그 본딩패드 구조 - Google Patents

반도체장치 및 그 본딩패드 구조 Download PDF

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Publication number
KR960032693A
KR960032693A KR1019960000257A KR19960000257A KR960032693A KR 960032693 A KR960032693 A KR 960032693A KR 1019960000257 A KR1019960000257 A KR 1019960000257A KR 19960000257 A KR19960000257 A KR 19960000257A KR 960032693 A KR960032693 A KR 960032693A
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South Korea
Prior art keywords
wiring
interlayer insulating
insulating layer
via hole
layer
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KR1019960000257A
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English (en)
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KR100213606B1 (ko
Inventor
노리아끼 후지끼
다까시 야마시따
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기따오까 다까시
미쯔비시덴끼 가부시끼사이샤
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Publication of KR960032693A publication Critical patent/KR960032693A/ko
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Publication of KR100213606B1 publication Critical patent/KR100213606B1/ko

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Abstract

적어도 2개의 배선층을 포함하는 반도체장치 특히, 그러한 반도체장치의 본딩패드 구조에 관한 것으로써, 반도체장치가 초음파를 사용해서 와이어 본딩이 실행되는 경우에도 크랙이 발생하지 않는 다층 배선구조를 갖도록 하기 위해, 적어도 제1, 제2배선층 및 배선층 사이에 배선층을 포함하는 다층배선 구조의 본딩패드부를 갖고, (a) 제1의 배선층은 슬릿부분을 포함하는 배선패턴을 가지며, (b) 층간 절연층은 상기 제1의 배선층상에 배치되고 배선패턴의 슬릿부분을 충전하며, 층간 절연층에 포함된 비아홀은 제1의 배선층 상에 배치되고, (c) 제2의 배선층은 층간 절연층상에 형성되어 비아홀을 통해 제1의 배선층과 전기적으로 접속되고, 반도체 장치의 외부와 전기적 입력 또는 출력을 위한 패드전극으로써 작용한다.
이것에 의해, 제1의 배선층의 재료의 양이 감소되거나 또는 제1의 배선층이 본딩영역 아래에 마련되지 않도록 설계되는 것에 의해 층간 절연층에 크랙이 발생하지 않아 제2의 배선층에 와이어를 충분히 강하게 접합시키므로 고신뢰성의 반도체 장치를 마련할 수 잇다.

Description

반도체장치 및 그 본딩 패드 구조
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 제1의 실시예의 반도체장치의 본딩패드부의 레이아웃패턴(상면)을 개략적으로 나타낸 도면.

Claims (14)

  1. 적어도 제1, 제2배선층 및 배선층 사이에서 배선층을 전기적으로 접속하기 위해 도전 성분으로 충전된적어도 하나의 비아홀을 구비한 적어도 하나의 층간 절연층을 포함하는 다층배선 구조의 본딩패드부를 갖는 반도체장치에 있어서, (a)제1의 배선층은 슬릿부분을 포함하는 배선패턴을 갖고, (b) 층간 절연층은 상기 제1의 배선층 상에 배치되고 배선패턴의 슬릿부분을 충전하며, 층간 절연층에 포함된 비아홀은 제1의 배선층상에 배치되며, (c) 제2의 배선층은 층간 절연층 상에 형성되어 비아홀을 통해 제1의 배선층과 전기적으로 접속되고, 반도체장치의 외부와 전기적 입력 또느 출력을 위한 패드전극으로써 작용하는 것을 특징으로 하는 반도체장치.
  2. 제1항에 있어서, 상기 비아홀은 층간 절연층을 관통해서 형성된 여러개의 관통구멍이고, 각각의 관통구멍의 기하학적 구조는 원기둥 또는 각기둥형 또는 수평으로 연장된 형태인 반도체장치.
  3. 제1항에 있어서, 상기 슬릿부분은 층간 절연층을 구성하는 전기적 절연성분으로 충전된 제1의 배선층을 관통하는 수평으로 연장된 여러개의 사각형 공간인 반도체장치.
  4. 적어도 제1, 제2배선층 및 배선층 사이에서 배선층을 전기적으로접속하기 위해 도전성분으로 충전된 적어도 하나의 비아홀을 구비한 적어도 하나의 층간 절연층을 포함하는 다층배선 구조의 본딩패드부를 갖는 반도체장치에 있어서, (a) 상기 제2의 배선층은 층간 절연층 상에 형성되고, 반도체장치의 외부와 전기적 입력 또는 출력을 위한 본딩영역을 갖는 패드전극으로써 작용하고, (b) 층간 절연층에 포함된 비아홀은 본딩영역외의 제2의배선층 아래에 배치되며, (c)제1의 배선층은 비아홀 아래에는 배선패턴을 갖고, 본딩영역 아래에 배선패턴을 갖지 않는 것을 특징으로 하는 반도체장치.
  5. 제4항에 있어서, 상기 비아홀은 층간 절연층을 관통해서 형성된 여러개의 관통구멍이고, 각각의 관통구멍의 기하학적 구조는 원기둥 또는 각기둥형이거나 또는 수평으로 연장된 형태인 반도체장치.
  6. 제4항에 있어서, 상기 비아홀은 제2의배선층의 에지부 아래에 형성된 반도체장치.
  7. 제4항에 있어서, 상기 제2의 배선층은 거의 사각형상이고, 상기 비아홀은 제2의 배선층의 4코너부아래에 형성된 반도체장치.
  8. 적어도 제1, 제2배선층 및 배선층 사이에서 배선층을 전기적으로 접속하기 위해 도전성분으로 충전된 적어도 하나의 비아홀을 구비한 적어도 하나의 층간 절연층을 포함하는 다층 배선배열의 본댕패드 구조에 있어서, (a) 제1의 배선층은 슬릿부분을 포함하는 배선패턴을 갖고, (b) 층간 절연층은 제1의 배선층 상에 배치되고 배선패턴의 슬릿부를 충전하고, 층간 절연층에 포함된 비아홀은 제1의 배선층 상에 배치되며, (c) 제2의 배선층은 층간 절연층에 형성되어 비아홀을 통해 제1의 배선층과 전기적으로 접속되고, 반도체장치의 외부와 전기적 입력 또는 출력을 위한 패드 전극으로써 작용하는 것을 특징으로 하는 본딩 패드 구조.
  9. 제8항에 있어서, 상기 비아홀은 층간절연층을 관통해서 형성된 여러개의 관통구멍이고, 각각의 관통구멍의 기하학적 구조는 원기둥 또는 각기둥형이거나 또는 수평으로 연장된 형식인 본딩 패드 구조.
  10. 제8항에 있어서, 상기 슬릿부분은 층간 절연층을 구성하는 전기적 절연 성분으로 충전된 제1의 배선층을 관통하는 수평으로 연장된 여러개의 사각형 공간인 본딩 패드 구조.
  11. 적어도 제1, 제2의 배선층 및 배선층 사이에서 배선층을 전기적으로접속하기 위해 도전성분으로 충전된 적어도 하나의 비아홀을 구비한 적어도 하나의 층간 절연층을 포함하는 다층배선 배열의본딩패드 구조에 있어서, (a) 상기 제2의 배선층은 층간 절연층 상에 형성되고, 반도체장치의 외부와 전기적 입력 도는 출력을 위한 본딩영역을 갖는 패드전극으로써 작용하고, (b) 층간 절연층에 포함된 비아홀은 본딩영역 외의 제2의 배선층 아래에 배치되며, (c) 제1의 배선층은 비아홀 아래에는 배선패턴을 갖고, 본딩영역 아래에는 배선패턴을 갖지않는 것을 특징으로 하는 본딩 패드 구조.
  12. 제11항에 있어서, 상기 비아홀은 층간 절연층을 관통해서 형성된 여려개의관통구멍이고, 각각의 관통구멍의 기하학적 구조는 원기둥 또는 각기둥형이거나 또는 수평으로 연장된 형태인 본딩 패드 구조.
  13. 제11항에 있어서, 상기 비아홀은 제2의 배선층의에지부아래에 형성된 본딩 패드 구조.
  14. 제11항에 있어서, 상기 제2의 배선층은 거의 사각형상이고, 상기 비아홀은 제2의 배선층의 4코너부 아래에 형성된 본딩 패드 구조.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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