JP5610905B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5610905B2 JP5610905B2 JP2010173435A JP2010173435A JP5610905B2 JP 5610905 B2 JP5610905 B2 JP 5610905B2 JP 2010173435 A JP2010173435 A JP 2010173435A JP 2010173435 A JP2010173435 A JP 2010173435A JP 5610905 B2 JP5610905 B2 JP 5610905B2
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Description
以下、本発明の第1の実施形態に係る半導体装置について、図面を参照しながら説明する。
以下、本発明の第2の実施形態に係る半導体装置について、図面を参照しながら説明する。
以下、本発明の第2の実施形態の変形例に係る半導体装置について、図面を参照しながら説明する。
以下、本発明の第3の実施形態に係る半導体装置について、図面を参照しながら説明する。
101、102 絶縁膜
103c、103p 配線
103c1、103p1 バリアメタル
103c2、103p2 銅膜
104A、104B、105 絶縁膜
106c、106p 配線
106c1、106p1 バリアメタル
106c2、106p2 銅膜
107A、107B、108A、108B 絶縁膜
109c 回路配線
109c1 バリアメタル
109c2 銅膜
109d 配線接続部
109p パッド配線
109p1 バリアメタル
109p2 銅膜
109q 配線接続部
109r 引き出し配線
110 絶縁膜
110a 開口部
111p 導電層
111p1 バリアメタル
111p2 アルミニウム膜
112 レジストパターン
113c、113p ビアホール
114 レジストパターン
115c、115p 配線溝
116 バリアメタル
117 銅膜
118 ボンディングワイヤ
Rc 回路領域
Rp パッド領域
Claims (21)
- 基板上に形成された第1の絶縁膜と、
前記第1の絶縁膜に埋め込み形成されたパッドと、
前記第1の絶縁膜上に形成されており、且つ前記パッドの少なくとも一部分の上に開口部を有する第2の絶縁膜とを備え、
前記パッドは複数のパッド配線を含み、
前記複数のパッド配線のうち互いに隣り合う配線同士を電気的に接続するように配線接続部が設けられており、
前記複数のパッド配線のうちの少なくとも1つは、平面視において前記開口部の内側及び外側に跨るように形成されており、
前記複数のパッド配線のそれぞれの幅は、前記複数のパッド配線のそれぞれの高さよりも小さく且つ前記配線接続部の幅よりも大きいことを特徴とする半導体装置。 - 基板上に形成された第1の絶縁膜と、
前記第1の絶縁膜に埋め込み形成されたパッドと、
前記第1の絶縁膜上に形成されており、且つ前記パッドの少なくとも一部分の上に開口部を有する第2の絶縁膜とを備え、
前記パッドは複数のパッド配線を含み、
前記複数のパッド配線のうち互いに隣り合う配線同士を電気的に接続するように配線接続部が設けられており、
前記複数のパッド配線の各々の底面には、前記第1の絶縁膜よりも下側に形成された他の配線に接続するビアが形成されており、
前記複数のパッド配線のそれぞれの幅は、前記複数のパッド配線のそれぞれの高さよりも小さく且つ前記配線接続部の幅よりも大きいことを特徴とする半導体装置。 - 請求項1又は2に記載の半導体装置において、
前記複数のパッド配線のそれぞれの高さは、前記複数のパッド配線のそれぞれの幅の1.5倍以上で且つ5倍以下であることを特徴とする半導体装置。 - 請求項1〜3のうちのいずれか一項に記載の半導体装置において、
前記配線接続部の幅は、前記複数のパッド配線のそれぞれの幅の3/4倍以下であることを特徴とする半導体装置。 - 請求項1〜4のいずれか1項に記載の半導体装置において、
前記複数のパッド配線の配置間隔は、前記複数のパッド配線のそれぞれの幅よりも小さいことを特徴とする半導体装置。 - 請求項5に記載の半導体装置において、
前記複数のパッド配線の配置間隔は、前記複数のパッド配線のそれぞれの幅の3/4倍以下であることを特徴とする半導体装置。 - 請求項1〜6のいずれか1項に記載の半導体装置において、
前記互いに隣り合う配線同士の間に少なくとも2つ以上の前記配線接続部が設けられており、
前記配線接続部の配置間隔は、前記複数のパッド配線のそれぞれの幅の2倍以上であることを特徴とする半導体装置。 - 請求項1〜7のいずれか1項に記載の半導体装置において、
前記互いに隣り合う配線のそれぞれの前記配線接続部が設けられている側面の反対側の側面における前記配線接続部に対応する位置には、他の配線接続部が設けられていないことを特徴とする半導体装置。 - 請求項1〜8のいずれか1項に記載の半導体装置において、
前記開口部内に位置する部分の前記第1の絶縁膜の上面は、前記複数のパッド配線の上面よりも低いことを特徴とする半導体装置。 - 請求項9に記載の半導体装置において、
前記開口部内に位置する部分の前記第1の絶縁膜の上面は、前記開口部の外側に位置する部分の前記第1の絶縁膜の上面よりも低いことを特徴とする半導体装置。 - 請求項1〜10のいずれか1項に記載の半導体装置において、
前記開口部の側壁の少なくとも一部分は、前記複数のパッド配線のうちの1つ以上の配線における幅方向の中央部上に位置していることを特徴とする半導体装置。 - 請求項1〜11のいずれか1項に記載の半導体装置において、
前記パッドの前記一部分と電気的に接続するように前記開口部に導電層が形成されていることを特徴とする半導体装置。 - 請求項12に記載の半導体装置において、
前記導電層は、前記開口部に隣接する部分の前記第2の絶縁膜上にも形成されていることを特徴とする半導体装置。 - 請求項1〜13のいずれか1項に記載の半導体装置において、
前記第1の絶縁膜に埋め込み形成された回路配線をさらに備え、
前記回路配線の幅は、前記回路配線の高さよりも小さいことを特徴とする半導体装置。 - 請求項14に記載の半導体装置において、
前記パッドと前記回路配線とは、前記第1の絶縁膜よりも下側に形成された他の配線によって電気的に接続されていることを特徴とする半導体装置。 - 請求項14に記載の半導体装置において、
前記パッドと前記回路配線とは、前記複数のパッド配線の少なくとも一部分を延長して前記回路配線と接続させることによって、電気的に接続されていることを特徴とする半導体装置。 - 請求項1〜16のいずれか1項に記載の半導体装置において、
前記複数のパッド配線はそれぞれ、ライン形状を有していることを特徴とする半導体装置。 - 請求項1〜16のいずれか1項に記載の半導体装置において、
前記複数のパッド配線はそれぞれ、リング形状を有していると共に同心状に配置されていることを特徴とする半導体装置。 - 請求項18に記載の半導体装置において、
前記複数のパッド配線のうち最も外側に位置する配線から他の配線が引き出されていることを特徴とする半導体装置。 - 請求項18又は19に記載の半導体装置において、
前記リング形状は、8角形又は円形であることを特徴とする半導体装置。 - 請求項1〜16のいずれか1項に記載の半導体装置において、
前記複数のパッド配線はそれぞれ、前記開口部の中央側にコーナーを有し且つ当該コーナーから前記開口部の外側に向けて2方向に延びていることを特徴とする半導体装置。
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