KR920010872A - 멀티칩 모듈 - Google Patents

멀티칩 모듈 Download PDF

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Publication number
KR920010872A
KR920010872A KR1019910021567A KR910021567A KR920010872A KR 920010872 A KR920010872 A KR 920010872A KR 1019910021567 A KR1019910021567 A KR 1019910021567A KR 910021567 A KR910021567 A KR 910021567A KR 920010872 A KR920010872 A KR 920010872A
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KR
South Korea
Prior art keywords
wiring layer
standard
multichip module
chip
custom
Prior art date
Application number
KR1019910021567A
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English (en)
Inventor
노리미츠 사코
Original Assignee
토자끼 시노부
가와사끼 세이데쯔 가부시끼가이샤
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Application filed by 토자끼 시노부, 가와사끼 세이데쯔 가부시끼가이샤 filed Critical 토자끼 시노부
Publication of KR920010872A publication Critical patent/KR920010872A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5382—Adaptable interconnections, e.g. for engineering changes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01084—Polonium [Po]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

내용 없음

Description

멀티칩 모듈
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예를 나타낸 평면도, 제2A도는 본 발명의 실시예의 부분 측면도, 제2B도는 제2A도의 측면도에서 부호 D에 의하여 표시된 부분의 확대도.

Claims (10)

  1. 표준 배선 패턴을 사용하는 표준 배선층과, 커스텀화된 배선 패턴 및 패드를 장착한 칩으로 이루어지는 커스텀 배선층과, 표준 초기위치로 배치되고, 상기 표준 배선층의 특정 도전트랙과 상기 커스텀 배선층의 특정 도전트랙 사이에 전기적인 연결의 유무를 설정할수 있게 각각 제공되는 복수개의 연결설정수단과, 상기 패드를 장착하는 칩에 전기적으로 연결되고, 패드를 장착하는 칩상에 탑재되는 복수개의 웨이퍼 칩과로 구성된 멀티칩 모듈.
  2. 제1항에 있어서, 모듈 보오드는 상기 표준 배선층과, 상기 커스텀 배선층과, 상기 연결 설정 수단으로 구성되는 멀티칩 모듈.
  3. 제2항에 있어서, 상기 커스텀 배선층의 모듈 보오드의 복수개 배선층 사이에서 표면근처에 형성되는 것을 특징으로 하는 멀티칩 모듈.
  4. 제1항에 있어서, 상기 웨이퍼 칩의 전원선이 커스텀 배선층으로 형성되는 것을 특징으로 하는 멀티칩 모듈.
  5. 복수개의 표준 배선층과, 표준 초기위치에 위치되고, 상기 복수개의 층 또는 커스텀 배선층 사이로부터 표준 배선층의 하나의 특정트랙과 다른 표준 배선층의 특정 전도트랙 사이에 전기적인 연결의 유무를 설정할 수 있게 각각 제공되는 복수개의 연결설정수단과로 구성된 멀티칩 모듈.
  6. 제5항에 있어서, 상기 복수개의 배선층의 각각의 표준 배선 패턴이 적어도 다른 배선 방향각을 가지는 것을 특징으로 하는 멀티칩 모듈.
  7. 제1항에 있어서, 상기 비퓨우즈가 상기 연결 설정 수단으로 사용되는 멀티칩 모듈.
  8. 제7항에 있어서, 상기 비퓨우즈가 폴리 실리콘막과 다른 배선층 사이에 위치된 얇은 SiO2막으로 구성되는 멀티칩 모듈.
  9. 제1항에 있어서, 상기 멀티칩 모듈은 표준 능동 소자로 제공되는 것을 특징으로 하는 멀티칩 모듈.
  10. 제1항에 있어서, 상기 패드를 장착하는 칩의 초기 위치가 표준화되어 있는 것을 특징으로 하는 멀티칩 모듈.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019910021567A 1990-11-29 1991-11-28 멀티칩 모듈 KR920010872A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP90-332130 1990-11-29
JP2332130A JPH0714024B2 (ja) 1990-11-29 1990-11-29 マルチチップモジュール

Publications (1)

Publication Number Publication Date
KR920010872A true KR920010872A (ko) 1992-06-27

Family

ID=18251491

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910021567A KR920010872A (ko) 1990-11-29 1991-11-28 멀티칩 모듈

Country Status (5)

Country Link
US (1) US5258891A (ko)
EP (1) EP0488319A1 (ko)
JP (1) JPH0714024B2 (ko)
KR (1) KR920010872A (ko)
CA (1) CA2056781C (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100480174B1 (ko) * 2002-08-23 2005-04-06 엘지전자 주식회사 플라즈마 디스플레이 패널의 구동장치 및 그의 제조 방법

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* Cited by examiner, † Cited by third party
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US5367208A (en) 1986-09-19 1994-11-22 Actel Corporation Reconfigurable programmable interconnect architecture
US5427979A (en) * 1993-10-18 1995-06-27 Vlsi Technology, Inc. Method for making multi-level antifuse structure
US5485031A (en) * 1993-11-22 1996-01-16 Actel Corporation Antifuse structure suitable for VLSI application
US5844297A (en) * 1995-09-26 1998-12-01 Symbios, Inc. Antifuse device for use on a field programmable interconnect chip
US5793094A (en) * 1995-12-28 1998-08-11 Vlsi Technology, Inc. Methods for fabricating anti-fuse structures
US5723358A (en) * 1996-04-29 1998-03-03 Vlsi Technology, Inc. Method of manufacturing amorphous silicon antifuse structures
US5946552A (en) * 1996-08-20 1999-08-31 International Business Machines Corporation Universal cost reduced substrate structure method and apparatus
US5899707A (en) * 1996-08-20 1999-05-04 Vlsi Technology, Inc. Method for making doped antifuse structures
US5753540A (en) * 1996-08-20 1998-05-19 Vlsi Technology, Inc. Apparatus and method for programming antifuse structures
US5764563A (en) * 1996-09-30 1998-06-09 Vlsi Technology, Inc. Thin film load structure
US6576848B1 (en) * 1996-11-22 2003-06-10 International Business Machines Corporation Integrated circuit chip wiring structure with crossover capability and method of manufacturing the same
US5959466A (en) * 1997-01-31 1999-09-28 Actel Corporation Field programmable gate array with mask programmed input and output buffers
US6150837A (en) * 1997-02-28 2000-11-21 Actel Corporation Enhanced field programmable gate array
US5959845A (en) * 1997-09-18 1999-09-28 International Business Machines Corporation Universal chip carrier connector
US6683384B1 (en) * 1997-10-08 2004-01-27 Agere Systems Inc Air isolated crossovers
US5903051A (en) * 1998-04-03 1999-05-11 Motorola, Inc. Electronic component and method of manufacture
JP3737333B2 (ja) 2000-03-17 2006-01-18 沖電気工業株式会社 半導体装置

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DE3586450T2 (de) * 1984-02-21 1993-03-18 Environmental Res Inst Kapazitive vorrichtung.
US4739448A (en) * 1984-06-25 1988-04-19 Magnavox Government And Industrial Electronics Company Microwave multiport multilayered integrated circuit chip carrier
US4598166A (en) * 1984-08-06 1986-07-01 Gte Communication Systems Corporation High density multi-layer circuit arrangement
JPS6156493A (ja) * 1984-08-28 1986-03-22 日本電気株式会社 多層回路基板の電源配線構造
JPS61296800A (ja) * 1985-06-25 1986-12-27 日本電気株式会社 設計変更用電極
JPS62265796A (ja) * 1986-05-14 1987-11-18 株式会社住友金属セラミックス セラミツク多層配線基板およびその製造法
US4782193A (en) * 1987-09-25 1988-11-01 Ibm Corp. Polygonal wiring for improved package performance
JPH02153552A (ja) * 1988-08-23 1990-06-13 Seiko Epson Corp 半導体素子及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100480174B1 (ko) * 2002-08-23 2005-04-06 엘지전자 주식회사 플라즈마 디스플레이 패널의 구동장치 및 그의 제조 방법

Also Published As

Publication number Publication date
JPH04199742A (ja) 1992-07-20
CA2056781A1 (en) 1992-05-30
US5258891A (en) 1993-11-02
JPH0714024B2 (ja) 1995-02-15
CA2056781C (en) 1996-02-27
EP0488319A1 (en) 1992-06-03

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