KR930022539A - 수지 봉지형 반도체 장치 - Google Patents

수지 봉지형 반도체 장치 Download PDF

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Publication number
KR930022539A
KR930022539A KR1019930006092A KR930006092A KR930022539A KR 930022539 A KR930022539 A KR 930022539A KR 1019930006092 A KR1019930006092 A KR 1019930006092A KR 930006092 A KR930006092 A KR 930006092A KR 930022539 A KR930022539 A KR 930022539A
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South Korea
Prior art keywords
wiring
semiconductor device
chip
flexible film
resin
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KR1019930006092A
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English (en)
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KR960012650B1 (ko
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고이찌 엔도
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사또 후미오
가부시끼가이샤 도시바
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Publication of KR930022539A publication Critical patent/KR930022539A/ko
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Publication of KR960012650B1 publication Critical patent/KR960012650B1/ko

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385Assembly of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

본 발명은 칩수가 많아EH 배선이 점유하는 면적을 자감으로써 소형으로 집적함과 동시에 IC 칩의 방열성이 좋고 전류 용량이 큰 배선을 구비하는 것을 특징으로 한다. 절연성 지지 기판(23)상에 IC 칩(27)및 전원용 배선(24)를 설치하고, IC칩(27)상에 플렉시블 필름(28)을 설치하고, 플렉시블 필름(28)상에 소전류용 배선(29a~29e)를 형성하고, 플렉시블 필름(28)에는 개구부(30) 또는 절개부(31)을 IC칩(27)의 본딩패드(26)및 전원용 배선(24) 또는 소전류용 배선(29a~29e)를 본딩와이어 (33)으로 접속한다. 따라서 배선이 차지하는 면적을 작제할 수 있다.

Description

수지 봉지형 반도체 장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시예에 따른 수지 봉지형 반도체 장치를 도시한 사시도.
제2도는 제1도의 내부 구성을 도시한 것으로 멀티칩 IC를 도시한 평면도.
제3도는 제2도에 도시한 멜티칩 IC에 있어서 절연성 지지 기판을 도시한 평면도.
제4a도 및 제4b도는 제2도에 도시한 멀티칩 IC에 있어서의 IC칩을 도시한 평면도.

Claims (4)

  1. 제1배선(24)를 갖는 절연성 기판(23), 상기 절연성 기판상에 실장된 복수의 반도체 집적 회로(27), 상기 반도체 집적 회로상에 부착한 제2배선(29a~29e)를 갖는 절연성 시트(28), 및 상기 절연성 시트에 설치되어 상기 제1, 제2배선 및 상기 반도체 집적회로를 전기적으로 접속하기 위한 개구부(30)을 구비하는 것을 특징으로 하는 수지 봉지용 반도체 장치.
  2. 제1항에 있어서, 제1배선을 전기 용량이 큰 것을 특징으로 하는 수지 봉지형 반도체 장치.
  3. 제1항에 있어서, 제2배선은 전류 용량이 작은 것을 특징으로 하는 수지 봉지형 반도체 장치.
  4. 제1항에 있어서, 상기 절연성 시트는 플레시블 필름으로 이루어지는 것을 특징으로 하는 수지 봉지형 반도체 장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930006092A 1992-04-14 1993-04-13 수지 봉지형 반도체 장치 KR960012650B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4094267A JP2801810B2 (ja) 1992-04-14 1992-04-14 樹脂封止型半導体装置
JP92-094267 1992-04-14

Publications (2)

Publication Number Publication Date
KR930022539A true KR930022539A (ko) 1993-11-24
KR960012650B1 KR960012650B1 (ko) 1996-09-23

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KR1019930006092A KR960012650B1 (ko) 1992-04-14 1993-04-13 수지 봉지형 반도체 장치

Country Status (3)

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US (1) US5422515A (ko)
JP (1) JP2801810B2 (ko)
KR (1) KR960012650B1 (ko)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2706222B1 (fr) * 1993-06-08 1995-07-13 Alcatel Espace Assemblage haute densité, haute fiabilité de circuits intégrés et son procédé de réalisation.
JP3051011B2 (ja) * 1993-11-18 2000-06-12 株式会社東芝 パワ−モジュ−ル
US5731223A (en) * 1996-09-24 1998-03-24 Lsi Logic Corporation Array of solder pads on an integrated circuit
EP0903780A3 (en) * 1997-09-19 1999-08-25 Texas Instruments Incorporated Method and apparatus for a wire bonded package for integrated circuits
US7021289B2 (en) * 2004-03-19 2006-04-04 Ford Global Technology, Llc Reducing engine emissions on an engine with electromechanical valves
DE102005053398B4 (de) * 2005-11-09 2008-12-24 Semikron Elektronik Gmbh & Co. Kg Leistungshalbleitermodul
DE102010012457B4 (de) 2010-03-24 2015-07-30 Semikron Elektronik Gmbh & Co. Kg Schaltungsanordnung mit einer elektrischen Komponente und einer Verbundfolie
JP5789264B2 (ja) * 2010-09-24 2015-10-07 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置
KR102519001B1 (ko) 2018-05-28 2023-04-10 삼성전자주식회사 필름 패키지 및 이를 포함하는 패키지 모듈

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2582013B2 (ja) * 1991-02-08 1997-02-19 株式会社東芝 樹脂封止型半導体装置及びその製造方法
US4677528A (en) * 1984-05-31 1987-06-30 Motorola, Inc. Flexible printed circuit board having integrated circuit die or the like affixed thereto
US4783695A (en) * 1986-09-26 1988-11-08 General Electric Company Multichip integrated circuit packaging configuration and method
JP2620650B2 (ja) * 1990-07-31 1997-06-18 三洋電機株式会社 混成集積回路装置
US5274270A (en) * 1990-12-17 1993-12-28 Nchip, Inc. Multichip module having SiO2 insulating layer

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Publication number Publication date
JP2801810B2 (ja) 1998-09-21
KR960012650B1 (ko) 1996-09-23
JPH05291489A (ja) 1993-11-05
US5422515A (en) 1995-06-06

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