KR920010863A - 반도체장치 - Google Patents

반도체장치 Download PDF

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Publication number
KR920010863A
KR920010863A KR1019910020239A KR910020239A KR920010863A KR 920010863 A KR920010863 A KR 920010863A KR 1019910020239 A KR1019910020239 A KR 1019910020239A KR 910020239 A KR910020239 A KR 910020239A KR 920010863 A KR920010863 A KR 920010863A
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KR
South Korea
Prior art keywords
semiconductor element
lead
semiconductor device
semiconductor
vias
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Application number
KR1019910020239A
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English (en)
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KR950014121B1 (ko
Inventor
가즈이치 고메나카
도시미츠 이시카와
Original Assignee
아오이 죠이치
가부시키가이샤 도시바
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Publication of KR920010863A publication Critical patent/KR920010863A/ko
Application granted granted Critical
Publication of KR950014121B1 publication Critical patent/KR950014121B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/491—Disposition
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    • H01L2224/732—Location after the connecting process
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

내용 없음

Description

반도체장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 실시예1의 리드프레임 평면도, 제2도(a)는 실시예1에 따른 수지밀봉형 반도체장치의 몰드수지를 투시한 평면도, 제2도(b)는 제2도(a)의 측면도, 제3도(a)는 실시예2의 리드프레임 평면도, 제3도(b)는 제3도(a)의 측면도.

Claims (1)

  1. 반도체소자(1)와, 이 반도체소자(1)의 주변에 배치되어 소자의 내부회로와 전기적으로 접속되는 리드(9) 및, 상기 반도체소자(1)에 형성된 본딩패드(2,3,4)와 상기 리드(9)를 전기적으로 접속하는 수단(11)을 구비한 반도체장치에 있어서, 상기 반도체소자(1) 주면에서 상기 반도체소자(1)내의 전원배선(20)에 복수장소에서 접속된 바이패스리드(100)를 갖춘 것을 특징으로 하는 반도체장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910020239A 1990-11-15 1991-11-14 반도체 장치 KR950014121B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2307023A JP2896223B2 (ja) 1990-11-15 1990-11-15 樹脂封止型半導体装置
JP90-307023 1990-11-15

Publications (2)

Publication Number Publication Date
KR920010863A true KR920010863A (ko) 1992-06-27
KR950014121B1 KR950014121B1 (ko) 1995-11-21

Family

ID=17964099

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910020239A KR950014121B1 (ko) 1990-11-15 1991-11-14 반도체 장치

Country Status (4)

Country Link
EP (1) EP0486027B1 (ko)
JP (1) JP2896223B2 (ko)
KR (1) KR950014121B1 (ko)
DE (1) DE69124198T2 (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5592020A (en) * 1993-04-16 1997-01-07 Kabushiki Kaisha Toshiba Semiconductor device with smaller package having leads with alternating offset projections
JP3048496B2 (ja) * 1993-04-16 2000-06-05 株式会社東芝 半導体装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59100550A (ja) * 1982-11-30 1984-06-09 Mitsubishi Electric Corp 半導体装置
JPS61248456A (ja) * 1985-04-25 1986-11-05 Nec Corp 混成集積回路装置及びそれに使用するリ−ドフレ−ム
JPS6352457A (ja) * 1986-08-22 1988-03-05 Hitachi Ltd 半導体装置
JPS63253635A (ja) * 1987-04-10 1988-10-20 Nec Ic Microcomput Syst Ltd 半導体装置
JPH0754841B2 (ja) * 1987-04-13 1995-06-07 サンケン電気株式会社 絶縁物封止型回路装置
JPH077816B2 (ja) * 1988-11-24 1995-01-30 株式会社東芝 半導体封止容器

Also Published As

Publication number Publication date
EP0486027B1 (en) 1997-01-15
DE69124198D1 (de) 1997-02-27
EP0486027A2 (en) 1992-05-20
JP2896223B2 (ja) 1999-05-31
JPH04180256A (ja) 1992-06-26
EP0486027A3 (en) 1993-02-24
DE69124198T2 (de) 1997-05-28
KR950014121B1 (ko) 1995-11-21

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