KR890003022A - 반도체 장치 - Google Patents
반도체 장치 Download PDFInfo
- Publication number
- KR890003022A KR890003022A KR1019880008575A KR880008575A KR890003022A KR 890003022 A KR890003022 A KR 890003022A KR 1019880008575 A KR1019880008575 A KR 1019880008575A KR 880008575 A KR880008575 A KR 880008575A KR 890003022 A KR890003022 A KR 890003022A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor device
- package
- superconducting material
- external terminal
- electrode pad
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
- H02H9/023—Current limitation using superconducting elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49888—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing superconducting material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/62—Protection against overvoltage, e.g. fuses, shunts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/60—Superconducting electric elements or equipment; Power systems integrating superconducting elements or equipment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S505/00—Superconductor technology: apparatus, material, process
- Y10S505/825—Apparatus per se, device per se, or process of making or operating same
- Y10S505/917—Mechanically manufacturing superconductor
- Y10S505/922—Making josephson junction device
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Containers, Films, And Cooling For Superconductive Devices (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제 1 도는 본 발명의 제 1 의 실시예에 관한 반도체장치의 요부의 단면도. 제 2 도 및 제 3 도는 본 발명이 적용가능한 팩키지의 외관도.
Claims (3)
- 반도체칩을 팩키지에 봉지하고, 상기 반도체칩의 전극패드에 전기적으로 접속된 외부단자를 상기 팩키지의 외부에 노출시킨 반도체장치에 있어서, 상기 전극패드로부터 상기 외부단자에 이르는 전류경로의 적어도 일부가 초전도재료로 형성되고, 또한 이 초전도재료로 형성되고, 또한 이 초전도재료에 자계를 인가하는 자기수단이 배설되어 있는 것을 특징으로 하는 반도체 장치.
- 제 1 항에 있어서, 상기 전극패드로부터 상기 외부단자에 이르는 전류경로의 일부는 초전도재료로 형성되어 있는 것을 특징으로 하는 반도체 장치.
- 반도체칩을 팩키지에 봉지하고, 상기 반도체칩의 복수의 전극패드의 각각에 전기적으로 접속된 복수의 외부단자를 상기 팩키지의 외부에 노출시킨 반도체장치에 있어서, 상기 복수의 전극패드중 적어도 1개에 이르는 전류경로의 적어도 일부가 초전도재료로 형성되고, 또한 당해 초전도재료의 상기 전극패드쪽이 다른 상기 외부단자에 접속되어 있는 것을 특징으로 하는 반도체 장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62181553A JPS6425449A (en) | 1987-07-21 | 1987-07-21 | Semiconductor device |
JP62-181553 | 1987-07-21 | ||
JP62181555A JPS6425451A (en) | 1987-07-21 | 1987-07-21 | Semiconductor device |
JP62-181554 | 1987-07-21 | ||
JP62-181555 | 1987-07-21 | ||
JP62181554A JPS6425450A (en) | 1987-07-21 | 1987-07-21 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890003022A true KR890003022A (ko) | 1989-04-12 |
KR920000829B1 KR920000829B1 (ko) | 1992-01-30 |
Family
ID=27325028
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019880008575A KR920000829B1 (ko) | 1987-07-21 | 1988-07-11 | 반도체 장치 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4958200A (ko) |
EP (1) | EP0300434A3 (ko) |
KR (1) | KR920000829B1 (ko) |
CA (1) | CA1304171C (ko) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6339191B1 (en) * | 1994-03-11 | 2002-01-15 | Silicon Bandwidth Inc. | Prefabricated semiconductor chip carrier |
DE4410211B4 (de) * | 1994-03-24 | 2005-07-21 | Atmel Germany Gmbh | Schaltungsanordnung zur schaltbaren Ansteuerung einer Last |
EP0756366A1 (en) * | 1995-07-24 | 1997-01-29 | HE HOLDINGS, INC. dba HUGHES ELECTRONICS | Electrostatic discharge protection using high temperature superconductors |
KR100249162B1 (ko) * | 1996-12-31 | 2000-03-15 | 김영환 | 정전기(eds)보호회로 |
JPH11112819A (ja) * | 1997-09-30 | 1999-04-23 | Fuji Photo Film Co Ltd | 色変換ルックアップテーブル並びにその作成方法および装置並びにそれを用いた画像の色変換方法および装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3925707A (en) * | 1973-10-17 | 1975-12-09 | Westinghouse Electric Corp | High voltage current limiting circuit breaker utilizing a super conductive resistance element |
JPS6010451B2 (ja) * | 1979-08-27 | 1985-03-18 | 工業技術院長 | ジヨゼフソン効果を利用したスイツチング回路 |
US4554567A (en) * | 1983-03-21 | 1985-11-19 | Sperry Corporation | Superconductive integrated circuit incorporating a magnetically controlled interferometer |
JPS59228781A (ja) * | 1983-06-10 | 1984-12-22 | Hitachi Micro Comput Eng Ltd | 低温動作論理回路装置 |
JPS6018978A (ja) * | 1983-07-12 | 1985-01-31 | Seiko Epson Corp | ジヨセフソン集積回路装置 |
US4670770A (en) * | 1984-02-21 | 1987-06-02 | American Telephone And Telegraph Company | Integrated circuit chip-and-substrate assembly |
JPS6173358A (ja) * | 1984-09-18 | 1986-04-15 | Nec Corp | Lsiケ−ス |
US4837609A (en) * | 1987-09-09 | 1989-06-06 | American Telephone And Telegraph Company, At&T Bell Laboratories | Semiconductor devices having superconducting interconnects |
JPH01147877A (ja) * | 1987-12-04 | 1989-06-09 | Toshiba Corp | 電力変換装置 |
-
1988
- 1988-07-11 KR KR1019880008575A patent/KR920000829B1/ko not_active IP Right Cessation
- 1988-07-19 EP EP19880111620 patent/EP0300434A3/en not_active Ceased
- 1988-07-20 US US07/221,599 patent/US4958200A/en not_active Expired - Fee Related
- 1988-07-21 CA CA000572725A patent/CA1304171C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US4958200A (en) | 1990-09-18 |
EP0300434A2 (en) | 1989-01-25 |
KR920000829B1 (ko) | 1992-01-30 |
EP0300434A3 (en) | 1990-09-19 |
CA1304171C (en) | 1992-06-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
LAPS | Lapse due to unpaid annual fee |