KR930011198A - 반도체 패키지 - Google Patents

반도체 패키지 Download PDF

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Publication number
KR930011198A
KR930011198A KR1019920020966A KR920020966A KR930011198A KR 930011198 A KR930011198 A KR 930011198A KR 1019920020966 A KR1019920020966 A KR 1019920020966A KR 920020966 A KR920020966 A KR 920020966A KR 930011198 A KR930011198 A KR 930011198A
Authority
KR
South Korea
Prior art keywords
semiconductor package
lead
lead frame
view
semiconductor
Prior art date
Application number
KR1019920020966A
Other languages
English (en)
Other versions
KR960002496B1 (ko
Inventor
고지 시라이
Original Assignee
사토 후미오
가부시키가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 사토 후미오, 가부시키가이샤 도시바 filed Critical 사토 후미오
Publication of KR930011198A publication Critical patent/KR930011198A/ko
Application granted granted Critical
Publication of KR960002496B1 publication Critical patent/KR960002496B1/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49558Insulating layers on lead frames, e.g. bridging members
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49586Insulating layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

내용 없음

Description

반도체 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 1실시예를 나타낸 몰드수지를 생략한 밑면도.
제2도는 본 발명에 따른 반도체 패키지의 밑면도.
제3도는 본 발명에 따른 반도체 패키지의 정면도.
제4도는 제1도의 A-A선에 따른 단면도.
제5도는 종래예를 나타낸 몰드수지를 생략한 평면도.
제6도는 종래예에 따른 반도체 패키지의 평면도.
제7도는 종래예에 따른 반도체 패키지의 정면도이다.
* 도면의 주요부분에 대한 부호의 설명
1 : 반도체칩 3 : 본딩와이어
4 : 몰드수지(패키지 본체) 10 : 리드 프레임
10a : 베드부 10c : 리드휜부
11 : 절연체 12 : 금속배선

Claims (1)

  1. 반도체칩(1)의 각 전극의 외부취출용 단자로서 리드 프레임(10)의 리드핀을 사용한 반도체 패키지에 있어서, 상기 리드핀이 리드 프레임(10) 베드부(10a)의 주위에 연접된 구형 평판형상의 리드휜 부(10c)의 표면에서 상기 리드휜 부(10c)와의 사이에 절연체(11)를 개재시켜 형성된 금속배선(12)으로 구성된 것을 특징으로 하는 반도체 패키지.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920020966A 1991-11-12 1992-11-10 반도체 패키지 KR960002496B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP91-296010 1991-11-12
JP3296010A JPH05136327A (ja) 1991-11-12 1991-11-12 半導体パツケージ

Publications (2)

Publication Number Publication Date
KR930011198A true KR930011198A (ko) 1993-06-23
KR960002496B1 KR960002496B1 (ko) 1996-02-17

Family

ID=17827959

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920020966A KR960002496B1 (ko) 1991-11-12 1992-11-10 반도체 패키지

Country Status (3)

Country Link
US (1) US5677571A (ko)
JP (1) JPH05136327A (ko)
KR (1) KR960002496B1 (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6248458B1 (en) * 1997-11-17 2001-06-19 Lg Electronics Inc. Organic electroluminescent device with improved long-term stability
KR100648916B1 (ko) * 2005-04-12 2006-11-27 주식회사 심텍 반도체 패키지용 인쇄회로기판의 윈도우 가공방법
CN101630676B (zh) * 2009-04-02 2011-05-11 嘉兴斯达微电子有限公司 新型直接敷铜基板布局的绝缘栅双极性晶体管模块

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4826069B1 (ko) * 1968-03-04 1973-08-04
JPS60218864A (ja) * 1984-04-16 1985-11-01 Toshiba Corp 電子部品パツケ−ジの実装方法、及び、電子部品パツケ−ジの構造
JPS60121751A (ja) * 1984-07-25 1985-06-29 Hitachi Ltd 半導体装置の製法
US4891687A (en) * 1987-01-12 1990-01-02 Intel Corporation Multi-layer molded plastic IC package
JPH01128558A (ja) * 1987-11-13 1989-05-22 Nec Corp 樹脂封止型半導体装置
JPH01183837A (ja) * 1988-01-18 1989-07-21 Texas Instr Japan Ltd 半導体装置
US5036380A (en) * 1988-03-28 1991-07-30 Digital Equipment Corp. Burn-in pads for tab interconnects
DE3824654A1 (de) * 1988-07-20 1990-02-01 Ibm Deutschland Elektronische baueinheit
US5028983A (en) * 1988-10-28 1991-07-02 International Business Machines Corporation Multilevel integrated circuit packaging structures
JP2734463B2 (ja) * 1989-04-27 1998-03-30 株式会社日立製作所 半導体装置
US5237202A (en) * 1989-10-16 1993-08-17 Shinko Electric Industries Co., Ltd Lead frame and semiconductor device using same
JP2744685B2 (ja) * 1990-08-08 1998-04-28 三菱電機株式会社 半導体装置
US5309019A (en) * 1993-02-26 1994-05-03 Motorola, Inc. Low inductance lead frame for a semiconductor package

Also Published As

Publication number Publication date
KR960002496B1 (ko) 1996-02-17
JPH05136327A (ja) 1993-06-01
US5677571A (en) 1997-10-14

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