KR850700086A - 집적회로 - Google Patents

집적회로

Info

Publication number
KR850700086A
KR850700086A KR1019850700093A KR850700093A KR850700086A KR 850700086 A KR850700086 A KR 850700086A KR 1019850700093 A KR1019850700093 A KR 1019850700093A KR 850700093 A KR850700093 A KR 850700093A KR 850700086 A KR850700086 A KR 850700086A
Authority
KR
South Korea
Prior art keywords
chip
integrated circuit
support member
central support
semiconductor chip
Prior art date
Application number
KR1019850700093A
Other languages
English (en)
Inventor
노만 그레이버 로날드
Original Assignee
마이클 와이, 엡스타인
아메리칸 텔리폰 앤드 텔레그라프 캄파니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 마이클 와이, 엡스타인, 아메리칸 텔리폰 앤드 텔레그라프 캄파니 filed Critical 마이클 와이, 엡스타인
Publication of KR850700086A publication Critical patent/KR850700086A/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49589—Capacitor integral with or on the leadframe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12033—Gunn diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

내용 없음

Description

집적회로
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 표준 DIP 내에 캡슐로 둘러싸인 리드 프레임을 도시한 것이다. 각각의 패들 분할부(10),(11)는 전력이 2분할부에 인가될 수있음으로써 패키지 단자중 서로 다른 한단자와 합체된다.

Claims (3)

  1. 중앙 지지부재와 상기 중앙지지부재의 주변에서 부터 외향으로 연장되는 다수의 리드를 구비한 금속 리드 프레임과, 중앙 지지부재에 결합된 반도체칩(17)과, 반도체 칩상의 위치에서 리드상의 위치에 연결하는 반도체 칩(17)과, 반도체 칩, 중앙 지지부재, 도전부재 및 리드 일부를 캡슐로 둘러싸는 봉입부를 포함하는 집적 회로로서, 중안 지지부재는 칩의 모서리 외부로 연장되는 2전기적 분할부(10),(11)로 분할되고, 도전부재(24),(25)는 칩상의 다른 위치를 지주 부분상의 위치중 다른 위치에 연결하며, 절연수단(20)은 칩의 아래측을 지지 부분으로부터 전기적으로 절연시키는 것을 특징으로 하는 집적회로.
  2. 제1항에 있어서, 칩과 절연수단 사이에 배치된 도전층과, 상기 도전층과 상기 칩을 상호 연결하는 도전부재(22)를 포함하는 것을 특징으로 하는 집적회로.
  3. 제1항에 있어서, 2지지부를 상호 연결하는 커패시터를 구비하는 것을 특징으로 하는 집적회로.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019850700093A 1983-10-21 1984-10-16 집적회로 KR850700086A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US544,420 1983-10-21
US06/544,420 US4595945A (en) 1983-10-21 1983-10-21 Plastic package with lead frame crossunder
PCT/US1984/001654 WO1985001835A1 (en) 1983-10-21 1984-10-16 Semiconductor integrated circuit including a lead frame chip support

Publications (1)

Publication Number Publication Date
KR850700086A true KR850700086A (ko) 1985-10-21

Family

ID=24172100

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850700093A KR850700086A (ko) 1983-10-21 1984-10-16 집적회로

Country Status (7)

Country Link
US (1) US4595945A (ko)
EP (2) EP0161273A1 (ko)
JP (1) JPS61500245A (ko)
KR (1) KR850700086A (ko)
CA (1) CA1201820A (ko)
DE (1) DE3468809D1 (ko)
WO (1) WO1985001835A1 (ko)

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US4716124A (en) * 1984-06-04 1987-12-29 General Electric Company Tape automated manufacture of power semiconductor devices
US4635092A (en) * 1984-06-04 1987-01-06 General Electric Company Tape automated manufacture of power semiconductor devices
JPH06105721B2 (ja) * 1985-03-25 1994-12-21 日立超エル・エス・アイエンジニアリング株式会社 半導体装置
US5234866A (en) * 1985-03-25 1993-08-10 Hitachi, Ltd. Semiconductor device and process for producing the same, and lead frame used in said process
US4891687A (en) * 1987-01-12 1990-01-02 Intel Corporation Multi-layer molded plastic IC package
US4835120A (en) * 1987-01-12 1989-05-30 Debendra Mallik Method of making a multilayer molded plastic IC package
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JP2763004B2 (ja) * 1987-10-20 1998-06-11 株式会社 日立製作所 半導体装置
US4899208A (en) * 1987-12-17 1990-02-06 International Business Machines Corporation Power distribution for full wafer package
JP2706077B2 (ja) * 1988-02-12 1998-01-28 株式会社日立製作所 樹脂封止型半導体装置及びその製造方法
JP2708191B2 (ja) * 1988-09-20 1998-02-04 株式会社日立製作所 半導体装置
US4937656A (en) * 1988-04-22 1990-06-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor device
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US5115298A (en) * 1990-01-26 1992-05-19 Texas Instruments Incorporated Packaged integrated circuit with encapsulated electronic devices
JP2538717B2 (ja) * 1990-04-27 1996-10-02 株式会社東芝 樹脂封止型半導体装置
JPH0760838B2 (ja) * 1990-11-13 1995-06-28 株式会社東芝 半導体装置
US5276352A (en) * 1990-11-15 1994-01-04 Kabushiki Kaisha Toshiba Resin sealed semiconductor device having power source by-pass connecting line
JP2501953B2 (ja) * 1991-01-18 1996-05-29 株式会社東芝 半導体装置
KR920020687A (ko) * 1991-04-16 1992-11-21 김광호 반도체 패키지
JPH0582696A (ja) * 1991-09-19 1993-04-02 Mitsubishi Electric Corp 半導体装置のリードフレーム
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US5661336A (en) * 1994-05-03 1997-08-26 Phelps, Jr.; Douglas Wallace Tape application platform and processes therefor
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US6144089A (en) * 1997-11-26 2000-11-07 Micron Technology, Inc. Inner-digitized bond fingers on bus bars of semiconductor device package
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JP3920629B2 (ja) * 2001-11-15 2007-05-30 三洋電機株式会社 半導体装置
WO2011055611A1 (ja) 2009-11-05 2011-05-12 ローム株式会社 信号伝達回路装置、半導体装置とその検査方法及び検査装置、並びに、信号伝達装置及びこれを用いたモータ駆動装置
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US4551746A (en) * 1982-10-05 1985-11-05 Mayo Foundation Leadless chip carrier apparatus providing an improved transmission line environment and improved heat dissipation

Also Published As

Publication number Publication date
JPS61500245A (ja) 1986-02-06
EP0142938A1 (en) 1985-05-29
US4595945A (en) 1986-06-17
WO1985001835A1 (en) 1985-04-25
EP0161273A1 (en) 1985-11-21
DE3468809D1 (en) 1988-02-25
EP0142938B1 (en) 1988-01-13
CA1201820A (en) 1986-03-11

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