KR940012549A - 반도체 펙케지 - Google Patents

반도체 펙케지 Download PDF

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Publication number
KR940012549A
KR940012549A KR1019920020847A KR920020847A KR940012549A KR 940012549 A KR940012549 A KR 940012549A KR 1019920020847 A KR1019920020847 A KR 1019920020847A KR 920020847 A KR920020847 A KR 920020847A KR 940012549 A KR940012549 A KR 940012549A
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South Korea
Prior art keywords
semiconductor
lead
semiconductor chip
bond pads
patchage
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KR1019920020847A
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English (en)
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KR960005042B1 (ko
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송치중
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문정환
금성일렉트론 주식회사
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Priority to KR1019920020847A priority Critical patent/KR960005042B1/ko
Priority to DE19934337675 priority patent/DE4337675B4/de
Priority to JP27660493A priority patent/JP3388609B2/ja
Publication of KR940012549A publication Critical patent/KR940012549A/ko
Priority to US08/409,911 priority patent/US5471088A/en
Application granted granted Critical
Publication of KR960005042B1 publication Critical patent/KR960005042B1/ko

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Abstract

본 발명은 반도체 펙케지에 관한 것으로 특히, 반도체 조립 공정을 간소화하고, 반도체 제품을 소형 경박화 또는 메모리 확장을 손쉽게 할 수 있도록 한 반도체 펙케지에 관한 것이다. 이를 위하여 본 발명에서는, 다수의 본드 패드가 형성되어 있는 반도체 칩의 측면에, 제1단턱과 제1단턱보다 높은 제2단턱이 형성되어 있는 다수의 리드바가 소정의 간격으로 배열되고, 제1단턱 위에 상기 반도체 칩이 절연되게 위치하고, 다수의 본드 패드와 대응하는 위치에 있는 리드바가 금속와이어로 연결되고, 리드바의 상면과 하면만 노출되게 하고 리드바의 측면과 반도체 칩 및 금속와이어를 몰딩 컴파운드로 둘러싸도록 구성된 것이다.

Description

반도체 펙케지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 반도체 펙케지의 구조를 나타낸 단면도.
제4도는 본 발명에 따른 반도체 펙케지의 접착 테이프에 부착된 예시도.
제5도는 본 발명에 따른 반도체 펙케지의 인쇄된 회로 기판에 실장한 예시도.

Claims (4)

  1. 다수의 본드 패드가 형성되어 있는 반도체 칩의 측면에, 제1단턱과 제1단턱보다 높은 제2단턱이 형성되어 있는 다수의 리드바가 소정의 간격으로 배열되고, 제1단턱 위에 상기 반도체 칩이 절연되게 위치하고, 다수의 본드 패드와 대응하는 위치에 있는 리드바가 금속와이어로 연결되고, 리드바의 상면과 하면과 노출되게 하고 리드바의 측면과 반도체 칩 및 금속와이어를 몰딩 컴파운드를 둘러싸도록 구성된 반도체 펙케지.
  2. 제1항에 있어서, 상기 다수의 리드바 밑면에 숄더를 부착하여 적층시 다수개의 반도체 펙케지가 확장되도록 한 것을 특징으로 하는 반도체 펙케지.
  3. 반도체 칩의 펙케지 방법에 있어서, (1)접착테이프위에 제1단턱과 제2단턱이 형성된 다수의 리드바를 단턱이 서로 마주보게 배열하여 부착하는 단계, (2)반도체칩을 절연성 접착제로 제1단턱을 위에 위치시키는 단계, (3)반도체칩의 본드패드와 제2단턱은 도선으로 연결시키는 단계, (4)리드바의 상하면만 남기고 리드바와 반도체 칩 및 도선을 컴파운드로 몰딩하는 단계로 이루어지는 반도체 칩 펙케지 방법.
  4. 제3단계에 있어서, 상기 (4)단계후에 접착테이프를 제거하는 단계를 추가로 구비하는 반도체 칩 펙케지 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920020847A 1992-11-07 1992-11-07 반도체 펙케지 KR960005042B1 (ko)

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KR1019920020847A KR960005042B1 (ko) 1992-11-07 1992-11-07 반도체 펙케지
DE19934337675 DE4337675B4 (de) 1992-11-07 1993-11-04 Verfahren zur Herstellung von stapelbaren Halbleitergehäusen
JP27660493A JP3388609B2 (ja) 1992-11-07 1993-11-05 半導体パッケージおよびその製造方法
US08/409,911 US5471088A (en) 1992-11-07 1995-03-23 Semiconductor package and method for manufacturing the same

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DE4337675A1 (de) 1994-05-11
US5471088A (en) 1995-11-28

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