KR940012549A - 반도체 펙케지 - Google Patents
반도체 펙케지 Download PDFInfo
- Publication number
- KR940012549A KR940012549A KR1019920020847A KR920020847A KR940012549A KR 940012549 A KR940012549 A KR 940012549A KR 1019920020847 A KR1019920020847 A KR 1019920020847A KR 920020847 A KR920020847 A KR 920020847A KR 940012549 A KR940012549 A KR 940012549A
- Authority
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- South Korea
- Prior art keywords
- semiconductor
- lead
- semiconductor chip
- bond pads
- patchage
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 claims abstract 4
- 239000002184 metal Substances 0.000 claims abstract 3
- 239000002390 adhesive tape Substances 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims 2
- 238000000465 moulding Methods 0.000 claims 2
- 239000000853 adhesive Substances 0.000 claims 1
- 230000001070 adhesive effect Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 claims 1
- 238000004806 packaging method and process Methods 0.000 claims 1
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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Abstract
본 발명은 반도체 펙케지에 관한 것으로 특히, 반도체 조립 공정을 간소화하고, 반도체 제품을 소형 경박화 또는 메모리 확장을 손쉽게 할 수 있도록 한 반도체 펙케지에 관한 것이다. 이를 위하여 본 발명에서는, 다수의 본드 패드가 형성되어 있는 반도체 칩의 측면에, 제1단턱과 제1단턱보다 높은 제2단턱이 형성되어 있는 다수의 리드바가 소정의 간격으로 배열되고, 제1단턱 위에 상기 반도체 칩이 절연되게 위치하고, 다수의 본드 패드와 대응하는 위치에 있는 리드바가 금속와이어로 연결되고, 리드바의 상면과 하면만 노출되게 하고 리드바의 측면과 반도체 칩 및 금속와이어를 몰딩 컴파운드로 둘러싸도록 구성된 것이다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명에 따른 반도체 펙케지의 구조를 나타낸 단면도.
제4도는 본 발명에 따른 반도체 펙케지의 접착 테이프에 부착된 예시도.
제5도는 본 발명에 따른 반도체 펙케지의 인쇄된 회로 기판에 실장한 예시도.
Claims (4)
- 다수의 본드 패드가 형성되어 있는 반도체 칩의 측면에, 제1단턱과 제1단턱보다 높은 제2단턱이 형성되어 있는 다수의 리드바가 소정의 간격으로 배열되고, 제1단턱 위에 상기 반도체 칩이 절연되게 위치하고, 다수의 본드 패드와 대응하는 위치에 있는 리드바가 금속와이어로 연결되고, 리드바의 상면과 하면과 노출되게 하고 리드바의 측면과 반도체 칩 및 금속와이어를 몰딩 컴파운드를 둘러싸도록 구성된 반도체 펙케지.
- 제1항에 있어서, 상기 다수의 리드바 밑면에 숄더를 부착하여 적층시 다수개의 반도체 펙케지가 확장되도록 한 것을 특징으로 하는 반도체 펙케지.
- 반도체 칩의 펙케지 방법에 있어서, (1)접착테이프위에 제1단턱과 제2단턱이 형성된 다수의 리드바를 단턱이 서로 마주보게 배열하여 부착하는 단계, (2)반도체칩을 절연성 접착제로 제1단턱을 위에 위치시키는 단계, (3)반도체칩의 본드패드와 제2단턱은 도선으로 연결시키는 단계, (4)리드바의 상하면만 남기고 리드바와 반도체 칩 및 도선을 컴파운드로 몰딩하는 단계로 이루어지는 반도체 칩 펙케지 방법.
- 제3단계에 있어서, 상기 (4)단계후에 접착테이프를 제거하는 단계를 추가로 구비하는 반도체 칩 펙케지 방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920020847A KR960005042B1 (ko) | 1992-11-07 | 1992-11-07 | 반도체 펙케지 |
DE19934337675 DE4337675B4 (de) | 1992-11-07 | 1993-11-04 | Verfahren zur Herstellung von stapelbaren Halbleitergehäusen |
JP27660493A JP3388609B2 (ja) | 1992-11-07 | 1993-11-05 | 半導体パッケージおよびその製造方法 |
US08/409,911 US5471088A (en) | 1992-11-07 | 1995-03-23 | Semiconductor package and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019920020847A KR960005042B1 (ko) | 1992-11-07 | 1992-11-07 | 반도체 펙케지 |
Publications (2)
Publication Number | Publication Date |
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KR940012549A true KR940012549A (ko) | 1994-06-23 |
KR960005042B1 KR960005042B1 (ko) | 1996-04-18 |
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KR1019920020847A KR960005042B1 (ko) | 1992-11-07 | 1992-11-07 | 반도체 펙케지 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5471088A (ko) |
JP (1) | JP3388609B2 (ko) |
KR (1) | KR960005042B1 (ko) |
DE (1) | DE4337675B4 (ko) |
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JP3475306B2 (ja) * | 1994-10-26 | 2003-12-08 | 大日本印刷株式会社 | 樹脂封止型半導体装置の製造方法 |
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KR0179803B1 (ko) * | 1995-12-29 | 1999-03-20 | 문정환 | 리드노출형 반도체 패키지 |
KR100186309B1 (ko) * | 1996-05-17 | 1999-03-20 | 문정환 | 적층형 버텀 리드 패키지 |
US5817530A (en) * | 1996-05-20 | 1998-10-06 | Micron Technology, Inc. | Use of conductive lines on the back side of wafers and dice for semiconductor interconnects |
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KR0179924B1 (ko) * | 1996-06-14 | 1999-03-20 | 문정환 | 버텀리드 반도체 패키지 |
KR0179925B1 (ko) * | 1996-06-14 | 1999-03-20 | 문정환 | 리드프레임 및 그를 이용한 버텀 리드 반도체 패키지 |
KR100206910B1 (ko) * | 1996-06-14 | 1999-07-01 | 구본준 | 반도체 패키지의 디플래쉬 방법 |
KR100232221B1 (ko) * | 1996-12-31 | 1999-12-01 | 김영환 | 반도체 패키지 및 그 제조 방법 |
US5940687A (en) * | 1997-06-06 | 1999-08-17 | International Business Machines Corporation | Wire mesh insert for thermal adhesives |
KR100431315B1 (ko) * | 1997-06-26 | 2004-10-06 | 주식회사 하이닉스반도체 | 반도체패키지및그제조방법 |
US6157074A (en) * | 1997-07-16 | 2000-12-05 | Hyundai Electronics Industries Co., Ltd. | Lead frame adapted for variable sized devices, semiconductor package with such lead frame and method for using same |
KR100271657B1 (ko) * | 1998-05-30 | 2000-11-15 | 김영환 | 칼럼 리드형 반도체 패키지 및 그 제조방법 |
US6831352B1 (en) * | 1998-10-22 | 2004-12-14 | Azimuth Industrial Company, Inc. | Semiconductor package for high frequency performance |
JP3297387B2 (ja) | 1998-11-20 | 2002-07-02 | 沖電気工業株式会社 | 半導体装置の製造方法 |
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JP4637380B2 (ja) * | 2001-02-08 | 2011-02-23 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4598316B2 (ja) * | 2001-07-06 | 2010-12-15 | パナソニック株式会社 | 樹脂封止型半導体装置およびその製造方法 |
JP3801121B2 (ja) * | 2002-08-30 | 2006-07-26 | 松下電器産業株式会社 | 樹脂封止型半導体装置およびその製造方法 |
JP3736516B2 (ja) * | 2002-11-01 | 2006-01-18 | 松下電器産業株式会社 | リードフレームおよびその製造方法ならびに樹脂封止型半導体装置およびその製造方法 |
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KR940006164B1 (ko) * | 1991-05-11 | 1994-07-08 | 금성일렉트론 주식회사 | 반도체 패키지 및 그 제조방법 |
-
1992
- 1992-11-07 KR KR1019920020847A patent/KR960005042B1/ko not_active IP Right Cessation
-
1993
- 1993-11-04 DE DE19934337675 patent/DE4337675B4/de not_active Expired - Fee Related
- 1993-11-05 JP JP27660493A patent/JP3388609B2/ja not_active Expired - Lifetime
-
1995
- 1995-03-23 US US08/409,911 patent/US5471088A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR960005042B1 (ko) | 1996-04-18 |
JP3388609B2 (ja) | 2003-03-24 |
JPH06209069A (ja) | 1994-07-26 |
DE4337675B4 (de) | 2008-04-30 |
DE4337675A1 (de) | 1994-05-11 |
US5471088A (en) | 1995-11-28 |
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