KR920020687A - 반도체 패키지 - Google Patents

반도체 패키지 Download PDF

Info

Publication number
KR920020687A
KR920020687A KR1019910006051A KR910006051A KR920020687A KR 920020687 A KR920020687 A KR 920020687A KR 1019910006051 A KR1019910006051 A KR 1019910006051A KR 910006051 A KR910006051 A KR 910006051A KR 920020687 A KR920020687 A KR 920020687A
Authority
KR
South Korea
Prior art keywords
semiconductor package
die pad
die
bonded
note
Prior art date
Application number
KR1019910006051A
Other languages
English (en)
Inventor
이국상
송영희
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019910006051A priority Critical patent/KR920020687A/ko
Priority to JP3218601A priority patent/JPH04326563A/ja
Priority to DE4128930A priority patent/DE4128930A1/de
Publication of KR920020687A publication Critical patent/KR920020687A/ko

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49579Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49586Insulating layers on lead frames
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49503Lead-frames or other flat leads characterised by the die pad
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

내용 없음

Description

반도체 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도의 (a),(b)는 이 발명에 따른 반도체 패키지의 구조도이다.

Claims (1)

  1. 다이패드상에 폴리이미드테이프를 도포시켜 이 상부에 반도체 칩을 탑재하여 상기 다이패드와 리이드를 와이어 본딩시킨 것에 있어서, 복수개로 분할된 다이패드(1)와, 이 다이패드(1) 일측의 중앙부와 양단에 형성된 전원전압단자(2)와, 상기 다이패드(1) 타측의 중앙부와 양단에는 접지전위단자(3)를 형성시켜 구성된 것을 특징으로 하는 반도체 패키지.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910006051A 1991-04-16 1991-04-16 반도체 패키지 KR920020687A (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019910006051A KR920020687A (ko) 1991-04-16 1991-04-16 반도체 패키지
JP3218601A JPH04326563A (ja) 1991-04-16 1991-08-29 半導体パッケージ
DE4128930A DE4128930A1 (de) 1991-04-16 1991-08-30 Halbleiterbaustein

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910006051A KR920020687A (ko) 1991-04-16 1991-04-16 반도체 패키지

Publications (1)

Publication Number Publication Date
KR920020687A true KR920020687A (ko) 1992-11-21

Family

ID=19313313

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910006051A KR920020687A (ko) 1991-04-16 1991-04-16 반도체 패키지

Country Status (3)

Country Link
JP (1) JPH04326563A (ko)
KR (1) KR920020687A (ko)
DE (1) DE4128930A1 (ko)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4595945A (en) * 1983-10-21 1986-06-17 At&T Bell Laboratories Plastic package with lead frame crossunder
CA1238119A (en) * 1985-04-18 1988-06-14 Douglas W. Phelps, Jr. Packaged semiconductor chip
JPS63216365A (ja) * 1987-03-05 1988-09-08 Tomoegawa Paper Co Ltd 半導体装置
JPH01124244A (ja) * 1987-11-09 1989-05-17 Nec Corp リードフレーム

Also Published As

Publication number Publication date
DE4128930A1 (de) 1992-10-22
JPH04326563A (ja) 1992-11-16

Similar Documents

Publication Publication Date Title
TW371358B (en) Semiconductor device
KR920020658A (ko) 반도체 장치의 칩 본딩 방법
KR920020686A (ko) 반도체 패키지
KR890017802A (ko) 반도체 장치용 리드프레임
KR910001956A (ko) 반도체장치
KR910017604A (ko) 반도체장치
KR910007094A (ko) 수지밀봉형 반도체장치
KR920015525A (ko) 반도체장치
KR850008244A (ko) 반도체 장치
KR920020687A (ko) 반도체 패키지
KR890003022A (ko) 반도체 장치
KR910020875A (ko) Ic용 리드프레임
KR910007117A (ko) 수지밀봉형 반도체장치
KR870009468A (ko) 반도체 장치
KR910003775A (ko) 반도체장치의 땜납 도포방법
KR930005181A (ko) 반도체 리드프레임
KR910001924A (ko) 반도체 장치
KR920020683A (ko) 반도체 패키지
KR870004508A (ko) 반도체 소자의 본딩(Bonding)용 금선(金線)
KR920005377A (ko) 점퍼 패드를 이용한 soj/zip 패캐지
KR920018903A (ko) 반도체 리이드 프레임
KR930014851A (ko) 리이드 프레임을 갖춘 반도체 패키지
KR920018907A (ko) 반도체 리드 프레임
KR920010863A (ko) 반도체장치
KR930001398A (ko) 반도체 패키지

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application