KR950007059A - 집적 회로 - Google Patents
집적 회로 Download PDFInfo
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- KR950007059A KR950007059A KR1019940018396A KR19940018396A KR950007059A KR 950007059 A KR950007059 A KR 950007059A KR 1019940018396 A KR1019940018396 A KR 1019940018396A KR 19940018396 A KR19940018396 A KR 19940018396A KR 950007059 A KR950007059 A KR 950007059A
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- metal layer
- bond pads
- active element
- substrate
- integrated circuit
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
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Abstract
능동 회로가 적어도 3개의 금속 레벨(211, 215,219)을 갖는 집적 회로내의 본드 패드(3) 아래에 위치된다. 본드 패드 근처의 금속 레벨(215)은 버퍼처럼 동작하고, 용납할 수 없는 큰 누설 전류를 유도하는 유전체(213)내의 크랙 전파를 방지한다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 집적 회로의 일부분의 평면도.
제2도는 제1도에 도시된 본 발명에 따른 집적 회로의 일부분의 단면도.
Claims (7)
- 기판(201)과; 상기 기판(201)의 표면에 능동소자(203)와; 상기 능동소자(203)의 일부분 위에 실질적으로 존재하는 복수의 본드 패드(3)와; 상기 본드 패드(3)와 상기 기판(201)사이의 복수의 패턴화된 금속층(215)으로서, 적어도 상기 금속층(215)이 상기 능동 소자(203)중 적어도 하나위에 실질적으로 존재하는 상기 금속층(215)과; 상기 패턴화된 금속층(215)들을 서로간에 분리시키고 그리고 상기 금속층(215)들을 상기 본드 패드(3)로부터 또한 상기 능동소자(203)로부터 분리시키는 유전체물질(214, 213, 217) 및 ; 상기 본드 패드(3)로부터 상기 능동 소자(203)까지의 전기적인 연결(251, 255, 215)을 포함하는 것을 특징으로 하는 집적 회로.
- 제1항에 있어서, 상기 패턴화된 금속층(215)중 상기 적어도 하나가 상기 본드 패드(3)중 적어도 하나에 전기적으로 연결되는 것을 특징으로 하는 집적 회로.
- 제2항에 있어서, 상기 패턴화된 금속층(215)중 상기 적어도 하나가 상기 본드 패드(3)의 적어도 하나 아래에서 상기 능동 회로의 적어도 한 소자(203)에 전기적으로 연결되는 것을 특징으로 하는 집적 회로.
- 제1항에 있어서, 세개의 금속 레벨(211, 215, 219)을 갖는 것을 특징으로 하는 집적 회로.
- 제1항에 있어서, 적어도 4개의 금속 레벨(211, 215, 219)을 갖는 것을 특징으로 하는 집적 회로.
- 기판(201)과; 상기 기판(201)의 표면에 형성된 능동 소자(203)와; 복수의 본드 패드(3)로서, 상기 본드 패드(3)중 적어도 하나가 상기 능동소자(203)중 적어도 하나위에 실질적으로 존재하는 상기 본드 패드(3)와; 상기 복수의 본드 패드(3)와 상기 기판(201) 사이에 패턴화된 금속층(215)으로서, 상기 금속층(215)의 적어도 일부분이 상기 능동소자(201)의 적어도 일부분 위에 실질적으로 존재하는 상기 금속층(215)과; 상기 패턴화된 금속층(215) 패드(3)로부터 상기 능동 소자 (203)까지의 전기적인 연결(251, 255, 215)을 포함하는 것을 특징으로 하는 집적회로.
- 제6항에 있어서, 상기 패턴화된 금속층(215)과 상기 능동소자(203)사이에 금속층(211)을 포함하고, 상기 금속층(211)은 유전체 물질(213)에 의해 상기 능동 소자(203) 및 상기 패턴화된 금속층(215)으로 분리되는 것을 특징으로 하는 집적 회로.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US10243493A | 1993-08-05 | 1993-08-05 | |
US102,434 | 1993-08-05 |
Publications (2)
Publication Number | Publication Date |
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KR950007059A true KR950007059A (ko) | 1995-03-21 |
KR0146013B1 KR0146013B1 (ko) | 1998-11-02 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1019940018396A KR0146013B1 (ko) | 1993-08-05 | 1994-07-28 | 집적 회로 |
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US (1) | US5751065A (ko) |
EP (1) | EP0637840A1 (ko) |
JP (1) | JPH07153922A (ko) |
KR (1) | KR0146013B1 (ko) |
Cited By (1)
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CN100398729C (zh) * | 2002-07-05 | 2008-07-02 | 乐金电子(天津)电器有限公司 | 全自动洗衣机离合器的电磁线圈结构 |
Families Citing this family (84)
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JP3482779B2 (ja) | 1996-08-20 | 2004-01-06 | セイコーエプソン株式会社 | 半導体装置およびその製造方法 |
US6127245A (en) * | 1997-02-04 | 2000-10-03 | Micron Technology, Inc. | Grinding technique for integrated circuits |
EP0923126A1 (en) * | 1997-12-05 | 1999-06-16 | STMicroelectronics S.r.l. | Integrated electronic device comprising a mechanical stress protection structure |
KR100267105B1 (ko) * | 1997-12-09 | 2000-11-01 | 윤종용 | 다층패드를구비한반도체소자및그제조방법 |
US6329712B1 (en) * | 1998-03-25 | 2001-12-11 | Micron Technology, Inc. | High density flip chip memory arrays |
US5986343A (en) * | 1998-05-04 | 1999-11-16 | Lucent Technologies Inc. | Bond pad design for integrated circuits |
US6232662B1 (en) * | 1998-07-14 | 2001-05-15 | Texas Instruments Incorporated | System and method for bonding over active integrated circuits |
US6087732A (en) | 1998-09-28 | 2000-07-11 | Lucent Technologies, Inc. | Bond pad for a flip-chip package |
DE19845064A1 (de) * | 1998-09-30 | 2000-04-13 | Siemens Ag | Halbleiterschaltkreis mit integrierter Selbsttestschaltung |
US6084312A (en) * | 1998-10-30 | 2000-07-04 | Samsung Electronics Co., Ltd. | Semiconductor devices having double pad structure |
TW445616B (en) * | 1998-12-04 | 2001-07-11 | Koninkl Philips Electronics Nv | An integrated circuit device |
JP2000183104A (ja) * | 1998-12-15 | 2000-06-30 | Texas Instr Inc <Ti> | 集積回路上でボンディングするためのシステム及び方法 |
US8021976B2 (en) | 2002-10-15 | 2011-09-20 | Megica Corporation | Method of wire bonding over active area of a semiconductor circuit |
DE19908188A1 (de) * | 1999-02-25 | 2000-09-07 | Siemens Ag | Verfahren zum Herstellen einer integrierten elektronischen Schaltung und integrierte elektronische Schaltung |
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JPS5921034A (ja) * | 1982-07-27 | 1984-02-02 | Toshiba Corp | 半導体装置 |
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JPS63283040A (ja) * | 1987-05-15 | 1988-11-18 | Toshiba Corp | 半導体装置 |
JP2522837B2 (ja) * | 1989-09-19 | 1996-08-07 | 富士通株式会社 | ウエハ・スケ―ル半導体装置 |
JP3432284B2 (ja) * | 1994-07-04 | 2003-08-04 | 三菱電機株式会社 | 半導体装置 |
-
1994
- 1994-07-27 EP EP94305566A patent/EP0637840A1/en not_active Withdrawn
- 1994-07-28 KR KR1019940018396A patent/KR0146013B1/ko active IP Right Grant
- 1994-08-03 JP JP6200278A patent/JPH07153922A/ja active Pending
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN100398729C (zh) * | 2002-07-05 | 2008-07-02 | 乐金电子(天津)电器有限公司 | 全自动洗衣机离合器的电磁线圈结构 |
Also Published As
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US5751065A (en) | 1998-05-12 |
JPH07153922A (ja) | 1995-06-16 |
EP0637840A1 (en) | 1995-02-08 |
KR0146013B1 (ko) | 1998-11-02 |
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