KR920015496A - 반도체장치 - Google Patents
반도체장치 Download PDFInfo
- Publication number
- KR920015496A KR920015496A KR1019920000819A KR920000819A KR920015496A KR 920015496 A KR920015496 A KR 920015496A KR 1019920000819 A KR1019920000819 A KR 1019920000819A KR 920000819 A KR920000819 A KR 920000819A KR 920015496 A KR920015496 A KR 920015496A
- Authority
- KR
- South Korea
- Prior art keywords
- pad electrode
- electrode portion
- semiconductor device
- insulating film
- opening
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02123—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body inside the bonding area
- H01L2224/02125—Reinforcing structures
- H01L2224/02126—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05073—Single internal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/05186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2224/05187—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4807—Shape of bonding interfaces, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4845—Details of ball bonds
- H01L2224/48451—Shape
- H01L2224/48453—Shape of the interface with the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48617—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
- H01L2224/48624—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01007—Nitrogen [N]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0494—4th Group
- H01L2924/04941—TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 제1실시예를 나타낸 단면도, 제2∼3도는 이 발명의 제1실시예의 제조공정을 나타낸 단면도.
Claims (1)
- 반도체기판상에 배선층을 갖고, 전기 배선층상에 외부 단자와 접속하기 위한 패드전극부를 갖고, 전기 반도체 기판의 주요부가 패드전극부의 개공부를 제외한 절연막으로 덮혀져 있고, 전기 패드전극과 외부단자를 와이어 본딩에 의해 접속하는 구조를 반도체장치에 있어서, 패드전극부의 개공부 근방의 전기 절연막의 적어도 탄최표면이탄성을 갖는 절연막으로 덮혀져 있고, 그 위에 패드전극부의 개공부는 전기 와이어본딩이 덮은 구조를 갖는 것을 특징으로 하는 반도체장치.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP91-9157 | 1991-01-29 | ||
JP915791A JP2593965B2 (ja) | 1991-01-29 | 1991-01-29 | 半導体装置 |
JP91-009157 | 1991-01-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920015496A true KR920015496A (ko) | 1992-08-27 |
KR960002092B1 KR960002092B1 (ko) | 1996-02-10 |
Family
ID=11712788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920000819A KR960002092B1 (ko) | 1991-01-29 | 1992-01-21 | 반도체장치 |
Country Status (4)
Country | Link |
---|---|
US (2) | US5430329A (ko) |
JP (1) | JP2593965B2 (ko) |
KR (1) | KR960002092B1 (ko) |
DE (1) | DE4201792C2 (ko) |
Families Citing this family (70)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100335591B1 (ko) * | 1992-09-10 | 2002-08-24 | 텍사스 인스트루먼츠 인코포레이티드 | 집적회로디바이스의액티브회로영역상의와이어본딩방법및집적회로디바이스 |
US5825078A (en) * | 1992-09-23 | 1998-10-20 | Dow Corning Corporation | Hermetic protection for integrated circuits |
US5543680A (en) * | 1993-10-20 | 1996-08-06 | Nec Corporation | Field emission type cathode structure for cathode-ray tube |
US5438022A (en) | 1993-12-14 | 1995-08-01 | At&T Global Information Solutions Company | Method for using low dielectric constant material in integrated circuit fabrication |
KR950019817A (ko) * | 1993-12-17 | 1995-07-24 | 이헌조 | 액정모듈의 수분방지용 패드 |
KR100372995B1 (ko) * | 1994-05-24 | 2003-03-31 | 히다치 가세고교 가부시끼가이샤 | 반도체기판위에목적하는패턴의수지막을형성하는방법,반도체칩,반도체패키지,및레지스트상박리액 |
KR100211070B1 (ko) * | 1994-08-19 | 1999-07-15 | 아끼구사 나오유끼 | 반도체 장치 및 그 제조방법 |
US6870272B2 (en) * | 1994-09-20 | 2005-03-22 | Tessera, Inc. | Methods of making microelectronic assemblies including compliant interfaces |
JPH08162528A (ja) * | 1994-10-03 | 1996-06-21 | Sony Corp | 半導体装置の層間絶縁膜構造 |
US5971253A (en) | 1995-07-31 | 1999-10-26 | Tessera, Inc. | Microelectronic component mounting with deformable shell terminals |
US5871807A (en) * | 1995-08-14 | 1999-02-16 | Micron Display Technology, Inc. | Multiple level printing in a single pass |
US6284563B1 (en) * | 1995-10-31 | 2001-09-04 | Tessera, Inc. | Method of making compliant microelectronic assemblies |
US6211572B1 (en) * | 1995-10-31 | 2001-04-03 | Tessera, Inc. | Semiconductor chip package with fan-in leads |
KR0182503B1 (ko) * | 1995-12-30 | 1999-04-15 | 김광호 | 와이어 볼 보다 작은 본딩 창을 갖는 반도체 칩과 그 제조 방법 |
JP3526376B2 (ja) * | 1996-08-21 | 2004-05-10 | 株式会社東芝 | 半導体装置及びその製造方法 |
US6635514B1 (en) * | 1996-12-12 | 2003-10-21 | Tessera, Inc. | Compliant package with conductive elastomeric posts |
US6251469B1 (en) | 1997-03-19 | 2001-06-26 | International Business Machines, Corporation | Method of rendering a substrate selectively non-wettable chip carrier with enhanced wire bondability |
US5976964A (en) | 1997-04-22 | 1999-11-02 | Micron Technology, Inc. | Method of improving interconnect of semiconductor device by utilizing a flattened ball bond |
US6093894A (en) * | 1997-05-06 | 2000-07-25 | International Business Machines Corporation | Multiconductor bonded connection assembly with direct thermal compression bonding through a base layer |
EP0905495A1 (fr) * | 1997-09-29 | 1999-03-31 | EM Microelectronic-Marin SA | Couche de protection de circuits intégrés, et son procédé de fabrication |
JPH11111753A (ja) * | 1997-10-01 | 1999-04-23 | Mitsubishi Electric Corp | 半導体装置 |
JP3603296B2 (ja) * | 1997-11-11 | 2004-12-22 | ソニー株式会社 | 半導体装置の製造方法 |
US6137155A (en) * | 1997-12-31 | 2000-10-24 | Intel Corporation | Planar guard ring |
TW410392B (en) * | 1998-01-23 | 2000-11-01 | Rohm Co Ltd | Damascene interconnection and semiconductor device |
TW411602B (en) * | 1998-02-07 | 2000-11-11 | Winbond Electronics Corp | Semiconductor manufacturing process and its structure which can prevent bonding pad fall-off due to the plug process |
US5942800A (en) * | 1998-06-22 | 1999-08-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Stress buffered bond pad and method of making |
JP2974022B1 (ja) | 1998-10-01 | 1999-11-08 | ヤマハ株式会社 | 半導体装置のボンディングパッド構造 |
US6303977B1 (en) * | 1998-12-03 | 2001-10-16 | Texas Instruments Incorporated | Fully hermetic semiconductor chip, including sealed edge sides |
US6444295B1 (en) * | 1998-12-29 | 2002-09-03 | Industrial Technology Research Institute | Method for improving integrated circuits bonding firmness |
US6297160B1 (en) | 1999-03-12 | 2001-10-02 | Taiwan Semiconductor Manufacturing Company | Application of pure aluminum to prevent pad corrosion |
TW444252B (en) * | 1999-03-19 | 2001-07-01 | Toshiba Corp | Semiconductor apparatus and its fabricating method |
DE19944304C2 (de) * | 1999-09-15 | 2001-09-20 | Infineon Technologies Ag | Strukturierung von Kontaktflächen in Mehrlagen-Metallisierungen von Halbleiterbauelementen |
US6415973B1 (en) * | 2000-07-18 | 2002-07-09 | Chartered Semiconductor Manufacturing Ltd. | Method of application of copper solution in flip-chip, COB, and micrometal bonding |
GB0018028D0 (en) * | 2000-07-24 | 2000-09-13 | Koninkl Philips Electronics Nv | Semiconductor devices and their manufacture |
US6580107B2 (en) * | 2000-10-10 | 2003-06-17 | Sanyo Electric Co., Ltd. | Compound semiconductor device with depletion layer stop region |
KR100636259B1 (ko) * | 2001-12-07 | 2006-10-19 | 후지쯔 가부시끼가이샤 | 반도체 장치 및 그 제조 방법 |
JP3943416B2 (ja) * | 2002-03-07 | 2007-07-11 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
JP2003303848A (ja) * | 2002-04-12 | 2003-10-24 | Nec Compound Semiconductor Devices Ltd | 半導体装置 |
JP2004055628A (ja) * | 2002-07-17 | 2004-02-19 | Dainippon Printing Co Ltd | ウエハレベルの半導体装置及びその作製方法 |
US20040102022A1 (en) * | 2002-11-22 | 2004-05-27 | Tongbi Jiang | Methods of fabricating integrated circuitry |
KR100497193B1 (ko) * | 2002-12-17 | 2005-06-28 | 동부아남반도체 주식회사 | 반도체 소자의 본딩 패드와 이의 형성 방법 |
JP2006518944A (ja) * | 2003-02-25 | 2006-08-17 | テッセラ,インコーポレイテッド | バンプを有するボールグリッドアレー |
US6927156B2 (en) * | 2003-06-18 | 2005-08-09 | Intel Corporation | Apparatus and method extending flip-chip pad structures for wirebonding on low-k dielectric silicon |
JP3666495B2 (ja) * | 2003-06-27 | 2005-06-29 | セイコーエプソン株式会社 | 半導体装置及びその製造方法、回路基板並びに電子機器 |
DE10333465B4 (de) * | 2003-07-22 | 2008-07-24 | Infineon Technologies Ag | Elektronisches Bauteil mit Halbleiterchip, Verfahren zur Herstellung desselben sowie Verfahren zur Herstellung eines Halbleiterwafers mit Kontaktflecken |
US7919864B2 (en) * | 2003-10-13 | 2011-04-05 | Stmicroelectronics S.A. | Forming of the last metallization level of an integrated circuit |
US20050253245A1 (en) * | 2004-05-12 | 2005-11-17 | Mark Lynch | Package design and method for electrically connecting die to package |
US8552559B2 (en) * | 2004-07-29 | 2013-10-08 | Megica Corporation | Very thick metal interconnection scheme in IC chips |
KR101357765B1 (ko) * | 2005-02-25 | 2014-02-11 | 테세라, 인코포레이티드 | 유연성을 갖는 마이크로 전자회로 조립체 |
JP2006303452A (ja) * | 2005-03-25 | 2006-11-02 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
US8791006B2 (en) * | 2005-10-29 | 2014-07-29 | Stats Chippac, Ltd. | Semiconductor device and method of forming an inductor on polymer matrix composite substrate |
US8669637B2 (en) * | 2005-10-29 | 2014-03-11 | Stats Chippac Ltd. | Integrated passive device system |
US8158510B2 (en) | 2009-11-19 | 2012-04-17 | Stats Chippac, Ltd. | Semiconductor device and method of forming IPD on molded substrate |
US8409970B2 (en) | 2005-10-29 | 2013-04-02 | Stats Chippac, Ltd. | Semiconductor device and method of making integrated passive devices |
US8188590B2 (en) | 2006-03-30 | 2012-05-29 | Stats Chippac Ltd. | Integrated circuit package system with post-passivation interconnection and integration |
KR100729360B1 (ko) * | 2006-04-05 | 2007-06-15 | 삼성전자주식회사 | 반도체 장치의 커패시터 구조체 및 그 제조 방법 |
US8022552B2 (en) | 2006-06-27 | 2011-09-20 | Megica Corporation | Integrated circuit and method for fabricating the same |
US7749886B2 (en) | 2006-12-20 | 2010-07-06 | Tessera, Inc. | Microelectronic assemblies having compliancy and methods therefor |
US8193636B2 (en) * | 2007-03-13 | 2012-06-05 | Megica Corporation | Chip assembly with interconnection by metal bump |
JP5034740B2 (ja) * | 2007-07-23 | 2012-09-26 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP2009130271A (ja) * | 2007-11-27 | 2009-06-11 | Panasonic Corp | 半導体装置とその製造方法 |
DE112009005044B4 (de) * | 2009-07-08 | 2014-04-30 | Toyota Jidosha Kabushiki Kaisha | Halbleitervorrichtung und Verfahren zu deren Herstellung |
US20120267779A1 (en) * | 2011-04-25 | 2012-10-25 | Mediatek Inc. | Semiconductor package |
US9245828B2 (en) | 2012-07-11 | 2016-01-26 | Mindspeed Technologies, Inc. | High speed signal conditioning package |
MY181531A (en) | 2013-01-18 | 2020-12-25 | Mimos Berhad | Method of fabricating a bond pad in a semiconductor device |
US9433083B2 (en) | 2014-04-04 | 2016-08-30 | Macom Technology Solutions Holdings, Inc. | Edge mount connector arrangement with improved characteristic impedance |
JP2017112225A (ja) * | 2015-12-16 | 2017-06-22 | シャープ株式会社 | 半導体装置 |
US20170352639A1 (en) * | 2016-06-02 | 2017-12-07 | Knowles Electronics, Llc | Method for protecting bond pads from corrosion |
US11024592B2 (en) * | 2019-10-18 | 2021-06-01 | Nanya Technology Corporation | Semiconductor device with spacer over sidewall of bonding pad and method for preparing the same |
US11355460B1 (en) | 2020-12-07 | 2022-06-07 | Infineon Technologies Ag | Molded semiconductor package with high voltage isolation |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5232263A (en) * | 1975-09-05 | 1977-03-11 | Hitachi Ltd | Semiconductor manufacturing process |
JPS56150830A (en) * | 1980-04-25 | 1981-11-21 | Hitachi Ltd | Semiconductor device |
JPS59172757A (ja) * | 1983-03-22 | 1984-09-29 | Matsushita Electronics Corp | 半導体装置 |
US4845543A (en) * | 1983-09-28 | 1989-07-04 | Hitachi, Ltd. | Semiconductor device and method of manufacturing the same |
JPS61199046U (ko) * | 1985-05-31 | 1986-12-12 | ||
US4723197A (en) * | 1985-12-16 | 1988-02-02 | National Semiconductor Corporation | Bonding pad interconnection structure |
JPS63283040A (ja) * | 1987-05-15 | 1988-11-18 | Toshiba Corp | 半導体装置 |
JPH0727921B2 (ja) * | 1987-07-31 | 1995-03-29 | 日本電気株式会社 | 半導体装置の製造方法 |
JP2527457B2 (ja) * | 1988-02-29 | 1996-08-21 | シャープ株式会社 | 半導体装置の電極構造 |
JPH01241832A (ja) * | 1988-03-23 | 1989-09-26 | Rohm Co Ltd | 電子部品におけるワイヤボンディング構造 |
JPH01308036A (ja) * | 1988-06-07 | 1989-12-12 | Toshiba Corp | ボンデイングパッド及びその製造方法 |
JPH027435A (ja) * | 1988-06-25 | 1990-01-11 | Nec Corp | 金属パンプ電極を有する半導体装置 |
JPH0281743A (ja) * | 1988-09-19 | 1990-03-22 | Stanley Electric Co Ltd | 車両の前照灯制御装置 |
JP2576626B2 (ja) * | 1989-04-24 | 1997-01-29 | 日本電気株式会社 | ボールボンディング用電極を備えた半導体装置 |
JPH02294037A (ja) * | 1989-05-09 | 1990-12-05 | Matsushita Electron Corp | 半導体装置 |
US5293073A (en) * | 1989-06-27 | 1994-03-08 | Kabushiki Kaisha Toshiba | Electrode structure of a semiconductor device which uses a copper wire as a bonding wire |
JPH03184343A (ja) * | 1989-12-13 | 1991-08-12 | Sony Corp | 半導体装置の製造方法 |
JPH03184340A (ja) * | 1989-12-13 | 1991-08-12 | Toshiba Corp | 半導体装置及びその製造方法 |
-
1991
- 1991-01-29 JP JP915791A patent/JP2593965B2/ja not_active Expired - Fee Related
-
1992
- 1992-01-21 KR KR1019920000819A patent/KR960002092B1/ko not_active IP Right Cessation
- 1992-01-23 DE DE19924201792 patent/DE4201792C2/de not_active Expired - Fee Related
-
1994
- 1994-05-26 US US08/249,679 patent/US5430329A/en not_active Expired - Lifetime
-
1995
- 1995-04-03 US US08/416,130 patent/US5525546A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5430329A (en) | 1995-07-04 |
DE4201792C2 (de) | 1996-05-15 |
JPH04271132A (ja) | 1992-09-28 |
US5525546A (en) | 1996-06-11 |
KR960002092B1 (ko) | 1996-02-10 |
DE4201792A1 (de) | 1992-08-06 |
JP2593965B2 (ja) | 1997-03-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR920015496A (ko) | 반도체장치 | |
KR910019087A (ko) | 저전류마이크로퓨우즈 | |
KR880011910A (ko) | 수지봉합형 집적회로장치 | |
KR950007059A (ko) | 집적 회로 | |
KR900005587A (ko) | 반도체 디바이스 및 그 제작방법 | |
KR950030242A (ko) | 반도체장치와 그 제조방법 | |
KR970077228A (ko) | 반도체 장치 및 반도체 장치를 포함하는 구조물 | |
KR920003567A (ko) | 반도체장치 | |
TR200000511T2 (tr) | Elektrikli cihazlar ve bunları imal etmek için bir yöntem. | |
KR920007160A (ko) | 집적 회로용 절연 리드 프레임 및 그의 제조 방법 | |
KR960706194A (ko) | 계층화된 도전 평면을 갖는 리드 프레임(a lead frame having layered conductive planes) | |
KR960005972A (ko) | 수지 밀폐형 반도체 장치 및 그 제조 방법 | |
KR870009461A (ko) | 내열 플라스탁 받도체 장치 | |
KR890013751A (ko) | 반도체 장치 | |
JPS6450443A (en) | Semiconductor device | |
KR850006654A (ko) | 반도체 장치 | |
KR910007094A (ko) | 수지밀봉형 반도체장치 | |
KR940020539A (ko) | 저 인덕턴스 반도체 패키지(Low inductance semiconductor package) | |
KR900002447A (ko) | 반도체 장치의 전극 접합부구조 | |
KR970003929A (ko) | 반도체장치 | |
KR900019259A (ko) | 쌍방향제어정류 반도체장치 | |
KR920018849A (ko) | 반도체장치 및 그의 제조방법 | |
HK103693A (en) | Integrated circuit with an electroconductive flat element | |
KR890016678A (ko) | 반도체장치 | |
KR910013517A (ko) | 대전력용 반도체 장치 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20080122 Year of fee payment: 13 |
|
LAPS | Lapse due to unpaid annual fee |