KR19990063586A - 반도체 장치의 제조 방법 및 반도체 장치 제조용 금형 및 반도체 장치 및 그 실장방법 - Google Patents
반도체 장치의 제조 방법 및 반도체 장치 제조용 금형 및 반도체 장치 및 그 실장방법 Download PDFInfo
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- KR19990063586A KR19990063586A KR1019980701863A KR19980701863A KR19990063586A KR 19990063586 A KR19990063586 A KR 19990063586A KR 1019980701863 A KR1019980701863 A KR 1019980701863A KR 19980701863 A KR19980701863 A KR 19980701863A KR 19990063586 A KR19990063586 A KR 19990063586A
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- semiconductor device
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- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
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Abstract
Description
Claims (86)
- 돌기 전극이 배설된 복수의 반도체 소자가 형성된 기판을 금형 내에 장착하고, 이어서 상기 돌기 전극의 배설 위치에 밀봉 수지를 공급하여 상기 돌기 전극 및 상기 기판을 상기 밀봉 수지로 밀봉하여 수지층을 형성하는 수지 밀봉 공정과,상기 돌기 전극의 적어도 선단부를 상기 수지층으로 부터 노출시키는 돌기 전극 노출 공정과,상기 기판을 상기 수지층과 함께 절단하여 개개 반도체 소자로 분리하는 분리 공정을 구비하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항에 있어서,상기 수지 밀봉 공정에서 사용되는 밀봉 수지는 밀봉 처리후에 상기 수지층의 높이가 상기 돌기 전극의 높이와 대략 동등한 높이로 되는 량으로 계량되어 있는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 또는 제2항에 있어서,상기 수지 밀봉 공정에서 상기 돌기 전극과 상기 금형의 사이에 필름을 배설하고, 상기 금형이 상기 필름을 거쳐서 상기 밀봉 수지와 접촉하도록 구성한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제3항 중 어느 한항에 있어서,상기 수지 밀봉 공정에서 사용되는 금형을,승강 가능한 상형과,고정된 제1 하형 반체와, 상기 제1 하형 반체에 대해서 승강 가능한 구성으로 된 제2 하형 반체로 된 하형에 의해서 구성하는 동시에,상기 수지 밀봉 공정이,상기 돌기 전극이 배설된 복수의 반도체 소자가 형성된 기판을 상기 제1 및 제2 하형 반체가 협동하여 형성하는 캐비티내에 장착하는 동시에 상기 밀봉 수지를 상기 캐비티 내에 배설하는 기판 장착 공정과,상기 상형을 상기 제2 하형 반체와 함께 하향 이동시킴으로서 상기 밀봉 수지를 가열, 용융, 압축하여 상기 돌기 전극을 밀봉하는 수지층을 형성하는 수지층 형성 공정과,우선 상형을 상승시켜 상기 상형을 상기 수지층으로부터 이간시키고, 이어서 제2 하형 반체를 제1 하형 반체에 대해서 승강시키도록 함으로서 상기 수지층이 형성된 기판을 상기 금형으로부터 이형시키는 이형 공정을 갖는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제4항 중 어느한 항에 있어서,상기 밀봉 공정에서 사용되는 금형에 잉여 수지 제거 기구를 설비하고, 상기 잉여 수지 제거 기구에 의해서 잉여 수지를 제거하는 동시에 상기 금형내에서의 밀봉 수지의 압력을 제어 하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제5항중 어느 한항에 있어서,상기 수지 밀봉 공정에서 밀봉 수지로서 시트상 수지를 사용하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제3항 또는 제6항에 있어서,상기 밀봉 수지를 상기 수지 밀봉 공정의 실시전에 미리 상기 필름에 배설하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제7항에 있어서,상기 밀봉 수지를 상기 필름에 복수개 배설해 놓고, 상기 필름을 이동시킴으로서 연속적으로 상기 수지 밀봉 공정을 실시하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제8항 중 어느 한항에 있어서,상기 수지 밀봉 공정에서 상기 금형에 상기 기판을 장착하기 전에 보강판을 장착해 두는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제9항에 있어서,상기 보강판으로서 방열성이 양호한 재료를 선정한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제10항중 어느 한항에 있어서,상기 돌기 전극 노출 공정에서 상기 수지층으로 덮은 돌기 전극의 적어도 선단부를 상기 수지층으로부터 노출시키는 수단으로서 레이저 광 조사, 엑시머 레이저, 에칭, 기계 연마 및 블라스트 중 적어도 한가지 수단을 사용하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제3항 내지 제10항중 어느 한항에 있어서,상기 수지 밀봉 공정에서 사용되는 상기 필름의 재질로서 탄성 변형 가능한 재질을 선정하고, 상기 금형을 사용하여 상기 수지층을 형성할 때에 상기 돌기 전극의 선단부를 상기 필름으로 밀려 들어 넣는 동시에,상기 돌기 전극 노출 공정에서 상기 필름을 상기 수지층으로부터 박리시킴으로서 상기 돌기 전극의 선단부를 상기 수지층으로부터 노출시키는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 승강 가능한 상형과,기판의 형상에 대응하는 고정된 제1 하형 반체와, 상기 제1 하형 반체를 둘러 싸도록 배설되는 동시에 상기 제1 하형 반체에 대해서 승강가능한 제2 하형 반체로 된 하형으로 구성되고,상기 상형과 하형이 협동하여 수지 충전이 행해지는 캐비티를 형성하는 구성으로 한 것을 특징으로 하는 반도체 장치 제조용 금형.
- 제13항에 있어서,수지 성형시에 잉여 수지의 제거 처리를 동시에 행함과 함께 상기 밀봉 수지의 압력을 제어하는 잉여 수지 제거 기구를 설비하는 것을 특징으로 하는 반도체 장치 제조용 금형.
- 제13항 또는 제14항에 있어서,상기 제1 하형 반체의 상기 기판이 탑재되는 부위에 상기 기판을 상기 제1 하형 반체에 고정·이형시키는 고정·이형기구를 설비한 것을 특징으로 하는 반도체 장치 제조용 금형.
- 제15항에 있어서,상기 고정·이형기구를,상기 제1 하형 반체의 상기 기판이 재치되는 부위에 배설된 다공질부재와 상기 다공질 부재에 대해서 기체를 흡인 처리 및 기체의 공급처리를 행하는 흡배기 장치로 구성한 것을 특징으로 하는 반도체 장치 제조용 금형.
- 제13항 내지 제16항중 어느한 항에 있어서,상기 캐비티를 형성한 상태에서, 상기 제1 하형 반체의 상부의 면적 보다도 상기 제2 하형 반체로 둘러 싸여지는 면적이 넓어지는 부분을 갖는 구성으로 한 것을 특징으로 하는 반도체 장치 제조용 금형.
- 적어도 표면상에 돌기 전극이 직접 형성되어 되는 반도체 소자와,상기 반도체 소자의 표면상에 형성되어 있고, 상기 돌기 전극의 선단부를 남기고 상기 돌기 전극을 밀봉하는 수지층을 구비한 것을 특징으로 하는 반도체 장치.
- 제18항에 있어서,상기 반도체 소자의 상기 돌기 전극이 형성되는 표면에 대해서 반대측이되는 배면에 방열 부재를 배설한 것을 특징으로 하는 반도체 장치.
- 제1항 내지 제12항 중 어느한 항에 있어서,상기 수지 밀봉 공정에서 사용되는 밀봉 수지로서 다른 특성을 갖는 복수의 밀봉 수지를 사용하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제9항 내지 제10항에 있어서,상기 수지 밀봉 공정에서 미리 상기 밀봉 수지를 상기 보강판에 배설해 놓는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제21항에 있어서,상기 보강판으로 금형에 장착한 상태에서 기판을 향해 연장된 프레임부를 형성함으로서 요부를 형성하고,상기 수지 밀봉 공정의 실시시에 상기 보강판에 형성된 요부를 수지 밀봉용의 캐비티로서 사용하여 상기 기판에 수지층을 형성하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제12항 중 어느한 항에 있어서,상기 수지 밀봉 공정에서 상기 돌기 전극이 배설된 상기 기판의 표면에 제1 수지층을 형성한 후 또는 동시에 상기 기판의 배면을 덮도록 제2 수지층을 형성하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제3항 내지 제10항 중 어느한 항에 있어서,상기 수지 밀봉 공정에서 상기 필름으로서 상기 돌기 전극과 대향하는 위치에 철부가 형성된 것을 이용하고, 상기 철부를 상기 돌기 전극에 압압한 상태에서 상기 수지층을 형성하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제12항 중 어느한 항 또는 제20항 내지 제24항중 어느한 항에 있어서,상기 돌기 전극 노출 공정에서 상기 돌기 전극의 적어도 선단부를 상기 수지층에서 노출시킨 후에상기 돌기 전극의 선단부에 외부 접속용 돌기 전극을 형성하는 외부 접속용 돌기 전극 형성 공정을 실시하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제25항에 있어서,상기 외부 접속용 돌기 전극 형성 공정에서 상기 돌기 전극과 상기 외부 접속용 돌기 전극을 응력 완화 기능을 갖는 접합재를 사용하여 접합시키는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제12항 중 어느한 항 또는 제20항 내지 제26항 중 어느 한항에 있어서,상기 수지 밀봉 공정을 실시하지 전에 미리 상기 기판의 분리 공정에서 절단되는 위치에 절단 위치홈을 형성해 두고,상기 분리 공정에서 상기 밀봉 수지가 충전된 상기 절단 위치홈의 형성 위치에서 상기 기판을 절단하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제12항 중 어느한 항 또는 제20항 내지 제26항 중 어느 한항에 있어서,상기 수지 밀봉 공정을 실시하기 전에 미리 상기 기판의 상기 분리 공정에서 절단되는 위치를 사이에 두고 적어도 한쌍의 응력 완화 홈을 형성해 두고상기 분리 공정에서 상기 한쌍의 응력 완화홈 사이의 위치에서 기판을 절단하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 돌기 전극을 갖는 복수의 반도체 소자가 형성된 기판을 절단함으로서 개개의 반도체 소자로 분리하는 제1 분리 공정과,분리된 상기 반도체 소자를 베이스재에 정렬시켜 탑재한 후에 상기 탑재된 반도체 소자를 상기 밀봉 수지로 밀봉하여 수지층을 형성하는 수지 밀봉 공정과,상기 돌기 전극의 적어도 선단부를 상기 수지층으로부터 노출시키는 돌기 전극 노출 공정과,인접하는 상기 반도체 소자의 사이 위치에서 상기 베이스재와 함께 상기 수지층을 절단함으로서 상기 수지층이 형성된 반도체 소자를 개개로 분리하는 제2 분리 공정을 구비하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 외부와 접속되는 외부 접속 전극이 표면에 형성된 복수의 반도체 소자가 형성된 기판을 금형내에 장착하고, 이어서 상기 표면에 밀봉 수지를 공급하여 상기 외부 접속 전극 및 상기 기판을 상기 밀봉 수지로 밀봉하여 수지층을 형성하는 수지 밀봉 공정과,상기 외부 접속 전극이 형성된 위치에서 상기 기판을 상기 수지층과 함께 절단하여 개개의 반도체 소자로 분리하는 분리 공정을 구비한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제30항에 있어서,상기 분리 공정 실시전에는 상기 외부 접속 전극이 상기 기판에 형성된 인접하는 반도체 소자 사이에서 공유화 되어 있는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제12항 중 어느한 항 또는 제20항 내지 제31항 중 어느 한항에 있어서,적어도 상기 수지 밀봉 공정의 실시후에 또 상기 분리 공정을 실시하기 전에 상기 수지층 또는 상기 기판의 배면에 위치 맞춤 홈을 형성하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제32항에 있어서,상기 위치 맞춤홈은 상기 수지층 또는 상기 기판의 배면에 하프 스크라이브를 행함으로서 형성하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제12항 중 어느한 항 또는 제20항 내지 제29항 중 어느 한항에 있어서,상기 수지 밀봉 공정에서 상기 필름으로서 상기 돌기 전극과 간섭없는 위치에 철부 또는 요부가 형성된 것을 사용하고,상기 수지 밀봉 공정 종료후에 상기 철부 또는 요부에의해서 상기 수지층상에 형성되는 요철을 위치 맞춤부로서 이용하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제1항 내지 제12항 중 어느한 항 또는 제20항 내지 제29항 중 어느 한항에 있어서,상기 수지 밀봉 공정 종료후에 위치 맞춤 기준으로서 사용되는 위치 맞춤용 돌기 전극의 형성 위치에서의 밀봉 수지를 가공하여, 상기 위치 맞춤용 돌기 전극과 다른 돌기 전극을 식별하도록 하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 외부 단자와 전기적으로 접속되는 외부 접속 전극이 표면에 형성된 반도체 소자와,상기 외부 접속 전극을 덮도록 상기 반도체 소자의 표면에 형성된 수지층을 구비하고,상기 반도체 소자와 상기 수지층의 계면에서, 상기 외부 접속 전극이 측방으로 노출된 구성으로 한 것을 특징으로 하는 반도체 장치.
- 제36항 기재의 반도체 장치의 실장 방법에 있어서,상기 반도체 장치를 실장기판에 대해서 입설 상태로 실장하는 것을 특징으로 하는 반도체 장치의 실장 방법.
- 제37항에 있어서,상기 반도체 장치를 복수개 병렬 상태로 실장하는 동시에 인접하기 전에 상기 반도체 장치 끼리를 접착제로 접합하는 것을 특징으로 하는 반도체 장치의 실장 방법.
- 제37항에 있어서,상기 반도체 장치를 복수개 병렬 상태로 실장하는 동시에 상기 복수의 반도체 장치를 지지부재를 사용하여 입설 상태로 지지하는 것을 특징으로 하는 반도체 장치의 실장 방법.
- 제18항 또는 제19항 또는 제36항 중 어느 한항 기재의 반도체 장치의 실장 방법에 있어서,상기 반도체 장치를 인터포저 기판을 거쳐서 실장기판에 실장하는 것을 특징으로 하는 반도체 장치의 실장 방법.
- 제17항 또는 제18항에 있어서,상기 수지층을 다른 복수의 수지에 의해서 구성한 것을 특징으로 하는 반도체 장치.
- 적어도 표면상에 돌기 전극이 직접 형성된 반도체 소자와,상기 반도체 소자의 표면상에 형성되어 있고, 상기 돌기 전극의 선단부를 남기고 상기 돌기 전극을 밀봉하는 제1 수지층과,적어도 상기 반도체 소자의 배면을 덮도록 배설된 제2 수지층을 구비한 것을 특징으로 하는 반도체 장치.
- 적어도 표면상에 돌기 전극이 직접 형성된 반도체소자와,상기 반도체 소자의 표면상에 형성되어 있고, 상기 돌기 전극의 선단부를 남기고 상기 돌기 전극을 밀봉하는 수지층과,상기 수지층으로부터 노출된 상기 돌기 전극의 선단부에 형성된 외부 접속용 돌기 전극을 구비한 것을 특징으로 하는 반도체 장치.
- 적어도 가요성 기재에 반도체 소자 및 리드가 배설된 구성의 배선 기판을 금형내에 장착하고, 이어서 상기 반도체 소자의 배설 위치에 밀봉 수지를 공급하여 상기 반도체 소자를 수지 밀봉하는 수지 밀봉 공정과,상기 배선 기판에 형성된 리드와 전기적으로 접속하도록 돌기 전극을 형성하는 돌기 전극 형성 공정을 갖는 반도체 장치의 제조 방법에 있어서,상기 반도체 소자를 수지 밀봉하는 수단으로서 압축 성형법을 사용하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제44항에 있어서,상기 배선 기판을 형성할 때 상기 반도체 소자를 수납하는 캐비티부가 형성된 프레임체를 배설하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제44항 또는 제45항에 있어서,상기 수지 밀봉 공정에서 상기 금형의 상기 배선 기판과 대향하는 위치에 상기 밀봉 수지에 대한 이형성이 양호한 필름을 배설하고, 상기 금형이 상기 필름을 거쳐서 상기 밀봉 수지와 접촉하도록 구성한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제44항 또는 제45항에 있어서,상기 수지 밀봉 공정에서 상기 금형의 상기 배선 기판과 대향하는 위치에 상기 밀봉 수지에 대한 이형성이 양호한 판상 부재를 배설하고, 상기 금형이 상기 판상 부재를 거쳐서 상기 밀봉 수지와 접촉하도록 구성한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제47항에 있어서,상기 판상 부재로서 방열성이 양호한 재료를 선정한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제44항 내지 제48항중 어는 한항에 있어서,상기 수지 밀봉 공정에서 사용되는 금형에 잉여 수지를 제거하는 동시에 금형내에서의 밀봉 수지의 압력을 제어하는 잉여 수지 제거 기구를 설비한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제44항 내지 제49항중 어느 한항에 있어서,상기 배선 기판에 상기 반도체 소자의 형성 위치에서 측방으로 길게 연장된 연장부를 형성하고,상기 수지 밀봉 공정의 종료후에 상기 돌기 전극 형성 공정의 실시전에 상기 연장부를 절곡하는 절곡 공정을 실시하고,상기 돌기 전극 형성 공정에서 절곡된 상기 연장부에 상기 돌기 전극을 형성하는 것을 특징을 하는 반도체 장치의 제조 방법.
- 제44항 내지 제49항중 어느 한 항에 있어서,상기 배선 기판에 상기 반도체 소자의 형성 위치에서 측방으로 길게 연장된 연장부를 형성하고,상기 수지 밀봉 공정의 실시전에 상기 연장부를 절곡하는 절곡 공정을 실시하고,상기 절곡 공정을 실시 한후에 상기 수지 밀봉 공정과 상기 돌기 전극 형성 공정을 실시하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제50항 또는 제51항에 있어서,상기 연장부의 선단부에 상기 반도체 소자와 접속되는 접속 전극을 형성해 두고, 상기 절곡 공정의 실시후에 상기 반도체 소자와 상기 접속 전극을 접속하는 소자 접속 공정을 행하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제51항에 있어서,상기 접속 전극을 지그재그 상으로 배설하는 동시에 각부를 곡선상으로 형성한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 반도체 소자와,외부 접속 단자로서 기능하는 돌기 전극과,가요성 기재상에 상기 반도체 소자에 일단이 접속되도록 하는 동시에 타단부가 상기 돌기 전극에 접속되는 리드가 형성된 배선 기판과,상기 반도체 소자를 밀봉하는 밀봉 수지를 구비하는 반도체 장치에 있어서,상기 배선 기판에 상기 반도체 소자의 형성 위치에서 측방으로 연장하는 동시에 절곡된 연장부를 형성하고, 상기 연장부에 상기 돌기 전극이 형성되어 있는 것을 특징으로 하는 반도체 장치.
- 제54항에 있어서,상기 배선 기판을 지지하는 동시에 상기 반도체 소자를 수납하는 캐비티부가 형성된 프레임체가 설비되어 있는 것을 특징으로 하는 반도체 장치.
- 제54항 또는 제55항에 있어서,상기 돌기 전극이 상기 리드를 소성 변형함으로서 형성된 메카니컬 범프인 것을 특징으로 하는 반도체 장치.
- 단수 또는 복수의 반도체 소자와,상기 반도체 소자의 일부 또는 전부를 밀봉하는 밀봉 수지와,상기 밀봉 수지내에 배설되고, 상기 반도체 소자와 전기적으로 접속하는 동시에 일부가 적어도 상기 밀봉 수지의 측면에 노출되어 외부 접속단자를 형성하는 전극판을 구비하는 것을 특징으로 하는 반도체 장치.
- 제57항에 있어서,상기 반도체 소자와 상기 전극판을 플립칩 접합한 것을 특징으로 하는 반도체 장치.
- 제57항 또는 제58항에 있어서,상기 전극판을 상기 밀봉 수지의 측면에 더하여 저면으로도 노출시켜 외부 접속 단자를 형성하도록 구성한 것을 특징으로 하는 반도체 장치.
- 제57 또는 제58 에 있어서,상기 전극판에 돌출 형성된 돌출 단자를 설비하는 동시에 상기 돌출 단자를 상기 밀봉 수지의 저면으로 노출시켜 외부 접속 단자를 형성하는 구성으로 한 것을 특징으로 하는 반도체 장치.
- 제60항에 있어서,상기 돌기 단자는 상기 전극판을 소성가공함으로서 상기 전극판에 일체적으로 형성한 것을 특징으로 하는 반도체 장치.
- 제60항에 있어서,상기 돌출 단자는 상기 전극판에 배설된 돌기 전극인 것을 특징으로 하는 반도체 장치.
- 제57항 내지 제62항 중 어느 한항에 있어서,상기 반도체 소자의 일부를 상기 밀봉 수지로부터 노출시킨 구성으로 한 것을 특징으로 하는 반도체 장치.
- 제57항 또는 제63항에 있어서,상기 밀봉 수지의 상기 반도체 소자의 근접하는 위치에 방열 부내를 배설한 것을 특징으로 하는 반도체 장치.
- 금속 기판에 대해서 패턴을 성형 처리를 행함으로서 전극판을 형성하는 전극판 형성공정과,상기 전극판에 반도체 소자를 탑재하여 전기적으로 접속하는 칩탑재 공정과,상기 반도체 소자 및 상기 전극판을 밀봉하는 밀봉 수지를 형성하는 밀봉 수지 형성 공정과,각각의 반도체 장치의 경계 위치에서 상기 밀봉 수지 및 상기 전극판을 절단함으로서 각각의 반도체 장치를 절출하는 절단 공정을 갖는 것을 특징으로 하는 반도체 장치 제조 방법.
- 제65항에 있어서,상기 전극판 형성 공정에서 실시하는 패턴 성형 처리는 에칭법 또는 프레스 가공법을 사용하여 행하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제65항 또는 제66항에 있어서,상기 칩 탑재 공정에서 상기 반도체 소자를 상기 전극판에 탑재하는 수단으로서 플립칩 접합법을 사용한 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제65항 또는 제67항에 있어서,상기 칩 탑재 공정을 실시하기 전에 상기 반도체 소자를 방열부재상에 위치 맞춤하여 부착하는 칩부착 공정을 실시하고,상기 칩탑재 공정에 있어서, 상기 방열 부재에 부착된 상태에서 상기 반도체 소자를 상기 전극판에 탑재하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제65항 또는 제68항에 있어서,상기 전극판 형성 공정에서 상기 전극판으로부터 돌출하는 돌출 단자를 형성하는 동시에 상기 밀봉 수지 형성 공정에서 상기 돌출 단자가 상기 밀봉 수지로부터 노출하도록 상기 밀봉 수지를 형성하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 제57항 내지 제64항중 어느 한항에서 기재된 반도체 장치를 실장 기판에 실장하는 반도체 장치의 실장 구조에 있어서,상기 반도체 장치가 장착되는 장착부와, 상기 밀봉 수지의 측면으로 노출된 외부 접속 단자와 접속하도록 설비한 리드부를 갖는 소켓을 사용하고,상기 반도체 장치를 상기 소켓에 장착하여 상기 리드부와 상기 외부 접속단자를 접속한 후에 상기 리드부를 상기 실장 기판에 접합시키는 것을 특징으로 하는 반도체 장치의 실장구조.
- 제60항 내지 제62항에서 기재된 반도체 장치를 실장 기판에 실장하는 반도체 장치의 실장 구조에 있어서,상기 외부 단자를 형성하는 상기 돌출 단자에 범프를 배설하고 상기 범프를 거쳐서 상기 반도체 장치를 상기 실장 기판에 접합시키는 것을 특징으로 하는 반도체 장치의 실장 구조.
- 제59항 내지 제64 중어느 한항에 기재된 반도체 장치를 실장 기판에 실장하는 반도체 장치의 실장 구조에 있어서,상기 외부 접속 단자의 형성 위치에 대응한 위치에 배설된 가요가능한 접속핀과, 상기 접속 핀을 위치 맞춤 하는 위치 맞춤 부재로 구성되는 실장부재를 사용하고,상기 접속핀의 상단부를 상기 반도체 장치의 외부 접속 단자에 접합하는 동시에 하단부를 상기 실장 기판에 접합하는 것을 특징으로 하는 반도체 장치의 실장 구조.
- 적어도 표면상에 돌기 전극이 직접 형성되어 되는 반도체 소자와, 상기 반도체 소자의 표면상에 형성되는 동시에 상기 돌기 전극의 선단부를 남기고 상기 돌기 전극을 밀봉하는 수지층을 구비하는 반도체 본체와,상기 반도체 장치 본체가 장착되는 동시에 상기 반도체 장치 본체가 접속되는 배선 패턴이 베이스 부재상에 형성된 인터포저와,접착성 및 압압 방향에 대해서 도전성을 갖고 있고, 상기 반도체 장치 본체와 상기 인터포저의 사이에 장착되고, 상기 반도체 장치 본체를 상기 인터포저에 접착 고정하는 동시에 압압됨으로서 상기 반도체 장치 본체와 상기 인터포저를 전기적으로 접속하는 이방성 도전막과,상기 베이스부재에 형성된 구멍을 거쳐서 상기 배선 패턴과 접속되는 동시에 상기 반도체 장치 본체의 탑재면과 반대측의 면에 배설되는 외부 접속단자를 구비하는 것을 특징으으로 하는 반도체 장치.
- 제73항에 있어서,상기 반도체 장치 본체에 형성된 상기 돌기 전극의 배설 피치와,상기 인터포저에 배설된 상기 외부 접속 단자의 배설 피리를 동일 피치로 한 것을 특징으로 하는 반도체 장치.
- 제73항에 있어서,상기 반도체 장치 본체에 형성된 상기 돌기 전극의 배설 피치에 대해서 상기 인터포저에 배설된 상기 외부 접속 단자의 배설 피치를 크게 설정한 것을 특징으로 하는 반도체 장치.
- 제73항 내지 제75항중 어느한 항에 있어서,상기 인터포저 상에 상기 돌기 전극과 대향하는 위치에 구멍을 갖는 절연 부재를 배설한 것을 특징으로 하는 반도체 장치.
- 제73항 내지 제76항중 어느 한항에 있어서,상기 인터포저로서 TAB(Tape Automated Bonding)테이프를 사용한 것을 특징으로 하는 반도체 장치.
- 반도체 소자의 적어도 표면상에 돌기 전극을 직접 형성하는 동시에 상기 반도체 소자의 표면상에 상기 돌기 전극의 선단부를 남기고 수지층을 형성하여 반도체 장치 본체를 형성하는 반도체 장치 본체 형성 공정과,베이스부재상에 상기 반도체 장치 본체가 접속되는 배선 패턴을 형성하는 동시에, 상기 베이스 부재의 상기 돌기 전극 형성 위치에 대응하는 위치에 구멍을 형성하여 인터포저를 형성하는 인터포저 형성 공정과,상기 반도체 장치 본체 또는 상기 인터포저를 접착성 및 압압 방향에 대한 도전성을 갖는 이방성 도전막을 거쳐서 접합하고, 상기 반도체 장치 본체를 상기 인터포저에 접착 고정하는 동시에 압압되게 함으로서 상기 반도체 장치 본체와 상기 인터포저를 전기적으로 접속하는 접합공정과,상기 반도체 장치 본체의 탑재면과 반대측 면에 상기 베이스 부재로 형성된 구멍을 거쳐서 상기 배선 패턴과 접속되도록 외부 접속 단자를 형성하는 외부 접속 단자 형성 공정을 구비하는 것을 특징으로 하는 반도체 장치의 제조 방법.
- 적어도 표면상에 돌기 전극이 직접 형성되어 되는 반도체 소자와, 상기 반도체 소자의 표면상에 형성되는 동시에 상기 돌기 전극의 선단부를 남기고 상기 돌기 전극을 밀봉하는 수지층을 구비하는 반도체 장치 본체와,상기 반도체 장치 본체가 장착되는 동시에 상기 반도체 장치 본체가 접속 되는 배선 패턴이 베이스 부재상에 형성된 인터포저와,상기 반도체 장치 본체와 상기 인터포저의 사이에 삽입 설치되고, 상기 반도체 장치 본체를 상기 인터포저에 접착 고정하는 접착제와,상기 반도체 장치 본체와 상기 인터포저를 전기적으로 접속하는 도전성 부재와, 상기 베이스 부재에 형성된 구멍을 거쳐서 상기 배선 패턴과 접속되어 있는 동시에 상기 반도체 장치 본체의 탑재면과 반대측 면에 배설되는 외부 접속 단자를 구비하는 것을 특징으로 하는 반도체 장치.
- 제79항에 있어서,상기 도전성 부재는 도전성 페이스트인 것을 특징으로하는 반도체 장치.
- 제79항에 있어서,상기 도전성 부재는 스터드 범프인 것을 특징으로하는 반도체 장치.
- 제79항에 있어서,상기 도전성 부재는 상기 배선 패턴과 일체적으로 형성되는 동시에 상기 접착제의 배설 위치를 우회하여 상기 돌기 전극에 접속하는 플라잉 리드인 것을 특징으로 하는 반도체 장치.
- 제82항에 있어서,적어도 상기 돌기 전극과 상기 플라잉 리드의 접속 위치를 수지 밀봉하는 구성으로 한 것을 특징으로 하는 반도체 장치.
- 제79항에 있어서,상기 도전성 부재는,상기 돌출 전극의 형성 위치에 대응한 위치에 배설되고, 그 상단부를 상기 반도체 장치의 돌기 전극에 접합하는 동시에 하단부를 상기 외부 접속 단자에 접합하는 접속핀과,상기 접속핀을 위치 맞춤하는 위치 맞춤 부재에 의해서 구성되는 것을 특징으로 하는 반도체 장치.
- 제84항에 있어서,상기 위치 맞춤 부재는 가요성 부재로 형성 되어 있는 것을 특징으로 하는 반도체 장치.
- 반도체 소자의 적어도 표면상에 돌기 전극을 직접 형성하는 동시에 상기 반도체 소자의 표면상에 상기 돌기 전극의 선단부를 남기고 수지층을 형성하여 반도체 장치 본체를 형성하는 반도체 장치 본체 형성 공정과,베이스부재상에 상기 반도체 장치 본체가 접속되는 배선 패턴을 형성하는 동시에, 상기 베이스 부재의 상기 돌기 전극 형성 위치에 대응하는 위치에 구멍을 형성하여 인터포저를 형성하는 인터포저 형성 공정과,상기 반도체 장치 본체 또는 상기 인터포저의 적어도 한쪽에 도전성 부재를 배설하는 도전성 부재 배설 공정과,상기 반도체 장치 본체와 상시 인터포저를 접착제를 거쳐서 접합하는 동시에 상기 도전성 부재에 의해서 상기 반도체 장치 본체와 상기 인터포저를 전기적으로 접합하는 접합 공정과,상기 반도체 장치 본체의 탑재면과 반대측 면에 상기 베이스 부재에 형성된 구멍을 거쳐서 상기 배선 패턴과 접속되도록 외부 접속 단자를 형성하는 외부 접속 단자 형성 공정을 구비한 것을 특징으로 하는 반도체 장치의 제조 방법.
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KR10-2001-7010597A KR100373554B1 (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치의 제조 방법, 반도체 장치 및 그 실장 구조 |
KR1020017010285A KR100357278B1 (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치 |
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JP276634 | 1996-10-18 | ||
JP8276634A JPH10125705A (ja) | 1996-10-18 | 1996-10-18 | 半導体装置の製造方法及び半導体装置 |
JP97-010683 | 1997-01-23 | ||
JP10683 | 1997-01-23 | ||
JP09010683A JP3137322B2 (ja) | 1996-07-12 | 1997-01-23 | 半導体装置の製造方法及び半導体装置製造用金型及び半導体装置 |
JP97-181132 | 1997-07-07 | ||
JP181132 | 1997-07-07 | ||
JP9181132A JPH1126642A (ja) | 1997-07-07 | 1997-07-07 | 半導体装置及びその製造方法及びその実装構造 |
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KR1019980701863A KR19990063586A (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치의 제조 방법 및 반도체 장치 제조용 금형 및 반도체 장치 및 그 실장방법 |
KR1020017010285A KR100357278B1 (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치 |
KR10-2001-7010597A KR100373554B1 (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치의 제조 방법, 반도체 장치 및 그 실장 구조 |
KR10-2002-7008494A KR100418743B1 (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치의 제조 방법 및 반도체 장치 |
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KR1020017010285A KR100357278B1 (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치 |
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KR10-2002-7008494A KR100418743B1 (ko) | 1996-07-12 | 1997-07-10 | 반도체 장치의 제조 방법 및 반도체 장치 |
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EP (4) | EP0853337B1 (ko) |
KR (6) | KR100484962B1 (ko) |
CN (3) | CN1110846C (ko) |
DE (1) | DE69730940T2 (ko) |
TW (1) | TW360961B (ko) |
WO (1) | WO1998002919A1 (ko) |
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- 1997-07-10 KR KR10-2003-7008937A patent/KR100484962B1/ko not_active IP Right Cessation
- 1997-07-10 KR KR1019980701863A patent/KR19990063586A/ko active Search and Examination
- 1997-07-10 DE DE69730940T patent/DE69730940T2/de not_active Expired - Lifetime
- 1997-07-10 CN CN97191078A patent/CN1110846C/zh not_active Expired - Lifetime
- 1997-07-10 CN CNB021262330A patent/CN100428449C/zh not_active Expired - Lifetime
- 1997-07-10 CN CN02126232A patent/CN1420538A/zh active Pending
- 1997-07-10 EP EP97930760A patent/EP0853337B1/en not_active Expired - Lifetime
- 1997-07-10 EP EP02016816A patent/EP1271640A3/en not_active Withdrawn
- 1997-07-10 EP EP01126200A patent/EP1189271A3/en not_active Withdrawn
- 1997-07-10 WO PCT/JP1997/002405 patent/WO1998002919A1/ja active IP Right Grant
- 1997-07-10 EP EP01126199A patent/EP1189270A3/en not_active Withdrawn
- 1997-07-10 KR KR1020017010285A patent/KR100357278B1/ko not_active IP Right Cessation
- 1997-07-10 KR KR10-2001-7010597A patent/KR100373554B1/ko not_active IP Right Cessation
- 1997-07-10 KR KR10-2002-7008494A patent/KR100418743B1/ko not_active IP Right Cessation
- 1997-07-10 KR KR10-2003-7015884A patent/KR100469516B1/ko not_active IP Right Cessation
- 1997-07-10 US US09/029,608 patent/US20010003049A1/en not_active Abandoned
- 1997-07-11 TW TW086109806A patent/TW360961B/zh not_active IP Right Cessation
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2001
- 2001-01-23 US US09/766,656 patent/US20020030258A1/en not_active Abandoned
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100691678B1 (ko) * | 2000-07-03 | 2007-03-09 | 후지쯔 가부시끼가이샤 | 웨이퍼 레벨 반도체 장치의 제조 방법 및 반도체 장치 |
KR100780829B1 (ko) * | 2001-05-21 | 2007-11-29 | 히다찌 케이블 리미티드 | 반도체 장치용 테이프 캐리어 및 그것을 이용한 반도체 장치 |
KR100569686B1 (ko) * | 2001-10-31 | 2006-04-11 | 신꼬오덴기 고교 가부시키가이샤 | 반도체 장치용 다층 기판 |
US7196426B2 (en) | 2001-10-31 | 2007-03-27 | Shinko Electric Industries Co., Ltd. | Multilayered substrate for semiconductor device |
US7847389B2 (en) | 2005-11-15 | 2010-12-07 | Nec Corporation | Semiconductor package, electronic part and electronic device |
KR101480782B1 (ko) * | 2013-06-19 | 2015-01-14 | 대덕지디에스 주식회사 | 기판 추락방지 클램프 |
Also Published As
Publication number | Publication date |
---|---|
US20010003049A1 (en) | 2001-06-07 |
DE69730940T2 (de) | 2005-03-10 |
KR100418743B1 (ko) | 2004-02-18 |
TW360961B (en) | 1999-06-11 |
CN100428449C (zh) | 2008-10-22 |
US20020030258A1 (en) | 2002-03-14 |
EP1189271A2 (en) | 2002-03-20 |
KR20030097909A (ko) | 2003-12-31 |
KR100484962B1 (ko) | 2005-04-25 |
EP1189271A3 (en) | 2003-07-16 |
EP0853337A4 (en) | 2000-02-16 |
KR100469516B1 (ko) | 2005-02-02 |
WO1998002919A1 (fr) | 1998-01-22 |
EP1271640A2 (en) | 2003-01-02 |
CN1420538A (zh) | 2003-05-28 |
CN1420555A (zh) | 2003-05-28 |
CN1110846C (zh) | 2003-06-04 |
EP0853337B1 (en) | 2004-09-29 |
KR100373554B1 (ko) | 2003-02-26 |
DE69730940D1 (de) | 2004-11-04 |
EP1271640A3 (en) | 2003-07-16 |
CN1198839A (zh) | 1998-11-11 |
KR20040004482A (ko) | 2004-01-13 |
EP0853337A1 (en) | 1998-07-15 |
KR100357278B1 (ko) | 2002-10-19 |
EP1189270A2 (en) | 2002-03-20 |
EP1189270A3 (en) | 2003-07-16 |
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