JPS6437854A - Manufacture of lead frame for semiconductor device - Google Patents
Manufacture of lead frame for semiconductor deviceInfo
- Publication number
- JPS6437854A JPS6437854A JP19463187A JP19463187A JPS6437854A JP S6437854 A JPS6437854 A JP S6437854A JP 19463187 A JP19463187 A JP 19463187A JP 19463187 A JP19463187 A JP 19463187A JP S6437854 A JPS6437854 A JP S6437854A
- Authority
- JP
- Japan
- Prior art keywords
- section
- lead
- lead frame
- island
- working
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To form a lead frame without deformation in a short time by conducting plating as an island section and the nose of an inner lead section are left as they are connected and detaching the island section and the nose of the inner lead section. CONSTITUTION:The noses of inner lead sections and an island section are connected through press working or etching working, and a lead frame 10 in which inner-lead forming predetermined sections 1A and an island forming prearranged section are unified is manufactured. A required section including the inner-lead forming predetermined sections 1A and the island forming prearranged section 2A is plated 3. The unnecessary section of the plated lead frame 10 is removed through press working or etching working. The finished product of the lead frame 10 is acquired through cutting by press working, etc., by cutting lines 4.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19463187A JPS6437854A (en) | 1987-08-03 | 1987-08-03 | Manufacture of lead frame for semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19463187A JPS6437854A (en) | 1987-08-03 | 1987-08-03 | Manufacture of lead frame for semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6437854A true JPS6437854A (en) | 1989-02-08 |
Family
ID=16327727
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19463187A Pending JPS6437854A (en) | 1987-08-03 | 1987-08-03 | Manufacture of lead frame for semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6437854A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998002919A1 (en) * | 1996-07-12 | 1998-01-22 | Fujitsu Limited | Method and mold for manufacturing semiconductor device, semiconductor device, and method for mounting the device |
US6881611B1 (en) | 1996-07-12 | 2005-04-19 | Fujitsu Limited | Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device |
-
1987
- 1987-08-03 JP JP19463187A patent/JPS6437854A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998002919A1 (en) * | 1996-07-12 | 1998-01-22 | Fujitsu Limited | Method and mold for manufacturing semiconductor device, semiconductor device, and method for mounting the device |
US6881611B1 (en) | 1996-07-12 | 2005-04-19 | Fujitsu Limited | Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device |
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