FR3051971B1 - Procede de fabrication d'une structure semi-conductrice comprenant un interposeur - Google Patents

Procede de fabrication d'une structure semi-conductrice comprenant un interposeur Download PDF

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Publication number
FR3051971B1
FR3051971B1 FR1654831A FR1654831A FR3051971B1 FR 3051971 B1 FR3051971 B1 FR 3051971B1 FR 1654831 A FR1654831 A FR 1654831A FR 1654831 A FR1654831 A FR 1654831A FR 3051971 B1 FR3051971 B1 FR 3051971B1
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France
Prior art keywords
temporary support
semiconductor structure
interposer
manufacturing
structure including
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FR1654831A
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English (en)
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FR3051971A1 (fr
Inventor
Bich-Yen Nguyen
Ludovic Ecarnot
Nadia Ben Mohamed
Christophe Maleville
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Soitec SA
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Soitec SA
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Priority to FR1654831A priority Critical patent/FR3051971B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to PCT/EP2017/062556 priority patent/WO2017207390A1/fr
Priority to DE112017002718.7T priority patent/DE112017002718T5/de
Priority to US16/305,695 priority patent/US11114314B2/en
Priority to SG11201810104VA priority patent/SG11201810104VA/en
Priority to CN201780032360.1A priority patent/CN109196627B/zh
Priority to KR1020187034604A priority patent/KR102397140B1/ko
Priority to SG10201913072VA priority patent/SG10201913072VA/en
Priority to TW106117418A priority patent/TWI712106B/zh
Publication of FR3051971A1 publication Critical patent/FR3051971A1/fr
Application granted granted Critical
Publication of FR3051971B1 publication Critical patent/FR3051971B1/fr
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Abstract

L'invention concerne un procédé permettant de former une structure semi-conductrice comprenant l'introduction, dans des conditions choisies, de composés d'hydrogène et d'hélium dans un support temporaire (1) afin de former une zone de faiblesse (2) à une profondeur prédéterminée à l'intérieur de celui-ci , et pour définir une couche superficielle (3) et une partie résiduelle (4) du support temporaire (1) ; la formation d'une couche d'interconnexion (5) sur le support temporaire (1) ; la mise en place d'au moins une puce à semi-conducteur (6) sur la couche d'interconnexion (5) et la fourniture d'énergie au support temporaire (1) pour détacher la partie résiduelle (4) et fournir la structure semiconductrice .
FR1654831A 2016-05-30 2016-05-30 Procede de fabrication d'une structure semi-conductrice comprenant un interposeur Active FR3051971B1 (fr)

Priority Applications (9)

Application Number Priority Date Filing Date Title
FR1654831A FR3051971B1 (fr) 2016-05-30 2016-05-30 Procede de fabrication d'une structure semi-conductrice comprenant un interposeur
DE112017002718.7T DE112017002718T5 (de) 2016-05-30 2017-05-24 Verfahren zur Herstellung einer Halbleiterstruktur mit einer Zwischenlage, die keine Kontaktdurchführung aufweist
US16/305,695 US11114314B2 (en) 2016-05-30 2017-05-24 Method for fabrication of a semiconductor structure including an interposer free from any through via
SG11201810104VA SG11201810104VA (en) 2016-05-30 2017-05-24 Method for fabrication of a semiconductor structure including an interposer free from any through via
PCT/EP2017/062556 WO2017207390A1 (fr) 2016-05-30 2017-05-24 Procédé de fabrication d'une structure semi-conductrice comprenant un interposeur ne comportant aucun trou d'interconnexion
CN201780032360.1A CN109196627B (zh) 2016-05-30 2017-05-24 包含无任何贯通孔的内插层的半导体结构的制造方法
KR1020187034604A KR102397140B1 (ko) 2016-05-30 2017-05-24 임의의 관통 비아가 없는 인터포저를 포함하는 반도체 구조의 제조 방법
SG10201913072VA SG10201913072VA (en) 2016-05-30 2017-05-24 Method for fabrication of a semiconductor structure including an interposer free from any through via
TW106117418A TWI712106B (zh) 2016-05-30 2017-05-25 用於製作包含中介層之半導體結構之方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1654831 2016-05-30
FR1654831A FR3051971B1 (fr) 2016-05-30 2016-05-30 Procede de fabrication d'une structure semi-conductrice comprenant un interposeur

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FR3051971A1 FR3051971A1 (fr) 2017-12-01
FR3051971B1 true FR3051971B1 (fr) 2019-12-13

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US (1) US11114314B2 (fr)
KR (1) KR102397140B1 (fr)
CN (1) CN109196627B (fr)
DE (1) DE112017002718T5 (fr)
FR (1) FR3051971B1 (fr)
SG (2) SG10201913072VA (fr)
TW (1) TWI712106B (fr)
WO (1) WO2017207390A1 (fr)

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TW202038266A (zh) * 2018-11-26 2020-10-16 瑞典商斯莫勒科技公司 具有離散的能量儲存構件之半導體組件

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FR2748851B1 (fr) * 1996-05-15 1998-08-07 Commissariat Energie Atomique Procede de realisation d'une couche mince de materiau semiconducteur
CN1420538A (zh) * 1996-07-12 2003-05-28 富士通株式会社 半导体装置的制造方法和半导体装置及其装配方法
JP3809733B2 (ja) * 1998-02-25 2006-08-16 セイコーエプソン株式会社 薄膜トランジスタの剥離方法
JP2001102523A (ja) * 1999-09-28 2001-04-13 Sony Corp 薄膜デバイスおよびその製造方法
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FR3051971A1 (fr) 2017-12-01
US20200328094A1 (en) 2020-10-15
WO2017207390A1 (fr) 2017-12-07
CN109196627A (zh) 2019-01-11
CN109196627B (zh) 2023-08-08
SG11201810104VA (en) 2018-12-28
US11114314B2 (en) 2021-09-07
TW201742189A (zh) 2017-12-01
KR102397140B1 (ko) 2022-05-16
KR20190015707A (ko) 2019-02-14
DE112017002718T5 (de) 2019-02-28
SG10201913072VA (en) 2020-03-30
TWI712106B (zh) 2020-12-01

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