JP5700327B2 - 小臨界次元のタングステン接点装置及び相互接続子の製法 - Google Patents
小臨界次元のタングステン接点装置及び相互接続子の製法 Download PDFInfo
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- JP5700327B2 JP5700327B2 JP2010093522A JP2010093522A JP5700327B2 JP 5700327 B2 JP5700327 B2 JP 5700327B2 JP 2010093522 A JP2010093522 A JP 2010093522A JP 2010093522 A JP2010093522 A JP 2010093522A JP 5700327 B2 JP5700327 B2 JP 5700327B2
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Description
PNLタングステンのみ:34Å,54 Å及び76Å
PNLタングステン+低温化学蒸着タングステン: 22Å PNL+8Å 化学蒸着 (計30Å), 22Å PNL+10Å 化学蒸着 (計32Å), 22Å PNL+15Å 化学蒸着 (計37Å)
本発明の方法は種々の販売業者から購入可能な種々の堆積装置で実行され得る。適当な装置の例にはNovellus Concept−1 AltusTM, Concept 2 AltusTM, Concept−2 ALTUS−STM, Concept 3 Altus 堆積システム、及びAltus MaxTM 或はその他の購入可能な化学蒸着ツールがある。或る場合に於いて、工程は複数の堆積部署で順に行うことが出来る。例えば米国特許6143082(あらゆる目的に参照して本願に編入されるものとする)を参照されたい。或る実施例に於いて、核形成層は単一の堆積チェンバ内に位置する2、5或はそれ以上の数の堆積部署の中の一つである第一部署で例えばパルスによる核形成工程によって堆積される。従って、還元ガス及びタングステン含有ガスは第一部署に於いてサブストレイトの表面に局地的雰囲気を生成する個別のガス供給システムを使用して交互にサブストレイトの表面に導入される。
本発明は多くの応用のための薄手低抵抗タングステン層の堆積に使用可能である。一応用例は電子装置に一般的に見られるビアホール、接点装置及びその他のタングステン構成物である。他の応用例としてメモリチップやマイクロプロセサのような集積回路での相互接続子がある。相互接続子は単一金属化層の上の電流線であり、一般的に長くて薄く平坦な構成である。相互接続子の基本的応用はメモリチップのビット線である。一般的に、本発明は薄くて低抵抗のタングステン層が必要とされる環境に応用面を見出すものである。
本発明は若干の実施例に関して記述されたものであるが、本発明の範囲内には多くの変更、置換、代行、均等のものが入る。例えば、上記の記述は主として特徴部の充填に関するものであったが、上記の方法は低抵抗タングステンフィルムのブランケット面への堆積にも使用できるものである。これらはタングステン層のブランケット堆積(上記の工法による)の後、電流を通すタングステン線の位置を定義するパタニング工程とタングステン線の外側の領域からタングステンを除去する工程を行って形成することが出来る。
[項目1]
サブストレイトの上の特徴部を充填する方法であって、
場の領域と、前記場の領域から陥凹し、側壁、底部、開口部及び隅から成る第一特徴部とを有するサブストレイトとを準備する工程;陥凹特徴部の側壁と底部にタングステン核形成層を堆積する工程;及び化学蒸着(CVD)工程によって特徴部を低温CVDタングステンバルク層で充填する工程とから成り、
CVD工程の間前記サブストレイトの温度が250°Cと350°Cの間に保たれるものである、方法。
[項目2]
第一陥凹特徴部を充填の後前記サブストレイトの温度を少なくとも50°C上昇させ、前記サブストレイトの温度を上昇させた後高温バルクタングステンCVD層を充填された前記第一陥凹特徴部の上に堆積する工法から更に成るものである、項目1に記載の方法。
[項目3]
第一陥凹特徴部が少なくとも10:1の縦横比を有するものである、項目1または2に記載の方法。
[項目4]
第一陥凹特徴部が少なくとも20:1の縦横比を有するものである、項目1または2に記載の方法。
[項目5]
第一陥凹特徴部の開口部の幅が100mm未満である、項目1から4のいずれか1項に記載の方法。
[項目6]
第一陥凹特徴部の開口部の幅が50mm未満である、項目1から4のいずれか1項に記載の方法。
[項目7]
第一陥凹特徴部の開口部の幅が40mm未満である、項目1から4のいずれか1項に記載の方法。
[項目8]
第一陥凹特徴部の充填が特徴部の隅を低温CVDバルク層で覆う工程から成るものである、項目1から7のいずれか1項に記載の方法。
[項目9]
前記サブストレイトが、前記場の領域から陥凹し、第一特徴部より縦横比の低い第二陥凹特徴部から更に成るものである、項目1から8のいずれか1項に記載の方法。
[項目10]
第一陥凹特徴部が充填された後前記サブストレイトの温度を少なくとも50°C上昇させ、前記サブストレイトの温度を上昇させた後高温バルクタングステンCVD層を堆積して前記第二陥凹特徴部を充填する工程から更に成るものである、項目9に記載の方法。
[項目11]
特徴部の低温CVDタングステンバルク層での充填が、ハロゲン化されたタングステン含有前駆物質及び還元剤をサブストレイトを収容する反応部署へ導入する工程から成るものである、項目1から10のいずれか1項に記載の方法。
[項目12]
ハロゲン化された前記タングステン含有前駆物質が六フッ化タングステンである、項目11に記載の方法。
[項目13]
前記特徴部が裏地層から成るものである、項目11に記載の方法。
[項目14]
前記裏地層がTi/TiN層である、項目13に記載の方法。
[項目15]
前記裏地層の厚さが5nm未満である、項目13に記載の方法。
[項目16]
タングステン核形成層を陥凹特徴部の側壁及び底部に堆積した後、特徴部を低温CVDタングステンバルク層で充填する前に、前記サブストレイトをタングステン前駆物質に浸潤させる工程から更に成るものである、項目1から15のいずれか1項に記載の方法。
[項目17]
前記CVD工程の間の前記サブストレイトの温度が250°Cと325°Cの間に保持されるものである、項目1から16のいずれか1項に記載の方法。
[項目18]
サブストレイトにタングステンフィルムを堆積する器具であって、
(イ)サブストレイト堆積多部署チェンバであって、
サブストレイト支持材及び前記サブストレイトをガスのパルスに露出するように形成された一個以上のガス注入口を有するタングステン核形成層堆積部署、
サブストレイト支持材及び前記サブストレイトをガスに露出するように形成された一個以上のガス注入口を有するバルク層堆積部署、から成る前記サブストレイト堆積多部署チェンバ、及び、
(ロ)多部署堆積チェンバ内の操作を制御する制御部であって、
前記タングステン核形成層堆積部署内で複数の還元剤パルス/パージガスパルス/タングステン含有前駆物質パルスサイクルを脈動させ、サブストレイト表面の上のタングステン核形成層の上に堆積させ、
前記サブストレイトを前記タングステン核形成層堆積部署から前記バルク層堆積部署へ運搬し、
前記サブストレイトの温度を250°Cと350°Cの間に保持しながら還元剤とタングステン含有前駆物質とを同時に前記バルク層堆積部署に流入させるためのコンピュータで読める命令から成る制御部、
とから成るものである器具。
[項目19]
更に低抵抗処理部署を有し、該低抵抗処理部署はサブストレイト支持材とサブストレイトをガスのパルスに露出するように形成されたガス注入口とを有し、制御部は更に複数の還元剤パルスを前記低抵抗処理部署へ脈動するコンピュータで読める命令から成り、サブストレイトを前記タングステン核形成層堆積部署から前記バルク層堆積部署へ運搬する命令はサブストレイトを前記タングステン核形成層堆積部署から低抵抗処理部署へ運搬する命令と、サブストレイトを前記低抵抗処理部署から前記バルク層堆積部署へ運搬する命令とから成るものである、項目18に記載の器具。
Claims (16)
- サブストレイトの上の特徴部を充填する方法であって、
前記サブストレイトの表面から陥凹し、側壁、底部、開口部及び隅から成る第一特徴部を有するサブストレイトを準備する工程;
前記第一特徴部の側壁と底部にタングステン核形成層を堆積する工程;
化学蒸着(CVD)工程によって前記第一特徴部を少なくとも部分的に低温タングステンCVD層で充填する工程;及び
タングステン核形成層を前記第一特徴部の側壁及び底部に堆積した後、前記第一特徴部を低温タングステンCVD層で充填する前に、前記サブストレイトをタングステン前駆物質に浸潤させる工程から成り、
前記CVD工程の間前記サブストレイトの温度が250°Cと350°Cの間に保たれるものである、方法。 - サブストレイトの上の特徴部を充填する方法であって、
前記サブストレイトの表面から陥凹し、側壁、底部、開口部及び隅から成る第一特徴部を有するサブストレイトを準備する工程;
前記第一特徴部の側壁と底部にタングステン核形成層を堆積する工程;
化学蒸着(CVD)工程によって前記第一特徴部を少なくとも部分的に低温タングステンCVD層で充填する工程;及び
前記第一特徴部を充填の後前記サブストレイトの温度を少なくとも70°C上昇させ、前記サブストレイトの温度を上昇させた後高温タングステンCVD層を前記充填された前記第一特徴部の上に堆積する工程から成り、
前記CVD工程の間前記サブストレイトの温度が250°Cと350°Cの間に保たれるものである、方法。 - 前記第一特徴部が少なくとも10:1の縦横比を有するものである、請求項1または2に記載の方法。
- 前記第一特徴部の開口部の幅が50nm未満である、請求項1から3のいずれか1項に記載の方法。
- 前記第一特徴部の充填が、前記第一特徴部の隅を低温タングステンCVD層で覆う工程から成るものである、請求項1から4のいずれか1項に記載の方法。
- 前記サブストレイトが、前記サブストレイトの前記表面から陥凹し、前記第一特徴部より縦横比の低い第二特徴部から更に成るものである、請求項1から5のいずれか1項に記載の方法。
- 前記第一特徴部が少なくとも部分的に充填された後前記サブストレイトの温度を少なくとも70°C上昇させ、前記サブストレイトの温度を上昇させた後高温タングステンCVD層を堆積して前記第二特徴部を少なくとも部分的に充填する工程から更に成るものである、請求項6に記載の方法。
- 前記第一特徴部の低温タングステンCVD層での充填が、ハロゲン化されたタングステン含有前駆物質及び還元剤をサブストレイトを収容する反応部署へ導入する工程から成るものである、請求項1から7のいずれか1項に記載の方法。
- 前記タングステン核形成層を堆積する前に、前記第一特徴部に厚さが5nm未満の下地層を形成する工程を更に有する、請求項8に記載の方法。
- 前記低温タングステンCVD層は前記第一特徴部の隅を覆い、
前記第一特徴部を充填の後前記サブストレイトの温度を少なくとも70°C上昇させ、前記サブストレイトの温度を上昇させた後高温タングステンCVD層を、前記低温タングステンCVD層により覆われた前記第一特徴部の隅を含む前記低温タングステンCVD層の上に堆積する工法を更に有する、請求項1から9のいずれか1項に記載の方法。 - 前記CVD工程の間の前記サブストレイトの温度が250°Cと325°Cの間に保持されるものである、請求項1から10のいずれか1項に記載の方法。
- 前記CVD工程の間前記サブストレイトの温度が250°Cと315°Cの間に保たれる請求項1から11のいずれか1項に記載の方法。
- サブストレイトの表面から陥凹し、側壁、底部、開口部及び隅から成る第一特徴部を有する前記サブストレイトを準備する段階;及び
請求項1から12の何れか1項に記載の方法によりサブストレイトの上の前記第一特徴部を少なくとも部分的に充填する段階
を備える半導体基板の製造方法。 - サブストレイトにタングステンフィルムを堆積する器具であって、
(イ)サブストレイト堆積多部署チェンバであって、
サブストレイト支持材及び前記サブストレイトをガスのパルスに露出するように形成された一個以上のガス注入口を有するタングステン核形成層堆積部署、
サブストレイト支持材及び前記サブストレイトをガスに露出するように形成された一個以上のガス注入口を有するバルク層堆積部署、から成る前記サブストレイト堆積多部署チェンバ、及び
(ロ)多部署堆積チェンバ内の操作を制御する制御部であって、
前記タングステン核形成層堆積部署内で複数の還元剤パルス/パージガスパルス/タングステン含有前駆物質パルスサイクルを脈動させ、サブストレイト表面の上のタングステン核形成層の上に堆積させ、
前記サブストレイトを前記タングステン核形成層堆積部署から前記バルク層堆積部署へ運搬し、
前記サブストレイトの温度を250°Cと350°Cの間に保持しながら還元剤とタングステン含有前駆物質とを同時に前記バルク層堆積部署に流入させて、低温タングステンCVD層を堆積させ、
前記タングステン核形成層を堆積した後、前記低温タングステンCVD層を堆積させる前に、前記サブストレイトをタングステン前駆物質に浸潤させるためのコンピュータで読める命令から成る制御部、
とから成るものである器具。 - サブストレイトにタングステンフィルムを堆積する器具であって、
(イ)サブストレイト堆積多部署チェンバであって、
サブストレイト支持材及び前記サブストレイトをガスのパルスに露出するように形成された一個以上のガス注入口を有するタングステン核形成層堆積部署、
サブストレイト支持材及び前記サブストレイトをガスに露出するように形成された一個以上のガス注入口を有するバルク層堆積部署、から成る前記サブストレイト堆積多部署チェンバ、及び
(ロ)多部署堆積チェンバ内の操作を制御する制御部であって、
前記タングステン核形成層堆積部署内で複数の還元剤パルス/パージガスパルス/タングステン含有前駆物質パルスサイクルを脈動させ、サブストレイト表面の上のタングステン核形成層の上に堆積させ、
前記サブストレイトを前記タングステン核形成層堆積部署から前記バルク層堆積部署へ運搬し、
前記サブストレイトの温度を250°Cと350°Cの間に保持しながら還元剤とタングステン含有前駆物質とを同時に前記バルク層堆積部署に流入させて、低温タングステンCVD層を堆積させ、
前記低温タングステンCVD層の堆積後、前記サブストレイトの温度を少なくとも70°C上昇させて高温タングステンCVD層を堆積させるためのコンピュータで読める命令から成る制御部、
とから成るものである器具。 - 更に低抵抗処理部署を有し、該低抵抗処理部署はサブストレイト支持材とサブストレイトをガスのパルスに露出するように形成されたガス注入口とを有し、制御部は更に複数の還元剤パルスを前記低抵抗処理部署へ脈動するコンピュータで読める命令から成り、サブストレイトを前記タングステン核形成層堆積部署から前記バルク層堆積部署へ運搬する命令はサブストレイトを前記タングステン核形成層堆積部署から低抵抗処理部署へ運搬する命令と、サブストレイトを前記低抵抗処理部署から前記バルク層堆積部署へ運搬する命令とから成るものである、請求項14または15に記載の器具。
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US20100267230A1 (en) | 2010-10-21 |
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KR101642917B1 (ko) | 2016-07-26 |
US20100267235A1 (en) | 2010-10-21 |
US8623733B2 (en) | 2014-01-07 |
KR20100114856A (ko) | 2010-10-26 |
US20140162451A1 (en) | 2014-06-12 |
KR20140096253A (ko) | 2014-08-05 |
JP2010251759A (ja) | 2010-11-04 |
US9236297B2 (en) | 2016-01-12 |
KR101495372B1 (ko) | 2015-02-24 |
TW201118948A (en) | 2011-06-01 |
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