JP4534062B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4534062B2
JP4534062B2 JP2006096999A JP2006096999A JP4534062B2 JP 4534062 B2 JP4534062 B2 JP 4534062B2 JP 2006096999 A JP2006096999 A JP 2006096999A JP 2006096999 A JP2006096999 A JP 2006096999A JP 4534062 B2 JP4534062 B2 JP 4534062B2
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JP
Japan
Prior art keywords
substrate
semiconductor chip
film
wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006096999A
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English (en)
Japanese (ja)
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JP2006324642A (ja
JP2006324642A5 (https=
Inventor
英二 林
強 呉
耕三 原田
伸治 馬場
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2006096999A priority Critical patent/JP4534062B2/ja
Priority to US11/406,337 priority patent/US7521799B2/en
Publication of JP2006324642A publication Critical patent/JP2006324642A/ja
Priority to US12/401,193 priority patent/US7791204B2/en
Publication of JP2006324642A5 publication Critical patent/JP2006324642A5/ja
Priority to US12/753,521 priority patent/US8018066B2/en
Application granted granted Critical
Publication of JP4534062B2 publication Critical patent/JP4534062B2/ja
Priority to US13/183,196 priority patent/US20110269273A1/en
Priority to US13/367,029 priority patent/US8314495B2/en
Priority to US13/648,876 priority patent/US8575757B2/en
Priority to US13/863,241 priority patent/US8581410B2/en
Priority to US14/044,497 priority patent/US8822269B2/en
Priority to US14/338,175 priority patent/US8928147B2/en
Priority to US14/569,423 priority patent/US9299681B2/en
Priority to US15/045,978 priority patent/US9496153B2/en
Priority to US15/241,777 priority patent/US9576890B2/en
Priority to US15/398,444 priority patent/US9831166B2/en
Priority to US15/796,746 priority patent/US10283444B2/en
Priority to US16/359,485 priority patent/US10714415B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Engineering & Computer Science (AREA)
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US8890001B2 (en) 2012-01-27 2014-11-18 Kyocera Slc Technologies Corporation Wiring board and mounting structure using the same

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US10283444B2 (en) 2019-05-07
US20190221509A1 (en) 2019-07-18
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US20130037947A1 (en) 2013-02-14
JP2006324642A (ja) 2006-11-30
US8581410B2 (en) 2013-11-12
US20060244128A1 (en) 2006-11-02
US9299681B2 (en) 2016-03-29
US10714415B2 (en) 2020-07-14
US20150099331A1 (en) 2015-04-09
US9496153B2 (en) 2016-11-15
US20160196987A1 (en) 2016-07-07
US20110269273A1 (en) 2011-11-03
US8314495B2 (en) 2012-11-20
US8822269B2 (en) 2014-09-02
US9831166B2 (en) 2017-11-28
US20180068936A1 (en) 2018-03-08
US8928147B2 (en) 2015-01-06
US20100187679A1 (en) 2010-07-29
US9576890B2 (en) 2017-02-21
US8575757B2 (en) 2013-11-05
US20120133045A1 (en) 2012-05-31
US20140327137A1 (en) 2014-11-06
US7521799B2 (en) 2009-04-21
US20170117216A1 (en) 2017-04-27
US20130228913A1 (en) 2013-09-05
US8018066B2 (en) 2011-09-13
US20140038361A1 (en) 2014-02-06
US20090174065A1 (en) 2009-07-09

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