JP2022523016A - 高度なパッケージング用途のための微細な再配線形成の方法 - Google Patents
高度なパッケージング用途のための微細な再配線形成の方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 77
- 238000004806 packaging method and process Methods 0.000 title claims description 15
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 106
- 239000010949 copper Substances 0.000 claims abstract description 104
- 229910052802 copper Inorganic materials 0.000 claims abstract description 103
- 239000010410 layer Substances 0.000 claims abstract description 75
- 239000012790 adhesive layer Substances 0.000 claims abstract description 44
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims abstract description 35
- 229910052750 molybdenum Inorganic materials 0.000 claims abstract description 35
- 239000011733 molybdenum Substances 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 claims abstract description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims description 36
- 239000011248 coating agent Substances 0.000 claims description 26
- 238000000576 coating method Methods 0.000 claims description 26
- 238000005530 etching Methods 0.000 claims description 26
- 230000008569 process Effects 0.000 claims description 23
- 239000004593 Epoxy Substances 0.000 claims description 13
- 238000007747 plating Methods 0.000 claims description 11
- 238000004544 sputter deposition Methods 0.000 claims description 8
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical group S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 claims description 5
- 229910052982 molybdenum disulfide Inorganic materials 0.000 claims description 5
- 230000005855 radiation Effects 0.000 claims description 3
- 239000004642 Polyimide Substances 0.000 abstract description 15
- 229920001721 polyimide Polymers 0.000 abstract description 15
- 238000010586 diagram Methods 0.000 abstract 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 11
- 238000005516 engineering process Methods 0.000 description 11
- 239000010936 titanium Substances 0.000 description 11
- 229910052719 titanium Inorganic materials 0.000 description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- 235000012431 wafers Nutrition 0.000 description 7
- 230000008901 benefit Effects 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 4
- 229920001646 UPILEX Polymers 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 239000000654 additive Substances 0.000 description 2
- MPTQRFCYZCXJFQ-UHFFFAOYSA-L copper(II) chloride dihydrate Chemical compound O.O.[Cl-].[Cl-].[Cu+2] MPTQRFCYZCXJFQ-UHFFFAOYSA-L 0.000 description 2
- 238000000708 deep reactive-ion etching Methods 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 125000003700 epoxy group Chemical group 0.000 description 2
- 239000012467 final product Substances 0.000 description 2
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 239000007791 liquid phase Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000004377 microelectronic Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000002344 surface layer Substances 0.000 description 2
- 101710179734 6,7-dimethyl-8-ribityllumazine synthase 2 Proteins 0.000 description 1
- 238000009623 Bosch process Methods 0.000 description 1
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 1
- 101710186609 Lipoyl synthase 2 Proteins 0.000 description 1
- 101710122908 Lipoyl synthase 2, chloroplastic Proteins 0.000 description 1
- 101710101072 Lipoyl synthase 2, mitochondrial Proteins 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 229910001431 copper ion Inorganic materials 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005868 electrolysis reaction Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
- H01L23/4828—Conductive organic material or pastes, e.g. conductive adhesives, inks
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- H01L23/00—Details of semiconductor or other solid state devices
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
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- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/145—Organic substrates, e.g. plastic
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Electroplating Methods And Accessories (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
Claims (15)
- 電気部品を製造するための方法であって、
エポキシ基板を配置することと、
モリブデンを含む接着層で前記エポキシ基板の少なくとも1つの面をコーティングすることと、
前記接着層を銅シード層でコーティングすることと、
前記銅シード層の少なくとも一部をフォトレジストのコーティングで覆うことと、
前記フォトレジストの前記コーティングの一部を除去して、表面フィーチャを生成することと、
前記表面フィーチャが銅で充填されるように、銅めっきプロセスを実行することと、
前記フォトレジストを除去して、銅表面を生成することと、
前記銅表面に銅シード層エッチングを実行して、銅エッチング表面を生成することと、
前記銅エッチング表面に接着層エッチングを実行することであって、前記接着層が、隣接する銅で充填された前記表面フィーチャの幅に実質的に等しい幅を有するようにエッチングされるように、接着層エッチングを実行することと、
を含む方法。 - 銅エッチングが、ウェット銅エッチングである、請求項1に記載の方法。
- 前記フォトレジストの前記コーティングの前記一部を除去することが、フォトレジスト現像剤を用いて実行される、請求項1に記載の方法。
- 前記エポキシ基板がエポキシ膜である、または前記モリブデンが二硫化モリブデンである、請求項1に記載の方法。
- モリブデンを含む接着層で前記エポキシ基板の少なくとも1つの面をコーティングすることが、スパッタリングプロセスによって実行され、前記スパッタリングプロセスが、マグネトロンによって生成される、請求項1に記載の方法。
- 電気部品を製造するための方法であって、
エポキシ基板であって、前記エポキシ基板上に配置されたモリブデンを含む接着層および前記接着層上に配置された銅シード層を有するエポキシ基板を配置することと、
前記銅シード層の少なくとも一部をフォトレジストのコーティングで覆うことと、
前記フォトレジストの前記コーティングを、マスクを通して放射線源に曝露することと、
前記フォトレジストの前記コーティングの一部を除去して、前記マスクから転写された表面フィーチャを生成することと、
前記表面フィーチャが銅で充填されるように、銅めっきプロセスを実行することと、
前記フォトレジストを除去して、銅表面を生成することと、
前記銅表面に銅シード層エッチングを実行して、銅エッチング表面を生成することと、
前記銅エッチング表面に接着層エッチングを実行することであって、前記接着層が、隣接する銅で充填された前記表面フィーチャの幅に実質的に等しい幅を有するようにエッチングされるように、接着層エッチングを実行することと、
を含む方法。 - 銅エッチングが、ウェット銅エッチングである、請求項6に記載の方法。
- 前記フォトレジストの前記コーティングの前記一部を除去することが、フォトレジスト現像剤を用いて実行される、請求項6に記載の方法。
- 前記エポキシ基板がエポキシ膜である、または前記モリブデンが二硫化モリブデンである、請求項6に記載の方法。
- モリブデンを含む接着層で前記エポキシ基板の少なくとも1つの面をコーティングすることが、スパッタリングプロセスによって実行され、前記スパッタリングプロセスが、マグネトロンによって生成される、請求項6に記載の方法。
- 第1の表面を有するエポキシ基板と、
前記第1の表面に接続されたモリブデン接着層と、
前記モリブデン接着層に接続されたシード層と、
前記シード層に接続された銅層と、
を備える構成体であって、前記モリブデン接着層が、前記銅層の幅に実質的に等しい幅を有する、構成体。 - 前記シード層が、銅シード層である、請求項11に記載の構成体。
- 前記銅層が、10/10μm未満のラインスペースパッケージング比であるフィーチャを有する、請求項11に記載の構成体。
- 前記銅層が、5/5μm未満のラインスペースパッケージング比であるフィーチャを有する、請求項11に記載の構成体。
- 前記銅層が、2/2μm未満のラインスペースパッケージング比であるフィーチャを有する、請求項11に記載の構成体。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US16/256,809 US11342256B2 (en) | 2019-01-24 | 2019-01-24 | Method of fine redistribution interconnect formation for advanced packaging applications |
US16/256,809 | 2019-01-24 | ||
PCT/US2019/064280 WO2020154041A1 (en) | 2019-01-24 | 2019-12-03 | Method of fine redistribution interconnect formation for advanced packaging applications |
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JP2022523016A true JP2022523016A (ja) | 2022-04-21 |
JP7423640B2 JP7423640B2 (ja) | 2024-01-29 |
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US (1) | US11342256B2 (ja) |
EP (1) | EP3915144A4 (ja) |
JP (1) | JP7423640B2 (ja) |
KR (1) | KR102554293B1 (ja) |
CN (1) | CN113330562A (ja) |
SG (1) | SG11202107219RA (ja) |
TW (1) | TWI729660B (ja) |
WO (1) | WO2020154041A1 (ja) |
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CN113330562A (zh) | 2021-08-31 |
TW202029314A (zh) | 2020-08-01 |
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KR102554293B1 (ko) | 2023-07-10 |
WO2020154041A1 (en) | 2020-07-30 |
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