JP2016504751A - ポリマー内への薄型チップの埋込み - Google Patents
ポリマー内への薄型チップの埋込み Download PDFInfo
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- JP2016504751A JP2016504751A JP2015536868A JP2015536868A JP2016504751A JP 2016504751 A JP2016504751 A JP 2016504751A JP 2015536868 A JP2015536868 A JP 2015536868A JP 2015536868 A JP2015536868 A JP 2015536868A JP 2016504751 A JP2016504751 A JP 2016504751A
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12043—Photo diode
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
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- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
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- H—ELECTRICITY
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- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
- H05K2203/1469—Circuit made after mounting or encapsulation of the components
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Abstract
Description
本出願は、2012年10月9日出願の「Embedding Thinned Chips and Interconnects in Flex Polymer」という名称の米国仮特許出願第61/711,629号明細書、および2013年3月15日出願の「EMBEDDING THIN CHIPS IN POLYMER」という名称の米国特許出願第13/844,638号明細書の優先権を主張するものであり、各特許出願の全体を、図面も含め、参照により本明細書に組み込む。
特定の例では、可撓性ポリマーの層は、約8μm、約10μm、約15μm、約25μm、約35μm、約50μm、約60μm、約75μm、または約85μmの厚さを有することができ、第1の導電性材料の層は、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有することができる。一例では、薄型チップは、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有することができる。
一例では、スタンドオフが、薄型チップの一部分を取り囲む。別の例では、スタンドオフは、薄型チップを完全に取り囲むことができる。一例では、スタンドオフと薄型チップの一部分との間に誘電体材料を配設することができる。
特定の例では、配設ステップはまた、スタンドオフの高さが薄型チップの高さよりも大きくなる、またはほぼ等しくなるように、スタンドオフの近位の可撓性ポリマーの一部分の上に薄型チップを配設するステップも含むことができる。
一例では、少なくとも1つのポリマー壁が、薄型チップの一部分を取り囲むことができる。別の例では、少なくとも1つのポリマー壁は、薄型チップを完全に取り囲むことができる。
別の例では、薄型チップは、少なくとも1つのポリマー壁の高さを薄型チップの高さよりも大きくする、またはほぼ等しくすることができるように、ウェル領域の内部に配設することができる。薄型チップは、少なくとも1つのポリマー壁の高さを薄型チップの高さよりも小さくすることができるように、ウェル領域の内部に配設することができる。一例では、少なくとも1つのポリマー壁と薄型チップの一部分との間に誘電体材料を配設することができる。
Kim et al.,“Stretchable and Foldable Silicon Integrated Circuits,”Science Express,March 27,2008,10.1126/science.1154367;
Ko et al.,“A Hemispherical Electronic Eye Camera Based on Compressible Silicon Optoelectronics,”Nature,August 7,2008,vol.454,pp.748−753;
Kim et al.,“Complementary Metal Oxide Silicon Integrated Circuits Incorporating Monolithically Integrated Stretchable Wavy Interconnects,”Applied Physics Letters,July 31,2008,vol.93,044102;
Kim et al.,“Materials and Noncoplanar Mesh Designs for Integrated Circuits with Linear Elastic Responses to Extreme Mechanical Deformations,”PNAS,December 2,2008,vol.105,no.48,pp.18675−18680;
Meitl et al.,“Transfer Printing by Kinetic Control of Adhesion to an Elastomeric Stamp,”Nature Materials,January,2006,vol.5,pp.33−38;
2009年3月5日出願、2010年1月7日公開の、「STRETCHABLE AND FOLDABLE ELECTRONIC DEVICES」という名称の米国特許出願公開第2010 0002402−A1号明細書;
2009年10月7日出願、2010年4月8日公開の、「CATHETER BALLOON HAVING STRETCHABLE INTEGRATED CIRCUITRY AND SENSOR ARRAY」という名称の米国特許出願公開第2010 0087782−A1号明細書;
2009年11月12日出願、2010年5月13日公開の、「EXTREMELY STRETCHABLE ELECTRONICS」という名称の米国特許出願公開第2010 0116526−A1号明細書;
2010年1月12日出願、2010年7月15日公開の、「METHODS AND APPLICATIONS OF NON−PLANAR IMAGING ARRAYS」という名称の米国特許出願公開第2010 0178722−A1号明細書;
2009年11月24日出願、2010年10月28日公開の、「SYSTEMS,DEVICES,AND METHODS UTILIZING STRETCHABLE ELECTRONICS TO MEASURE TIRE OR ROAD SURFACE CONDITIONS」という名称の米国特許出願公開第2010 027119−A1号明細書;
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2010年3月12日出願の、「SYSTEMS,METHODS,AND DEVICES FOR SENSING AND TREATMENT HAVING STRETCHABLE INTEGRATED CIRCUITRY」という名称の米国特許出願第12/723,475号明細書;
2010年1月12日出願の、「Methods and Applications of Non−Planar Imaging Arrays」という名称の米国特許出願第12/686,076号明細書;
2009年12月11日出願の、「Systems,Methods,and Devices Using Stretchable or Flexible Electronics for Medical Applications」という名称の米国特許出願第12/636,071号明細書;
2012年3月15日出願の、「METHODS AND APPARATUS FOR MEASURING TECHNICAL PARAMETERS OF EQUIPMENT,TOOLS AND COMPONENTS VIA CONFORMAL ELECTRONICS」という名称の米国特許出願公開第2012−0065937−A1号明細書;
2009年11月12日出願の、「Extremely Stretchable Electronics」という名称の米国特許出願第12/616,922号明細書;
2009年10月7日出願の、「Catheter Balloon Having Stretchable Integrated Circuitry and Sensor Array」という名称の米国特許出願第12/575,008号明細書;
2011年12月23日出願の、「Systems,Methods,and Devices Having Stretchable Integrated Circuitry for Sensing and Delivering Therapy」という名称の米国特許出願第13/336,518号明細書
前述の概念および以下において詳細に説明される追加的概念の全ての組合せが、(そのような概念が互いに矛盾していないと仮定して)本明細書で開示される本発明の主題の一部として考えられることを理解すべきである。また、参照により援用する任意の開示に現れることもある、本明細書で明示的に採用される用語は、本明細書で開示される特定の概念と最も一貫性のある意味を与えられるものとすることを理解すべきである。
本明細書で使用される語句「および/または」は、そのように連結された要素の「いずれかまたは両方」を意味するものと理解すべきであり、すなわち、要素は、いくつかの場合には接続的に存在し、他の場合には離接的に存在する。「および/または」を用いて列挙される複数の要素も同様に解釈すべきであり、すなわち、そのように連結された要素の「1つまたは複数」である。任意選択で、特に識別される要素に関係するか無関係であるかに関わらず、「および/または」節によって特に識別される要素以外の他の要素が存在してもよい。したがって、非限定的な例として、「備える」など制限のない語に関連して使用されるときの「Aおよび/またはB」への言及は、例えば、一実施形態では、(任意選択でB以外の要素を含んで)Aのみを表すことができ、別の実施形態では、(任意選択でA以外の要素を含んで)Bのみを表すことができ、さらに別の実施形態では、(任意選択で他の要素を含んで)AとBの両方を表すことができる。
Claims (98)
- A)スタンドオフウェル領域を備える基板を備える装置であって、
前記基板が、可撓性ポリマーの層の上に配設された第1の導電性材料の層を備え、
前記第1の導電性材料のパターン形成部分が、露出された可撓性ポリマーの一部分と境界を画すスタンドオフを備え、それにより前記スタンドオフウェル領域を形成し、
装置がさらに、
B)前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分の上で前記スタンドオフウェル領域の内部に配設された薄型チップを備え、
前記スタンドオフの高さが、前記薄型チップの高さと同等である
装置。 - 前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分で、前記スタンドオフウェル領域の内部に塗着された接着材を備え、前記薄型チップが、前記スタンドオフの近位の前記接着材の上に配設される請求項1に記載の装置。
- 前記接着材が、約8μm、約10μm、約12μm、約15μm、約20μm、約25μm、または約30μmの厚さを有する請求項2に記載の装置。
- 前記接着材が、導電性接着剤または非導電性接着剤を含む請求項2に記載の装置。
- 前記第1の導電性材料の前記パターン形成部分が、レーザアブレーションまたはエッチングを使用して形成される請求項1に記載の装置。
- 前記可撓性ポリマーが、ポリイミドまたは液晶ポリマーである請求項1に記載の装置。
- 前記第1の導電性材料が、銅、金、アルミニウム、またはそれらの何らかの組合せを含む請求項1に記載の装置。
- 前記基板が、銅−クラッドポリイミドである請求項1に記載の装置。
- 前記可撓性ポリマーの層が、約8μm、約10μm、約15μm、約25μm、約35μm、約50μm、約60μm、約75μm、または約85μmの厚さを有する請求項1に記載の装置。
- 前記第1の導電性材料の層が、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する請求項1に記載の装置。
- 前記薄型チップが、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する請求項1に記載の装置。
- 前記薄型チップが、薄型化されたチップである請求項1に記載の装置。
- 前記薄型化されたチップが、エッチングプロセスまたは研削プロセスを使用して薄型化されたチップから形成される請求項12に記載の装置。
- 前記スタンドオフの前記高さが前記薄型チップの前記高さよりも大きくなる、またはほぼ等しくなるように、前記薄型チップが前記スタンドオフウェル領域の内部に配設される請求項1に記載の装置。
- 前記スタンドオフの前記高さが前記薄型チップの前記高さよりも小さくなるように、前記薄型チップが前記スタンドオフウェル領域の内部に配設される請求項1に記載の装置。
- 前記薄型チップが、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する第1の導電性材料の層を有する請求項1に記載の装置。
- 前記基板の上に配設されたポリマーシートと、
前記ポリマーシートを通して形成された少なくとも1つのバイアと、
前記少なくとも1つのバイアの近位の前記ポリマーシートの一部分の上に配設された第2の導電性材料とをさらに備え、それにより、前記第2の導電性材料が、前記薄型チップの電気コンタクトとの電気的連絡を形成する
請求項1に記載の装置。 - 前記第2の導電性材料が、チタン、タングステン、金、ニッケル、クロム、またはそれらの何らかの組合せを含む請求項17に記載の装置。
- 前記スタンドオフが、前記薄型チップの一部分を取り囲む請求項1に記載の装置。
- 前記スタンドオフが、前記薄型チップを完全に取り囲む請求項1に記載の装置。
- 誘電体材料が、前記スタンドオフと前記薄型チップの一部分との間に配設される請求項1に記載の装置。
- 前記第1の導電性材料の上または前記可撓性ポリマーの上に配設された少なくとも1つの追加の層をさらに備え、前記少なくとも1つの追加の層が、前記薄型チップを前記装置の中立機械面に位置決めする請求項1に記載の装置。
- 薄型チップを埋め込むための方法であって、
A)スタンドオフウェル領域を備える基板を提供するステップを含み、
前記基板が、可撓性ポリマーの層の上に配設された第1の導電性材料の層を備え、
前記第1の導電性材料の少なくとも一部分が、露出された可撓性ポリマーの一部分と境界を画すスタンドオフを形成するようにパターン形成され、それにより前記スタンドオフウェル領域を形成し、
方法がさらに、
B)前記スタンドオフの高さが前記薄型チップの高さと同等になるように、前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分の上に薄型チップを配設するステップ
を含む方法。 - ステップB)の前に、前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分に接着材を配設するステップを含み、ステップB)が、前記スタンドオフの近位の前記露出された可撓性ポリマーの前記部分に塗着された接着材上に前記薄型チップを配設するステップを含む請求項23に記載の方法。
- 前記スタンドオフの前記高さが、薄型チップの前記高さよりも大きい、またはほぼ等しい請求項23に記載の方法。
- ステップB)が、前記スタンドオフの前記高さが前記薄型チップの前記高さよりも大きくなる、またはほぼ等しくなるように、前記スタンドオフの近位の前記可撓性ポリマーの一部分の上に前記薄型チップを配設するステップを含む請求項23に記載の方法。
- 前記薄型チップが、薄型化されたチップであり、ステップB)が、前記薄型化されたチップを提供するために、エッチングプロセスまたは研削プロセスを使用してチップを薄型化するステップと、前記スタンドオフの前記高さが前記薄型化されたチップの前記高さと同等になるように、前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分の上に前記薄型化されたチップを配設するステップとを含む請求項23に記載の方法。
- 前記基板の上にポリマーシートを配設するステップと、
前記ポリマーシートを通して少なくとも1つのバイアを形成するステップと、
前記少なくとも1つのバイアの近位の前記第2のポリマーシートの一部分の上に導電性材料を配設するステップとをさらに含み、それにより、前記導電性材料が、前記薄型チップの電気コンタクトとの電気的連絡を形成する
請求項23に記載の方法。 - 前記第1の導電性材料の上または前記可撓性ポリマーの上に少なくとも1つの追加の層を配設するステップをさらに含み、前記少なくとも1つの追加の層が、前記薄型チップを前記装置の中立機械面に位置決めする請求項23に記載の方法。
- A)ポリマーウェル領域を備える基板を備える装置であって、
前記基板が、第1の導電性材料の層の上に配設された可撓性ポリマーの層を備え、
前記可撓性ポリマーの少なくとも一部分にキャビティが形成されて、露出された第1の導電性材料の一部分と境界を画す少なくとも1つのポリマー壁を形成し、それによりポリマーウェル領域を形成し、
装置がさらに、
B)前記少なくとも1つのポリマー壁の近位の前記露出された第1の導電性材料の少なくとも一部分の上でポリマーウェル領域の内部に配設された薄型チップ
を備える装置。 - 前記少なくとも1つのポリマー壁の近位の前記露出された第1の導電性材料の少なくとも一部分で、前記ポリマーウェル領域の内部に塗着された接着材を備え、前記薄型チップが、前記少なくとも1つのポリマー壁の近位の前記接着材の上に配設される請求項30に記載の装置。
- 前記接着材が、約8μm、約10μm、約12μm、約15μm、約20μm、約25μm、または約30μmの厚さを有する請求項31に記載の装置。
- 前記接着材が、導電性接着剤または非導電性接着剤を含む請求項31に記載の装置。
- 前記キャビティが、レーザアブレーションまたはエッチングを使用して形成される請求項30に記載の装置。
- 前記可撓性ポリマーが、ポリイミドまたは液晶ポリマーである請求項30に記載の装置。
- 前記第1の導電性材料が、銅、金、アルミニウム、またはそれらの何らかの組合せを含む請求項30に記載の装置。
- 前記基板が、銅−クラッドポリイミドである請求項30に記載の装置。
- 前記可撓性ポリマーの層が、約8μm、約10μm、約15μm、約25μm、約35μm、約50μm、約60μm、約75μm、または約85μmの厚さを有する請求項30に記載の装置。
- 前記第1の導電性材料の層が、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する請求項30に記載の装置。
- 前記薄型チップが、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する請求項30に記載の装置。
- 前記薄型チップが、薄型化されたチップである請求項30に記載の装置。
- 前記薄型化されたチップが、エッチングプロセスまたは研削プロセスを使用して薄型化されたチップから形成される請求項40に記載の装置。
- 前記少なくとも1つのポリマー壁の前記高さが前記薄型チップの前記高さよりも大きくなる、またはほぼ等しくなるように、前記薄型チップが前記ポリマーウェル領域の内部に配設される請求項30に記載の装置。
- 前記少なくとも1つのポリマー壁の前記高さが前記薄型チップの前記高さよりも小さくなるように、前記薄型チップが前記ポリマーウェル領域の内部に配設される請求項30に記載の装置。
- 前記薄型チップが、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する第1の導電性材料の層を有する請求項30に記載の装置。
- 前記基板の上に配設されたポリマーシートと、
前記ポリマーシートを通して形成された少なくとも1つのバイアと、
前記少なくとも1つのバイアの近位の前記ポリマーシートの一部分の上に配設された第2の導電性材料とをさらに備え、それにより、前記第2の導電性材料が、前記薄型チップの電気コンタクトとの電気的連絡を形成する
を備える請求項30に記載の装置。 - 前記第2の導電性材料が、チタン、タングステン、金、ニッケル、クロム、またはそれらの何らかの組合せを含む請求項46に記載の装置。
- 前記少なくとも1つのポリマー壁が、前記薄型チップの一部分を取り囲む請求項30に記載の装置。
- 前記少なくとも1つのポリマー壁が、前記薄型チップを完全に取り囲む請求項30に記載の装置。
- 前記少なくとも1つのポリマー壁と前記薄型チップの一部分との間に誘電体材料が配設される請求項30に記載の装置。
- 前記第1の導電性材料の上または前記可撓性ポリマーの上に配設された少なくとも1つの追加の層をさらに備え、前記少なくとも1つの追加の層が、前記薄型チップを前記装置の中立機械面に位置決めする請求項30に記載の装置。
- 前記薄型チップが、薄型化されたチップであり、ステップB)が、前記薄型化されたチップを提供するために、エッチングプロセスまたは研削プロセスを使用してチップを薄型化するステップと、前記少なくとも1つの壁の前記高さが前記薄型化されたチップの前記高さと同等になるように、前記少なくとも1つのポリマー壁の近位の前記露出された第1の導電性材料の少なくとも一部分の上で前記ポリマーウェル領域内に前記薄型化されたチップを配設するステップとを含む請求項30に記載の装置。
- 薄型チップを埋め込むための方法であって、
A)ポリマーウェル領域を備える基板を提供するステップを含み、前記基板が、可撓性ポリマーの層と、第1の導電性材料の層とを備え、前記ポリマーウェル領域が、前記可撓性ポリマーの一部分から形成された少なくとも1つのポリマー壁と、前記第1の導電性材料の少なくとも一部分から形成されたベース領域とを備え、
方法がさらに、
B)前記少なくとも1つのポリマー壁の近位の前記第1の導電性材料の一部分の上で前記ポリマーウェル領域内に前記薄型チップを配設するステップ
を含む方法。 - ステップB)の前に、前記少なくとも1つのポリマー壁の近位の前記第1の導電の前記部分に接着材を配設するステップを含み、ステップB)が、前記少なくとも1つのポリマー壁の近位の前記接着材上に前記薄型チップを配設するステップを含む請求項53に記載の方法。
- 前記少なくとも1つのポリマー壁の前記高さが前記薄型チップの前記高さよりも大きくなる、またはほぼ等しくなるように、前記薄型チップが前記ポリマーウェル領域の内部に配設される請求項53に記載の方法。
- 前記少なくとも1つのポリマー壁の前記高さが前記薄型チップの前記高さよりも小さくなるように、前記薄型チップが前記ポリマーウェル領域の内部に配設される請求項53に記載の方法。
- 前記第1の導電性材料が前記薄型チップと物理的および電気的に連絡するように、前記薄型チップが前記ポリマーウェル領域の内部に配設される請求項53に記載の方法。
- 前記基板の上に配設されたポリマーシートと、
前記ポリマーシートを通して形成された少なくとも1つのバイアと、
前記少なくとも1つのバイアの近位の前記ポリマーシートの一部分の上に配設された第2の導電性材料とをさらに備え、それにより、前記第2の導電性材料が、前記薄型チップの電気コンタクトとの電気的連絡を形成する
請求項53に記載の方法。 - 前記第1の導電性材料の上または前記可撓性ポリマーの上に少なくとも1つの追加の層を配設するステップをさらに含み、前記少なくとも1つの追加の層が、前記薄型チップを前記装置の中立機械面に位置決めする請求項53に記載の方法。
- A)ウェル領域を備える可撓性基板を備える装置であって、前記可撓性基板が、ポリイミドまたは液晶ポリマーを備え、前記可撓性基板が、前記可撓性基板にウェル領域を形成するキャビティを含み、
装置がさらに、
B)前記ウェル領域の内部に配設された薄型チップを備え、前記ウェル領域の少なくとも1つのポリマー壁の高さが、前記薄型チップの高さと同等であり、
装置がさらに、
C)前記薄型チップの少なくとも一部分と実質的に接触する、前記ウェル領域の内部に配設されたポリマー接着材
を備える装置。 - 前記可撓性基板の上に配設されたポリマーシートと、
前記ポリマーシートを通して形成された少なくとも1つのバイアと、
前記少なくとも1つのバイアの近位の前記ポリマーシートの一部分の上に配設された導電性材料とをさらに備え、それにより、前記第2の導電性材料が、前記薄型チップの電気コンタクトとの電気的連絡を形成する
請求項60に記載の装置。 - 前記ポリマー接着材を通して形成された少なくとも1つのバイアと、
前記少なくとも1つのバイアの近位の前記ポリマー接着材の一部分の上に配設された導電性材料とをさらに備え、それにより、前記導電性材料が、前記薄型チップの電気コンタクトとの電気的連絡を形成する
請求項60に記載の装置。 - 前記ウェル領域の内部に塗着された接着材を備え、前記薄型チップが前記接着材の上に配設される請求項60に記載の装置。
- 前記少なくとも1つのポリマー壁の前記高さが前記薄型チップの前記高さよりも大きくなる、またはほぼ等しくなるように、前記薄型チップが前記ウェル領域の内部に配設される請求項60に記載の装置。
- 前記少なくとも1つのポリマー壁の前記高さが前記薄型チップの前記高さよりも小さくなるように、前記薄型チップが前記ウェル領域の内部に配設される請求項60に記載の装置。
- 前記少なくとも1つのポリマー壁と前記薄型チップの一部分との間に誘電体材料が配設される請求項60に記載の装置。
- A)少なくとも2つのスタンドオフウェル領域を備える基板を備える装置であって、
前記基板が、可撓性ポリマーの層の上に配設された第1の導電性材料の層を備え、
前記第1の導電性材料のパターン形成部分が、露出された可撓性ポリマーの幾つかの部分と境界を画す少なくとも2つのスタンドオフを備え、前記スタンドオフがそれぞれ、前記少なくとも2つのスタンドオフウェル領域の少なくとも1つを形成し、
装置がさらに、
B)少なくとも2つの薄型チップを備え、各薄型チップが、前記少なくとも2つのスタンドオフウェル領域の各1つの前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分の上で、前記少なくとも2つのスタンドオフウェル領域の各1つの内部に配設され、
前記少なくとも2つの薄型チップの1つの厚さが、前記少なくとも2つの薄型チップの別のものの厚さよりも大きく、
前記スタンドオフの高さが、前記少なくとも2つの薄型チップの1つの高さと同等である
装置。 - 前記少なくとも2つのスタンドオフウェル領域の各1つの前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分で、前記少なくとも2つのスタンドオフウェル領域の少なくとも1つの内部に塗着された接着材を備え、前記少なくとも2つの薄型チップの少なくとも1つが、前記スタンドオフの近位の前記接着材の上に配設される請求項67に記載の装置。
- 前記接着材が、約8μm、約10μm、約12μm、約15μm、約20μm、約25μm、約30μm、約40μm、約50μm、または約55μmの厚さを有する請求項68に記載の装置。
- 前記接着材が、導電性接着剤、および/または熱伝導性接着剤、および/または非導電性接着剤を含む請求項68に記載の装置。
- 前記接着材が導電性接着剤を含み、前記導電性接着剤を介して、前記少なくとも2つの薄型チップの少なくとも1つに接地電位が印加される請求項70に記載の装置。
- 前記第1の導電性材料の前記パターン形成部分が、レーザアブレーションまたはエッチングを使用して形成される請求項67に記載の装置。
- 前記可撓性ポリマーが、ポリイミドまたは液晶ポリマーである請求項67に記載の装置。
- 前記第1の導電性材料が、銅、金、アルミニウム、またはそれらの何らかの組合せを含む請求項67に記載の装置。
- 前記可撓性ポリマーの層が、約8μm、約10μm、約15μm、約25μm、約35μm、約50μm、約60μm、約75μm、約85μm、約100μm、約125μm、約150μm、約175μm、または約200μmの厚さを有する請求項67に記載の装置。
- 前記第1の導電性材料の層が、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する請求項67に記載の装置。
- 前記少なくとも2つの薄型チップの少なくとも1つが、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、約70μm、80マイクロメートル、約90マイクロメートル、約100マイクロメートル、約120マイクロメートル、約135マイクロメートル、または約150マイクロメートルの厚さを有する請求項67に記載の装置。
- 前記少なくとも2つの薄型チップの少なくとも1つが、薄型化されたチップであり、前記薄型化されたチップが、エッチングプロセスまたは研削プロセスを使用して薄型化されたチップから形成される請求項67に記載の装置。
- 前記スタンドオフの前記高さが前記基板の上での前記薄型チップの前記高さよりも約10マイクロメートル、約20マイクロメートル、約25マイクロメートル、約30マイクロメートル、約35マイクロメートル、約40マイクロメートル、または約45マイクロメートルだけ大きくなるように、前記少なくとも2つの薄型チップの少なくとも1つが前記少なくとも2つのスタンドオフウェル領域の少なくとも1つの内部に配設される請求項67に記載の装置。
- 前記スタンドオフの前記高さが前記薄型チップの前記高さよりも小さくなるように、前記少なくとも2つの薄型チップの少なくとも1つが前記スタンドオフウェル領域の少なくとも1つの内部に配設される請求項67に記載の装置。
- 前記少なくとも2つの薄型チップの少なくとも1つが、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する第1の導電性材料の層を有する請求項67に記載の装置。
- 前記基板の上に配設されたポリマーシートと、
前記ポリマーシートを通して形成された少なくとも1つのバイアと、
前記少なくとも1つのバイアの近位の前記ポリマーシートの一部分の上に配設された第2の導電性材料とをさらに備え、それにより、前記第2の導電性材料が、前記少なくとも2つの薄型チップの少なくとも1つの電気コンタクトとの電気的連絡を形成する
請求項67に記載の装置。 - 前記第2の導電性材料が、チタン、タングステン、金、ニッケル、クロム、またはそれらの何らかの組合せを含む請求項82に記載の装置。
- 前記スタンドオフが、前記薄型チップの一部分を取り囲む請求項67に記載の装置。
- 前記少なくとも2つのスタンドオフの少なくとも1つと、前記少なくとも2つの薄型チップの1つの一部分との間に誘電体材料が配設されて接触する請求項67に記載の装置。
- 前記第1の導電性材料の上または前記可撓性ポリマーの上に配設された少なくとも1つの追加の層をさらに備え、前記少なくとも1つの追加の層が、前記少なくとも2つの薄型チップの少なくとも1つを前記装置の中立機械面に位置決めする請求項67に記載の装置。
- A)少なくとも1つのポリマーウェル領域と、少なくとも1つのスタンドオフウェル領域とを備える基板を備える装置であって、
前記基板が、第1の導電性材料の層の上に配設された可撓性ポリマーの層を備え、
前記可撓性ポリマーの少なくとも一部分にキャビティが形成されて、露出された第1の導電性材料の一部分と境界を画す少なくとも1つのポリマー壁を形成し、それによりポリマーウェル領域を形成し、
前記第1の導電性材料のパターン形成部分が、露出された可撓性ポリマーの一部分と境界を画すスタンドオフを備え、それにより前記スタンドオフウェル領域を形成し、
装置がさらに、
B)少なくとも2つの薄型チップを備え、
前記少なくとも2つの薄型チップの1つが、前記少なくとも1つのポリマー壁の近位の前記露出された第1の導電性材料の少なくとも一部分の上で前記ポリマーウェル領域の内部に配設され、
前記少なくとも2つの薄型チップの別のものが、前記スタンドオフの近位の前記露出された可撓性ポリマーの少なくとも一部分の上で前記スタンドオフウェル領域の内部に配設され、
前記少なくとも2つの薄型チップの1つの厚さが、前記少なくとも2つの薄型チップの別のものの厚さよりも大きい
装置。 - (a)前記少なくとも1つのポリマー壁の近位の前記露出された第1の導電性材料の少なくとも一部分の上で前記ポリマーウェル領域の内部に、または(b)前記スタンドオフの近位の前記露出された可撓性ポリマーの一部分で、前記スタンドオフウェル領域の内部に塗着された接着材を備え、前記少なくとも2つの薄型チップの少なくとも1つが前記接着材の上に配設される請求項87に記載の装置。
- 前記接着材が、約8μm、約10μm、約12μm、約15μm、約20μm、約25μm、約30μm、約40μm、約50μm、または約55μmの厚さを有する請求項88に記載の装置。
- 前記接着材が、導電性接着剤、および/または熱伝導性接着剤、および/または非導電性接着剤を含む請求項88に記載の装置。
- 前記可撓性ポリマーが、ポリイミドまたは液晶ポリマーである請求項87に記載の装置。
- 前記第1の導電性材料が、銅、金、アルミニウム、またはそれらの何らかの組合せを含む請求項87に記載の装置。
- 前記可撓性ポリマーの層が、約8μm、約10μm、約15μm、約25μm、約35μm、約50μm、約60μm、約75μm、約85μm、約100μm、約125μm、約150μm、約175μm、または約200μmの厚さを有する請求項87に記載の装置。
- 前記第1の導電性材料の層が、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、または約70μmの厚さを有する請求項87に記載の装置。
- 前記少なくとも2つの薄型チップの少なくとも1つが、約2μm、約5μm、約8μm、約12μm、約15μm、約25μm、約35μm、約50μm、約60μm、約70μm、80マイクロメートル、約90マイクロメートル、約100マイクロメートル、約120マイクロメートル、約135マイクロメートル、または約150マイクロメートルの厚さを有する請求項87に記載の装置。
- 前記少なくとも2つの薄型チップの少なくとも1つが、薄型化されたチップであり、前記薄型化されたチップが、エッチングプロセスまたは研削プロセスを使用して薄型化されたチップから形成される請求項87に記載の装置。
- 前記基板の上に配設されたポリマーシートと、
前記ポリマーシートを通して形成された少なくとも1つのバイアと、
前記少なくとも1つのバイアの近位の前記ポリマーシートの一部分の上に配設された第2の導電性材料とをさらに備え、それにより、前記第2の導電性材料が、前記少なくとも2つの薄型チップの少なくとも1つの電気コンタクトとの電気的連絡を形成する
請求項87に記載の装置。 - 前記第1の導電性材料の上または前記可撓性ポリマーの上に配設された少なくとも1つの追加の層をさらに備え、前記少なくとも1つの追加の層が、前記薄型チップを前記装置の中立機械面に位置決めする請求項97に記載の装置。
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EP (1) | EP2907159A4 (ja) |
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US20160111353A1 (en) | 2016-04-21 |
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CN104798196A (zh) | 2015-07-22 |
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EP2907159A1 (en) | 2015-08-19 |
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EP2907159A4 (en) | 2016-06-01 |
KR20150067302A (ko) | 2015-06-17 |
WO2014059032A1 (en) | 2014-04-17 |
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