CN100399606C - 结构化硅阳极 - Google Patents

结构化硅阳极 Download PDF

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CN100399606C
CN100399606C CNB2003801028076A CN200380102807A CN100399606C CN 100399606 C CN100399606 C CN 100399606C CN B2003801028076 A CNB2003801028076 A CN B2003801028076A CN 200380102807 A CN200380102807 A CN 200380102807A CN 100399606 C CN100399606 C CN 100399606C
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M·格林
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Abstract

一种硅/锂电池，其可以从硅衬底形成，所述电池允许在芯片上将其形成为集成单元，所述电池包括硅阳极，所述阳极从在n型硅晶片上形成的亚微米直径的硅柱制得。

Description

结构化硅阳极
技术领域
本发明涉及在锂电池应用中的结构化硅阳极。
背景技术
在锂电池应用中，认为硅可能是锂的高能量每单位体积的主体材料1。实现该可能性的尝试在使用硅粉和炭黑的纳米复合材料时，才获得部分成功2。相关于硅/锂的使用的主要技术问题表现为，由于对应于合金化的反复大体积膨胀，从而导致机械故障1c，3。不同于例如石墨的层材料，金属和金属间阳极主体材料被公开在几个锂嵌入/脱出循环后破碎3，4，除非其为精细粉末的形式(亚微米范围)。由于关注的是，找出将锂电池集成到硅芯片上的方法，因此，需要找出该材料问题的解决方案。展望的是，集成到芯片上的锂电池的主要应用领域将在医学领域上。从而，发展较好的耳蜗植入实施看来将是受益于集成电池供电的一个范围5。
发明内容
本发明的目的在于，实现这样的硅锂系统的可能性，所述系统使得可以将锂电池集成到硅芯片上。因此，本发明提供了一种用于电池的集成硅电极，所述电极包括在硅衬底上形成的亚微米硅结构的规则或不规则阵列，以及一种在硅晶片上形成亚微米硅电极结构的方法。优选的是，这些结构包括柱状物。更优选，所述亚微米硅结构包括在n型硅衬底上形成的硅柱。优选，所述衬底是连接晶片的绝缘体上硅衬底。优选，所述硅柱的直径(d)为0.1-1.0微米，高度(H)为1-10微米。
对于硅锂系统，可以将原电池图表示为Li|Li+-电解液|Si，该电池的阴极过程为，锂向硅上释放电荷以形成合金(充电)，阳极过程为，锂脱出或脱合金化(放电)。下面加括号的是Wen和Huggins6公开的液体系统在415℃下的EMF数据，未加括号的为固体系统在室温下的EMF数据7。他们的结果是(mV，对Lj)：Si/Li12Si7-582(332)；Li12Si7/Li7Si3-520(288)；Li7Si3/Li13Si4-428(158)；Li13Si4/Li21Si5-～300(44)。
可以理解，代替Si的Li12Si7的形成导致较大的体积变化(所述合金是2.17倍大)。在常规的适于用作锂电池的阳极的硅晶片上，该体积变化导致形成裂缝，并且由于其小尺寸而导致粉末化；而根据本发明形成的结构亚微米阳极结构，可以经受由于大体积变化引起的条件，所述大体积变化是由于锂的合金化/脱合金化引起的。
在测试亚微米直径的结构化电极中，Si柱在循环中始终保持其结构的完整性，而平面Si电极在50个循环后出现裂缝(2微米的特征)。为了获得适用的电极，适当的尺寸约束为，硅柱不能超过～0.5的覆盖度(fractionalsurface coverage)(F)。
附图说明
下面将通过参考附图描述本发明的一个实施例，其中所述实施例是非限制性的示例，其中
图1是结构化电极的示意图；
图2示出了一组CV扫描组中的一个；
图3示出了一组恒电流法测量的结果；
图4示出了结构图；
图5示出了结构的SEM图；以及
图6示出了根据本发明的锂电池。
具体实施方式
硅上锂的电化学电荷释放及其后的化学反应损坏了硅晶格，导致固体膨胀，产生无定形Si/Li相13。系统中出现第一个新的相是Li12Si7。该化合物，以及系统中所有其它的Li化合物，便是所谓的Zintl相化合物(ZPC)，所述化合物包括简单的带正电的阳离子，以及络合共价键的、带多个电荷的、带负电的阴离子。当然，属于“离子”的电荷只是理论上的：实际的电荷(依赖于定义)少于形式值，并且可能少很多，因而，将块锂称为Li0，将块硅称为Sin 0。
形成硅的锂化和脱锂化的机制是重要的。已经提出：
(i)失去电荷的锂与硅反应形成ZPC膜，所述膜与硅在原子上连续接触。
(ii)过量的锂通过紧密的ZPC膜扩散(利用空穴机制)，并在Si/ZPC界面上与硅反应，从而不形成空穴地加厚ZPC膜。
可以将这些过程表示为：Li+(el)+e-(固态)→Li(ads.)；Li(ads.)+V(ZPC)→Li0(ZPC)s；Li0(ZPC)s→扩散→Li0(ZPC)ZPC/Si；xLi0+ySi0→ZPC(Lix/ySi)。
(Li(ads)是ZPC上吸收的Li；V是ZPC中的Li0空穴)(iii)无定形13ZPC膜是可变形的，从而不会在体积变化时导致显著的由应力引起的开裂。
Li在结晶Si14中的扩散系数D为～10-14cm2s-1，Li在ZPC中的扩散预计将更快；10-12cm2s-1的D值将足以说明在该研究中的所有过程。该形成ZPC膜的模型在很多方面类似于Deal和Grove的在硅上形成SiO2层的模型15，但是细节不同，并且将另外处理。
ZPC分解的模型大体上是上述步骤的逆向过程。Li0在电解液界面上释放电荷，而在ZPC中产生了表面空穴。本地的Li0移入空穴，从而空穴扩散回ZPC/Si界面：在界面上，Sin再次变为Si相(其中，称其为多晶13)，并且，空穴结合以形成更大的空穴空间。当这些空间进一步结合并生长时，这些空间导致在图4c、d和图5中的SEM图中出现的裂缝状特征。Beaulieu等16在描述从硅/锡合金中除去锂时描述了上述过程。
已经示出，可以反复进行对平面Si的Li合金化/脱合金化而不粉末化衬底，参见图5。然而，关注的是，所述合金化/脱合金化过程受到通过ZPC层的扩散的限制。为了获得适于各种应用的充电速度，需要增加Si/电解液界面的表面积；并且，已经利用柱结构实现了这点。之前的利用硅颗粒的尝试已经失败，因为颗粒与颗粒之间的接触随循环而变化和分开2。另一方面，柱结构在50次循环后仍较大地保存，这可以从柱顶部的平面度证实，参考图4。
这里公开的小于100％的效率主要是由于，在合金化时与电解液的反应、以及对ZPC区域的小范围隔离。这里的数据示出，在合金化和脱合金化时都减少的电流密度导致效率提高。认为该提高主要是由于，在合金化时，吸收的Li的表面浓度降低；以及在脱合金化时，获取ZPC中的所有锂。
可以在很大的范围上进一步增加柱结构的面积体积比，例如柱的直径(d)为～0.3微米，高度(H)为6微米。柱的体积(v)将是FH，当F＝0.4，v＝2.4×10-4cc/cm2，当转换成Li12Si7时，其等同于3.81×103v＝914microAhrcm-2的容量。该柱结构的表面积是～4FH/d，这是改进很多的特征的基础。
为了制造根据本发明的结构，使用下面的方法，即如在国际专利WO01/13414中公开的“岛式平版印刷(Island Lithography)”。在构造柱阵列的平版印刷步骤中，该方法采用氯化铯作为抗蚀剂。其如下工作。在Si衬底的干净、亲水的表面上真空沉积CsCl薄膜。然后将该系统暴露在具有控制的相对湿度的环境中。多层水吸附到表面上，CsCl可以溶解到水层中(在曲率半径越大处，溶解得越多)。由相关于CsCl表面曲率的过量表面能(excess surface energy)驱动，CsCl重新组成半球形岛分布。该阵列可以用于形成在包括纳米级现象的各种研究中的结构。在该情况下，优选使用反应离子蚀刻，利用所述岛作为X掩模，从而除去周围的硅以形成希望的柱结构。
在GaAs表面上9、以及最近扩展地在Si/SiO2表面上10进行了对形成岛阵列的动力学的研究，在所述研究中详细描述了其技术和结果。过程变量为：CsCl膜的厚度(L)、湿度(RH)、暴露时间(t)。形成的岛阵列的直径、平均直径(<d>)、标准偏差(±s)以及覆盖度(F)均呈高斯分布。在制备CsCl抗蚀阵列后，接着进行反应离子蚀刻(RIE)，以形成相应的柱阵列11。RIE过程变量为：流入气体的成分、流速和室压；RF功率；dc偏置；蚀刻时间。所述结果的特征在于：蚀刻深度，其对应于柱高度(H)、以及壁角，即柱壁与晶片平面所成的角度，在该研究中选择其为接近90°。该研究中公开的实例在Oxford Plasmalab 80装置中被蚀刻。蚀刻气体(O2∶Ar∶CHF3)的比率为1∶10∶20，流入速度为20sccm，室压为50毫帕斯卡，RF功率为73瓦，dc偏置为200V。
在该研究(K组)中公开的柱结构的特征在于：<d>＝580nm±15nm；F＝0.34；H＝810nm，其利用L＝80nm制得；RH＝40％；t＝17.5小时。在形成后，将硅样品在清水中清洗；在体积比相等的NH4OH(28w％NH3)∶H2O2(100v/v)∶H2O中蚀刻20秒；用脱离子化的清水冲去蚀刻剂并吹干。
当然可以通过其它已知技术形成该结构，如光刻技术，其形成规则阵列的特征，而不是由岛式平版印刷形成的分散分布。
图1是根据本发明的结构化电极的示意图，所述电极用于下面的测试中，图中示出了阳极的部分截面图，其中在硅晶片3上清楚地示出了柱2。
图6示出了包括本发明的典型实施例的锂电池，其包括：阳极1、阴极4、聚合物电解液5、第一条片6，其代表与环绕阳极的线圈连接的整流电路，所述电路用于充电、第二条片7，其代表输出电路(由电池驱动)、以及一对接线8，用于连接将要驱动的装置。
在三电极玻璃电池中进行电化学检测，在所述电池中，Si样品是工作电极，金属Li同时用于反电极和参考电极。使用LiClO4(Merck
Figure C20038010280700071
)溶解在碳酸亚乙酯∶碳酸二乙酯(Merck
Figure C20038010280700072
)、(1∶1)w/w的溶剂中的AlM溶液作为电解液。在干燥的氩气中将所述电池组装到槽形盒中。利用1∶1In-Ga共晶合金，在硅样品电极的背面形成电阻接触12。利用在PTFE支撑物中的O环结构划出电极区域。未使用粘合剂，并获得了较好的电解液/大气密封。在更早的研究中发现，用于安装Si电极的环氧粘合剂污染了激活电极的表面，从而导致高压下的寄生电流(＞2V)。
利用电化学工作站(VMP PerkinElmerTM Instruments)，通过循环伏安法(CV)和恒电流法测量(恒定电流下的电压对时间)，研究了电池的电化学行为。这里的容量指嵌在暴露于电解液中的突出电极表面区域(这里省略用于构造的任何表面区域)上的总电荷，其被提供为mAhcm-2(微安培小时厘米-2)。
获得的结果为：测量了Li|Li+-电解液|Si电池的响应：该电池的阴极过程为，锂对硅释放电荷，以形成合金(充电)；而阳极过程为，锂脱出或脱合金化(放电)。图2示出了一组CV扫描组(详细见标注)。第一循环、以及第二循环在很多程度上，不同于以后的循环。推测出，该差异是由于“形成”效果，所述效果相关于电极在Li第一次释放电荷时的成膜。在第一和第二循环后，扫描呈现重复的共同形状。因为扫描中的电压缓慢变化，并且电流密度从而较小，因此不存在IR压降或扩散过电压的项，因此假定无激活过电压，电极电压是对表面锂活性的测量。第一阴极特征为，电流在～330mV下迅速增大，所述特征根据室温数据7对应于Li12Si7的存在。达到的最低电压是25mV，并且该值被用于对应更高Li化合物如Li21Si5的存在。循环序列示出了对样品的逐渐“激活”，其相关于晶体硅结构的增大的击穿(见讨论)。阳极，CV曲线的部分，相关于电极根据多个ZPC平衡电位的逐渐脱锂化。对于1mVs-1的扫描速度，电极的容量(260mAhcm-2)大略相当于被转换成Li12Si7的柱体积，而对于更慢的扫描速度，所述容量超过相当于柱体积的容量。后者导致在合金化/脱合金化过程中引入衬底的参与。
图3示出了在两个不同的充电/放电电流密度下(详细见标注)，在结构化Si上的一组恒电流法测量的结果。
图4示出了K组用于该研究中的硅电极的结构，以及在该结构上进行延续的恒电流法循环的效果。该结构显然未受影响，但是在更高的电流密度下，观察到在柱下的块Si表面上出现微小裂缝。
图5示出了在平面(未柱化)Si电极上获得的分别在循环前和在恒电流法循环后的结构的SEM图。当以更低的电流密度循环时，尽管不形成裂缝，但是表面变形。在更高电流密度下的循环产生宽裂缝。
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Claims (8)

1.一种用于电池的集成硅电极，所述电极包括在硅衬底上形成的亚微米硅柱的阵列。
2.如权利要求1所述的硅电极，其通过以下步骤形成：
(a)在平的亲水硅衬底上沉积可溶性高的固态超薄膜；
(b)在控制的条件下，将所述膜暴露于溶剂蒸汽中，从而所述膜在表面上重新组成分离的半球形岛的阵列；以及
(c)利用所述可溶性高的固态的所述岛作为抗蚀剂，对所述硅衬底进行反应离子蚀刻，从而对应于所述岛蚀刻除去暴露的所述硅，而留下硅柱。
3.一种作为如权利要求1所述的电极的硅阳极，其中所述亚微米硅柱包括在n型硅衬底上形成的硅柱。
4.如权利要求3所述的硅阳极，所述衬底是连接晶片的绝缘体上硅衬底。
5.如权利要求3或4所述的硅阳极，其中所述硅柱对所述衬底不超过的0.5的覆盖度。
6.如权利要求3所述的硅阳极，其中所述硅柱的直径为0.1-1.0微米，高度为1-10微米。
7.如权利要求3所述的硅阳极，其中所述硅柱的直径为0.3微米，高度为6微米。
8.一种锂电池，其包括如权利要求3-7中任一权利要求所述的硅阳极。
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