KR960036007A - 수지밀폐형 반도체 장치 및 그 제조 방법 - Google Patents

수지밀폐형 반도체 장치 및 그 제조 방법 Download PDF

Info

Publication number
KR960036007A
KR960036007A KR1019960004260A KR19960004260A KR960036007A KR 960036007 A KR960036007 A KR 960036007A KR 1019960004260 A KR1019960004260 A KR 1019960004260A KR 19960004260 A KR19960004260 A KR 19960004260A KR 960036007 A KR960036007 A KR 960036007A
Authority
KR
South Korea
Prior art keywords
lead
semiconductor device
resin
supporting portion
sealed type
Prior art date
Application number
KR1019960004260A
Other languages
English (en)
Other versions
KR100359399B1 (ko
Inventor
데츠야 오오츠키
다다미 이토
Original Assignee
야스까와 히데아끼
세코에푸손 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 야스까와 히데아끼, 세코에푸손 주식회사 filed Critical 야스까와 히데아끼
Publication of KR960036007A publication Critical patent/KR960036007A/ko
Application granted granted Critical
Publication of KR100359399B1 publication Critical patent/KR100359399B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48253—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a potential ring of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)

Abstract

수지밀폐형 반도체장치는 방열체와, 반도체소자와, 이 반도체소자의 주위에 이격되어 뜬 상태에서 설치된 프레임리드와, 이 프레임리드로부터 연장하여 설치되어 리드지지부를 통해 설치면에 접착되는 복수의 리드를 포함한다. 리드는, 상부금형에 의해서 눌려지고, 방열체를 하부금형에 눌러서 수지가 들어가지 않도록 되어 있으며, 리드에는 박편부가 형성되어 있기 때문에, 리드지지부에서 벗겨지지 않도록 되어 있다.

Description

수지밀폐형 반도체 장치 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 실시형태와 관계되는 반도체장치의 제조방법을 나타내는 도면.

Claims (21)

  1. 반도체소자와, 상기 반도체소자를 설치하는 설치면을 갖는 소자적재부재와, 상기 설치면상에서 반도체소자를 피하는 영역에 설치되는 절연성의 리드지지부와, 상기 리드지지부에 접착되는 것으로 상기 소자적재부재에 고정되는 복수의 리드와, 금형을 사용하여, 상기 소작적재부재와 상기 반도체소자와 상기 리드의 일부를 수지로써 밀봉하는 수지패키지를 포함하며, 상기 리드는 수지밀봉되는 영역에 적어도 하나의 박편부가 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  2. 제1항에 있어서, 상기 박편부는, 상기 금형의 내측에서 리드지지부와의 접착위치상에 이르는 범위중의 어느 위치에 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  3. 제2항에 있어서, 상기 박편부는, 상기 리드지지부와의 접착위치의 경계선에 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  4. 제1항에 있어서, 상기 복수의 박편부는, 상기 금형의 내측으로부터 상기 리드지지부와의 접착위치의 앞까지 이르는 어느 한 위치에 형성되는 제1박편부와, 상기 리드지지부와의 접착위치의 경계선에 형성되는 제2박편부와, 상기 리드지지부와의 접착위치에 형성되는 제3박편부로 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  5. 제2항에 있어서, 상기 복수의 박편부는, 상기 금형의 내측으로부터 상기 리드지지부와의 접착위치의 앞까지 이르는 어느 한 위치에 형성되는 제1박편부와, 상기 리드지지부와의 접착위치의 경계선에 형성되는 제2박편부와, 상기 리드지지부와의 접착위치에 형성되는 제3박편부로 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  6. 제3항에 있어서, 상기 복수의 박편부는, 상기 금형의 내측으로부터 상기 리드지지부와의 접착위치의 앞까지 이르는 어느 한 위치에서 형성되는 제1박편부와, 상기 리드지지부와의 접착위치의 경계선에 형성되는 제2박편부와, 상기 리드지지부와의 접착위치에 형성되는 제3박편부로 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  7. 제1항에 있어서, 상기 리드의 한쪽의 면만으로부터의 패임에 의해 상기 박편부가 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  8. 제3항에 있어서, 상기 리드의 한쪽의 면만으로부터의 패임에 의해 상기 박편부가 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  9. 제6항에 있어서, 상기 리드의 한쪽의 면만으로부터의 패임에 의해 상기 박편부가 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  10. 제1항에 있어서, 상기 복수의 박편부 중 적어도 하나가 상기 리드의 한쪽의 면으로부터의 패임에 의해 형성되고, 나머지의 상기 박편부는 상기 리드의 다른쪽의 면으로부터의 패임에 의해 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  11. 제4항에 있어서, 상기 복수의 박편부 중 적어도 하나가 상기 리드의 한쪽으 리드의 다른쪽의 면으로부터의 패임에 의해 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  12. 제6항에 있어서, 상기 복수의 박편부 중 적어도 하나가 상기 리드의 한쪽의 면으로부터의 패임에 의해 형성되고, 나머지의 상기 박편부는 상기 리드의 다른쪽의 패임에 의해 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  13. 제1항에 있어서, 상기 소자적재부재로서 방열성이 높은 부재가 사용되는 것을 특징으로 하는 수지 밀폐형 반도체장치.
  14. 제7항에 있어서, 상기 소자적재부재로서 방열성이 높은 부재가 사용되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  15. 제12하에 있어서, 상기 소자적재부재로서 방열성이 높은 부재가 사용되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  16. 제1항에 있어서, 상기 반도체소자를 둘러싸고 상기 설치면으로부터 뜬 상태에서, 공용 리드로서의 프레임리드가 설치되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  17. 제12항에 있어서, 상기 반도체소자를 둘러싸고 상기 설치면으로부터 뜬 상태에서, 공용 리드로서의 프레임리드가 설치되는 것을 특지으로 하는 수지밀폐형 반도체장치.
  18. 제15항에 있어서, 상기 반도체소자를 둘러싸고 상기 설치면으로부터 뜬 상태에서, 공용 리드로서의 프레임리드가 설치되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  19. 제1항 내지 제18항 중 어느 한 항에 있어서, 상기 리드는 상기 리드지지부와의 접착위치의 외측으로부터 해당 리드지지부와의 접착면의 방향으로 굽은 상태에서 상기 수지패키지에 밀봉되는 것을 특징으로 하는 수지밀폐형 반도체장치.
  20. 소자적재부재의 설치면에 반도체소자를 설치하는 공정과, 상기 설치면상에서 상기 반도체소자를 피하는 영역에 절연성의 리드지지부를 설치하는 공정과, 복수의 리드를 상기 리드지지부의 위에 접착하여 상기 소자적재부재의 고정하는 공정과, 소정 장소를 와이어본딩수단에 의해서 전기적으로 접속하는 공정과, 상기 공정에 의해서 얻어진 중간부재를 제1금형상에 배치하는 공정과, 상기 중간부재의 리드지지부로부터 외측으로 나오는 리드의 일부를, 제2금형에 의해서 상기 리드지지부와의 접착면 방향으로 누르는 공정과, 상기 제1 및 제2금형 내에서, 상기 중간부재를 수지로써 밀봉하여 수지패키지를 형성하는 고정을 포함하며, 상기 리드는 적어도, 상기 금형과 상기 접착위치의 사이에 박편부가 형성되는 것을 특징으로 하는 수지밀폐형 반도체장치의 제조방법.
  21. 제20항에 있어서, 상기 리드지지부로부터 외측으로 나오는 상기 리드의 일부는, 상기 제1금형으로부터 뜬 상태에서 상기 제1금형상에 배치되고, 상기 제1금형에 의해서 굽혀지는 것을 특징으로 하는 수지밀폐형 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960004260A 1995-03-17 1996-02-16 수지밀폐형 반도체 장치 및 그 제조 방법 KR100359399B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP8651695 1995-03-17
JP95-86516 1995-03-17
JP95-345328 1995-12-07
JP34532895A JP3309686B2 (ja) 1995-03-17 1995-12-07 樹脂封止型半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
KR960036007A true KR960036007A (ko) 1996-10-28
KR100359399B1 KR100359399B1 (ko) 2003-01-10

Family

ID=26427621

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019960004260A KR100359399B1 (ko) 1995-03-17 1996-02-16 수지밀폐형 반도체 장치 및 그 제조 방법

Country Status (9)

Country Link
US (1) US5777380A (ko)
EP (1) EP0732744B1 (ko)
JP (1) JP3309686B2 (ko)
KR (1) KR100359399B1 (ko)
CN (2) CN1288748C (ko)
DE (1) DE69628964T2 (ko)
HK (1) HK1013734A1 (ko)
SG (1) SG54260A1 (ko)
TW (1) TW309649B (ko)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6861735B2 (en) * 1997-06-27 2005-03-01 Matsushita Electric Industrial Co., Ltd. Resin molded type semiconductor device and a method of manufacturing the same
JP2915892B2 (ja) * 1997-06-27 1999-07-05 松下電子工業株式会社 樹脂封止型半導体装置およびその製造方法
US5981987A (en) 1997-12-02 1999-11-09 Nurlogic Design, Inc. Power ground metallization routing in a semiconductor device
US6570247B1 (en) * 1997-12-30 2003-05-27 Intel Corporation Integrated circuit device having an embedded heat slug
US6278175B1 (en) * 2000-01-21 2001-08-21 Micron Technology, Inc. Leadframe alteration to direct compound flow into package
JP2001320007A (ja) * 2000-05-09 2001-11-16 Dainippon Printing Co Ltd 樹脂封止型半導体装置用フレーム
JP3664045B2 (ja) * 2000-06-01 2005-06-22 セイコーエプソン株式会社 半導体装置の製造方法
JP2002043496A (ja) * 2000-07-21 2002-02-08 Hitachi Ltd 半導体装置
SG102638A1 (en) * 2000-09-15 2004-03-26 Samsung Techwin Co Ltd Lead frame, semiconductor package having the same, and semiconductor package manufacturing method
JP3849978B2 (ja) * 2002-06-10 2006-11-22 日東電工株式会社 半導体装置の製造方法及びこれに用いる耐熱性粘着テープ
JP2006066008A (ja) * 2004-08-30 2006-03-09 Hitachi Global Storage Technologies Netherlands Bv 磁気ディスクおよび磁気ディスクの製造方法
US9041202B2 (en) * 2008-05-16 2015-05-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method of the same
KR20100104590A (ko) * 2009-03-18 2010-09-29 삼성전자주식회사 리드 프레임 및 이를 갖는 반도체 패키지
JP6015963B2 (ja) * 2011-12-22 2016-11-02 パナソニックＩｐマネジメント株式会社 半導体パッケージ、その製造方法及び金型
CN104508845B (zh) * 2012-07-30 2018-05-04 亮锐控股有限公司 经强化的led封装及为此的方法
CN104992934B (zh) * 2015-05-29 2018-01-09 株洲南车时代电气股份有限公司 功率半导体器件子模组
JP2017199803A (ja) 2016-04-27 2017-11-02 日立マクセル株式会社 三次元成形回路部品
JP6745442B2 (ja) * 2016-10-28 2020-08-26 パナソニックＩｐマネジメント株式会社 配線一体型樹脂パイプの製造方法
US10431526B2 (en) * 2017-10-09 2019-10-01 Cree, Inc. Rivetless lead fastening for a semiconductor package

Family Cites Families (64)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL280148A (ko) * 1961-06-26
US3290564A (en) * 1963-02-26 1966-12-06 Texas Instruments Inc Semiconductor device
US3965277A (en) * 1972-05-09 1976-06-22 Massachusetts Institute Of Technology Photoformed plated interconnection of embedded integrated circuit chips
JPS52124865A (en) * 1976-04-13 1977-10-20 Sharp Corp Semiconductor device
JPS54124678A (en) * 1978-03-20 1979-09-27 Nec Corp Lead frame
JPS56122134A (en) * 1980-02-29 1981-09-25 Toshiba Corp Resin-sealed type semiconductor device
JPS5812341A (ja) * 1981-07-16 1983-01-24 Toshiba Corp 半導体装置
JPS59207645A (ja) * 1983-05-11 1984-11-24 Toshiba Corp 半導体装置およびリ−ドフレ−ム
DE3578830D1 (de) * 1984-06-14 1990-08-30 Advanced Micro Devices Inc Mehrschicht-waermesenkpackung fuer integrierte schaltung.
JPS61166051A (ja) * 1985-01-17 1986-07-26 Matsushita Electronics Corp 樹脂封止型半導体装置
JPS6297358A (ja) * 1985-10-23 1987-05-06 Mitsubishi Electric Corp 樹脂封止形半導体集積回路装置
US4684975A (en) * 1985-12-16 1987-08-04 National Semiconductor Corporation Molded semiconductor package having improved heat dissipation
JPS62254456A (ja) * 1986-04-26 1987-11-06 Yamada Seisakusho:Kk リ−ドフレ−ム
JPS63179557A (ja) * 1987-01-20 1988-07-23 Nec Corp 半導体装置用リ−ドフレ−ム
JPS63240053A (ja) * 1987-03-27 1988-10-05 Mitsubishi Electric Corp 半導体装置
US4942497A (en) * 1987-07-24 1990-07-17 Nec Corporation Cooling structure for heat generating electronic components mounted on a substrate
JPS6466351A (en) * 1987-09-07 1989-03-13 Naka Tech Lab Nonslip blank for building
JP2532041B2 (ja) * 1987-10-05 1996-09-11 新光電気工業株式会社 半導体装置用リ―ドフレ―ム
JPH01207939A (ja) * 1988-02-16 1989-08-21 Seiko Epson Corp 集積回路装置組立テープ
JPH0218955A (ja) * 1988-07-07 1990-01-23 Mitsui High Tec Inc 半導体装置用リードフレーム
JPH0286155A (ja) * 1988-09-22 1990-03-27 Hitachi Ltd リードフレーム
JPH0290662A (ja) * 1988-09-28 1990-03-30 Hitachi Cable Ltd リードフレームのインナーリード
US5050040A (en) * 1988-10-21 1991-09-17 Texas Instruments Incorporated Composite material, a heat-dissipating member using the material in a circuit system, the circuit system
US5157478A (en) * 1989-04-19 1992-10-20 Mitsubishi Denki Kabushiki Kaisha Tape automated bonding packaged semiconductor device incorporating a heat sink
JPH02307251A (ja) * 1989-05-22 1990-12-20 Nec Corp 樹脂封止型半導体装置
US5208188A (en) * 1989-10-02 1993-05-04 Advanced Micro Devices, Inc. Process for making a multilayer lead frame assembly for an integrated circuit structure and multilayer integrated circuit die package formed by such process
JPH0719876B2 (ja) * 1989-12-04 1995-03-06 株式会社東芝 半導体装置
JP2528192B2 (ja) * 1990-01-12 1996-08-28 株式会社三井ハイテック 半導体装置
JP2517691B2 (ja) * 1990-01-29 1996-07-24 三菱電機株式会社 半導体装置及びその製造方法
JP2850462B2 (ja) * 1990-03-29 1999-01-27 セイコーエプソン株式会社 半導体装置及びその製造方法
JPH0410558A (ja) * 1990-04-27 1992-01-14 Hitachi Ltd 放熱体付き半導体装置
JPH0411758A (ja) * 1990-04-28 1992-01-16 Mitsubishi Electric Corp 半導体装置
JPH0427145A (ja) * 1990-05-22 1992-01-30 Seiko Epson Corp 半導体装置
US5227662A (en) * 1990-05-24 1993-07-13 Nippon Steel Corporation Composite lead frame and semiconductor device using the same
DE4017697C2 (de) * 1990-06-01 2003-12-11 Bosch Gmbh Robert Elektronisches Bauelement, Verfahren zu dessen Herstellung und Verwendung
US5202288A (en) * 1990-06-01 1993-04-13 Robert Bosch Gmbh Method of manufacturing an electronic circuit component incorporating a heat sink
JP2983620B2 (ja) * 1990-07-20 1999-11-29 株式会社日立製作所 半導体装置及びその製造方法
JP3047986B2 (ja) * 1990-07-25 2000-06-05 株式会社日立製作所 半導体装置
JP2725448B2 (ja) * 1990-08-01 1998-03-11 三菱電機株式会社 半導体装置
US5105259A (en) * 1990-09-28 1992-04-14 Motorola, Inc. Thermally enhanced semiconductor device utilizing a vacuum to ultimately enhance thermal dissipation
JPH04158556A (ja) * 1990-10-22 1992-06-01 Toshiba Corp 樹脂封止型半導体装置
JPH04162556A (ja) * 1990-10-25 1992-06-08 Mitsubishi Electric Corp リードフレーム及びその製造方法
JP2841854B2 (ja) * 1990-11-29 1998-12-24 セイコーエプソン株式会社 半導体装置
JP2777036B2 (ja) * 1993-01-14 1998-07-16 松下電工株式会社 プリント配線板への端子の接続方法
US5403785A (en) * 1991-03-03 1995-04-04 Matsushita Electric Works, Ltd. Process of fabrication IC chip package from an IC chip carrier substrate and a leadframe and the IC chip package fabricated thereby
JPH04316357A (ja) * 1991-04-15 1992-11-06 Sony Corp 樹脂封止型半導体装置
US5172213A (en) * 1991-05-23 1992-12-15 At&T Bell Laboratories Molded circuit package having heat dissipating post
JPH05308107A (ja) * 1991-07-01 1993-11-19 Sumitomo Electric Ind Ltd 半導体装置及びその製作方法
US5200809A (en) * 1991-09-27 1993-04-06 Vlsi Technology, Inc. Exposed die-attach heatsink package
JPH05109928A (ja) * 1991-10-14 1993-04-30 Mitsubishi Electric Corp 樹脂封止型半導体装置用リードフレームおよびこれを用いた樹脂封止型半導体装置
JP2602380B2 (ja) * 1991-10-23 1997-04-23 富士通株式会社 半導体装置及びその製造方法
JPH05190719A (ja) * 1992-01-07 1993-07-30 Mitsui High Tec Inc 多ピンリードフレームの製造方法
JPH05211262A (ja) * 1992-01-08 1993-08-20 Nec Corp 樹脂封止型半導体装置
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5262927A (en) * 1992-02-07 1993-11-16 Lsi Logic Corporation Partially-molded, PCB chip carrier package
JPH06120374A (ja) * 1992-03-31 1994-04-28 Amkor Electron Inc 半導体パッケージ構造、半導体パッケージ方法及び半導体パッケージ用放熱板
JP3572628B2 (ja) * 1992-06-03 2004-10-06 セイコーエプソン株式会社 半導体装置及びその製造方法
JP3322429B2 (ja) * 1992-06-04 2002-09-09 新光電気工業株式会社 半導体装置
US5367196A (en) * 1992-09-17 1994-11-22 Olin Corporation Molded plastic semiconductor package including an aluminum alloy heat spreader
JPH0697326A (ja) * 1992-09-14 1994-04-08 Apic Yamada Kk 半導体装置およびその放熱部材
JPH06295962A (ja) * 1992-10-20 1994-10-21 Ibiden Co Ltd 電子部品搭載用基板およびその製造方法並びに電子部品搭載装置
JPH06224363A (ja) * 1993-01-21 1994-08-12 Mitsui High Tec Inc 半導体装置およびその製造方法
JP3509274B2 (ja) * 1994-07-13 2004-03-22 セイコーエプソン株式会社 樹脂封止型半導体装置およびその製造方法
US5545921A (en) * 1994-11-04 1996-08-13 International Business Machines, Corporation Personalized area leadframe coining or half etching for reduced mechanical stress at device edge

Also Published As

Publication number Publication date
HK1013734A1 (en) 1999-09-03
EP0732744B1 (en) 2003-07-09
JP3309686B2 (ja) 2002-07-29
TW309649B (ko) 1997-07-01
JPH08321521A (ja) 1996-12-03
CN1574312A (zh) 2005-02-02
US5777380A (en) 1998-07-07
CN1288748C (zh) 2006-12-06
KR100359399B1 (ko) 2003-01-10
EP0732744A3 (en) 1997-08-27
EP0732744A2 (en) 1996-09-18
DE69628964D1 (de) 2003-08-14
CN1138303C (zh) 2004-02-11
CN1140901A (zh) 1997-01-22
DE69628964T2 (de) 2004-05-27
SG54260A1 (en) 1998-11-16

Similar Documents

Publication Publication Date Title
KR960036007A (ko) 수지밀폐형 반도체 장치 및 그 제조 방법
US5139969A (en) Method of making resin molded semiconductor device
US5233222A (en) Semiconductor device having window-frame flag with tapered edge in opening
US5177669A (en) Molded ring integrated circuit package
KR960002782A (ko) 패들없이 몰드된 플라스틱 반도체 칩 패키지 및 그 제조 방법
KR970060463A (ko) 수지밀봉형 반도체장치 및 그 제조방법
KR950009988A (ko) 수지봉지형 반도체장치
KR940006225A (ko) 반도체 장치
JPH08222681A (ja) 樹脂封止型半導体装置
US5252783A (en) Semiconductor package
KR960043132A (ko) 엘오씨(loc) 반도체 패키지 및 반도체 장치를 패키징하는 방법
KR960705360A (ko) 집적 회로용 초 박막 컴포지트 패키지(ultra-thin composite package for integrated circuits)
KR920702549A (ko) 반도체 장치 및 그의 제조방법
KR920007155A (ko) 반도체 장치 및 그 제조 방법
JPS6223097Y2 (ko)
JPH04340751A (ja) 樹脂封止型半導体装置
US6621151B1 (en) Lead frame for an integrated circuit chip
KR200173050Y1 (ko) 초박형 반도체 패키지
JPS6336699Y2 (ko)
KR0119759Y1 (ko) 버텀 리드형 반도체 패키지
KR200286322Y1 (ko) 반도체패키지
KR100282414B1 (ko) 바텀 리디드 타입의 브이·씨·에이 패키지
KR970072338A (ko) 리드프레임에 금속판이 부착된 리드 온 칩형 반도체 칩 패키지
JPH04334049A (ja) 半導体装置用パッケージ及びそれを用いた半導体装置
KR950034719A (ko) 리드 프레임 및 이 리드 프레임을 포함한 패키지 디바이스 제조 방법

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20110920

Year of fee payment: 10

LAPS Lapse due to unpaid annual fee