JP2016225614A - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2016225614A
JP2016225614A JP2016098070A JP2016098070A JP2016225614A JP 2016225614 A JP2016225614 A JP 2016225614A JP 2016098070 A JP2016098070 A JP 2016098070A JP 2016098070 A JP2016098070 A JP 2016098070A JP 2016225614 A JP2016225614 A JP 2016225614A
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JP
Japan
Prior art keywords
insulator
semiconductor
transistor
oxide
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2016098070A
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English (en)
Japanese (ja)
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JP2016225614A5 (enExample
Inventor
山崎　舜平
Shunpei Yamazaki
舜平 山崎
熱海　知昭
Tomoaki Atami
知昭 熱海
佑太 遠藤
Yuta Endo
佑太 遠藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of JP2016225614A publication Critical patent/JP2016225614A/ja
Publication of JP2016225614A5 publication Critical patent/JP2016225614A5/ja
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Non-Volatile Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2016098070A 2015-05-26 2016-05-16 半導体装置 Withdrawn JP2016225614A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015106145 2015-05-26
JP2015106145 2015-05-26

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2019133326A Division JP6992027B2 (ja) 2015-05-26 2019-07-19 半導体装置

Publications (2)

Publication Number Publication Date
JP2016225614A true JP2016225614A (ja) 2016-12-28
JP2016225614A5 JP2016225614A5 (enExample) 2019-06-13

Family

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Family Applications (5)

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JP2016098070A Withdrawn JP2016225614A (ja) 2015-05-26 2016-05-16 半導体装置
JP2019133326A Active JP6992027B2 (ja) 2015-05-26 2019-07-19 半導体装置
JP2021199123A Active JP7519981B2 (ja) 2015-05-26 2021-12-08 半導体装置
JP2023104147A Withdrawn JP2023123682A (ja) 2015-05-26 2023-06-26 半導体装置
JP2025010081A Pending JP2025061780A (ja) 2015-05-26 2025-01-23 半導体装置

Family Applications After (4)

Application Number Title Priority Date Filing Date
JP2019133326A Active JP6992027B2 (ja) 2015-05-26 2019-07-19 半導体装置
JP2021199123A Active JP7519981B2 (ja) 2015-05-26 2021-12-08 半導体装置
JP2023104147A Withdrawn JP2023123682A (ja) 2015-05-26 2023-06-26 半導体装置
JP2025010081A Pending JP2025061780A (ja) 2015-05-26 2025-01-23 半導体装置

Country Status (2)

Country Link
US (3) US20160351576A1 (enExample)
JP (5) JP2016225614A (enExample)

Cited By (19)

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JP2019057622A (ja) * 2017-09-21 2019-04-11 株式会社東芝 半導体装置
JP2019169490A (ja) * 2018-03-21 2019-10-03 東芝メモリ株式会社 半導体装置及びその製造方法
JP2019220670A (ja) * 2018-06-20 2019-12-26 コリア アドバンスト インスティテュート オブ サイエンス アンド テクノロジー セルの信頼性を向上させるための垂直集積型３次元フラッシュメモリおよびその製造方法
KR20200015586A (ko) * 2017-06-05 2020-02-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
KR20200019149A (ko) * 2017-06-27 2020-02-21 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치, 반도체 웨이퍼, 기억 장치, 및 전자 기기
JPWO2019003042A1 (ja) * 2017-06-27 2020-06-25 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
WO2020152523A1 (ja) * 2019-01-25 2020-07-30 株式会社半導体エネルギー研究所 半導体装置、半導体装置の作製方法、及び半導体装置の動作方法
CN111512440A (zh) * 2017-12-27 2020-08-07 美光科技公司 立面延伸的存储器单元串的晶体管和阵列
JPWO2021099885A1 (enExample) * 2019-11-21 2021-05-27
KR20210158289A (ko) * 2020-06-23 2021-12-30 한양대학교 산학협력단 백 게이트를 포함하는 3차원 플래시 메모리
WO2022064318A1 (ja) * 2020-09-25 2022-03-31 株式会社半導体エネルギー研究所 半導体装置、半導体装置の駆動方法、および電子機器
JP2022075991A (ja) * 2020-04-16 2022-05-18 株式会社半導体エネルギー研究所 半導体装置
US11355511B2 (en) 2020-03-19 2022-06-07 Kioxia Corporation Semiconductor memory device
US11404571B2 (en) 2017-07-10 2022-08-02 Micron Technology, Inc. Methods of forming NAND memory arrays
KR20220128347A (ko) 2020-01-17 2022-09-20 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치, 반도체 장치의 구동 방법, 및 전자 기기
JP2022191433A (ja) * 2017-06-08 2022-12-27 株式会社半導体エネルギー研究所 半導体装置
US11538919B2 (en) 2021-02-23 2022-12-27 Micron Technology, Inc. Transistors and arrays of elevationally-extending strings of memory cells
JP2023093611A (ja) * 2022-03-25 2023-07-04 株式会社半導体エネルギー研究所 半導体装置
JP2025092667A (ja) * 2019-12-27 2025-06-19 株式会社半導体エネルギー研究所 半導体装置

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EP3029736A1 (en) * 2014-12-05 2016-06-08 IMEC vzw Vertical, three-dimensional semiconductor device
US9761599B2 (en) * 2015-08-17 2017-09-12 Micron Technology, Inc. Integrated structures containing vertically-stacked memory cells
US10692869B2 (en) 2016-11-17 2020-06-23 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing semiconductor device
KR20200048233A (ko) 2018-10-29 2020-05-08 삼성전자주식회사 수직형 메모리 장치의 제조 방법
WO2020095148A1 (ja) 2018-11-08 2020-05-14 株式会社半導体エネルギー研究所 半導体装置、及び電子機器
JP7728743B2 (ja) * 2019-07-19 2025-08-25 インテグリス・インコーポレーテッド 熱履歴が低減された三次元ｎａｎｄメモリ
WO2021111243A1 (ja) 2019-12-06 2021-06-10 株式会社半導体エネルギー研究所 半導体装置および電子機器
JP2021125594A (ja) * 2020-02-06 2021-08-30 キオクシア株式会社 半導体記憶装置及びその製造方法
US11368016B2 (en) * 2020-03-18 2022-06-21 Mavagail Technology, LLC ESD protection for integrated circuit devices
US11495618B2 (en) * 2020-07-30 2022-11-08 Taiwan Semiconductor Manufacturing Co., Ltd. Three-dimensional memory device and method

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JP2011029586A (ja) * 2009-07-23 2011-02-10 Samsung Electronics Co Ltd メモリ半導体装置、その製造方法、及び動作方法
JP2012009512A (ja) * 2010-06-22 2012-01-12 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2012227326A (ja) * 2011-04-19 2012-11-15 Toshiba Corp 不揮発性半導体記憶装置とその製造方法
JP2013038124A (ja) * 2011-08-04 2013-02-21 Toshiba Corp 半導体記憶装置及びその製造方法
JP2013222785A (ja) * 2012-04-16 2013-10-28 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法

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