JP5288936B2 - 不揮発性半導体記憶装置 - Google Patents
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- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
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- H01L29/42312—Gate electrodes for field effect devices
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- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
- H01L29/42348—Gate electrodes for transistors with charge trapping gate insulator with trapping site formed by at least two separated sites, e.g. multi-particles trapping site
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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Description
(第1の実施の形態に係る不揮発性半導体記憶装置100の構成)
図1は、本発明の第1の実施の形態に係る不揮発性半導体記憶装置100の概略図を示す。図1に示すように、第1の実施の形態に係る不揮発性半導体記憶装置100は、主として、メモリトランジスタ領域12、ワード線駆動回路13、選択ゲート線駆動回路15、センスアンプ16、及びバックゲートトランジスタ駆動回路18を有する。
次に、図8〜図14を参照して、第1の実施の形態に係る不揮発性半導体記憶装置100の製造方法を説明する。メモリトランジスタ領域12と、図示しない周辺回路領域は同時に形成されるが、ここでは説明の簡単のため、本実施の形態の特徴に関連するメモリトランジスタ領域12の製造工程のみを説明する。
次に、再び図1〜3を参照して、第1の実施の形態に係る不揮発性半導体記憶装置100の動作を説明する。メモリトランジスタMCにおける「書き込み動作」、、「消去動作」、及び「読み出し動作」について説明する。なお、以下では、図3に示すメモリトランジスタMC2を書き込み、読み出しの対象とする場合を例として説明する。
最初に、メモリストリングスMS中の、例えばメモリトランジスタMC2への書き込み動作を、図15を参照して説明する。まず、初期動作として、全てのビット線BL0〜2の電圧を接地電位VSSとし、バックゲート線BGの電圧を接地電位Vssとして、バックゲートトランジスタBT1、BT2を非導通状態に維持しておく。選択ゲートSGの電圧も接地電圧Vssとされ、選択トランジスタST1〜3も非導通状態にされている。
次に、メモリストリングスMS中のメモリトランジスタの消去動作を説明する。
続いて、メモリストリングスMS中の、例えばメモリトランジスタMC2の読み出し動作を、図16を参照して説明する。
次に、第1の実施の形態に係る不揮発性半導体記憶装置100の効果について説明する。第1の実施の形態に係る不揮発性半導体記憶装置100は、上記積層構造に示したように高集積化可能である。また、不揮発性半導体記憶装置100は、上記製造工程にて説明したように、メモリトランジスタMCとなる各層、選択トランジスタ層STとなる各層を、ワード線WLの積層数に関係なく所定のリソグラフィ工程数で製造することができる。すなわち、安価に不揮発性半導体記憶装置100を製造することが可能である。
図17は、本発明の第2のの実施の形態に係る不揮発性半導体記憶装置100の、メモリトランジスタ領域12の概略図を示す。図18はその平面図である。なお、第1の実施の形態と同一の構成要素に関しては同一の符号を付し、その説明は省略する。
なお、1つのメモリストリングスMSに含まれる柱状部CLmnの数は3本に限られず、複数であればよい。このとき、1つのメモリストリングスMS中に含まれる柱状部CLmnの数と、メモリトランジスタが形成される柱状部の実効面積との関係は、次のようになる。
柱状部CLmnが3本→6F2
柱状部CLmnが4本→5F2
柱状部CLmnが9本→4.5F2
すなわち、1つのメモリストリングスMS中に含まれる柱状部CLmnの数を増すほど、柱状部CLmnの実効面積を低減でき、メモリの高密度化に寄与することができる。
以上、本発明の実施の形態を説明したが、本発明はこれらに限定されるものではなく、発明の趣旨を逸脱しない範囲内において、様々な変更、追加、削除、置換等が可能である。たとえば、上記の実施の形態では、1つのメモリストリングスを形成する3つの柱状部CLmnを、いずれもポリシリコンを材料として形成すると説明したが、例えば、データが常に消去状態に維持されるメモリトランジスタMC5〜8に沿った柱状部CLmn2については、ポリシリコンの代わりに、例えば表面がコバルト等の金属と反応させてシリサイド化されたシリコン層又は金属膜(アルミニウム等)などの金属元素を含む化合物を用いることも可能である。あるいは、柱状部CLmn2のみ、高濃度の不純物(リン等)を注入して低抵抗化してもよい。この対策により、電圧降下が小さくなり、より安定した読み出し動作を保証できる.
また、上記の実施の形態では、1つのメモリストリングスMS中の少なくとも1列のメモリトランジスタMCは、常に消去状態に維持されるのが好ましいと説明したが、これに限らず、このような常に消去状態に維持されるメモリトランジスタMCを設けないこととしてもよい。この場合、選択ワード線WLの電位を接地電位Vssよりも高く設定する必要があり、読み出し電流量が最悪の場合第1の実施の形態の場合の半分程度に減少する可能性があるが、十分な感度のセンスアンプとノイズ対策が施されれば読み出し可能である。この場合、より有効なセルアレイ利用が可能となり、1つのメモリストリングスMSに含まれる柱状部の数に関わらず、4F2の柱状部の面積を実現でき、半導体メモリ装置の高密度化に寄与するものである。
Claims (3)
- 電気的に書き換え可能な複数のメモリセルと選択トランジスタとが直列に接続された複数のメモリストリングスを有する不揮発性半導体記憶装置であって、
前記メモリストリングスは、
基板に対して垂直方向に延びる少なくとも3本の柱状部、及び前記少なくとも3本の柱状部の下端を連結させるように第1方向を長手方向として形成された連結部を有する半導体層と、
前記柱状部の側面を取り囲むように形成された電荷蓄積層と、
前記基板上に2次元的に配列された複数の前記メモリストリングスの前記柱状部の側面に、前記電荷蓄積層を介して共通に接続される板状電極を含み、前記板状電極を複数層に亘って積層して形成され前記メモリセルの制御電極として機能する複数の第1導電層と、
前記第1方向に並ぶ前記複数の柱状部の周りにゲート絶縁膜を介して前記第1方向を長手方向として形成され前記選択トランジスタの制御電極として機能する第2導電層と、
前記複数の柱状部のそれぞれに接続され前記第1方向と直交する第2方向を長手方向として形成されるビット線と
を備え、
1つの前記メモリストリングスを構成する前記少なくとも3本の柱状部のうち、少なくとも1つの柱状部に沿って形成される前記メモリセルは、常に消去状態に維持される
ことを特徴とする不揮発性半導体記憶装置。 - 前記連結部に絶縁膜を介して接するように形成され前記連結部に形成されるバックゲートトランジスタの制御電極として機能するバックゲート層を更に備えたことを特徴とする請求項1に記載の不揮発性半導体記憶装置。
- 1つの前記メモリストリングスを構成する前記複数の柱状部の少なくとも1つは金属元素を含む化合物であることを特徴とする請求項1記載の不揮発性半導体記憶装置。
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JP2008207655A JP5288936B2 (ja) | 2008-08-12 | 2008-08-12 | 不揮発性半導体記憶装置 |
US12/501,142 US8008710B2 (en) | 2008-08-12 | 2009-07-10 | Non-volatile semiconductor storage device |
TW098124154A TWI400792B (zh) | 2008-08-12 | 2009-07-16 | 非揮發性半導體儲存裝置 |
KR1020090073728A KR101031699B1 (ko) | 2008-08-12 | 2009-08-11 | 비휘발성 반도체 저장 장치 |
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JP5288936B2 true JP5288936B2 (ja) | 2013-09-11 |
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JP (1) | JP5288936B2 (ja) |
KR (1) | KR101031699B1 (ja) |
TW (1) | TWI400792B (ja) |
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JP5142692B2 (ja) | 2007-12-11 | 2013-02-13 | 株式会社東芝 | 不揮発性半導体記憶装置 |
KR101539699B1 (ko) | 2009-03-19 | 2015-07-27 | 삼성전자주식회사 | 3차원 구조의 비휘발성 메모리 소자 및 그 제조방법 |
KR101543331B1 (ko) | 2009-07-06 | 2015-08-10 | 삼성전자주식회사 | 메탈 소스 라인을 갖는 수직 구조의 비휘발성 메모리 소자의 제조방법 |
JP2011040706A (ja) * | 2009-07-15 | 2011-02-24 | Toshiba Corp | 不揮発性半導体記憶装置 |
JP5380190B2 (ja) * | 2009-07-21 | 2014-01-08 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
KR101164954B1 (ko) | 2009-09-14 | 2012-07-12 | 에스케이하이닉스 주식회사 | 3차원 구조를 갖는 비휘발성 메모리 소자 및 그 제조 방법 |
JP2011061159A (ja) * | 2009-09-14 | 2011-03-24 | Toshiba Corp | 不揮発性半導体記憶装置 |
KR20110042619A (ko) * | 2009-10-19 | 2011-04-27 | 삼성전자주식회사 | 3차원 반도체 장치 및 그 제조 방법 |
KR101559958B1 (ko) | 2009-12-18 | 2015-10-13 | 삼성전자주식회사 | 3차원 반도체 장치의 제조 방법 및 이에 따라 제조된 3차원 반도체 장치 |
KR101658479B1 (ko) | 2010-02-09 | 2016-09-21 | 삼성전자주식회사 | 불휘발성 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템 |
US9378831B2 (en) | 2010-02-09 | 2016-06-28 | Samsung Electronics Co., Ltd. | Nonvolatile memory devices, operating methods thereof and memory systems including the same |
KR101691092B1 (ko) | 2010-08-26 | 2016-12-30 | 삼성전자주식회사 | 불휘발성 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템 |
US9324440B2 (en) | 2010-02-09 | 2016-04-26 | Samsung Electronics Co., Ltd. | Nonvolatile memory devices, operating methods thereof and memory systems including the same |
KR101691088B1 (ko) | 2010-02-17 | 2016-12-29 | 삼성전자주식회사 | 불휘발성 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템 |
US8908431B2 (en) | 2010-02-17 | 2014-12-09 | Samsung Electronics Co., Ltd. | Control method of nonvolatile memory device |
JP5788183B2 (ja) | 2010-02-17 | 2015-09-30 | 三星電子株式会社Samsung Electronics Co.,Ltd. | 不揮発性メモリ装置、それの動作方法、そしてそれを含むメモリシステム |
US8923060B2 (en) | 2010-02-17 | 2014-12-30 | Samsung Electronics Co., Ltd. | Nonvolatile memory devices and operating methods thereof |
JP2011170956A (ja) | 2010-02-18 | 2011-09-01 | Samsung Electronics Co Ltd | 不揮発性メモリ装置およびそのプログラム方法と、それを含むメモリシステム |
US8553466B2 (en) | 2010-03-04 | 2013-10-08 | Samsung Electronics Co., Ltd. | Non-volatile memory device, erasing method thereof, and memory system including the same |
US8792282B2 (en) | 2010-03-04 | 2014-07-29 | Samsung Electronics Co., Ltd. | Nonvolatile memory devices, memory systems and computing systems |
JP2011198806A (ja) | 2010-03-17 | 2011-10-06 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
KR101137929B1 (ko) | 2010-05-31 | 2012-05-09 | 에스케이하이닉스 주식회사 | 비휘발성 메모리 장치 및 그 제조 방법 |
KR101083637B1 (ko) | 2010-05-31 | 2011-11-16 | 주식회사 하이닉스반도체 | 비휘발성 메모리 장치 및 그 제조 방법 |
JP2012009512A (ja) | 2010-06-22 | 2012-01-12 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法 |
US10128261B2 (en) | 2010-06-30 | 2018-11-13 | Sandisk Technologies Llc | Cobalt-containing conductive layers for control gate electrodes in a memory structure |
US8198672B2 (en) | 2010-06-30 | 2012-06-12 | SanDisk Technologies, Inc. | Ultrahigh density vertical NAND memory device |
US9159739B2 (en) | 2010-06-30 | 2015-10-13 | Sandisk Technologies Inc. | Floating gate ultrahigh density vertical NAND flash memory |
US8193054B2 (en) | 2010-06-30 | 2012-06-05 | SanDisk Technologies, Inc. | Ultrahigh density vertical NAND memory device and method of making thereof |
US8187936B2 (en) | 2010-06-30 | 2012-05-29 | SanDisk Technologies, Inc. | Ultrahigh density vertical NAND memory device and method of making thereof |
JP2013534058A (ja) * | 2010-06-30 | 2013-08-29 | サンディスク テクノロジィース インコーポレイテッド | 超高密度垂直nandメモリデバイスおよびそれを作る方法 |
US8349681B2 (en) | 2010-06-30 | 2013-01-08 | Sandisk Technologies Inc. | Ultrahigh density monolithic, three dimensional vertical NAND memory device |
US8928061B2 (en) | 2010-06-30 | 2015-01-06 | SanDisk Technologies, Inc. | Three dimensional NAND device with silicide containing floating gates |
US9397093B2 (en) | 2013-02-08 | 2016-07-19 | Sandisk Technologies Inc. | Three dimensional NAND device with semiconductor, metal or silicide floating gates and method of making thereof |
KR101688604B1 (ko) * | 2010-07-05 | 2016-12-23 | 삼성전자주식회사 | 3차원 반도체 장치 및 그 제조 방법 |
KR101113766B1 (ko) | 2010-12-31 | 2012-02-29 | 주식회사 하이닉스반도체 | 비휘발성메모리장치 및 그 제조 방법 |
JP2012204430A (ja) | 2011-03-24 | 2012-10-22 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法 |
JP5524134B2 (ja) | 2011-06-14 | 2014-06-18 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2013012553A (ja) | 2011-06-28 | 2013-01-17 | Toshiba Corp | 半導体記憶装置 |
JP5543950B2 (ja) * | 2011-09-22 | 2014-07-09 | 株式会社東芝 | 不揮発性半導体記憶装置の製造方法及び不揮発性半導体記憶装置 |
KR20130070153A (ko) * | 2011-12-19 | 2013-06-27 | 에스케이하이닉스 주식회사 | 반도체 장치의 캐패시터, 레지스터, 메모리 시스템 및 이들의 제조 방법 |
US8878278B2 (en) | 2012-03-21 | 2014-11-04 | Sandisk Technologies Inc. | Compact three dimensional vertical NAND and method of making thereof |
US8847302B2 (en) | 2012-04-10 | 2014-09-30 | Sandisk Technologies Inc. | Vertical NAND device with low capacitance and silicided word lines |
KR101957897B1 (ko) * | 2012-04-26 | 2019-03-13 | 에스케이하이닉스 주식회사 | 가변 저항 메모리 장치 및 그 제조 방법 |
US8828884B2 (en) | 2012-05-23 | 2014-09-09 | Sandisk Technologies Inc. | Multi-level contact to a 3D memory array and method of making |
USRE49831E1 (en) | 2012-06-04 | 2024-02-06 | SK Hynix Inc. | 3D semiconductor memory device |
US10367001B2 (en) | 2012-06-04 | 2019-07-30 | SK Hynix Inc. | 3D semiconductor memory device |
KR20130136249A (ko) | 2012-06-04 | 2013-12-12 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
US8609536B1 (en) | 2012-07-06 | 2013-12-17 | Micron Technology, Inc. | Stair step formation using at least two masks |
US8658499B2 (en) | 2012-07-09 | 2014-02-25 | Sandisk Technologies Inc. | Three dimensional NAND device and method of charge trap layer separation and floating gate formation in the NAND device |
KR102003526B1 (ko) | 2012-07-31 | 2019-07-25 | 삼성전자주식회사 | 반도체 메모리 소자 및 그 제조방법 |
US8614126B1 (en) | 2012-08-15 | 2013-12-24 | Sandisk Technologies Inc. | Method of making a three-dimensional memory array with etch stop |
US8902670B2 (en) | 2012-08-31 | 2014-12-02 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
KR102002802B1 (ko) | 2012-09-05 | 2019-07-23 | 삼성전자주식회사 | 반도체 장치 |
US9287167B2 (en) | 2012-10-05 | 2016-03-15 | Samsung Electronics Co., Ltd. | Vertical type memory device |
KR102031187B1 (ko) | 2012-10-05 | 2019-10-14 | 삼성전자주식회사 | 수직형 메모리 장치 |
US9129861B2 (en) | 2012-10-05 | 2015-09-08 | Samsung Electronics Co., Ltd. | Memory device |
KR20140062636A (ko) | 2012-11-14 | 2014-05-26 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조 방법 |
US8946023B2 (en) | 2013-03-12 | 2015-02-03 | Sandisk Technologies Inc. | Method of making a vertical NAND device using sequential etching of multilayer stacks |
US9230987B2 (en) | 2014-02-20 | 2016-01-05 | Sandisk Technologies Inc. | Multilevel memory stack structure and methods of manufacturing the same |
US9515080B2 (en) | 2013-03-12 | 2016-12-06 | Sandisk Technologies Llc | Vertical NAND and method of making thereof using sequential stack etching and landing pad |
US9698153B2 (en) | 2013-03-12 | 2017-07-04 | Sandisk Technologies Llc | Vertical NAND and method of making thereof using sequential stack etching and self-aligned landing pad |
US9449982B2 (en) | 2013-03-12 | 2016-09-20 | Sandisk Technologies Llc | Method of making a vertical NAND device using a sacrificial layer with air gap and sequential etching of multilayer stacks |
JP2014187191A (ja) * | 2013-03-22 | 2014-10-02 | Toshiba Corp | 半導体記憶装置の製造方法及び半導体記憶装置 |
US9093480B2 (en) | 2013-04-01 | 2015-07-28 | Sandisk Technologies Inc. | Spacer passivation for high aspect ratio etching of multilayer stacks for three dimensional NAND device |
US9099496B2 (en) | 2013-04-01 | 2015-08-04 | Sandisk Technologies Inc. | Method of forming an active area with floating gate negative offset profile in FG NAND memory |
US9437606B2 (en) | 2013-07-02 | 2016-09-06 | Sandisk Technologies Llc | Method of making a three-dimensional memory array with etch stop |
US9252151B2 (en) | 2013-07-08 | 2016-02-02 | Sandisk Technologies Inc. | Three dimensional NAND device with birds beak containing floating gates and method of making thereof |
JP2015028990A (ja) | 2013-07-30 | 2015-02-12 | 株式会社東芝 | 不揮発性記憶装置 |
US9230980B2 (en) | 2013-09-15 | 2016-01-05 | Sandisk Technologies Inc. | Single-semiconductor-layer channel in a memory opening for a three-dimensional non-volatile memory device |
KR102242022B1 (ko) | 2013-09-16 | 2021-04-21 | 삼성전자주식회사 | 불휘발성 메모리 및 그것의 프로그램 방법 |
US9023719B2 (en) | 2013-09-17 | 2015-05-05 | Sandisk Technologies Inc. | High aspect ratio memory hole channel contact formation |
US9230973B2 (en) | 2013-09-17 | 2016-01-05 | Sandisk Technologies Inc. | Methods of fabricating a three-dimensional non-volatile memory device |
KR20150050878A (ko) | 2013-11-01 | 2015-05-11 | 에스케이하이닉스 주식회사 | 메모리 스트링 및 이를 포함하는 반도체 장치 |
KR102161814B1 (ko) | 2013-11-19 | 2020-10-06 | 삼성전자주식회사 | 수직형 메모리 장치 및 그 제조 방법 |
US9449983B2 (en) | 2013-12-19 | 2016-09-20 | Sandisk Technologies Llc | Three dimensional NAND device with channel located on three sides of lower select gate and method of making thereof |
CN104766863B (zh) * | 2014-01-06 | 2017-09-15 | 旺宏电子股份有限公司 | 三维存储器及其制造方法 |
US9230905B2 (en) | 2014-01-08 | 2016-01-05 | Sandisk 3D Llc | Trench multilevel contact to a 3D memory array and method of making thereof |
US9343507B2 (en) | 2014-03-12 | 2016-05-17 | Sandisk 3D Llc | Dual channel vertical field effect transistor including an embedded electrode |
US9331088B2 (en) | 2014-03-25 | 2016-05-03 | Sandisk 3D Llc | Transistor device with gate bottom isolation and method of making thereof |
US9224747B2 (en) | 2014-03-26 | 2015-12-29 | Sandisk Technologies Inc. | Vertical NAND device with shared word line steps |
US9331094B2 (en) | 2014-04-30 | 2016-05-03 | Sandisk Technologies Inc. | Method of selective filling of memory openings |
US9552991B2 (en) | 2014-04-30 | 2017-01-24 | Sandisk Technologies Llc | Trench vertical NAND and method of making thereof |
US9244865B2 (en) * | 2014-05-28 | 2016-01-26 | SanDisk Technologies, Inc. | Obtaining diagnostic information through host interfaces |
US9548313B2 (en) * | 2014-05-30 | 2017-01-17 | Sandisk Technologies Llc | Method of making a monolithic three dimensional NAND string using a select gate etch stop layer |
US9553146B2 (en) | 2014-06-05 | 2017-01-24 | Sandisk Technologies Llc | Three dimensional NAND device having a wavy charge storage layer |
US9524779B2 (en) | 2014-06-24 | 2016-12-20 | Sandisk Technologies Llc | Three dimensional vertical NAND device with floating gates |
US9768270B2 (en) | 2014-06-25 | 2017-09-19 | Sandisk Technologies Llc | Method of selectively depositing floating gate material in a memory device |
US9379124B2 (en) | 2014-06-25 | 2016-06-28 | Sandisk Technologies Inc. | Vertical floating gate NAND with selectively deposited ALD metal films |
US9455263B2 (en) | 2014-06-27 | 2016-09-27 | Sandisk Technologies Llc | Three dimensional NAND device with channel contacting conductive source line and method of making thereof |
US9305932B2 (en) | 2014-06-30 | 2016-04-05 | Sandisk Technologies Inc. | Methods of making three dimensional NAND devices |
US9397107B2 (en) | 2014-06-30 | 2016-07-19 | Sandisk Technologies Llc | Methods of making three dimensional NAND devices |
US9177966B1 (en) | 2014-07-08 | 2015-11-03 | Sandisk Technologies Inc. | Three dimensional NAND devices with air gap or low-k core |
US9570460B2 (en) | 2014-07-29 | 2017-02-14 | Sandisk Technologies Llc | Spacer passivation for high-aspect ratio opening film removal and cleaning |
US9356031B2 (en) | 2014-08-11 | 2016-05-31 | Sandisk Technologies Inc. | Three dimensional NAND string memory devices with voids enclosed between control gate electrodes |
US9136130B1 (en) | 2014-08-11 | 2015-09-15 | Sandisk Technologies Inc. | Three dimensional NAND string with discrete charge trap segments |
US9583539B2 (en) | 2014-08-19 | 2017-02-28 | Sandisk Technologies Llc | Word line connection for memory device and method of making thereof |
US9230983B1 (en) | 2014-08-20 | 2016-01-05 | Sandisk Technologies Inc. | Metal word lines for three dimensional memory devices |
US9236392B1 (en) | 2014-08-26 | 2016-01-12 | Sandisk Technologies Inc. | Multiheight electrically conductive via contacts for a multilevel interconnect structure |
US9576975B2 (en) | 2014-08-26 | 2017-02-21 | Sandisk Technologies Llc | Monolithic three-dimensional NAND strings and methods of fabrication thereof |
US9230974B1 (en) | 2014-08-26 | 2016-01-05 | Sandisk Technologies Inc. | Methods of selective removal of blocking dielectric in NAND memory strings |
US9401309B2 (en) | 2014-08-26 | 2016-07-26 | Sandisk Technologies Llc | Multiheight contact via structures for a multilevel interconnect structure |
US9601502B2 (en) | 2014-08-26 | 2017-03-21 | Sandisk Technologies Llc | Multiheight contact via structures for a multilevel interconnect structure |
US9362298B2 (en) | 2014-09-11 | 2016-06-07 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device and manufacturing method thereof |
US9431419B2 (en) | 2014-09-12 | 2016-08-30 | Kabushiki Kaisha Toshiba | Semiconductor memory device and method for manufacturing same |
US9666590B2 (en) | 2014-09-24 | 2017-05-30 | Sandisk Technologies Llc | High stack 3D memory and method of making |
US9515085B2 (en) | 2014-09-26 | 2016-12-06 | Sandisk Technologies Llc | Vertical memory device with bit line air gap |
US9305934B1 (en) | 2014-10-17 | 2016-04-05 | Sandisk Technologies Inc. | Vertical NAND device containing peripheral devices on epitaxial semiconductor pedestal |
US9230979B1 (en) | 2014-10-31 | 2016-01-05 | Sandisk Technologies Inc. | High dielectric constant etch stop layer for a memory structure |
US9305849B1 (en) | 2014-11-12 | 2016-04-05 | Sandisk Technologies Inc. | Method of making a three dimensional NAND device |
US9236396B1 (en) | 2014-11-12 | 2016-01-12 | Sandisk Technologies Inc. | Three dimensional NAND device and method of making thereof |
US9698152B2 (en) | 2014-11-13 | 2017-07-04 | Sandisk Technologies Llc | Three-dimensional memory structure with multi-component contact via structure and method of making thereof |
US9570455B2 (en) | 2014-11-25 | 2017-02-14 | Sandisk Technologies Llc | Metal word lines for three dimensional memory devices |
US9698223B2 (en) | 2014-11-25 | 2017-07-04 | Sandisk Technologies Llc | Memory device containing stress-tunable control gate electrodes |
US9496419B2 (en) | 2014-11-25 | 2016-11-15 | Sandisk Technologies Llc | Ruthenium nucleation layer for control gate electrodes in a memory structure |
US9553100B2 (en) | 2014-12-04 | 2017-01-24 | Sandisk Techologies Llc | Selective floating gate semiconductor material deposition in a three-dimensional memory structure |
US9754956B2 (en) | 2014-12-04 | 2017-09-05 | Sandisk Technologies Llc | Uniform thickness blocking dielectric portions in a three-dimensional memory structure |
US9793288B2 (en) | 2014-12-04 | 2017-10-17 | Sandisk Technologies Llc | Methods of fabricating memory device with spaced-apart semiconductor charge storage regions |
US9780182B2 (en) | 2015-02-04 | 2017-10-03 | Sandisk Technologies Llc | Molybdenum-containing conductive layers for control gate electrodes in a memory structure |
US10741572B2 (en) | 2015-02-04 | 2020-08-11 | Sandisk Technologies Llc | Three-dimensional memory device having multilayer word lines containing selectively grown cobalt or ruthenium and method of making the same |
US9984963B2 (en) | 2015-02-04 | 2018-05-29 | Sandisk Technologies Llc | Cobalt-containing conductive layers for control gate electrodes in a memory structure |
US9356034B1 (en) | 2015-02-05 | 2016-05-31 | Sandisk Technologies Inc. | Multilevel interconnect structure and methods of manufacturing the same |
US9419058B1 (en) | 2015-02-05 | 2016-08-16 | Sandisk Technologies Llc | Memory device with comb-shaped electrode having a plurality of electrode fingers and method of making thereof |
US9484296B2 (en) | 2015-02-12 | 2016-11-01 | Sandisk Technologies Llc | Self-aligned integrated line and via structure for a three-dimensional semiconductor device |
US9583615B2 (en) | 2015-02-17 | 2017-02-28 | Sandisk Technologies Llc | Vertical transistor and local interconnect structure |
US9698202B2 (en) | 2015-03-02 | 2017-07-04 | Sandisk Technologies Llc | Parallel bit line three-dimensional resistive random access memory |
US9870945B2 (en) | 2015-03-10 | 2018-01-16 | Sandisk Technologies Llc | Crystalline layer stack for forming conductive layers in a three-dimensional memory structure |
US9530788B2 (en) | 2015-03-17 | 2016-12-27 | Sandisk Technologies Llc | Metallic etch stop layer in a three-dimensional memory structure |
CN106158846B (zh) * | 2015-03-31 | 2019-08-20 | 旺宏电子股份有限公司 | 存储元件及其制造方法 |
US9799671B2 (en) | 2015-04-07 | 2017-10-24 | Sandisk Technologies Llc | Three-dimensional integration schemes for reducing fluorine-induced electrical shorts |
US9601508B2 (en) | 2015-04-27 | 2017-03-21 | Sandisk Technologies Llc | Blocking oxide in memory opening integration scheme for three-dimensional memory structure |
US9397046B1 (en) | 2015-04-29 | 2016-07-19 | Sandisk Technologies Llc | Fluorine-free word lines for three-dimensional memory devices |
US9627403B2 (en) | 2015-04-30 | 2017-04-18 | Sandisk Technologies Llc | Multilevel memory stack structure employing support pillar structures |
US10074661B2 (en) | 2015-05-08 | 2018-09-11 | Sandisk Technologies Llc | Three-dimensional junction memory device and method reading thereof using hole current detection |
US9666281B2 (en) | 2015-05-08 | 2017-05-30 | Sandisk Technologies Llc | Three-dimensional P-I-N memory device and method reading thereof using hole current detection |
KR20160138765A (ko) * | 2015-05-26 | 2016-12-06 | 에스케이하이닉스 주식회사 | 슬리밍 구조물을 포함하는 반도체 메모리 장치 |
US9443861B1 (en) | 2015-05-28 | 2016-09-13 | Sandisk Technologies Llc | Fluorine-blocking insulating spacer for backside contact structure of three-dimensional memory structures |
US9859422B2 (en) | 2015-05-28 | 2018-01-02 | Sandisk Technologies Llc | Field effect transistor with elevated active regions and methods of manufacturing the same |
US9646981B2 (en) | 2015-06-15 | 2017-05-09 | Sandisk Technologies Llc | Passive devices for integration with three-dimensional memory devices |
US9589981B2 (en) | 2015-06-15 | 2017-03-07 | Sandisk Technologies Llc | Passive devices for integration with three-dimensional memory devices |
US9419012B1 (en) | 2015-06-19 | 2016-08-16 | Sandisk Technologies Llc | Three-dimensional memory structure employing air gap isolation |
US9356043B1 (en) | 2015-06-22 | 2016-05-31 | Sandisk Technologies Inc. | Three-dimensional memory devices containing memory stack structures with position-independent threshold voltage |
US9613977B2 (en) | 2015-06-24 | 2017-04-04 | Sandisk Technologies Llc | Differential etch of metal oxide blocking dielectric layer for three-dimensional memory devices |
US10622368B2 (en) | 2015-06-24 | 2020-04-14 | Sandisk Technologies Llc | Three-dimensional memory device with semicircular metal-semiconductor alloy floating gate electrodes and methods of making thereof |
US9530785B1 (en) | 2015-07-21 | 2016-12-27 | Sandisk Technologies Llc | Three-dimensional memory devices having a single layer channel and methods of making thereof |
US9627399B2 (en) | 2015-07-24 | 2017-04-18 | Sandisk Technologies Llc | Three-dimensional memory device with metal and silicide control gates |
US9449987B1 (en) | 2015-08-21 | 2016-09-20 | Sandisk Technologies Llc | Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors |
US9543318B1 (en) | 2015-08-21 | 2017-01-10 | Sandisk Technologies Llc | Three dimensional memory device with epitaxial semiconductor pedestal for peripheral transistors |
US9853043B2 (en) | 2015-08-25 | 2017-12-26 | Sandisk Technologies Llc | Method of making a multilevel memory stack structure using a cavity containing a sacrificial fill material |
US9502471B1 (en) | 2015-08-25 | 2016-11-22 | Sandisk Technologies Llc | Multi tier three-dimensional memory devices including vertically shared bit lines |
KR20170027571A (ko) * | 2015-09-02 | 2017-03-10 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그 제조방법 |
US9646975B2 (en) | 2015-09-21 | 2017-05-09 | Sandisk Technologies Llc | Lateral stack of cobalt and a cobalt-semiconductor alloy for control gate electrodes in a memory structure |
US9576966B1 (en) | 2015-09-21 | 2017-02-21 | Sandisk Technologies Llc | Cobalt-containing conductive layers for control gate electrodes in a memory structure |
US9806089B2 (en) | 2015-09-21 | 2017-10-31 | Sandisk Technologies Llc | Method of making self-assembling floating gate electrodes for a three-dimensional memory device |
US9842907B2 (en) | 2015-09-29 | 2017-12-12 | Sandisk Technologies Llc | Memory device containing cobalt silicide control gate electrodes and method of making thereof |
US9659955B1 (en) | 2015-10-28 | 2017-05-23 | Sandisk Technologies Llc | Crystalinity-dependent aluminum oxide etching for self-aligned blocking dielectric in a memory structure |
US9620512B1 (en) | 2015-10-28 | 2017-04-11 | Sandisk Technologies Llc | Field effect transistor with a multilevel gate electrode for integration with a multilevel memory device |
US9793139B2 (en) | 2015-10-29 | 2017-10-17 | Sandisk Technologies Llc | Robust nucleation layers for enhanced fluorine protection and stress reduction in 3D NAND word lines |
US9899399B2 (en) | 2015-10-30 | 2018-02-20 | Sandisk Technologies Llc | 3D NAND device with five-folded memory stack structure configuration |
US9799670B2 (en) * | 2015-11-20 | 2017-10-24 | Sandisk Technologies Llc | Three dimensional NAND device containing dielectric pillars for a buried source line and method of making thereof |
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KR102639721B1 (ko) * | 2018-04-13 | 2024-02-26 | 삼성전자주식회사 | 3차원 반도체 메모리 장치 |
US10381322B1 (en) | 2018-04-23 | 2019-08-13 | Sandisk Technologies Llc | Three-dimensional memory device containing self-aligned interlocking bonded structure and method of making the same |
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JP2020155450A (ja) * | 2019-03-18 | 2020-09-24 | キオクシア株式会社 | 半導体記憶装置 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
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JP3651689B2 (ja) * | 1993-05-28 | 2005-05-25 | 株式会社東芝 | Nand型不揮発性半導体記憶装置及びその製造方法 |
JPH1093083A (ja) * | 1996-09-18 | 1998-04-10 | Toshiba Corp | 半導体装置の製造方法 |
JP3963678B2 (ja) * | 2001-06-23 | 2007-08-22 | 富士雄 舛岡 | 半導体記憶装置の製造方法 |
JP2005093808A (ja) * | 2003-09-18 | 2005-04-07 | Fujio Masuoka | メモリセルユニット、それを備えてなる不揮発性半導体記憶装置及びメモリセルアレイの駆動方法 |
JP5016832B2 (ja) * | 2006-03-27 | 2012-09-05 | 株式会社東芝 | 不揮発性半導体記憶装置及びその製造方法 |
JP2007317874A (ja) * | 2006-05-25 | 2007-12-06 | Toshiba Corp | 不揮発性半導体記憶装置 |
JP4468433B2 (ja) * | 2007-11-30 | 2010-05-26 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP5142692B2 (ja) * | 2007-12-11 | 2013-02-13 | 株式会社東芝 | 不揮発性半導体記憶装置 |
KR101065140B1 (ko) * | 2008-03-17 | 2011-09-16 | 가부시끼가이샤 도시바 | 반도체 기억 장치 |
US7910979B2 (en) * | 2008-07-08 | 2011-03-22 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
JP5112201B2 (ja) | 2008-07-11 | 2013-01-09 | 株式会社東芝 | 不揮発性半導体記憶装置 |
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