JP2013197537A - 不揮発性半導体記憶装置およびその製造方法 - Google Patents
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
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- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Abstract
【解決手段】不揮発性半導体記憶装置は、多層配線層を含む周辺回路を含む。前記周辺回路上には、電気的に書き換え可能な複数のメモリセルが直列に接続されてなる複数のパイプ型メモリストリングが形成されている。前記複数のパイプ型メモリストリングの各々のパイプ部に接するようにバックゲート層が形成されている。前記バックゲート層の下面と、前記下面下の前記多層配線層の最上層の配線層の上面との間には、前記バックゲート層と前記最上層の配線層とを接続するための接続部が形成されている。
【選択図】 図3
Description
Claims (6)
- 基板の表面に形成され、多層配線層を含む周辺回路と、
前記周辺回路上に形成され、電気的に書き換え可能な複数のメモリセルが直列に接続されてなる複数のメモリストリングであって、前記複数のメモリストリングの各々が、基板に対して垂直方向に延びる一対の柱状部および前記一対の柱状部の下端を連結させるように形成された連結部を含む半導体層と、前記柱状部の側面を取り囲むように形成された電荷蓄積層と、前記柱状部の側面および前記電荷蓄積層を取り囲むように形成された導電層とを含む前記複数のメモリストリングと、
前記複数のメモリストリングの各々の前記連結部に接するように形成され、前記連結部にチャネルを形成するトランジスタの制御電極として機能するバックゲート層と、
前記バックゲート層の下面と、前記下面下の前記多層配線層の最上層の配線層の上面との間に形成され、前記バックゲート層と前記最上層の配線層とを接続するための接続部とを具備してなり、
前記接続部および導電層は半導体膜で構成され、
前記最上層の配線層はメタル配線を含んでおり、前記接続部と前記メタル配線との間にはバリアメタル膜が設けられていることを特徴とする不揮発性半導体記憶装置。 - 基板の表面に形成され、多層配線層を含む周辺回路と、
前記周辺回路上に形成され、電気的に書き換え可能な複数のメモリセルが直列に接続されてなる複数のメモリストリングであって、前記複数のメモリストリングの各々が、基板に対して垂直方向に延びる一対の柱状部および前記一対の柱状部の下端を連結させるように形成された連結部を含む半導体層と、前記柱状部の側面を取り囲むように形成された電荷蓄積層と、前記柱状部の側面および前記電荷蓄積層を取り囲むように形成された導電層とを含む前記複数のメモリストリングと、
前記複数のメモリストリングの各々の前記連結部に接するように形成され、前記連結部にチャネルを形成するトランジスタの制御電極として機能するバックゲート層と、
前記バックゲート層の下面と、前記下面下の前記多層配線層の最上層の配線層の上面との間に形成され、前記バックゲート層と前記最上層の配線層とを接続するための接続部と
を具備してなることを特徴とする不揮発性半導体記憶装置。 - 前記接続部および前記導電層は半導体膜で構成されていることを特徴とする請求項2に記載の不揮発性半導体記憶装置。
- 前記最上層の配線層はメタル配線を含んでおり、前記接続部と前記メタル配線との間に設けられたバリアメタル膜をさらに具備してなることを特徴とする請求項2または3に記載の不揮発性半導体記憶装置。
- 基板の表面に形成され、多層配線層を含む周辺回路と、
前記周辺回路上に形成され、電気的に書き換え可能な複数のメモリセルが直列に接続されてなる複数のメモリストリングであって、前記複数のメモリストリングの各々が、前記基板に対して垂直方向に延びる一対の柱状部および前記一対の柱状部の下端を連結させるように形成された連結部を含む半導体層と、前記柱状部の側面を取り囲むように形成された電荷蓄積層と、前記柱状部の側面および前記電荷蓄積層を取り囲むように形成された導電層とを含む前記複数のメモリストリングと、
前記複数のメモリストリングの各々の前記連結部に接するように形成され、前記連結部にチャネルを形成するトランジスタの制御電極として機能するバックゲート層と、
前記バックゲート層の下面と、前記下面下の前記多層配線層の最上層の配線層の上面との間に形成され、前記バックゲート層と前記最上層の配線層とを接続するための接続部とを具備してなる不揮発性半導体記憶装置の製造方法であって、
前記基板の表面に、前記多層配線層を含む前記周辺回路を形成する工程と、
前記周辺回路上に層間絶縁膜を形成する工程と、
前記層間絶縁膜に前記多層配線層の最上層の配線層に達する接続孔を形成する工程と、
前記接続孔を埋め込むように前記層間絶縁膜上に導電膜を形成し、前記導電膜からなる前記接続部および前記導電膜からなる前記バックゲート層を形成する工程と
を具備してなることを特徴とする不揮発性半導体記憶装置の製造方法。 - 前記層間絶縁膜に前記バックゲート層に対応する溝を形成する工程をさらに具備し、前記溝および前記接続孔を埋め込むように前記導電膜を形成した後、研磨プロセスにより、前記導電膜を平坦化することにより、前記導電膜からなる前記接続部および前記導電膜からなる前記バックゲート層を形成することを特徴とする請求項5に記載の不揮発性半導体記憶装置の製造方法。
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US13/607,702 US20130248975A1 (en) | 2012-03-22 | 2012-09-08 | Non-volatile semiconductor memory device and its manufacturing method |
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US9431420B2 (en) | 2014-07-09 | 2016-08-30 | Samsung Electronics Co., Ltd. | Semiconductor devices including vertical cell strings that are commonly connected |
US9733178B2 (en) | 2014-07-24 | 2017-08-15 | Samsung Electronics Co., Ltd. | Spectral ellipsometry measurement and data analysis device and related systems and methods |
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JP2017010951A (ja) | 2014-01-10 | 2017-01-12 | 株式会社東芝 | 半導体記憶装置及びその製造方法 |
KR102171263B1 (ko) | 2014-08-21 | 2020-10-28 | 삼성전자 주식회사 | 제어된 다결정 반도체 박막을 포함하는 집적회로 소자 및 그 제조 방법 |
KR102307060B1 (ko) | 2014-12-03 | 2021-10-01 | 삼성전자주식회사 | 반도체 소자 |
KR102550789B1 (ko) * | 2016-03-28 | 2023-07-05 | 삼성전자주식회사 | 반도체 장치 |
KR102604053B1 (ko) | 2016-05-09 | 2023-11-20 | 삼성전자주식회사 | 수직형 메모리 장치 |
KR102504835B1 (ko) | 2017-11-06 | 2023-02-28 | 삼성전자 주식회사 | 기판 제어 회로를 포함하는 수직 구조의 메모리 장치 및 이를 포함하는 메모리 시스템 |
US11024638B2 (en) * | 2018-08-29 | 2021-06-01 | Samsung Electronics Co., Ltd. | Three-dimensional semiconductor device |
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JP2003188252A (ja) * | 2001-12-13 | 2003-07-04 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2011187794A (ja) * | 2010-03-10 | 2011-09-22 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
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US9431420B2 (en) | 2014-07-09 | 2016-08-30 | Samsung Electronics Co., Ltd. | Semiconductor devices including vertical cell strings that are commonly connected |
US9733178B2 (en) | 2014-07-24 | 2017-08-15 | Samsung Electronics Co., Ltd. | Spectral ellipsometry measurement and data analysis device and related systems and methods |
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