KR20010104295A - 반도체장치 및 그의 제조방법 - Google Patents
반도체장치 및 그의 제조방법 Download PDFInfo
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- KR20010104295A KR20010104295A KR1020010025977A KR20010025977A KR20010104295A KR 20010104295 A KR20010104295 A KR 20010104295A KR 1020010025977 A KR1020010025977 A KR 1020010025977A KR 20010025977 A KR20010025977 A KR 20010025977A KR 20010104295 A KR20010104295 A KR 20010104295A
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- South Korea
- Prior art keywords
- conductive layer
- film
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- insulating film
- electrode
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Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- G—PHYSICS
- G02—OPTICS
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Abstract
Description
Claims (39)
- 절연면에 형성된 반도체층과, 상기 반도체층에 형성된 절연막과, 상기 절연막에 형성된 게이트전극을 포함하는 반도체장치에 있어서,상기 게이트전극은 하부층으로서 제 1 폭을 갖는 제 1 도전층과 상부층으로서 상기 제 1 폭보다 작은 제 2 폭을 갖는 제 2 도전층으로 된 적층구조를 가지며,상기 반도체층은 상기 제 2 도전층과 중첩하는 채널형성영역과, 상기 제 1 도전층과 부분적으로 중첩하는 한쌍의 저농도불순물영역과, 고농도불순물영역으로 구성되는 소스영역 및 드레인영역을 가지는 것을 특징으로 하는 반도체장치.
- 제 1 항에 있어서,상기 한쌍의 저농도불순물영역들은 상기 채널형성영역과 상기 소스영역사이 및 상기 채널형성영역과 상기 드레인영역사이에 각기 위치되는 것을 특징으로 하는 반도체장치.
- 제 1 항에 있어서,상기 제 1 도전층의 단부는 테이퍼형태를 갖는 것을 특징으로 하는 반도체 장치.
- 제 1 항에 있어서,제 1 항에 있어서,상기 제 1 도전층의 단부는 상기 절연막을 개재하여 상기 채널형성영역과 상기 소스영역사이 또는 상기 채널형성영역과 상기 드레인영역사이에 각기 위치되는 것을 특징으로 하는 반도체장치.
- 제 1 항에 있어서,상기 한쌍의 저농도 불순물영역들과 중첩하는 영역에서의 상기 절연막의 막두께는 상기 채널형성영역으로부터의 거리가 증가함에 따라 감소하는 것을 특징으로 하는 반도체장치.
- 제 1 항에 있어서, 상기 반도체장치는 액정표시장치인 것을 특징으로 하는 반도체장치.
- 제 1 항에 있어서, 상기 반도체장치는 전기발광 표시장치인 것을 특징으로 하는 반도체장치.
- 제 1 항에 있어서,상기 반도체장치는 비디오카메라, 디지탈카메라, 프로젝터, 고글형 표시장치, 차량용 네비게이션시스템, 퍼스날 컴퓨터, 휴대형 정보단말기, 디지탈 비디오디스크재생기, 전자식 게임장치로 구성되는 군에서 선택되는 것을 특징으로 하는반도체장치.
- 반도체장치의 제조방법에 있어서,절연면상에 반도체층을 형성하는 단계와,상기 반도체층에 절연막을 형성하는 단계와,제 1 폭을 갖는 제 1 도전층과 제 2 도전층으로 된 적층구조를 포함하는 제 1 전극을 상기 절연막상에 형성하는 단계와,상기 제 1 전극을 마스크로서 사용하여 상기 반도체층에 불순물원소를 주입하여 고농도불순물영역을 형성하는 단계와,상기 제 2 도전층을 식각하여 상기 제 1 폭을 갖는 상기 제 1 도전층과 제 2 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 2 전극을 형성하는 단계와,상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 불순물원소를 주입하여 저농도불순물영역을 형성하는 단계와,상기 제 1 도전층을 식각하여 제 3 폭을 갖는 상기 제 1 도전층과 상기 제 2 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 3 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서,상기 제 2 폭은 상기 제 1 폭보다 작은 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서,상기 제 3 폭은 상기 제 1 폭보다 작고, 상기 제 2 폭보다는 큰 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서,상기 불순물원소는 n형 도전성과 p형 도전성 중 하나를 상기 반도체층에 제공하는 불순물원소인 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서, 상기 제 1 도전층의 단부에서의 테이퍼각이 상기 제 1 전극내의 상기 제 2 도전층의 단부에서의 테이퍼각보다 큰 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서, 상기 제 1 도전층의 단부에서의 테이퍼각이 상기 제 2 전극내의 상기 제 2 도전층의 단부에서의 테이퍼각보다 작은 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서, 상기 제 3 전극내의 상기 제 1 도전층의 단부에서의 테이퍼각이 상기 제 2 전극내의 상기 제 1 도전층의 단부에서의 테이퍼각과 동일한 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서,상기 제 1 전극을 형성하는 단계는상기 절연막상에 제 1 도전막과 제 2 도전막을 적층하는 단계와,상기 제 2 도전막에 대해 1차 식각공정을 실시하는 단계와,상기 제 1 도전막에 대해 2차 식각공정을 실시하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서,상기 절연막을 상기 제 3 전극의 형성과 동시에 상기 고농도불순물영역의 일부를 노출시키도록 제거하는 것을 특징으로 하는 반도체장치의 제조방법.
- 반도체장치의 제조방법에 있어서,절연면상에 반도체층을 형성하는 단계와,상기 반도체층에 절연막을 형성하는 단계와,제 1 폭을 갖는 제 1 도전층과 제 2 도전층으로 된 적층구조를 포함하는 제 1 전극을 상기 절연막상에 형성하는 단계와,상기 제 2 도전층을 식각하여 상기 제 1 폭을 갖는 상기 제 1 도전층과 제 2 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 2 전극을 형성하는 단계와,상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 불순물원소를 주입하여 고농도불순물영역을 형성하는 단계와,상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 상기 불순물원소를 상기 제 1 도전층을 통해 주입하여 저농도불순물영역을 형성하는 단계와,상기 제 1 도전층을 식각하여 제 3 폭을 갖는 상기 제 1 도전층과 상기 제 2 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 3 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 반도체장치의 제조방법에 있어서,절연면상에 반도체층을 형성하는 단계와,상기 반도체층에 절연막을 형성하는 단계와,제 1 폭을 갖는 제 1 도전층과 제 2 도전층으로 된 적층구조를 포함하는 제 1 전극을 상기 절연막상에 형성하는 단계와,상기 제 2 도전층을 식각하여 상기 제 1 폭을 갖는 상기 제 1 도전층과 제 2 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 2 전극을 형성하는 단계와,상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 불순물원소를 주입하여 저농도불순물영역과 고농도불순물영역을 형성하는 단계와,상기 제 1 도전층을 식각하여 제 3 폭을 갖는 상기 제 1 도전층과 상기 제 2폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 3 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 18 항에 있어서,상기 제 2 폭은 상기 제 1 폭보다 작은 것을 특징으로 하는 반도체장치의 제조방법.
- 제 19 항에 있어서,상기 제 2 폭은 상기 제 1 폭보다 작은 것을 특징으로 하는 반도체장치의 제조방법.
- 제 18 항에 있어서,상기 제 3 폭은 상기 제 1 폭보다 작고, 상기 제 2 폭보다는 큰 것을 특징으로 하는 반도체장치의 제조방법.
- 제 19 항에 있어서,상기 제 3 폭은 상기 제 1 폭보다 작고, 상기 제 2 폭보다는 큰 것을 특징으로 하는 반도체장치의 제조방법.
- 제 18 항에 있어서,상기 불순물원소는 n형 도전성과 p형 도전성 중 하나를 상기 반도체층에 제공하는 불순물원소인 것을 특징으로 하는 반도체장치의 제조방법.
- 제 19 항에 있어서,상기 불순물원소는 n형 도전성과 p형 도전성 중 하나를 상기 반도체층에 제공하는 불순물원소인 것을 특징으로 하는 반도체장치의 제조방법.
- 제 18 항에 있어서,상기 제 1 전극을 형성하는 단계는상기 절연막상에 제 1 도전막과 제 2 도전막을 적층하는 단계와,상기 제 2 도전막에 대해 1차 식각공정을 실시하는 단계와,상기 제 1 도전막에 대해 2차 식각공정을 실시하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 19 항에 있어서,상기 제 1 전극을 형성하는 단계는상기 절연막상에 제 1 도전막과 제 2 도전막을 적층하는 단계와,상기 제 2 도전막에 대해 1차 식각공정을 실시하는 단계와,상기 제 1 도전막에 대해 2차 식각공정을 실시하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 반도체장치의 제조방법에 있어서,절연면상에 반도체층을 형성하는 단계와,상기 반도체층에 절연막을 형성하는 단계와,제 1 도전막과 제 2 도전막을 상기 절연막상에 적층하는 단계와,제 1 폭을 갖는 제 2 도전층을 형성하는 단계와,상기 제 1 폭을 갖는 상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 불순물원소를 주입하여 고농도불순물영역을 형성하는 단계와,상기 제 1 도전층을 식각하여 제 2 폭을 갖는 상기 제 1 도전층과 상기 제 3 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 1 전극을 형성하는 단계와,상기 제 2 도전층을 식각하여 제 2 폭을 갖는 상기 제 1 도전층과 제 4 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 2 전극을 형성하는 단계와,상기 제 4 폭을 갖는 상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 상기 불순물원소를 상기 제 1 도전층을 통해 주입하여 저농도불순물영역을 형성하는 단계와,상기 제 1 도전층을 식각하여 제 5 폭을 갖는 상기 제 1 도전층과 상기 제 4 폭을 갖는 상기 제 2 도전층으로 된 적층구조를 포함하는 제 3 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서, 상기 제 3 전극의 형성 후상기 제 3 전극을 덮기 위한 제 1 층간절연막을 형성하는 단계와,상기 반도체층내의 상기 불순물원소를 활성화시키기 위한 1차 열처리를 실시하는 단계와,상기 제 1 층간절연막을 덮기 위한 제 2 층간절연막을 형성하는 단계와,상기 제 2 층간절연막의 형성 후 상기 1차 열처리에서 보다 낮은 온도로 2차 열처리를 실시하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 18 항에 있어서, 상기 제 3 전극의 형성 후상기 제 3 전극을 덮기 위한 제 1 층간절연막을 형성하는 단계와,상기 반도체층내의 상기 불순물원소를 활성화시키기 위한 1차 열처리를 실시하는 단계와,상기 제 1 층간절연막을 덮기 위한 제 2 층간절연막을 형성하는 단계와,상기 제 2 층간절연막의 형성 후 상기 1차 열처리에서 보다 낮은 온도로 2차 열처리를 실시하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 19 항에 있어서, 상기 제 3 전극의 형성 후상기 제 3 전극을 덮기 위한 제 1 층간절연막을 형성하는 단계와,상기 반도체층내의 상기 불순물원소를 활성화시키기 위한 1차 열처리를 실시하는 단계와,상기 제 1 층간절연막을 덮기 위한 제 2 층간절연막을 형성하는 단계와,상기 제 2 층간절연막의 형성 후 상기 1차 열처리에서 보다 낮은 온도로 2차 열처리를 실시하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 28 항에 있어서, 상기 제 3 전극의 형성 후상기 제 3 전극을 덮기 위한 제 1 층간절연막을 형성하는 단계와,상기 반도체층내의 상기 불순물원소를 활성화시키기 위한 1차 열처리를 실시하는 단계와,상기 제 1 층간절연막을 덮기 위한 제 2 층간절연막을 형성하는 단계와,상기 제 2 층간절연막의 형성 후 상기 1차 열처리에서 보다 낮은 온도로 2차 열처리를 실시하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 반도체장치의 제조방법에 있어서,절연면상에 반도체층을 형성하는 단계와,상기 반도체층에 절연막을 형성하는 단계와,제 1 도전막과 제 2 도전막을 상기 절연막상에 적층하는 단계와,제 1 폭을 갖는 제 2 도전층을 형성하는 단계와,상기 제 1 폭을 갖는 상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 불순물원소를 주입하여 고농도불순물영역을 형성하는 단계와,상기 제 2 도전층을 식각하여 제 2 폭을 갖는 상기 제 2 도전층을 형성하는단계와,상기 제 2 폭을 갖는 상기 제 2 도전층을 마스크로서 사용하여 상기 반도체층에 상기 불순물원소를 상기 제 1 도전층을 통해 주입하여 저농도불순물영역을 형성하는 단계와,상기 제 1 도전층을 식각하여 제 3 폭을 갖는 상기 제 1 도전층과 상기 제 2 폭을 갖는 상기 제 2 도전층의 적층구조를 포함하는 전극을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 33 항에 있어서, 상기 제 3 전극의 형성 후상기 제 3 전극을 덮기 위한 제 1 층간절연막을 형성하는 단계와,상기 반도체층내의 상기 불순물원소를 활성화시키기 위한 1차 열처리를 실시하는 단계와,상기 제 1 층간절연막을 덮기 위한 제 2 층간절연막을 형성하는 단계와,상기 1차 열처리에서 보다 낮은 온도로 2차 열처리를 실시하는 단계를 추가로 포함하는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 9 항에 있어서,상기 반도체장치는 비디오카메라, 디지탈카메라, 프로젝터, 고글형 표시장치, 차량용 네비게이션시스템, 퍼스날 컴퓨터, 휴대형 정보단말기, 디지탈 비디오디스크재생기, 전자식 게임장치로 구성되는 군에서 선택되는 것을 특징으로 하는반도체장치의 제조방법.
- 제 18 항에 있어서,상기 반도체장치는 비디오카메라, 디지탈카메라, 프로젝터, 고글형 표시장치, 차량용 네비게이션시스템, 퍼스날 컴퓨터, 휴대형 정보단말기, 디지탈 비디오디스크재생기, 전자식 게임장치로 구성되는 군에서 선택되는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 19 항에 있어서,상기 반도체장치는 비디오카메라, 디지탈카메라, 프로젝터, 고글형 표시장치, 차량용 네비게이션시스템, 퍼스날 컴퓨터, 휴대형 정보단말기, 디지탈 비디오디스크재생기, 전자식 게임장치로 구성되는 군에서 선택되는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 28 항에 있어서,상기 반도체장치는 비디오카메라, 디지탈카메라, 프로젝터, 고글형 표시장치, 차량용 네비게이션시스템, 퍼스날 컴퓨터, 휴대형 정보단말기, 디지탈 비디오디스크재생기, 전자식 게임장치로 구성되는 군에서 선택되는 것을 특징으로 하는 반도체장치의 제조방법.
- 제 33 항에 있어서,상기 반도체장치는 비디오카메라, 디지탈카메라, 프로젝터, 고글형 표시장치, 차량용 네비게이션시스템, 퍼스날 컴퓨터, 휴대형 정보단말기, 디지탈 비디오디스크재생기, 전자식 게임장치로 구성되는 군에서 선택되는 것을 특징으로 하는 반도체장치의 제조방법.
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- 2001-05-12 KR KR1020010025977A patent/KR100803231B1/ko active IP Right Grant
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100504537B1 (ko) * | 2002-04-17 | 2005-08-01 | 엘지.필립스 엘시디 주식회사 | 박막 트랜지스터의 제조 방법 |
Also Published As
Publication number | Publication date |
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US8470647B2 (en) | 2013-06-25 |
US20010041392A1 (en) | 2001-11-15 |
MY138802A (en) | 2009-07-31 |
TWI224806B (en) | 2004-12-01 |
US20070111424A1 (en) | 2007-05-17 |
KR100803231B1 (ko) | 2008-02-14 |
US7151015B2 (en) | 2006-12-19 |
US20040195590A1 (en) | 2004-10-07 |
TWI286338B (en) | 2007-09-01 |
SG112805A1 (en) | 2005-07-28 |
US7161177B2 (en) | 2007-01-09 |
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